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Prepared by: Juan Carlos Pastrana
ON Semiconductor
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APPLICATION NOTE
Proprietary Active Leading Edge Blanking (LEB)
INTRODUCTION
Power converters using secondary side controllers
provide better transient response, higher efficiency and
usually require less components than their primary side
referenced counterparts. However, secondary side
controllers require a primary side referenced bias supply to
start operation. After start-up, the controller power can be
provided from the secondary side.
The NCP1030 incorporates in a single IC all the active
power, control logic and protection circuitry required for
implementing, with a minimum of external components, a
highly integrated isolated bias supply. The features included
in the NCP1030 can result in a footprint area reduction by up
to 91% compared to a solution implemented using discrete
components.
The NCP1030 Power Switch Circuit is rated at 200 V,
making it ideal for 48 V Telecom and 42 V automotive
applications. In addition, this IC can operate from an
existing 12 V supply. The NCP1030 includes an extensive
set of features including:
On Board Power Switch: Eliminates the need for an
external switch. As the Power Switch characteristics
are well known the gate drive is tailored to control
switching transitions and help reduce electromagnetic
interference (EMI).
An Internal Start-up Regulator: Provides power to
the NCP1030 during start-up. After start-up, the
regulator is disabled, thus reducing power consumption.
The regulator can be powered directly from the input
line.
Internal Error Amplifier: Allows the implementation
of an isolated supply using primary side regulation
without the need for an optocoupler.
Internal Cycle by Cycle Current Limit: Eliminates
the need for external sensing components. The
programmed current limit is 500 mA.
Symbol
Min
Max
Input Voltage
Vin
35 V
76 V
Frequency
250 kHz
300 kHz
Peak Efficiency
80%
Output Voltage
Vout
10.8 V
13.2 V
Output Current
Iout
0.017 A
0.17 A
Output Power
Pout
2.0 W
AND8119/D
FLYBACK CONVERTER
D1
Cout
Np
Vout (OUTPUT1)
Ns
+
Snubber
CCC
VCC (OUTPUT2)
R1
PWM
Controller
Vstress + Vin(max) )
EA
M1
+
VREF
R2
Parameter
Ns
(Vout ) VfD1)
(0.8 * DC)
Magnetizing
Inductance @ 0.4 A
1,2-3,4
102 mH
Leakage Inductance
1,2-3,4
0.955 mH
1-4
2-3
5-6
7-8
0.655 W
0.82 W
0.248 W
0.248 W
Cout +
Iout
f
(1 * DC)
Vdroop
(eq. 5)
(eq. 1)
DC
Max
Np
is calculated
Ns
RDS(on)))
MAIN OUTPUT
using Equation 2
(Vin * (IPPK
Ns
Min
Resonant Frequency
Np
Terminals
DC Resistance
Np
(eq. 3)
DESIGN PROCEDURE
V
DC
Lp + in(min)
f IPPK
7 W)) 0.4
(0.8 * 0.4)
(35 V * (0.4 A
(12 V ) 0.5 V)
D2
Vin
(eq. 2)
ISPK + IPPK
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2
Np
Ns
(eq. 6)
AND8119/D
The voltage across the rectification diode is given by
Equation 7.
Cout
Rout Vout
(eq. 7)
+
NNps
D1
TX
D2
Vin
RESR
Rout(eq)
Cout(eq)
Z1
A
Zf
PWM
Controller
EA
+
+
VREF
NCP1030
Rbias
Rout(eq) h
2 f Lp
(eq. 9)
(eq. 8)
H(f) +
sRESRCout(eq) ) 1
sCout(eq) (RESR ) Rout(eq)) ) 1
(eq. 10)
FEEDBACK LOOP
fz1 +
1
2p Cout RESR
(eq. 11)
1
2p Rout Cout
(eq. 12)
fp1 [
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3
AND8119/D
0
50
Magnitude
Phase
30
-20
20
-30
10
-40
-50
-10
-60
-20
-70
-30
-80
-40
-90
102
103
104
105
fp3 +
-10
30
-20
20
-30
10
-40
-50
-10
-60
-20
-70
-30
-80
-40
-90
-50
101
10 2
10 3
10 4
R4 +
(eq. 15)
Frequency (Hz)
VCC
* R5
Ibias1
Z1
C2
EA
Output
(R5)
R7
Rbias
Zf
R6
R4
VREF
Parameter
Frequency (kHz)
Magnitude (dB)
fP1 (@ GMOD1)
0.091
fP1 (@ GMOD2)
0.009
fP2
fP3
23.9
fZ1
77.4
fZ2
0.482
GEA
6.03
(eq. 18)
Input
C6
(eq. 17)
RR7
GEA + 20 log
Ibias1
(eq. 16)
-100
10 6
10 5
(C2 ) C6)
2pR7C2C6
V
R5 + REF
Ibias1
Angle (degrees)
Magnitude (dB)
40
(eq. 14)
Frequency (Hz)
50
1
2pR7C2
fz2 +
-100
106
-50
101
-10
Angle (degrees)
Magnitude (dB)
40
sR7C2 ) 1
C7 C6
7)C6
(eq. 13)
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4
AND8119/D
60
Magnitude (dB)
50
40
-20
30
-30
20
-40
10
-50
-60
-10
-70
-20
-80
-30
-90
-40
102
103
104
105
-100
106
R2
Frequency (Hz)
VOV
-
fCO
fz
fCO
qp + tan - 1
fp
qz + tan - 1
R1 [
R3 [
(eq. 21)
-100
-110
40
-120
Phase
(Vin = 76V,
Rout = 720W)
Magnitude
(Vin = 36V,
Rout = 72W)
30
20
10
0
Magnitude
(Vin = 76V,
Rout = 720W)
-10
-20
101
10 2
103
-130
-140
-150
105
(eq. 24)
-160
-170
104
R3 DVin
Vin(min)
OSCILLATOR FREQUENCY
Angle (degrees)
Magnitude (dB)
-90
50
(eq. 22)
-80
60
Vin(max)
Ibias2
(eq. 23)
VOV
R1 Vin(min)
Vin(min)Vin(max) * VOV(DVin ) Vin(min) )
R2 [
(eq. 20)
80
VUV
C8 R3
(eq. 19)
C7
70
Ibias2
+
101
UNDER/OVERVOLTAGE DETECTORS
-10
Angle (degrees)
Magnitude
Phase
-180
10 6
Frequency (Hz)
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5
AND8119/D
40
TX
30
R9
C9
20
10
0
-10
-20
LC Filter Output Impedance
-30
-40
102
(eq. 25)
C10
0.022
out
VIout
1:2.78 MBRA160T3
2.2
2.2
0.022
(eq. 26)
680p
499
22
NCP1030
GND VDRAIN
VCC
CT
UV
VFB
OV
COMP
2.2
0.01
45k3
34k
0.033 10k
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6
10
4k99
0.01
680p
+
12V
-
MBRA160T3
1M
100 p
C5
106
LAYOUT CONSIDERATIONS
INPUT FILTER
Vin
105
104
FREQUENCY (Hz)
103
MURA110T3
D3
MAGNITUDE (dB)
+
Vin
-
1k30
AND8119/D
DESIGN VERIFICATION
Value
Vendor
Part Number
C1
680 pF
Vishay
VJ0805A681JXA
C2
0.033 mF
Vishay
VJ0805Y333KXXA
C3
22 mF
TDK
C4532X5R1E226M
C4
2.2 mF
TDK
C4532X7R1H225M
C5
2.2 mF
TDK
C4532X7R2A225M
C6
680 pF
Vishay
VJ0805A681JXA
C7, C8
0.01 mF
Vishay
VJ0805Y103KXXAT
C9
100 pF
TDK
C1608C0G2E101J
C10
0.022 mF
TDK
C2012X7RE223K
D1, D2
ON Semiconductor
MBRA160T3
D3
ON Semiconductor
MURA110T3
J1-J4
Mill-Max
Terminal
L1
2.2 mH
Vishay
IMC-1210
R1
1 MW
Vishay
CRCW08051004F
R2
45.3 kW
Vishay
CRCW08054532F
R3
34 kW
Vishay
CRCW08053402F
R4
4.99 kW
Vishay
CRCW08054991F
R5
1.30 kW
Vishay
CRCW08051301F
R6
10 W
Vishay
CRCW080510R0F
R7
10 kW
Vishay
CRCW08051002F
R8
0W
Vishay
CRCW0805000ZJ
R9
499 W
Vishay
CRCW12104990F
TX1
Coilcraft
B0226-E
U1
ON Semiconductor
NCP1030DR2
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7
AND8119/D
Line and load regulation are
Equations 27 and 28, respectively.
D2
To Converter
CCC
VCC
DVout
RegLINE +
DVin
R6
To Error
Amplifier
RegLOAD +
1:1
Z1
calculated
(eq. 27)
(eq. 28)
REF
Rbias
using
Network
Analyzer
12.0
11.9
11.8
11.7
11.6
11.5
50
Magnitude (dB)
30
11.3
Vin = 48V
Vin = 76V
11.2
20
11.1
10
11.0
0
0
-10
75
100
125
150
175
102
103
104
105
106
Frequency (Hz)
85
Vin = 36V
Vin = 48V
75
Vin = 76V
70
Vin = 48 V
Iout = 87 mA
Vout = 11.6 V
50 ms/DIV
65
60
0
200
-40
80
50
-30
-50
25
-20
h, Efficiency (%)
Vin = 36V
11.4
Vin = 36 V
Rout = 72 W
40
25
50
75
100
125
150
175
200
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8
Vin = 48 V
Iout = 127 mA
AND8119/D
Vout = 11.45 V
Iout = 170 mA
DSS Operation
OUTPUT2
OUTPUT1 (Isolated)
50 ms/DIV
0V
Vin = 48 V
SUMMARY
Iout = 170 mA
Vout = 11.33 V
2.0 ms/DIV
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AND8119/D
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be
validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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AND8119/D