EEE 52: Electronic Circuits Laboratory I

Project: Multi-stage Amplier with Adjustable Gain

Second Semester A.Y. 2015-2016

1 Objective
Until now, the labs have focused primarily on characterizing circuits.

You have been asked to analyze, build, and

characterize a number of dierent ampliers and biasing circuits, but only a small amount of design work (e.g. picking
resistors or bias voltages). In this project, you are given the freedom to design an amplier from the ground up: choosing
and designing the topology, biasing, and amplier stages.
In the previous laboratory exercises, you have seen one very common application of analog circuits: audio processing.
In this project, you will design, build, and analyze your own amplier, capable of amplifying a small-amplitude signal
and driving a low-impedance speaker.
The most important aspect of this lab is not simply getting your amplier to work. The crucial component of this
project is the design and analysis of the amplier, showing your understanding of the material. You will need to justify
the choices you make in your design both qualitatively and quantitatively in a report due at the end of the semester. A
quality report (not necessarily a long write-up) with correct, relevant, and insightful analysis will be required to obtain
full credit for the project.

2 Materials
The materials for this project will vary based on your implementation.

The only restriction will be on the type of

transistor that you may use. You may use as many 2N4401 NPN BJTs, 2N4403 PNP BJTs, 2N3904 NPN BJTs, 2N3906
PNP BJTs, resistors, and capacitors that you need for your design (within reason). You are only allowed to use a single
power supply of

9V .

You may not use any DC power supply to bias your circuits aside from providing the power rails.

Naturally, you cannot use any op-amps or similar integrated devices in your amplier (unless you build one yourself out
of discrete components).

3 Bias Voltage
In the previous lab exercises, you used a DC source to bias the base of a transistor. However, in the case of amplifying
the small signal produced only by the function generator, the signal has no oset voltage to set the bias. How do we add
a DC oset to the signal coming out of the function generator to bias the transistor in the proper operation region? In
this section, you will be provided with a starting point on biasing your transistor.

(a)

(b)

Figure 1: (a) A voltage source built using a diode connected transistor and (b) a schematic for adding the DC voltage
produced by the voltage source to an AC signal.

In Lab 5, you learned how to build a voltage source with a diode connected transistor, such as the one shown in Figure
1a. If you want to add this DC voltage to the AC signal from the function generator, you will have to use a technique
shown in Figure 1b. From the DC point of view, the capacitor is an open circuit, so the DC voltage has to go into the

amplier. From the small signal's perspective, the DC voltage source is ground to the AC signal. Therefore, you need to
put a LARGE resistor (around

100k)

in front of the DC voltage source to prevent AC signal from owing out to AC

RBIAS

ground. So what value should the resistance

have? This depends on the required voltage output. For example, if

you want the voltage source shown in Figure 1a to produce a voltage

VOU T ,

you can use KVL and the current equation

for the transistor to nd the required resistance:

VOU T

VOU T = VCC IBIAS RBIAS



VOU T
1
VT
1+
RBIAS
= VCC IS e

RBIAS =

T
VCC VOU T VOU
 e VT

IS 1 + 1

4 Bias Current
Besides voltage biasing, sometimes you may want to use current sources to bias your circuit. For example, the common
emitter amplier shown in Figure 2 uses a current mirror instead of a resistor for biasing. The resulting increase in the
output resistance of the amplier increases the gain of the amplier.
If you are building your amplier with BJT's, you may realize that the theory predicts the gain of a common emitter
amplier with current mirror pull-up network is independent from bias current. In this case, just choose a bias current
of around

1mA.

Figure 2: A common emitter amplier with a current mirror as the pull-up network.

5 Guidelines and Specications

Be sure to read the following guidelines before beginning your design. Any designs not meeting these guidelines will not
receive full credit. You must show your working design as part of your score on the project.

The output must drive an

You must have some type of gain adjust control. You must be able to adjust the gain from

The peak-to-peak voltage across the speaker must be at least

frequencies ranging from

speaker.

500Hz

to

20kHz

for a

20mV

to

250.

peak-to-peak sine wave input, for

when your gain adjust control is set to the minimum. This means your

entire amplier must have a gain of at least

1V

50

50

for frequencies from

The amplied signal must be free of clipping for a

20mV

500Hz

to

20kHz .

peak-to-peak sine wave input when your gain adjust

control is set to the minimum.

You are allowed to use resistive dividers for biasing EXCEPT for the common emitter topology. You can use as
many current mirrors as you want.

You are NOT allowed to use any operational ampliers, except to invert the input signal for use with a dierential
amplier (if you decide to make your amplier dierential).

You MUST use a power amplier (Class A or Class AB) for your last stage.

6 Report
The report must be submitted via email. The following guidelines must be followed in your report for full credit.

Include a diagram of your circuit including values for all resistors, capacitors, and voltage sources (which should
only include your voltage rails).

Justify your topology. Explain why you chose your stages as you did, why you biased them like you did, etc.

Show hand calculations for the bias voltages and currents in your amplier.

Show hand calculations for the gain and output impedance.

Include measured magnitude and phase Bode plots for your amplier without the load attached.

Include the measured output impedance of your amplier.

Include the measured values of the bias voltages and currents in your amplier (the same ones for which you showed
hand calculations).

Calculate the total power consumption of your amplier using the bias currents you measured.

Include a SPICE netlist or a SIMetrix schematic of your amplier and simulation results (voltage gain, Bode plots,
power, etc.). Compare this with your measurements. Give reasons why your simulation results match(or does not
match) your measurements.

7 Grading
Milestones:
Milestone 1 (Deadline: May 3-9)

Simulation for the whole circuit with load and with full specications (50 points)

5 points deduction per week

submission after class on the day of deadline up to one week will get the same deduction equivalent for one week

maximum of 15 points deduction, no more deductions after.

Milestone 2 (Deadline: May 10-16)

Implementation of the last few stages with gain at least 15 (50 points)

5 points deduction per week

submission after class on the day of deadline up to one week will get the same deduction equivalent for one week

maximum of 15 points deduction, no more deductions after

Milestone 3 (Deadline: May 17-23)

Complete implementation and with full specications (100 points)

5 points deduction per week

maximum of 15 points deduction

submission after class on the day of deadline up to one week will get the same deduction equivalent for one week

To get INC grade

If your total score from all submitted output including DP milestones (assuming zero for unsubmitted/unnished
requirements) is <60%, the student receives a failing grade (5.0)

If your total score from all submitted output including DP milestones (assuming zero for unsubmitted/unnished
requirements) is >=60% and the DP minimum specs are not met, the student receives a grade of INC.

If your total score from all submitted output including DP milestones (assuming zero for unsubmitted/unnished
requirements) is >=60% and the DP minimum specs are met, the student receives a passing grade.

Minimum specications

Minimum specs to be given a passing grade (not INC) or to complete an INC is to have an adjustable gain from 50
to 120 without distortion from 500 Hz to 20 kHz.

8 Hints
General hints:

Knowing the desired gain for a given load, you should be able to estimate gain and output impedance gures
required of your amplier. You can use these gures to decide on a topology.

One of your rst debugging steps should be to test the region of operation of your transistors with a digital
multi-meter.

Test your amplier stages independently if you are having trouble locating a problem.

If you capacitively couple an AC signal onto a voltage source (made from a diode-connected transistor), use a large
base resistor to prevent the AC signal from seeing a small-signal ground.

You can use potentiometers to load your amplier stages for more exible biasing (compared to xed-value resistors).

If the gain of your amplier is so high that the smallest output signal from the function generator still clips, try using
a resistor voltage divider (FOR TESTING PURPOSES ONLY) to attenuate the output waveform from the function
generator. NOTE: If you are AC-coupling your input, this will aect your frequency response characteristics, use
small resistors (less than

1k)

to minimize unwanted eects.

If the output DC level of a stage is too high/low to bias the input for the next stage, consider switching the transistor
in the next stage to one of the opposite doping, i.e. if the voltage is too high for the NPN input transistor of the
second stage, try switching it to a PNP. Make sure to modify all your other components accordingly.

Use a potentiometer for all your biasing resistors, so they can be nely tuned.

For the gain adjust control, be careful as to where you put it. In many rst-time designs, tuning a badly placed
gain adjust control potentiometer can result in a shift in the DC level, potentially putting transistors out of the
active region.

BJT hints:

When using BJTs, make sure that you are using a matching pair of NPN and PNP BJTs. NPN and PNP BJTs
with the same prex are better matched than BJTs with dierent ones. When using the BJTs for a dierential
amplier, double check that the currents owing through both branches are roughly equal.

The 2N4401 and 2N4403 are much better matched. However, be careful when attempting to build a cascode using
these transistors. Because of their strong temperature dependence, a breeze is enough to knock all your transistors
out of the active region. The output DC level of your cascode will also vary signicantly, so it may be dicult to
avoid clipping. Adding a degeneration resistor here will help.

Be wary that the input impedance of a BJT is not innite, and decreases as you increase the collector current.
Emitter degeneration will help increase this, but will decrease gain.

Common-collector hints:

Remember that you are attempting to drive a speaker with an impedance of

8.

So, think about how much current

you will need in your output stage in order to deliver a sizable voltage across the speaker.

For BJT based designs, again be careful about input impedance. If you are experiencing a decrease in gain from
your gain stage when you attach your speaker (i.e. lose gain from the output of your gain stage), it may be that
the input impedance to the common-collector is not high enough.

If you are seeing a lot of noise when you hook up the speaker, it is often due to the fact that your transistor may
not be able to deliver enough power needed to drive the load. Consider putting 2 or more BJTs in parallel in your
common-collector stage to help deliver more power.

Since this stage will have high current, you may notice some resistors/transistors heating up. If this happens, you
may wish to put more components in parallel to dissipate heat. For example, instead of using a
two

100

resistors in parallel.

50

resistor, use