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Address Decoding
A simple introduction
2)
The number of address lines determines our availible address space and hence
the size of the memory we may use etc.
3)
You have to use some of the address lines as decoders (Signals to turn on or off
the components on the bus)
4)
Most components use a pin called the chip select and it is active low by
convention. 0V or logic (0) turns the chip on
Example 1
Using an 8 bit microprocessor which has 16 address lines we wish to implement a 16k
RAM chip.
CS active low
RAM
CPU
16K
16 address lines A0 A16
CS active low
CPU
RAM
16K
A0 A13
A14
CS active low
CPU
RAM
16K
A0 A13
A14
CS active low
CPU
RAM
16K
fffff
A0 A13
End address
A15 A12
X111
A11 A8
1111
A7 A4
1111
A3 A0
1111
7FFF
Base address
X100
0000
0000
0000
4000
If we wish to save some data in RAM we have to talk to it at between address range
4000 to 7FFF
Example 2
Using an 8 bit microprocessor which has 16 address lines we wish to implement a 16k
RAM chip and 16K program memory chip
CPU
CS active low
RAM
16K
CS active low
PM
16K
CS active low
RAM
CPU
16K
A0 A13
A0 A13
CS active low
PM
16K
A0 A13
A14
CS active low
A15
RAM
CPU
16K
A0 A13
CS active low
PM
16K
A0 A13
A14
CS active low
A15
RAM
CPU
16K
A0 A13
CS active low
PM
16K
A0 A13
A15 A12
End address
1011
Base address
1000
A11 A8
A7 A4
A3 A0
1111
8FFF
0000
0000
8000
RAM
End address
0111
1111
1111
1111
7FFF
Base address
0100
0000
0000
0000
4000
Potential problem
We still have free space $C000 FFFF. What if we put any of these addresses on the bus?
A14
CS active low
A15
RAM
CPU
16K
A0 A13
CS active low
PM
16K
A0 A13
A15 A12
A11 A8
A7 A4
A3 A0
HEX
End address
1111
1111
1111
1111
FFFF
Base address
1100
0000
0000
0000
C000
Potential solution
A14
CS active low
A15
RAM
CPU
16K
A0 A13
CS active low
PM
16K
A0 A13
A15 A12
A11 A8
A7 A4
A3 A0
HEX
1111
1111
1111
1111
FFFF
0000
C000
1100
0000
0000
Nothing will be selected