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3 authors, including:
Christopher Troy Johnston
Massey University
Massey University
SEE PROFILE
SEE PROFILE
Keywords:
1.
INTRODUCTION
118
2.
CONSTRAINTS
2.1.
Timing Constraints
2.3.
Resource Constraints
Bandwidth Constraints
3.
GENERAL TECHNIQUES
( z + 1)
= z2 + 2z + 1
(1)
Look-up Tables
4.
In its simplest form the LUT method involves precalculating the result of an expression or function for
various input combinations that represent a range of
values. Upon execution the resulting values are
loaded into either local memory on the FPGA (in
BlockRAM) or in off-chip memory. This step is
usually performed offline but another possibility is
when spare clock cycles are available, such as in the
vertical blanking period of the display. This allows
the LUT to be dynamically updated during execution.
ALGORITHM MAPPING
4.1.
Point operations
Raster-based Methods
121
4.2.
Window operations
Input
window
Output
pixel
Path of
window
4.3.
Capture source
Counter
NxM Window
Row buffer
Frame buffer
memory
(width - M)
Row buffer
(width - M)
Window operator
Global operations
Output pixel
5.
SUMMARY
[6] Webb, J. A., Steps toward architectureindependent image processing IEEE Computer,
vol. 25, no. 2, pp. 21-31, 1992.
ACKNOWLEDGEMENTS
REFERENCES
123