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INTRODUCTION
COMPARATOR ARCHITECTURES
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2
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.[5]
From the above architectures, there is always tradeoff between high speed and low power and to reduce this
trade-offs there are compensation technique used but it
may affect the performance of comparator [10].
III.
performance
[5]
[6]
[7]
180nm
180nm
180nm
0.8
900
MHz
940
ps/dec.
0.8
1.8
50
MHz
1.8 GHz
358
ps/dec.
4.2 ns
215nV
221nV
51.3
mV
5.3mV
0.3p
0.27p
0.7
fj/conv
Input-referred Offset
Voltage (mV)
7.89
7.91
3.44
Power
158.5
W
Delay
COMPARISON
IV. CONCLUSION
Having being studied and compared various
architectures, it can be concluded that double-tail
comparator presented in [6] gives the increase in
sampling frequency, reduce delay and kickback noise
voltage requirements for high speed applications as
shown in table I. Apart from the offset voltage required
all parameters satisfy the requirements for an high speed
application. Further it can be analyzed to reduce its area
which will further be helpful to use in different
applications.
V.
FUTURE SCOPE
VI.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
REFERENCES
2Mehul