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General Description
The DM9368 is a 7-segment decoder driver incorporating input latches and constant current output circuits to drive com-
Connection Diagram
Dual-In-Line Package
DS009796-1
Description
A0A3
RBO
RBI
ag
Segment Drivers-Outputs
LE
DS009796
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March 1998
7V
5.5V
0C to +70C
65C to +150C
Parameter
VCC
Supply Voltage
VIH
VIL
IOH
DM9368
Units
Min
Nom
Max
4.75
5.25
V
0.8
80
IOL
TA
ts(H)
30
ns
th(H)
ns
20
ns
ns
3.2
mA
70
An to LE
An to LE
ts(L)
th(L)
tw(L)
45
IOH
16
22
mA
ns
IOL
250
250
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these
limits. The parametric values defined in the Electrical Characteristics table are not guaranteed at the absolute maximum ratings. The Recommended Operating
Conditions table will define the conditions for actual device operation.
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
1.5
(Note 1)
VI
VOH
High Level
Output Voltage
VOL
Low Level
Output Voltage
Input Current @ Max
II
VCC = Min, II = 12 mA
VCC = Min, IOH = Max,
VIL = Max
2.4
3.4
0.2
V
0.4
mA
Input Voltage
IIH
IIL
IOS
Short Circuit
Output Current
ICC
Supply Current
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18
40
1.6
mA
57
mA
67
mA
Switching Characteristics
VCC = 5.0V, TA = 25C (See Section 1 for Waveforms and Load Configuations)
Symbol
CL = 15 pF
RL = 100
Parameter
Min
Units
Max
tPLH
Propagation Delay
50
tPHL
An to ag
75
tPLH
Propagation Delay
70
tPHL
LE to ag
90
ns
ns
Functional Description
HIGH. This allows 68s to be driven from an MOS device in
multiplex mode without the need for drivers on the data lines.
The 68 also has provision for automatic blanking of the leading and/or trailing edge zeros in a multidigit decimal number,
resulting in an easily readable decimal display conforming to
normal writing practice. In an eight digit mixed integer fraction decimal representation, using the automatic blanking capability, 0060.0300 would be displayed as 60.03. Leading
edge zero suppression is obtained by connecting the Ripple
Blanking Output (RBO) of a decoder to the Ripple Blanking
Input (RBI) of the next lower stage device. The most significant decoder stage should have the RBI input grounded; and
since suppression of the least significant integer zero in a
number is not usually desired, the RBI input of this decoder
stage should be left open. A similar procedure for the fractional part of a display will provide automatic suppression of
trailing edge zeros. The RBO terminal of the decoder can be
OR-tied with a modulating signal via an isolating buffer to
achieve pulse duration intensity modulation. A suitable signal
can be generated for this purpose by forming a variable frequency multivibrator with a cross coupled pair of TTL or DTL
gates.
Logic Symbol
DS009796-2
VCC = Pin 16
GND = PIN 8
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Truth Table
DS009796-4
DS009796-8
*The RBI will blank the display only if a binary zero is stored in the latches.
*The RBO used as an input overrides all other input conditions.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Logic Diagram
DS009796-3
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Numerical Designations
DS009796-5
DS009796-6
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DS009796-7
Note: Digit address data must be non-overlapping. Standard TTL decoders like the 9301, 9311, 7442 or 74155 must be strobed, since the address decoding
glitches could cause erroneous data to be strobed into the latches.
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Physical Dimensions
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Fairchild Semiconductor
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13th Floor, Straight Block,
Ocean Centre, 5 Canton Rd.
Tsimshatsui, Kowloon
Hong Kong
Tel: +852 2737-7200
Fax: +852 2314-0061
National Semiconductor
Japan Ltd.
Tel: 81-3-5620-6175
Fax: 81-3-5620-6179
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.