Académique Documents
Professionnel Documents
Culture Documents
OPA847
847
www.ti.com
DESCRIPTION
APPLICATIONS
HIGH DYNAMIC RANGE ADC PREAMPS
LOW NOISE, WIDEBAND, TRANSIMPEDANCE
AMPLIFIERS
WIDEBAND, HIGH GAIN AMPLIFIERS
LOW NOISE DIFFERENTIAL RECEIVERS
ULTRASOUND CHANNEL AMPLIFIERS
IMPROVED UPGRADE FOR THE OPA687,
CLC425, AND LMH6624
+5V
20
OPA847
OPA842
OPA843
OPA846
1.7pF
< 5.1dB
Noise
Figure
2k
VCM ADS5500
14-Bit
125MSPS
0.1F
850
2k
+5V
100
1.7pF
0.001F
20
INN
100pF
OPA847
5V
200
800
1750
850
39pF
2.6
2.0
1.2
70
100pF
24.6dB Gain
75
1:2
39pF
GAIN BANDWIDTH
PRODUCT (MHz)
INP
5V
50 Source
INPUT NOISE
VOLTAGE (nV/ Hz )
80
85
90
2nd-Harmonic
95
3rd-Harmonic
100
105
110
10
20
30
40
50
Frequency (MHz)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those specified is not implied.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
OPA847
PACKAGE-LEAD
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
SO-8
40C to +85C
OPA847
"
"
"
"
SOT23-6
DBV
40C to +85C
OATI
"
"
"
"
OPA847ID
OPA847IDR
OPA847IDBVT
OPA847IDBVR
Rails, 100
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 3000
"
OPA847
"
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this document, or see the TI web site
at www.ti.com.
PIN CONFIGURATIONS
DIS
Inverting Input
+VS
Noninverting Input
Output
VS
NC
+VS
VS
DIS
Noninverting Input
Inverting Input
Output
OATI
1
NC = No Connection
SOT
NC
Top View
SO
Top View
OPA847
www.ti.com
SBOS251E
ELECTRICAL CHARACTERISTICS: VS = 5V
Boldface limits are tested at +25C.
RL = 100, RF = 750, RG = 39.2, and G = +20 (see Figure 1 for AC performance only), unless otherwise noted.
OPA847ID, IDBV
TYP
PARAMETER
AC PERFORMANCE (see Figure 1)
Closed-Loop Bandwidth
CONDITIONS
+25C
+25C(1)
0C to
70C(2)
40C to
+85C(2)
UNITS
600
350
78
3900
60
4.5
230
63
3100
40
7
210
60
3000
35
10
195
57
2800
30
12
MHz
MHz
MHz
MHz
MHz
dB
typ
min
min
min
min
max
C
B
B
B
B
B
74
105
103
110
39
0.85
2.5
70
90
96
105
37
0.92
3.5
69
89
91
100
36
0.98
3.6
68
88
88
90
35
1.0
3.7
dBc
dBc
dBc
dBc
dBm
nV/Hz
pA/Hz
max
max
max
max
min
max
max
B
B
B
B
B
B
B
0.2V Step
2V Step
2V Step
2V Step
2V Step
1.2
950
20
10
6
1.75
700
2.0
625
2.2
535
12
8
14
10
18
12
ns
V/s
ns
ns
ns
max
min
typ
max
max
B
B
C
B
B
VO = 0V
VCM = 0V
VCM = 0V
VCM = 0V
VCM = 0V
VCM = 0V
VCM = 0V
98
0.1
0.25
19
15
0.1
0.1
90
89
0.58
1.5
41
40
0.7
2
88
0.60
1.5
42
70
0.85
3.5
dB
mV
V/C
A
nA/C
A
nA/C
min
max
max
max
max
max
max
A
A
B
A
B
A
B
3.3
110
3.0
93
2.9
90
V
dB
min
min
A
A
VCM = 0V
VCM = 0V
2.7 || 2.0
2.3 || 1.7
k || pF
M || pF
typ
typ
C
C
400 Load
100 Load
VO = 0V
VO = 0V
G = +20, f = < 100kHz
3.5
3.4
100
75
0.003
V
V
mA
mA
min
min
min
min
typ
A
A
A
A
C
VS = 5V
VS = 5V
5
6
18.1
18.1
0.5
0.25
39
15
0.6
0.1
3.1
95
3.3
3.2
MIN/ TEST
MAX LEVEL(3)
3.1
3.0
56
56
3.0
2.9
52
52
18.4
17.8
6
18.7
17.5
6
18.9
17.1
V
V
mA
mA
typ
max
max
min
C
A
A
A
100
95
93
90
dB
min
200
3.5
1.8
150
200
60
70
270
3.75
1.7
190
320
3.85
1.6
200
370
3.95
1.5
210
A
V
V
A
ns
ns
dB
max
min
max
max
typ
typ
typ
A
A
A
A
C
C
C
40 to +85
typ
125
150
C/W
C/W
typ
typ
C
C
60
60
(VDIS = 0)
Junction-to-Ambient
NOTES: (1) Junction temperature = ambient for +25C specifications. (2) Junction temperature = ambient at low temperature limit: junction temperature = ambient +23C
at high temperature limit for over temperature specifications. (3) Test Levels: (A) 100% tested at 25C. Over temperature limits by characterization and simulation.
(B) Limits set by characterization and simulation. (C) Typical value only for information. (4) Current is considered positive out of node. VCM is the input common-mode
voltage. (5) Tested < 3dB below minimum specified CMRR at CMIR limits.
OPA847
SBOS251E
www.ti.com
TYPICAL CHARACTERISTICS: VS = 5V
TA = 25C, G = +20V/V, RG = 39.2, and RL = 100, unless otherwise noted.
NONINVERTING SMALL-SIGNAL
FREQUENCY RESPONSE
6
VO = 0.2VPP
RL = 100
RG = RS = 50
RF Adjusted
G = +12
3
Normalized Gain (dB)
3
G = +20
6
G = +30
G = +50
0
3
6
9
G = 40
12
12
15
1
10
100
1000
10
100
Frequency (MHz)
NONINVERTING LARGE-SIGNAL
FREQUENCY RESPONSE
INVERTING LARGE-SIGNAL
FREQUENCY RESPONSE
35
RG = 39.2
RL = 100
G = +20V/V
VO = 200mVPP
26
See Figure 2
32
VO = 0.2VPP
VO = 1VPP
29
Gain (dB)
23
20
17
VO = 2VPP
26
23
VO = 5VPP
VO = 1VPP
20
14
VO = 2VPP
11
17
VO = 5VPP
See Figure 1
10
100
10
1000
0.15
0.10
0.05
Left Scale
0.25
1.00
0.20
0.75
0.50
0.25
0
0.15
0.10
0.05
0
0.05
0.25
0.10
0.50
0.15
0.75
0.20
1.00
0.20
1.25
0.25
See Figure 1
0.25
1000
1.25
G = +20V/V
0.25
100
Frequency (MHz)
Frequency (MHz)
RL = 100
RG = RS = 50
G = 40V/V
14
Large Signal 1V
Right Scale
Small Signal 100mV
Left Scale
0.05
0.15
1.25
1.00
0.75
0.50
0.25
0
0.25
0.10
Time (5ns/div)
1000
Frequency (MHz)
29
Gain (dB)
G = 50
See Figure 2
See Figure 1
15
0.20
G = 30
G = 20
0.50
G = 40V/V
RG = RS = 50
RL = 100
0.75
See Figure 2
1.00
1.25
Time (5ns/div)
OPA847
www.ti.com
SBOS251E
VO = 0.2VPP
RG = 39.2
RL = 100
RF Adjusted
INVERTING SMALL-SIGNAL
FREQUENCY RESPONSE
75
75
G = +20V/V
VO = 2VPP
80
85
90
2nd-Harmonic
95
100
3rd-Harmonic
105
G = +20V/V
VO = 5VPP
80
2nd-Harmonic
85
90
95
3rd-Harmonic
100
110
See Figure 1
See Figure 1
115
105
100
150
200
250
300
350
400
450
500
100
150
200
75
G = +20V/V
VO = 2VPP
RL = 200
80
300
350
400
450
500
75
250
Load Resistance ()
Load Resistance ()
2nd-Harmonic
85
95
3rd-Harmonic
105
G = +20V/V
F = 5MHz
RL = 200
85
2nd-Harmonic
90
95
100
3rd-Harmonic
105
110
See Figure 1
See Figure 1
115
115
0.1
10
0.1
100
75
75
80
2nd-Harmonic
85
90
95
10
Frequency (MHz)
VO = 2VPP
RL = 200
F = 5MHz
RF = 750
RG Adjusted
100
3rd-Harmonic
105
80
85
90
95
100
2nd-Harmonic
VO = 2VPP
RL = 200
F = 5MHz
RG = 50
RF Adjusted
3rd-Harmonic
105
See Figure 2
See Figure 1
110
110
15
20
25
30
35
40
45
50
55
20
50
OPA847
SBOS251E
25
30
35
40
45
50
Gain V/V
Gain (V/V)
www.ti.com
G = +20V/V
20dB to matched load.
45
2.7pA/Hz
Current Noise
10
1
0.85nV/Hz
Voltage Noise
40
35
50
PI
30
PO
50 OPA847
50
750
25
39.2
20
0
101
102
103
104
105
106
107
10
15
20
Frequency (Hz)
VO = 200mVPP
AV = +12V/V
NG = Noise Gain
0.4
0.3
NG = 12
40
45
50
NG = 14
35
NG = 16
0.2
0.1
0
0.1
NG = 18
0.2
NG = 20
External Compensation
See Figure 8
0.4
G = 8
1
2
3
VO = 0.2VPP
RF = 750
4
G = 1
5
6
G = 2
0.3
G = 4
External Compensation
See Figure 6
8
9
0.5
1
10
100
1000
10
G = +20V/V
10
1
10
100
1000
100
Frequency (MHz)
Frequency (MHz)
RS ()
30
1000
25
Frequency (MHz)
29
C = 10pF
26
C = 22pF
23
C = 47pF
C = 100pF
RS
VI
20
VO
50 OPA847
CL
1k
750
17
(1k is optional.)
39.2
14
1
10
100
1000
Frequency (MHz)
OPA847
www.ti.com
SBOS251E
+PSRR
110
30
100
100
90
80
PSRR
70
60
50
40
30
20log (AOL)
80
60
90
40
120
20
150
180
210
20
20
102
103
104
105
106
107
108
102
103
104
105
106
107
108
109
Frequency (Hz)
Frequency (Hz)
10
VDIS
Output Impedance ()
RL = 100
2
1
VO (V)
60
AOL
Open-Loop Phase ()
120
RL = 50
RL = 25
1
2
G = +20V/V
ZO
OPA847
750
0.1
39.2
0.01
3
0.001
100
50
50
100
103
150
104
10
0.4
0.3
0.2
Output
Left Scale
0.1
G = +20V/V
RL = 100
0.5
Input
Right Scale
0.20
0.15
0.10
0.05
0
0.1
0.2
0.3
0.4
0.5
10
0.05
0.10
Output
Left Scale
0.15
0.20
See Figure 2
0.25
Time (40ns/div)
Time (40ns/div)
OPA847
SBOS251E
0.25
G = 40V/V
RG = 50
RL = 100
10
108
See Figure 1
107
106
Frequency (Hz)
IO (mA)
105
www.ti.com
4
150
PHOTODIODE TRANSIMPEDANCE
FREQUENCY RESPONSE
SETTLING TIME
0.25
0.15
0.10
0.05
0
0.05
0.10
0.15
0.20
RF = 20k
CF Adjusted
86
83
80
0.01F
77
20k
IO
CF
CDIODE
[CD]
74
10
15
20
25
30
35
40
10
0.2
100
12.5
VIO
0.1
12.5
Ib
0.2
Supply Current
25
50
75
100
18
Sourcing Output Current
80
16
Sinking Output Current
70
14
60
12
50
25.0
25
20
90
100 x IOS
0.1
25.0
50
100
Frequency (MHz)
Time (ns)
VO
20k OPA847
71
0
125
10
50
25
25
50
75
100
RL = 100
Common-Mode
(2.3M, DC)
106
Input Impedance ()
Positive Output
2
1
Positive Input
125
107
CD = 20pF
CD = 50pF
CD = 100pF
See Figure 1
0.25
CD = 10pF
[20log 20k]
Negative Input
105
Differential
(2.7k, DC)
104
103
3
Negative Output
102
102
6.00
5.75
5.50
5.25
5.00
4.75
4.50
4.25
4.00
3.75
3.50
3.25
3.00
2.75
2.50
103
104
105
106
107
108
Frequency (Hz)
OPA847
www.ti.com
SBOS251E
89
G = +20V/V
RL = 100
VO = 2V Step
0.20
TYPICAL CHARACTERISTICS: VS = 5V
TA = 25C, GD = 40V/V, RG = 50, and RL = 400, unless otherwise noted.
DIFFERENTIAL SMALL-SIGNAL
FREQUENCY RESPONSE
3
+5V
0
Normalized Gain (dB)
DIS
OPA847
GD =
5V
RG
50
RF
RG
50
VI
VO
R
= F
VI
RG
RL
RF
VO
GD = +20V/V
GD = +30V/V
12
RG = 50
VO = 400mVPP
15
+5V
GD = +40V/V
GD = +50V/V
9
RF Adjusted
18
10
OPA847
100
1000
Frequency (MHz)
5V
DIS
DIFFERENTIAL LARGE-SIGNAL
FREQUENCY RESPONSE
GD = 40V/V
GD = 40V/V
VO = 4VPP
F = 5MHz
60
32
Gain (dB)
35
VO = 400mVPP
VO = 5VPP
29
VO = 8VPP
26
65
70
75
2nd-Harmonic
80
85
90
95
3rd-Harmonic
100
105
110
23
1
10
100
1000
50
100
150
Frequency (MHz)
350
400
450
500
GD = 40V/V
RL = 400
F = 5MHz
80
300
GD = 40V/V
RL = 400
VO = 4VPP
75
250
Resistance ()
200
2nd-Harmonic
85
95
3rd-Harmonic
105
85
2nd-Harmonic
90
95
100
3rd-Harmonic
105
115
110
10
100
Frequency (MHz)
OPA847
SBOS251E
10
Differential Output Voltage Swing (VPP)
www.ti.com
APPLICATIONS INFORMATION
WIDEBAND, NONINVERTING OPERATION
The OPA847 provides a unique combination of a very low
input voltage noise along with a very low distortion output
stage to give one of the highest dynamic range op amps
available. Its very high gain bandwidth product (GBP) can be
used to either deliver high signal bandwidths at high gains, or
to deliver very low distortion signals at moderate frequencies
and lower gains. To achieve the full performance of the
OPA847, careful attention to PC board layout and component selection is required, as discussed in the following
sections of this data sheet.
Figure 1 shows the noninverting gain of a +20V/V circuit used
as the basis for most of the Typical Characteristics. Most of
the curves are characterized using signal sources with a 50
driving impedance and with measurement equipment presenting a 50 load impedance. In Figure 1, the 50 shunt
resistor at the VI terminal matches the source impedance of
the test generator, while the 50 series resistor at the VO
terminal provides a matching resistor for the measurement
equipment load. Generally, data sheet voltage swing specifications are at the output pin (VO in Figure 1) while output
power specifications are at the matched 50 load. The total
100 load at the output combined with the 790 total
feedback network load presents the OPA847 with an effective output load of 89 for the circuit of Figure 1.
Voltage-feedback op amps, unlike current-feedback designs,
can use a wide range of resistor values to set their gain. The
circuit of Figure 1, and the specifications at other gains, use an
RG set to 39.2 and RF adjusted to get the desired gain. Using
this guideline ensures that the noise added at the output due
to the Johnson noise of the resistors does not significantly
increase the total over that due to the 0.85nV/Hz input
+5V
+VS
0.1F
+5V
+VS
6.8F
+
0.1F
50 Source
VDIS
VI
50
50 Load
VO
OPA847
6.8F
VDIS
50
0.01F
RF
750
50 Source
RG
50
VO
95.3
50 Load
50
OPA847
RF
2k
VI
RG
39.2
+
6.8F
0.1F
0.1F
6.8F
VS
5V
VS
5V
10
OPA847
www.ti.com
SBOS251E
The high GBP and low input voltage and current noise for the
OPA847 make it an ideal wideband transimpedance amplifier for low to moderate transimpedance gains. Very high
transimpedance gains (> 100k) will benefit from the low
input noise current of a JFET input op amp such as the
OPA657. Unity-gain stability in the op amp is not required for
application as a transimpedance amplifier. Figure 3 shows
one possible transimpedance design example that would be
particularly suitable for the 155Mbit data rate of an OC-3
receiver. Designs that require high bandwidth from a large
area detector with relatively low transimpedance gain will
benefit from the low input voltage noise for the OPA847. The
amplifiers input voltage noise is peaked up over frequency
by the diode source capacitance, and can (in many cases)
become the limiting factor to input sensitivity. The key elements to the design are the expected diode capacitance (CD)
with the reverse bias voltage (VB) applied, the desired
transimpedance gain (RF), and the GBP for the OPA847
(3900MHz). With these three variables set (including the
parasitic input capacitance for the OPA847 added to CD), the
feedback capacitor value (CF) can be set to control the
frequency response.
+5V
Power-supply
decoupling not shown.
100pF
0.1F
12k
OPA847
VDIS
5V
RF
12k
CF
0.18pF
1pF
Photodiode
VB
1
=
2RF CF
GBP
4RF CD
(1)
Adding the common-mode and differential mode input capacitance (1.2 + 2.5)pF to the 1pF diode source capacitance
of Figure 3, and targeting a 12k transimpedance gain using
the 3900MHz GBP for the OPA847 requires a feedback pole
set to 74MHz to get a nominal Butterworth frequency response design. This requires a total feedback capacitance of
0.18pF. That total is shown in Figure 3, but recall that typical
surface-mount resistors have a parasitic capacitance of 0.2pF,
leaving no external capacitor required for this design.
f 3dB =
(2)
RF
where:
iEQ = Equivalent input noise current if the output noise is
bandlimited to f < 1/2RFCF
iN = Input current noise for the op amp inverting input
eN = Input voltage noise for the op amp
CD = Total Inverting Node Capacitance
f = Bandlimiting frequency in Hz (usually a post filter prior
to further signal processing)
Evaluating this expression up to the feedback pole frequency
at 74MHz for the circuit of Figure 3 gives an equivalent input
noise current of 3.0pA/Hz. This is slightly higher than the
2.5pA/Hz input current noise for the op amp. This total
equivalent input current noise is slightly increased by the last
term in the equivalent input noise expression. It is essential
in this case to use a low-voltage noise op amp. For example,
if a slightly higher input noise voltage, but otherwise identical,
op amp were used instead of the OPA847 in this application
(say 2.0nV/Hz), the total input referred current noise would
increase to 3.7pA/Hz. Low input voltage noise is required
for the best sensitivity in these wideband transimpedance
applications. This is often unspecified for dedicated transimpedance amplifiers with a total output noise for a specified
source capacitance given instead. It is the relatively high
input voltage noise for those components that cause higher
than expected output noise if the source capacitance is
higher than specified.
The output DC error for the circuit of Figure 3 is minimized by
including a 12k to ground on the noninverting input. This
reduces the contribution of input bias current errors (for total
output offset voltage) to the offset current times the feedback
resistor. To minimize the output noise contribution of this
resistor, 0.01F and 100pF capacitors are included in parallel. Worst-case output DC error for the circuit of Figure 3 at
25C is:
VOS = 0.5mV (input offset voltage) 0.6A (input offset
current) 12k = 7.2mV
Worst-case output offset DC drift (over the 0C to 70C span) is:
dVOS/dT = 1.5V/C (input offset drift) 2nA/C (input
offset current drift) 12k = 21.5V/C.
OPA847
SBOS251E
GBP
(Hz)
2R F C D
www.ti.com
11
+5V
VDIS
OPA847
RG
200
PHOTODIODE TRANSIMPEDANCE
FREQUENCY RESPONSE
89
CD = 10pF
80
0.01F
20k
IO
CD
74
CF
71
1
10
100
Frequency (MHz)
12
CF
1.7pF
5V
VO
20k OPA847
77
CS
39pF
CD = 20pF
CD = 50pF
CD = 100pF
83
RF
850
VI
RF = 20k
CF Adjusted [20 log(20k)]
86
VO
To choose the values for both CS and CF, two parameters and
only three equations need to be solved. The first parameter is
the target high-frequency noise gain (NG 2), which should be
greater than the minimum stable gain for the OPA847. Here, a
target of NG2 = 24 is used. The second parameter is the desired
low-frequency signal gain, which also sets the low-frequency
noise gain (NG1). To simplify this discussion, we will target a
maximally flat, 2nd-order, low-pass Butterworth frequency response (Q = 0.707). The signal gain shown in Figure 5 sets the
low-frequency noise gain to NG1 = 1 + RF/RG (= 5.25 in this
example). Then, using only these two gains and the GBP for the
OPA847 (3900MHz), the key frequency in the compensation is
set by Equation 4.
ZO =
GBP
NG1
NG1
1
1 2
2
NG2
NG2
NG 1
(4)
CF =
1
(= 1.76pF)
2RF ZO NG2
(5)
OPA847
www.ti.com
SBOS251E
(6)
0
Normalized Gain (1dB)
f 3dB ZO GBP
(7)
1
2
G = 8
VO = 0.2VPP
3
4
G = 1
5
6
G = 2
7
8
9
1
10
100
+5V
VDIS
OPA847
LOW-NOISE FIGURE,
HIGH DYNAMIC RANGE AMPLIFIER
The low input noise voltage of the OPA847 and its very high
2-tone, 3rd-order intermodulation intercept can be used to
good advantage as a fixed-gain amplifier. While input noise
1000
Frequency (MHz)
G = 4
RG
5V
VO
RF
750
VI
0 Source
CS
CF
6.19k
+5V
Input match
set by this
feedback path
+5V
5V
50 Source
PI
750
1:2
1.5k
> 55dBm
intercept
to 30MHz
OPA847
200
4.3dB
Noise
Figure
PO
OPA847
10pF
1.6pF
5V
46pF
420
30.1
Overall Gain
PO
PI
= 35.6dB
OPA847
SBOS251E
www.ti.com
13
+5V
VI
RF + RS A V
NG A V
where:
AV = desired signal gain (+12V/V in Figure 8)
NG = target noise gain (adjusted in Figure 9)
RS = total source impedance
14
(8)
50
50
R1
50
OPA847
VO
5V
RF
750
RG
66.5
0.5
VDIS
VO = 200mVPP
AV = +12V/V
NG = Noise Gain
0.4
0.3
NG = 12
NG = 14
NG = 16
0.2
0.1
0
0.1
NG = 18
0.2
NG = 20
0.3
0.4
0.5
1
10
100
1000
Frequency (MHz)
DIFFERENTIAL OPERATION
Operating two OPA847 amplifiers in a differential inverting
configuration can further suppress even-order harmonic terms.
The Typical Characteristics show measured performance for
this condition. These measurements were done at the relatively
high gain of 40V/V. Even lower distortion is possible operating
at lower gains using the external inverting compensation techniques, as discussed previously. For the distortion data presented in Figure 10, the output swing is increased to 4V PP into
400 to allow direct comparison to the single-channel data at
2VPP into 200. Comparing the 2nd- and 3rd-harmonics at
20MHz in Figure 10 to the gain of +20, 2V PP, 200 data, shows
the 2nd-harmonic is reduced to 76dBc (from 67dBc) and the
3rd-harmonic is reduced from 80dBc to 85dBc. Using the two
OPA847
www.ti.com
SBOS251E
65
GD = 40V/V
RL = 400
VO = 4VPP
75
2nd-Harmonic
85
DESIGN-IN TOOLS
95
DEMONSTRATION FIXTURES
3rd-Harmonic
105
115
1
10
100
Frequency (MHz)
+5V
2RF
Power-supply decoupling
not shown.
V
R
VO = CC VI F
OPA847
2
RG
RF
VI
LITERATURE
NUMBER
SO-8
SOT23-6
DEM-OPA-SO-1B
DEM-OPA-SOT-1B
SBOU026
SBOU027
OPA847
SBOS251E
ORDERING
NUMBER
+12V
Range
VDIS
RG
OPA847ID
OPA847IDBV
PACKAGE
OPERATING SUGGESTIONS
+VCC
0.01F
PRODUCT
SINGLE-SUPPLY OPERATION
2RF
www.ti.com
15
ENI
EO
OPA847
RS
IBN
ERS
RF
4kTRS
IBI
RG
4kT
RG
4kTRF
4kT = 1.6E 20J
at 290K
(E
2
NI
5
(IB RS )2 + 4kT 3R2S
4
(11)
Evaluating this expression for RS = 50 gives a total equivalent input noise of 1.4nV/Hz. Note that at these higher
gains, the simplified input referred spot noise expression of
Equation 11 does not include the gain. This is a good
approximation for NG > 12, as is typically required by stability
considerations.
16
practice, this only holds true when the phase margin approaches 90, as it does in high-gain configurations. At low
gains (increased feedback factors), most high-speed amplifiers exhibit a more complex response with lower phase
margin. The OPA847 is compensated to give a maximally flat
2nd-order Butterworth closed-loop response at a noninverting
gain of +20 (see Figure 1). This results in a typical gain of
+20 bandwidth of 350MHz, far exceeding that predicted by
dividing the 3900MHz GBP by 20. Increasing the gain causes
the phase margin to approach 90 and the bandwidth to more
closely approach the predicted value of (GBP/NG). At a gain
of +50, the OPA847 very nearly matches the 78MHz bandwidth predicted using the simple formula and the typical GBP
of 3900MHz.
Inverting operation offers some interesting opportunities to
increase the available GBP. When the source impedance is
matched by the gain resistor (see Figure 2), the signal gain
is (1 + RF/RG), while the noise gain for bandwidth purposes
is (1 + RF/2RG). This cuts the noise gain almost in half,
increasing the minimum operating gain for inverting operation under these condition to 22 and the equivalent gain
bandwidth product to > 7.8GHz.
OPA847
www.ti.com
SBOS251E
Mean = 48V
Standard Deviation = 110V
Total Count = 4040
1000
800
600
400
200
0
< 600
< 540
< 480
< 420
< 360
< 300
< 240
< 180
< 120
< 60
0
< 60
< 120
< 180
< 240
< 300
< 360
< 420
< 480
< 540
< 600
> 600
Mean = 50nA
Standard Deviation = 120nA
Total Count = 4040
600
500
400
300
200
100
0
< 600
< 540
< 480
< 420
< 360
< 300
< 240
< 180
< 120
< 60
0
< 60
< 120
< 180
< 240
< 300
< 360
< 420
< 480
< 540
< 600
> 600
Count
DISTORTION PERFORMANCE
Count
The criterion for setting the RS resistor is a maximum bandwidth, flat frequency response at the load. For the OPA847
operating in a gain of +20, the frequency response at the
output pin is very flat to begin with, allowing relatively small
values of RS to be used for low capacitive loads. As the signal
gain is increased, the unloaded phase margin also increases.
Driving capacitive loads at higher gains requires lower RS
values than those shown for a gain of +20.
nA
OPA847
SBOS251E
www.ti.com
17
+VS
8k
Q1
+5V
VCC
Power-supply decoupling
not shown.
48
0.1F
OPA847
17k
VDIS
VEE
5V
+5V
RG
50
VI
100
0.1F
5k
VO
VI
RF
RG
= 20V/V
5V
18
IS
Control
VS
RF
1k
5k
20k
120k
VO
OPA847
www.ti.com
SBOS251E
THERMAL ANALYSIS
The OPA847 does not require heatsinking or airflow in most
applications. Maximum desired junction temperature sets the
maximum allowed internal power dissipation, as described
here. In no case should the maximum junction temperature
be allowed to exceed 150C.
Operating junction temperature (TJ) is given by TA + PD JA.
The total internal power dissipation (PD) is the sum of
quiescent power (PDQ) and additional power dissipated in the
output stage (PDL) to deliver load power. Quiescent power is
simply the specified no-load supply current times the total
supply voltage across the part. PDL depends on the required
output signal and load but would, for a grounded resistive
load, be at a maximum when the output is fixed at a voltage
equal to half either supply voltage (for equal bipolar supplies). Under this worst-case condition, PDL = VS2/(4 RL),
where RL includes feedback network loading. This is the
absolute highest power that can be dissipated for a given RL.
All actual applications dissipate less power in the output
stage.
Note that it is the power in the output stage and not into the
load that determines internal power dissipation.
As a worst-case example, compute the maximum TJ using an
OPA847IDBV (SOT23-6 package) in the circuit of Figure 1
operating at the maximum specified ambient temperature of
+85C and driving a grounded 100 load. Maximum internal
power is:
PD = 10V 18.9mA + 52/(4(100 || 789)) = 259mW
Maximum TJ = +85C + (0.26W 150C/W) = 124C
All actual applications will operate at a lower junction temperature than the 124C computed above. Compute your
actual output stage power to get an accurate estimate of
maximum junction temperature, or use the results shown
here as an absolute maximum.
BOARD LAYOUT
Achieving optimum performance with a high-frequency amplifier like the OPA847 requires careful attention to board
layout parasitics and external component types. Recommendations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for all
of the signal I/O pins. Parasitic capacitance on the output and
inverting input pins can cause instability: on the noninverting
input, it can react with the source impedance to cause
OPA847
SBOS251E
www.ti.com
19
capacitive loads (< 4pF) may not need an RS, since the
OPA847 is nominally compensated to operate with a 2pF
parasitic load. Higher parasitic capacitive loads without an RS
are allowed as the signal gain increases from +20V/V (increasing the unloaded phase margin). If a long trace is
required, and the 6dB signal loss intrinsic to a doublyterminated transmission line is acceptable, implement a
matched impedance transmission line using microstrip or
stripline techniques (consult an ECL design handbook for
microstrip and stripline layout techniques). A 50 environment is normally not necessary onboard and, in fact, a higher
impedance environment improves distortion, as shown in the
distortion versus load plots. With a characteristic board trace
impedance defined based on board material and trace dimensions, a matching series resistor into the trace from the
output of the OPA847 is used, as well as a terminating shunt
resistor at the input of the destination device. Remember
also that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the
destination device; this total effective impedance should be
set to match the trace impedance. If the 6dB attenuation of
a doubly-terminated transmission line is unacceptable, a
long trace can be series-terminated at the source-end only.
Treat the trace as a capacitive load in this case and set the
series resistor value as shown in the plot of Recommended
RS vs Capacitive Load. This does not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, there will be some
signal attenuation due to the voltage divider formed by the
series output into the terminating impedance.
e) Socketing a high-speed part like the OPA847 is not
recommended. The additional lead length and pin-to-pin
capacitance introduced by the socket can create an extremely troublesome parasitic network that can make it
20
+VCC
External
Pin
Internal
Circuitry
VCC
OPA847
www.ti.com
SBOS251E
Revision History
DATE
REVISION
PAGE
12/08
4/06
15
SECTION
DESCRIPTION
Absolute Maximum Ratings Changed minimum Storage Temperature Range from 40C to 65C.
Design-In Tools
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
OPA847
SBOS251E
www.ti.com
21
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Eco Plan
Lead/Ball Finish
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
OPA847ID
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
847
OPA847IDBVR
ACTIVE
SOT-23
DBV
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OATI
OPA847IDBVT
ACTIVE
SOT-23
DBV
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OATI
OPA847IDBVTG4
ACTIVE
SOT-23
DBV
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OATI
OPA847IDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
847
OPA847IDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
847
OPA847IDRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
847
(1)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
www.ti.com
10-Jun-2014
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
14-Jul-2012
Device
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
OPA847IDBVR
SOT-23
DBV
3000
180.0
OPA847IDBVT
SOT-23
DBV
250
OPA847IDR
SOIC
2500
B0
(mm)
K0
(mm)
P1
(mm)
8.4
3.2
3.1
1.39
4.0
180.0
8.4
3.2
3.1
1.39
330.0
12.4
6.4
5.2
2.1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
8.0
Q3
4.0
8.0
Q3
8.0
12.0
Q1
14-Jul-2012
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA847IDBVR
SOT-23
DBV
3000
210.0
185.0
35.0
OPA847IDBVT
SOT-23
DBV
250
210.0
185.0
35.0
OPA847IDR
SOIC
2500
367.0
367.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as components) are sold subject to TIs terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TIs terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TIs goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
www.ti.com/automotive
Amplifiers
amplifier.ti.com
www.ti.com/communications
Data Converters
dataconverter.ti.com
www.ti.com/computers
DLP Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
www.ti.com/energy
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
www.ti.com/video
RFID
www.ti-rfid.com
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright 2015, Texas Instruments Incorporated