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This paper was presented at the 68th Annual Conference for Protective Relay Engineers and can
be accessed at: http://dx.doi.org/10.1109/CPRE.2015.7102166.
For the complete history of this paper, refer to the next page.
Presented at the
51st Annual Minnesota Power Systems Conference
Saint Paul, Minnesota
November 1012, 2015
Previously presented at the
2nd Annual PAC World Americas Conference, September 2015,
and 69th Annual Georgia Tech Protective Relaying Conference, April 2015
Originally presented at the
68th Annual Conference for Protective Relay Engineers, March 2015
I. INTRODUCTION
There are many principles that protection engineers must
learn. For example, one principle is that paralleled current
transformers (CTs) should be avoided as differential (87)
inputs because a relay is less secure during external faults with
heavy CT saturation. Another is that tapping a multiratio CT
at less than its full winding derates the CT and makes it more
likely to saturate.
It was Douglas MacArthur who said, Rules are mostly
made to be broken [1]. While protection engineers are
rarely known for their cavalier attitudes, engineers are tasked
with solving problems and have to make compromises for a
number of reasons. For example, CTs were paralleled to line
current differential relays for decades because the line
terminals to be protected were breaker-and-a-half
arrangements and each relay available and installed at the time
only had a single three-phase current input available. While
not ideal for restraint during external faults, paralleled CTs
have been used successfully for these dual-breaker
applications, and to remove transformers and bus sections
from differential zones. Also, CTs are sometimes tapped down
in order to meter low load currents or to match the ratio of a
paralleled CT. While not ideal for performance during faults,
dual-slope and Alpha Plane differential characteristics, as well
as adaptive overcurrent elements, external fault detectors, and
more, are tolerant of varying levels of CT saturation.
In this paper, two case studies are presented. In both, a
fault occurred and an adjacent unfaulted line section
misoperated. The subsequent root cause analysis revisits the
two fundamental protection principles mentioned previously
and their importance. We share the lessons learned and offer
some practical advice for improving security.
II. CT CONNECTIONS
The method of wiring CTs that is chosen for a given
application is typically driven by the system configuration and
protective relay design. For example, to protect a delta-wye
transformer with an electromechanical 87 relay, the CTs on
Fig. 1.
III. CT SATURATION
The source of difference current between two paralleled
CTs for an external fault is CT saturation and the varying
performance of the two CTs. A simplified equivalent circuit
for two paralleled CTs during an external fault is shown in
Fig. 2. Assume that there is a source behind CT A and that the
fault is located behind or external to CT B. The coil in the
center of Fig. 2 is a current sensor.
RL
RCT
RL
RCT
CT A
IF
Fig. 2.
CT B
XM
I1
I2
XM
IF
X
I F ZB + 1 kVSTD
R
(1)
where:
ZB is the CT burden.
k is a dimensioning factor of 7.5 for line 87 applications.
VSTD is the secondary terminal voltage rating.
IF is the fault current referred to in secondary amperes.
X/R is the system reactance-to-resistance ratio.
If the whole winding of a CT is not used, the standard
burden is multiplied by the tapped ratio divided by the full
ratio. In other words, tapping a CT at less than its full winding
derates the CT and lessens its performance.
Despite our best efforts, CT saturation is not always
avoidable. Even if CT A and CT B are the same make and
model, they may not perform identically during fault
conditions. As CT A saturates, its excitation branch current
increases dramatically, and I1 is no longer an accurate replica
of IF. The difference between I1 and IF is the CT error, which
includes a difference in the current magnitude and phase
angle.
TSAT
VSAT
X
I ( R + R ) 1
B
= R ln l F S
X
(2)
where:
is the angular frequency.
VSAT is the saturation voltage.
IF is the fault current referred to in secondary amperes.
RS is CT winding resistance.
RB is the burden resistance.
Keep in mind that the connection of CTs and the fault type
determine the multiplying factors for lead and relay
impedances in the burden calculation [5].
Lastly, CTs may succumb to ac or dc saturation. The volttime area under the burden voltage waveform signifies the
threshold of saturation. The volt-time area may be increased
due to large ac fault currents (ac or symmetrical saturation) or
a large dc offset (dc or asymmetrical saturation). Equation (3)
indicates that fault current has a sinusoidal part (ac
component) and an exponentially decaying part (dc
component). The fault current magnitude, phase angle, and
time constant depend on the power system parameters. The
magnitude of the dc offset is determined by the angle of the
voltage at fault inception.
=
i(t)
VM
V
Rt
sin ( t + ) M sin ( ) e L
Z
Z
(3)
where:
Z is the system impedance and
=
Z
2
R 2 + X=
R 2 + ( L ) .
2
L
is the system impedance angle and =arctan
.
R
X or L is the system reactance.
R is the system resistance.
is the angular frequency.
VM is the peak system voltage.
is the angle of the voltage at fault inception.
It is interesting to note the influence of various factors in
(3). A higher X/R ratio (higher source impedance) reduces
fault current magnitude but increases the time constant or time
required to eliminate the dc offset component. In high
inductive reactance systems, = 90 degrees produces the
maximum dc offset. In other words, the dc offset is at a
maximum when a fault occurs at a voltage minimum or zero
crossing. Insulation breakdown line-to-ground (LG) faults are
Current (kA)
20
IOP
Transient Term
10
Operating
Region
K1
Restraining
Region
K0
IOP = KIRT
Steady State
30
0
Cycles
Fig. 5.
87 Relay
IR
IL
IOP
K2
K1
Restraining
Region
K0
IRT
Fig. 6.
Magnitude
and Angle
Compensation
Magnitude
and Angle
Compensation
IRT
R
Power System
Element
Data
Communications
and Time
Alignment
Fig. 4.
K2
10
20
Fig. 3.
DIOPP
DIOPR
IRTR
DIRTR
DIRTP
Fig. 7.
DIOP
DIRT
Raw samples are used to develop raw IOP and raw IRT
values. If there is a difference in the raw IOP and raw IRT values
Operating
Region
gl
Restraining
Region
An
Re(k)
Ra
diu
Fig. 8.
IAL
|IAL + IAR|
87LOPA
Alpha Plane
1/8
R87LA
IAR
Settings
87LANG, 87LR
H
1
1
Fig. 9.
87LA
Line
IR
IL1
IL1 + IR
V. CASE STUDY 1
IL1
IL1 + IR
2
1
1
Substation Alpha
BK11
Substation Bravo
G
BK12
92/230 kV
BK16
Line 1
BK13
CG
Bus A
BK41
Bus B
13.2/92 kV
BK14
BK24
BK25
BK26
BK21
BK22
BK23
BK15
Substation Charlie
BK31
92/161 kV
BK33
Line 2
13.2/92 kV
BK32
BK51
Secondary
21/67
Primary
87L/21/67
Bus A
BK21
2000:5
800:5
BK22
2000:5
800:5
2000:5
800:5
2000:5
800:5
Line 2
Fig. 13. CTs Paralleled External to the 87 Relay for Case Study 1
Fig. 14. Line 1 Primary Relay Event Data and 87LC and Z1G Assertion
13
32
14
33
15
34
TCC-6
Fig. 19. Unfiltered Event Data From BK51 During the First Reclose
TCC-8
TCC-7
Fig. 18. Unfiltered Event Data From BK51 During the Second Reclose
TCC-9
Substation PO-1
Substation L
8
40,000
1:IA
1:IB
Current (A)
20,000
1:IC
20,000
40,000
80
10
11
12
13
14
1:VA_kV
1:VB_kV
Voltage (kV)
40
1:VC_kV
40
80
10
11
10
11
12
13
14
12
13
14
1:50N1
1:51N
1:51P
1:67N1
1:67N1T
1:RMB2A
1:PTRX
1:RMB1A
Cycles
Voltage (kV)
80
1:VB_kV
1:VC_kV
40
Current (A)
80
24.970713
800
25.020713
25.070713
25.120713
25.170713
25.220713
600
1:IA
400
1:IB
200
1:IC
200
24.970713
Current (A)
1:VA_kV
40
25.020713
25.070713
25.120713
25.170713
600
25.220713
1:IBL
400
1:IBX
200
0
200
24.970713
25.020713
25.070713
25.020713
25.070713
25.120713
25.170713
25.220713
25.120713
25.170713
25.220713
1:87L
1:87LB
1:87LOPB
1:R87LB
24.970713
Time (s)
Fig. 22. Raw Data From Terminal 14-15 on the TCC-9 Line During the Fault
400
200
0
25.060713
25.080713
1:IAX
1:IBX
1:ICX
25.040713
25.060713
25.080713
25.040713
25.060713
Time (s)
Current (A)
Current (A)
Current (A)
1,400
1,000
600
200
200
4,000
25.030581
25.040581
1,400
25.050581
1:IB_SUM
1,000
600
200
25.030581
25.040581
25.050581
Time (s)
25.080713
Fig. 25. The Difference or Error Between CTs From Breakers 14 and 15
6,000
2,000
2,000
6,000
10,000
200
Fig. 23. Terminal 14-15 on the TCC-9 Line During the Fault
8,000
4,000
0
4,000
8,000
4,000
8,000
Current (A)
1:87LOPB
1:87LB
1:87L
1:R87LB
25.020713
25.040713
1:IAW
1:IBW
1:ICW
Fig. 24. Raw Individual CT 14-15 Currents From Breaker Failure Relay
1,000
Current (A)
200
25.020713
80
20
40
100
25.020713
1:IBW
1:IBX_NEG
8,000
Current (A)
1:IAL
1:IBL
1:ICL
600
Fig. 25 shows the same data from the breaker failure relay.
However, to better compare the output from the two CTs, one
CT polarity has been mathematically reversed. The two
current outputs are plotted together on the first axis. The
difference or error between the two CTs can now be seen
more easily. The CT outputs differ for only 1/4 cycle. The
second axis is the summation or difference current. These
currents are symmetrical, indicating that the CT error is due to
ac saturation.
0
1,000
2,000
25.091352 25.141352 25.191352 25.241352 25.291352
80
Voltage (kV)
Current (A)
Current (A)
40
1:VA_kV
1:VB_kV
1:VC_kV
0
40
80
25.091352 25.141352 25.191352 25.241352 25.291352
Time (s)
Fig. 26. Filtered Difference or Error Current and Voltages on the TCC-8
Line
First, observe that the fault data are about 11 cycles long.
The first six cycles are the BG fault. Then, the fault evolves
into an A-phase-to-B-phase-to-ground (ABG) fault. This
change was not seen in the previous data because the TCC-9
line tripped immediately.
10
6,000
2,000
2,000
6,000
6,000
1:IAW
1:IBW
1:ICW
25.132706
25.182706
25.232706
1:IAX
1:IBX
1:ICX
2,000
2,000
6,000
5,000
3,000
1,000
1,000
25.282706
25.132706
25.132706
25.182706
25.182706
25.232706
25.232706
Current (A)
Current (A)
Current (A)
Current (A)
25.282706
1:IA_SUM
1:IB_SUM
200
37.350708
37.390708
37.350708
37.390708
1:R87LB
1:SV1
1:SV1T
1:TRIP
37.310708
1:IAW
1:IAXNEG
6,000
2,000
Time (s)
2,000
25.192706
25.196706
25.200706
25.204706
1:IA_SUM
Current (A)
5,000
3,000
1,000
25.192706
25.196706
25.200706
25.204706
Time (s)
Fig. 28. The Difference or Error Between CTs From Breakers 32 and 33
150
0
150
0.017
Current (A)
Current (A)
Current (A)
37.310708
1:87LOPB
Fig. 28 shows the same data from the breaker failure relay.
However, to better compare the output from the two CTs, one
CT polarity has been mathematically reversed.
1,000
200
1:87LB
Fig. 27. Raw Individual Breaker 32 and 33 Currents From Breaker Failure
Relay
6,000
600
25.282706
Time (s)
1:IBL
1:IBX
0.017
0.050
0.083
0.117
0.150
0.017
0.050
0.083
0.117
0.150
30
0
30
0.017
Time (s)
11
Im
2,000
2,000
6,000
10,000
6.0
8.0
37.971081
38.071081
Current (A)
Re
4.0
37.871081
Time (s)
2:IA
2:IB
2:IC
600
400
200
0
200
2.0
1:IAW
1:IAX
1:IBW
1:IBX
1:ICW
1:ICX
6,000
Current (A)
25.005581
25.045581
25.085581
1:IA_COMBINED
1:IB_COMBINED
1:IC_COMBINED
1,200
800
400
0
400
25.005581
25.045581
Time (s)
25.085581
Fig. 33. Physically and Mathematically Combined Currents Show the Same
Difference or Error
12
Current (A)
1,400
1:IB_COMBINED
1,000
600
200
200
800
07.994706
08.044706
08.094706
2:IB
Current (A)
600
400
200
0
200
07.994706
08.044706
08.094706
07.994706
08.044706
Time (s)
08.094706
1:87EFD
1:87EFDL
2:TRIP87
2:DD
1:87L
2:87L
Fig. 34. Modern Relay Does Not Trip for Replayed Event Data
VII. CONCLUSION
It has been a common practice in power system protection
to parallel CTs with transmission relays due to typical bus
configurations and limited current inputs to these relays.
Different relay designs have varying tolerance for and security
during CT errors. While the vast majority of these installations
have been secure and have operated admirably, it has been
shown that this practice can present significant challenges to
the security of line current differential relays when the CTs are
exposed to fault currents that drive them into saturation.
Compounding the challenge for the relay, sometimes CTs are
tapped down and derated even further in these applications.
The two case studies illuminate these challenges and their
risks to security. In both cases, CTs saturated during external
faults on adjacent lines. AC and dc saturation were on display
in the case studies. In both cases, CTs were externally
paralleled and were significantly tapped down from the
maximum ratio.
Several possible solutions to mitigate these issues have
been presented when dealing with in-service applications.
These include adding a short tripping time delay and adjusting
the Alpha Plane angle or slope setting. These two solutions
alone, however, cannot guarantee security for all fault
conditions, and they risk dependability and slow tripping for
internal faults. Any change in the Alpha Plane angle or slope
setting should only be made after thoughtful review and
extensive power system simulations.
Another solution includes using the maximum CT ratio
when paralleling CTs to improve the CT performance. In the
case studies shared in this paper, increasing the CT tap to the
full winding was a recommended solution. Additionally,
adding a short delay (one-cycle maximum) for phase
differential elements on relays with externally paralleled CTs,
along with using the maximum CT ratio, may be an acceptable
[3]
13
[4]
[5]
[6]
[7]
[8]
X. BIOGRAPHIES
David Costello graduated from Texas A&M University in 1991 with a B.S. in
electrical engineering. He worked as a system protection engineer at Central
Power and Light and Central and Southwest Services in Texas and Oklahoma
and served on the System Protection Task Force for ERCOT. In 1996, David
joined Schweitzer Engineering Laboratories, Inc. as a field application
engineer and later served as a regional service manager and senior application
engineer. He presently holds the title of technical support director and works
in Fair Oaks Ranch, Texas. David has authored more than 30 technical papers
and 25 application guides. He was honored to receive the 2008 Walter A.
Elmore Best Paper Award from the Georgia Institute of Technology
Protective Relaying Conference and the 2013 Outstanding Engineer Award
from the Central Texas section of the IEEE Power and Energy Society. He is
a senior member of IEEE, a registered professional engineer in Texas, and a
member of the planning committees for the Conference for Protective Relay
Engineers at Texas A&M University.
Jason Young graduated from the University of Waterloo in 2006 with a
BASc in electrical engineering. He joined Schweitzer Engineering
Laboratories, Inc. in 2006 as a field application engineer in Boerne, Texas. He
now serves as a protection application engineer in Smiths Falls, Ontario,
Canada. He is a registered professional engineer in the province of Ontario.
Jonas Traphoner graduated with a B.Eng. in electrical engineering from the
Duale Hochschule Baden-Wrttemberg (DHBW) in 2011 and an MSEE from
the University of Texas at Austin in 2014. During his undergraduate studies,
Jonas worked for the utility company MVV Energie AG. In August 2014,
Jonas joined Schweitzer Engineering Laboratories, Inc., where he holds the
position of field application engineer. He is a member of IEEE.