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& 
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EP 2 061 158 B1

EUROPEAN PATENT SPECIFICATION

(12)

(45) Date of publication and mention

of the grant of the patent:
30.05.2012 Bulletin 2012/22

(51) Int Cl.:

H04B 3/23 (2006.01)

(21) Application number: 08018834.5

(22) Date of filing: 28.10.2008
(54) Hybrid circuit without inductors
Hybridschaltung ohne Induktoren
Circuit hybride sans inducteurs
(84) Designated Contracting States:
DE GB

(30) Priority: 14.11.2007 US 984180

(43) Date of publication of application:
20.05.2009 Bulletin 2009/21

(73) Proprietor: Broadcom Corporation

EP 2 061 158 B1

Irvine, CA 92617 (US)

(72) Inventor: Fang, Lin

Cupertino, CA 95014 (US)

(74) Representative: Jehle, Volker Armin et al

Bosch Jehle Patentanwaltsgesellschaft mbH
Flggenstrasse 13
80639 Mnchen (DE)

(56) References cited:

EP-A- 1 128 570

US-B1- 6 731 752

Note: Within nine months of the publication of the mention of the grant of the European patent in the European Patent
Bulletin, any person may give notice to the European Patent Office of opposition to that patent, in accordance with the
Implementing Regulations. Notice of opposition shall not be deemed to have been filed until the opposition fee has been
paid. (Art. 99(1) European Patent Convention).
Printed by Jouve, 75001 PARIS (FR)

EP 2 061 158 B1
Description
Field of the Invention
5

[0001] The present invention relates generally to high-speed communication, and more particularly to a hybrid circuit
for use in high-speed communication devices.
Background Art

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[0002] In high-speed communication devices, such as Cable modem and Digital Subscriber Line (DSL) devices, hybrid
circuits are used in the analog front end (AFE) circuits to isolate transmitted and received signals. In particular, hybrid
circuits are used to reject echo due to transmitted signals from reaching the receiver.
[0003] Conventional hybrid circuit solutions use inductive components to compensate for inductive elements present
in line transformers, which generally couple the high-speed communication devices to the communication network.
[0004] However, inductive components are expensive, generate as well as pick up noise, and result in non-linearities
in the performance of the hybrid circuit.
[0005] As such, there is a need to eliminate inductive components from hybrid circuits used in high-speed communication devices.
[0006] An example of prior art can be found in document EP1128570

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BRIEF SUMMARY OF THE INVENTION

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[0007] A hybrid circuit without inductors is provided herein. Embodiments can be used in high-speed communication
devices, including Cable modem and Digital Subscriber Line (DSL) devices. In particular, embodiments can be used in
Very High Speed DSL (VDSL) devices. Embodiments provide a cheap and compact solution to the echo rejection problem
in high-speed communication devices. Furthermore, embodiments perform at least comparably to conventional solutions
with respect to key performance measures.
[0008] In another aspect, a high-speed communication device that uses a hybrid circuit according to embodiments of
the present invention is provided herein.
[0009] According to an aspect, a hybrid circuit comprises:
an impedance network, including first, second, third, and fourth impedance circuits;
wherein said first and second impedance circuits are respectively matched to said third and fourth impedance circuits;
and
wherein said first, second, third, and fourth impedance circuits each includes one or more of (a) resistive components
and (b) capacitive components.
[0010] Advantageously, said first and second impedance circuits each includes a resistive-capacitive (RC) path coupled
in parallel with a resistive path.
[0011] Advantageously, an end of said first impedance circuit is coupled to an end of said second impedance circuit.
[0012] Advantageously, an end of said third impedance circuit is coupled to an end of said fourth impedance circuit.
[0013] Advantageously, an impedance ratio of said first and second impedance circuits is frequency-variable.
[0014] Advantageously, said impedance ratio varies with frequency according to an output impedance observed at
outputs of the hybrid circuit.
[0015] Advantageously, said impedance ratio varies with frequency in the opposite direction to an inductive impedance
at the outputs of the hybrid circuit.
[0016] Advantageously, the hybrid circuit is used in a high-speed communication device, and wherein the hybrid circuit
provides isolation between transmitted and received signals in said high-speed communication device.
[0017] Advantageously, the hybrid circuit is used in a high-speed communication device, and wherein the hybrid circuit
provides echo rejection of transmitted signals to prevent said transmitted signals from reaching a receiver of said highspeed communication device.
[0018] Advantageously, the hybrid circuit is used within a Digital Subscriber Line (DSL) communication device.
[0019] Advantageously, the DSL communication device is a Very High Speed DSL (VDSL) device.
[0020] Advantageously, the hybrid circuit is used within a Cable modem communication device.
[0021] According to an aspect, a high-speed communication device comprises:
a line driver to provide differential transmit signals;
a receiver to receive differential receive signals; and

EP 2 061 158 B1
an analog front end (AFE) circuit, comprising:
a hybrid circuit having input terminals coupled to said line driver and providing input terminals to said receiver;
a line transformer coupled at outputs of said hybrid circuit; and a line impedance coupled to said transformer;
5

10

wherein said hybrid circuit provides isolation between said transmit and receive signals in said AFE circuit.
[0022] Advantageously, the high-speed communication device is a Digital Subscriber Line (DSL) communication
device.
[0023] Advantageously, the high-speed communication device is a Very High Speed DSL (VDSL) communication
device.
[0024] Advantageously, the high-speed communication device is a Cable modem communication device.
[0025] Advantageously, said hybrid circuit provides echo rejection of transmitted signals to prevent said transmitted
signals from reaching a receiver of said high-speed communication device.
[0026] Advantageously, said hybrid circuit comprises:

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an impedance network, including first, second, third, and fourth impedance circuits;
wherein said first and second impedance circuits are respectively matched to said third and fourth impedance circuits;
and
wherein said first, second, third, and fourth impedance circuits each includes one or more of (a) resistive components
and (b) capacitive components.
[0027] Advantageously, an impedance ratio of said first and second impedance circuits is frequency-variable.
[0028] Advantageously, said impedance ratio varies with frequency according to an output impedance observed at
outputs of said hybrid circuit.
[0029] Advantageously, said impedance ratio varies with frequency in the opposite direction to an inductive impedance
at the outputs of the hybrid circuit.
[0030] Advantageously, said hybrid circuit comprises:
an impedance network, including first, second, third, and fourth impedance circuits;
wherein said first and second impedance circuits are respectively matched to said third and fourth impedance circuits;
and
wherein said first, second, third, and fourth impedance circuits each consists of one or more of (a) resistive components and (b) capacitive components.
[0031]

According to an aspect, a hybrid circuit comprises:

an impedance network, including first, second, third, and fourth impedance circuits;
wherein said first and second impedance circuits are respectively matched to said third and fourth impedance circuits;
and
wherein said first, second, third, and fourth impedance circuits each consists of one or more of (a) resistive components and (b) capacitive components.
[0032] Further embodiments, features, and advantages of the present invention, as well as the structure and operation
of the various embodiments of the present invention, are described in detail below with reference to the accompanying
drawings.
BRIEF DESCRIPTION OF THE DRAWINGS/FIGURES

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[0033] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate the
present invention and, together with the description, further serve to explain the principles of the invention and to enable
a person skilled in the pertinent art to make and use the invention.
[0034] FIG. 1 is a block diagram illustration of an analog front end (AFE) circuit, which can be used in a communication
device.
[0035] FIG. 2 illustrates signal flows in the AFE circuit of FIG. 1.
[0036] FIG. 3 illustrates an example hybrid circuit, which is conventionally used in the AFE circuit of FIG. 1.
[0037] FIG. 4 illustrates an example hybrid circuit without inductors, which can be used in the AFE circuit of FIG. 1.
[0038] FIG. 5 is a performance comparison of the echo rejection capabilities of the hybrid circuits of FIG. 3 and FIG. 4.
[0039] FIG. 6 is a comparison of the receiver transfer functions of the hybrid circuits of FIG. 3 and FIG. 4.

EP 2 061 158 B1
[0040] The present invention will be described with reference to the accompanying drawings. Generally, the drawing
in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.
DETAILED DESCRIPTION OF EMBODIMENT(S)
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[0041] FIG. 1 is a block diagram illustration of an analog front end (AFE) circuit 100, which can be used in a communication device. For example, AFE circuit 100 can be used in Cable modem and Digital Subscriber Line (DSL) communication devices. Particularly, AFE circuit 100 is suitable for Very High Speed DSL (VDSL) communication devices and
will be described herein in reference to a VDSL communication system. This description, however, is provided for the
purpose of illustration only and is not limiting as to functional uses of the circuit.
[0042] AFE circuit 100 includes a hybrid circuit 102, a transformer 126, and a line impedance 128. AFE circuit 100
further includes resistors 120 and 122, as shown in FIG. 1.
[0043] Typically, a line driver/transmitter 124 connects to input terminals 108 and 110 of hybrid circuit 100. Line driver/
transmitter 124 provides transmit signals in the form of differential signals, which are transferred by AFE circuit 100 to
a central office (CO) (not shown in FIG. 1), for example, of a VDSL communication system. Similarly, receive signals
from the CO are received as differential signals through output terminals 116 and 118 of AFE circuit 100. The receive
signals are transferred by AFE circuit 100 to a receiver 130. In AFE circuit 100, receiver 130 is a differential input receiver
having inputs at nodes 112 and 114 of hybrid circuit 102, as shown in FIG. 1.
[0044] Hybrid circuit 102 is typically used to enable duplex communication in the communication device using AFE
circuit 100. One function of hybrid circuit 102 includes isolating receiver 130 from transmit signals being transferred
through AFE circuit 100. In other words, transmit signals are prevented from entering the receiver. This function is also
known as echo rejection. Another function of hybrid circuit 102 includes providing an appropriate receiver transfer function
for signals received from the CO, i.e., appropriate signal amplification/rejection at specified frequency ranges. For illustration, FIG. 2 shows example signal flows in AFE circuit 100. Signal path 202 illustrates the flow of transmit signals.
Signal path 204 illustrates the flow of receive signals, and signal path 206 illustrates the potential flow of transmit signals
towards the receiver inputs (echo flow).
[0045] Generally, hybrid circuit 102 includes a matched impedance network. For example, as shown in FIG. 1, hybrid
circuit 102 includes impedance circuits 104a, 104b, 106a, and 106b, wherein impedance circuits 104a and 106a are
respectively matched with impedance circuits 104b and 106b. For ease of illustration, matched circuits 104a and 104b
will be referred to hereinafter as impedance circuit Z1 (having impedance value Z1), and matched circuits 106a and
106b will be referred to as impedance circuit Z2 (having impedance value Z2).
[0046] Transformer 126 is coupled at output terminals of hybrid circuit 102. Transformer 126 is a line transformer that
serves as an interface between circuits at the user end and circuits at the CO of the communication system. As a result,
transformer 126 also serves to protect circuits at the user end from voltage surges (e.g., due to lightning strikes) that
could occur over the line connecting the user and the CO. Typically, transformer 126 is designed to have a flat frequency
response for the transmit/receive signal bandwidths.
[0047] AFE circuit 100 may further include a line impedance 128, as shown in FIG. 1. Line impedance 128 may include
resistive, capacitive, and/or inductive components. Accordingly, an equivalent impedance ZL, encompassing the impedances from transformer 126 to output terminals 116 and 118 of AFE circuit 100, is observed at the output of hybrid circuit
102, as illustrated in FIG. 1.
[0048] Generally, in high-speed communication systems such as DSL, for example, transmit signal bandwidths are
relatively wide. Accordingly, hybrid circuit 102 needs to have correspondingly wide frequency echo rejection characteristics.
[0049] It can be shown that the transfer function from the line driver/transmitter outputs (input terminals 108 and 110)
to the receiver inputs (nodes 112 and 114) is equal to :

50

where Vrx is the voltage at the receiver inputs due to voltage from the transmitter, Vecho. This transfer function determines
the echo rejection characteristics of hybrid circuit 102.
[0050] From equation (1), it can be recognized that maximum echo rejection by hybrid circuit 102 (i.e., 100% echo
55

rejection) can be achieved when the ratio

is equal to the ratio

which results in the transfer function

EP 2 061 158 B1
described in (1) having a value of zero. In practice, however, achieving a 100% echo rejection is a challenging task,
particularly with the presence of inductive components in impedance ZL, which makes ZL frequency-variable. For example,

one such inductive component is due to a leakage inductance in line transformer 126, which commonly results from
imperfect magnetic linking in the transformer.
[0051] The leakage inductance in line transformer 126 can be modeled as an additional inductive impedance coupled
in series with the primary winding of the transformer. This causes the value of ZL and, correspondingly, the ratio
to increase with frequency.

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[0052]

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As such, without the ratio

tracking the ratio

the echo rejection capability of hybrid circuit

102 degrades as frequency varies, with the value of the transfer function described in (1) tending away from zero.
[0053] To compensate for the variance of ZL with frequency, conventional hybrid circuits resort to using inductive
elements in impedance Z1, to thereby track changes in the ratio

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with equivalent changes in the ratio

[0054] FIG. 3 illustrates an example hybrid circuit 300, which is conventionally used in AFE circuit 100 of FIG. 1. As
shown, hybrid circuit 300 uses a resistive-inductive-capacitive (RLC) network for impedance Z1 and a resistive network
310 for impedance Z2. The RLC network includes a resistive-inductive (RL) path (resistor 302 and inductor 304) coupled
in parallel with a resistive-capacitive (RC) path (resistor 306 and capacitor 308). In particular, inductor 304 is placed in
the RLC network such that it causes the impedance of Z1 to vary in the same direction as impedance ZL as frequency

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varies, thereby maintaining the difference between the ratios

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40

and

small.

[0055] As such, hybrid circuit 300 can be designed to have high echo rejection capabilities. However, inductors make
hybrid circuit 300 a costly solution to the echo rejection problem. Furthermore, inductors can generate as well as pick
up noise and cause certain non-linearities in the hybrid circuit frequency response. The latter causes a degradation in
the receiver transfer function of the hybrid circuit. Accordingly, a hybrid circuit without inductors is desirable.
[0056] FIG. 4 illustrates an example hybrid circuit without inductors 400, which can be used in AFE circuit 100 of FIG.
1. As would be understood by a person skilled in the art based on the teachings herein, multiple variations of hybrid
circuit 400 can be designed. These variations are within the scope of embodiments of the present invention.
[0057] As shown in FIG. 4, inductor 304 is eliminated from impedance Z1, which now includes only resistors 302 and
306 and capacitor 308. On the other hand, impedance Z2 is modified to include a resistive-capacitive (RC) path (capacitor
402 and resistor 404) coupled in parallel with resistor 310.
[0058]

ratio, by means of varying impedance Z2 instead of im-

As such, hybrid circuit 400 provides a variable

pedance Z1. Also, note that the placement of capacitor 402 in impedance Z2 provides that Z2 varies in the opposite

45

direction to ZL as frequency varies. Accordingly, the ratio

continues to track the ratio

as frequency

varies, thereby compensating for any inductive components in ZL.

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[0059] Hybrid circuit 400 provides a cheap and compact solution to the echo rejection problem in high-speed communication devices. Furthermore, hybrid circuit 400 performs at least comparably to conventional solutions with respect
to key performance measures, as will be further described below.
[0060] FIG. 5 is a performance comparison plot 500 of the echo rejection capabilities of hybrid circuits 300 and 400.
As shown, curve 504, which illustrates the performance of hybrid circuit 400, closely tracks curve 502, which illustrates
the performance of hybrid circuit 300, over the entire simulated frequency range. In fact, curve 504 is slightly lower than
curve 502 for frequencies higher than approximately 3 MHz, indicating better echo rejection by hybrid circuit 400 over
that frequency range.
[0061] FIG. 6 is a comparison plot 600 of the receiver transfer functions of hybrid circuits 300 and 400. As described
above, in addition to echo rejection, another function of the hybrid circuit is to provide a suitable transfer function for
received signals. As with echo rejection, hybrid circuit 400 provides comparable transfer function performance, illustrated

EP 2 061 158 B1
by curve 604 in FIG. 6, to that of hybrid circuit 300, illustrated by curve 602.

Conclusion
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[0062] While various embodiments of the present invention have been described above, it should be understood that
they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant
art that various changes in form and detail can be made therein without departing from the scope of the invention. Thus,
the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

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Claims
1.

A hybrid circuit (400), comprising:

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first (108) and second input terminals (110);

first and second output terminals;
an output impedance ZL observed between the first and the second output terminals;
a series resistor RS (120) coupled between the first input and the first output terminals;
an impedance network, including first (104a), second (106a), third (104b), and fourth (106b) impedance circuits;
wherein said first (1 04a) and second (106a) impedance circuits are respectively matched to said third (104b)
and fourth (106b) impedance circuits;
wherein said first (1 04a), second (106a), third (104b), and fourth (106b) impedance circuits each includes one
or more of (a) resistive components and (b) capacitive components;
wherein the first (104a) and fourth (1 06b) impedance circuits are coupled in series between the first output and
the second input terminal (110);
wherein the third (104b) and second (106a) impedance circuits are coupled in series between the second output
and the first input terminal (108);
wherein the first (104a) and third (1 04b) impedance circuits exhibit a resulting impedance Z1;
wherein the second (106a) and fourth (106b) impedance circuits exhibit a resulting impedance Z2;
wherein said first/third (104a/104b) and second/fourth (106a/106b) impedance circuits each includes a resistivecapacitive (RC) path, namely R2-C1 and R4-C2 respectively, coupled in parallel with a resistive path, namely
R1 and R3 respectively;
wherein the placement of a capacitor C2 (402) in the second (106a) and fourth (106b) impedance circuits

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provides that the resulting impedance Z2 of said second (106a) and fourth (106b) impedance circuits varies in
the opposite direction to the output impedance ZL as frequency varies such that the impedance ratio

is

40

adapted to track the impedance ratio

as frequency varies, thereby compensating for any inductive

components in ZL.
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2.

The hybrid circuit (400) of claim 1, wherein the hybrid circuit is used in a high-speed communication device, and
wherein the hybrid circuit provides isolation between transmitted and received signals in said high-speed communication device.

3.

The hybrid circuit (400) of claim 1, wherein the hybrid circuit is used in a high-speed communication device, and
wherein the hybrid circuit provides echo rejection of transmitted signals to prevent said transmitted signals from
reaching a receiver of said high-speed communication device.

4.

The hybrid circuit of claim 2 or 3, wherein the hybrid circuit is used within a Digital Subscriber Line (DSL) communication device.

5.

The hybrid circuit of claim 4, wherein the DSL communication device is a Very High Speed DSL (VDSL) device.

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EP 2 061 158 B1
6.

The hybrid circuit of claim 2 or 3, wherein the hybrid circuit is used within a Cable modem communication device.

7.

A high-speed communication device, comprising:

a line driver (124) to provide differential transmit signals;
a receiver (130) to receive differential receive signals; and
an analog front end (AFE) circuit, comprising:

a hybrid circuit (400) of any of claims 1 to 6 having the first (108) and second (110) input terminals coupled
to said line driver (124) and providing third (112) and fourth (114) input terminals to said receiver (130);
a line transformer (126) coupled at the first and second output terminals of said hybrid circuit (400); and a
line impedance (128) coupled to said transformer (126);

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wherein said hybrid circuit (400) provides isolation between said transmit and receive signals in said AFE circuit.
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8.

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The high-speed communication device of claim 7, wherein the high-speed communication device is a Digital Subscriber Line (DSL) communication device.

Patentansprche
1.

Hybridschaltung (400) mit:

- einem ersten (108) und einem zweiten Eingangsanschluss (110),
- einem ersten und einem zweiten Ausgangsanschluss,
- einer Ausgangsimpedanz ZL, die zwischen dem ersten und zweiten Ausgangsanschluss beobachtet wird,
- einem Reihenwiderstand RS (120), der zwischen dem ersten Eingangsanschluss und dem ersten Ausgangsanschluss gekoppelt ist,
- einem Impedanznetzwerk, das eine erste (104a), zweite (106a), dritte (104b) und vierte (106b) Impedanzschaltung umfasst,
- wobei die erste (104a) und zweite (106a) Impedanzschaltung jeweils auf die dritte (1 04b) und vierte (1 06b)
Impedanzschaltung abgestimmt sind,
- wobei die erste (1 04a), zweite (1 06a), dritte (1 04b) und vierte (1 06b) Impedanzschaltung jeweils eine oder
mehrere (a) ohmsche Komponenten und (b) kapazitive Komponenten umfassen,
- wobei die erste (104a) und vierte (106b) Impedanzschaltung zwischen dem ersten Ausgangsanschluss und
dem zweiten Eingangsanschluss (110) in Reihe geschaltet sind,
- wobei die dritte (104b) und zweite (106a) Impedanzschaltung zwischen dem zweiten Ausgangsanschluss und
dem ersten Eingangsanschluss (108) in Reihe geschaltet sind,
- wobei die erste (104a) und dritte (104b) Impedanzschaltung eine resultierende Impedanz Z1 aufweisen,
- wobei die zweite (106a) und vierte (106b) Impedanzschaltung eine resultierende Impedanz Z2 aufweisen,
- wobei die erste/dritte (104a/104b) und zweite/vierte (106a/106b) Impedanzschaltung jeweils einen ohmschen/
kapazitiven (RC) Pfad umfassen, nmlich R2-C1 bzw. R4-C2, der parallel zu einem ohmschen Pfad, nmlich
R1 bzw. R3, geschaltet ist,
- wobei die Platzierung eines Kondensators C2 (402) in der zweiten (106a) und vierten (106b) Impedanzschaltung

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dafr sorgt, dass die resultierende Impedanz Z2 der zweiten (106a) und vierten (106b) Impedanzschaltung bei
einer Frequenzvariation in zur Ausgangsimpedanz ZL entgegengesetzter Richtung variiert, so dass das Impedanzverhltnis

angepasst wird, um bei einer Frequenzvariation dem Impedanzverhltnis

zu

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folgen, wodurch jedwede induktiven Komponenten in ZL kompensiert werden.

2.

Hybridschaltung (400) nach Anspruch 1, wobei die Hybridschaltung in einem Hochgeschwindigkeitskommunikationsgert verwendet wird, und wobei die Hybridschaltung eine Trennung zwischen gesendeten und empfangenen
Signalen in dem Hochgeschwindigkeitskommunikationsgert vorsieht.

3.

Hybridschaltung (400) nach Anspruch 1, wobei die Hybridschaltung in einem Hochgeschwindigkeitskommunikationsgert verwendet wird, und wobei die Hybridschaltung eine Echounterdrckung von gesendeten Signalen vorsieht,

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EP 2 061 158 B1
um zu verhindern, dass die gesendeten Signale einen Empfnger des Hochgeschwindigkeitskommunikationsgerts
erreichen.
4.

Hybridschaltung nach Anspruch 2 oder 3, wobei die Hybridschaltung in einem DSL- (Digital Subscriber Line/Digitale
Teilnehmeranschlussleitung) Kommunikationsgert verwendet wird.

5.

Hybridschaltung nach Anspruch 4, wobei das DSL-Kommunikationsgert ein VDSL- (Very High Speed DSL/DSL
mit sehr hoher Geschwindigkeit) Gert ist.

6.

Hybridschaltung nach Anspruch 2 oder 3, wobei die Hybridschaltung in einem Kabelmodemkommunikationsgert

verwendet wird.

7.

Hochgeschwindigkeitskommunikationsgert mit:

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- einem Leitungstreiber (124) zum Bereitstellen differentieller Sendesignale,

- einem Empfnger (130) zum Empfangen differentieller Empfangssignale, und
- einer Analog-Frontend- (AFE-) Schaltung, die umfasst:

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- eine Hybridschaltung (400) nach einem der Ansprche 1 bis 6, deren erster (108) und zweiter (110)
Eingangsanschluss mit dem Leitungstreiber (124) gekoppelt sind, und die einen dritten (112) und vierten
(114) Eingangsanschluss zum Empfnger (130) bereitstellt,
- einen Leitungstransformator (126), der mit dem ersten und zweiten Ausgangsanschluss der Hybridschaltung (400) gekoppelt ist, und
- eine Leitungsimpedanz (128), die mit dem Transformator (126) gekoppelt ist,

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- wobei die Hybridschaltung (400) eine Trennung zwischen den Sende- und Empfangssignalen in der AFESchaltung vorsieht.
8.
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Hochgeschwindigkeitskommunikationsgert nach Anspruch 7, wobei das Hochgeschwindigkeitskommunikationsgert ein DSL- (Digital Subscriber Line/ Digitale Teilnehmeranschlussleitung) Kommunikationsgert ist.

Revendications
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1.

Circuit hybride (400), comprenant :

des premire (108) et deuxime (110) bornes dentre ;
des premire et deuxime bornes de sortie ;
une impdance de sortie ZL observe entre la premire et la deuxime bornes de sortie ;
une rsistance srie RS (120) couple entre la premire borne dentre et la premire borne de sortie ;
un rseau dimpdance, incluant un premier (104a), un deuxime (106a), un troisime (104b), et un quatrime
(106b) circuits dimpdance ;
dans lequel lesdits premier (104a) et deuxime (106a) circuits dimpdance sont respectivement adapts auxdits
troisime (104b) et quatrime (106b) circuits dimpdance ;
dans lequel lesdits premier (104a), deuxime (106a), troisime (104b), et quatrime (106b) circuits dimpdance
incluent chacun une ou plusieurs de (a) composantes rsistives et (b) composantes capacitives ;
dans lequel les premier (104a) et quatrime (106b) circuits dimpdance sont coupls en srie entre la premire
borne de sortie et la deuxime borne dentre (110) ;
dans lequel les troisime (104b) et deuxime (106a) circuits dimpdance sont coupls en srie entre la deuxime
borne de sortie et la premire borne dentre (108) ;
dans lequel les premier (104a) et troisime (104b) circuits dimpdance affichent une impdance rsultante Z1;
dans lequel les deuxime (106a) et quatrime (106b) circuits dimpdance affichent une impdance rsultante
Z2;
dans lequel lesdits premier/troisime (104a/104b) et deuxime/quatrime (106a/106b) circuits dimpdance
incluent chacun un chemin rsistif-capacitif (RC), savoir R2-C1 et R4-C2 respectivement, coupls en parallle
avec un chemin rsistif, savoir R1 et R3 respectivement;
dans lequel la mise en place dun condensateur C2 (402) dans les deuxime (106a) et quatrime (106b) circuits

EP 2 061 158 B1
dimpdance fait que limpdance rsultante Z2 desdits deuxime (106a) et quatrime (106b) circuits dimpdance varie dans le sens oppos limpdance de sortie ZL lorsque la frquence varie de telle sorte que le
rapport dimpdance

est adapt suivre le rapport dimpdance

lorsque la frquence varie,

compensant ainsi de quelconques composantes inductives dans ZL.

2.

Circuit hybride (400) selon la revendication 1, dans lequel le circuit hybride est utilis dans un dispositif de communication haute vitesse, et dans lequel le circuit hybride offre une isolation entre signaux mis et reus dans ledit
dispositif de communication haute vitesse.

3.

Circuit hybride (400) selon la revendication 1, dans lequel le circuit hybride est utilis dans un dispositif de communication haute vitesse, et dans lequel le circuit hybride offre un rejet dcho de signaux mis pour empcher que
lesdits signaux mis natteignent un rcepteur dudit dispositif de communication haute vitesse.

4.

Circuit hybride selon la revendication 2 ou 3, dans lequel le circuit hybride est utilis dans un dispositif de communication sur Ligne dAbonn Numrique (DSL).

5.

Circuit hybride selon la revendication 4, dans lequel le dispositif de communication DSL est un dispositif DSL trs
haute vitesse (VDSL).

6.

Circuit hybride selon la revendication 2 ou 3, dans lequel le circuit hybride est utilis dans un dispositif de communication sur modem cble.

7.

Dispositif de communication haute vitesse comprenant :

10

15

20

25

un modem en bande de base (124) pour fournir des signaux de transmission diffrentiels ;
un rcepteur (130) pour recevoir des signaux de rception diffrentiels ; et
un circuit frontal analogique (AFE), comprenant :

30

un circuit hybride (400) selon lune quelconque des revendications 1 6 ayant les premire (108) et deuxime
(110) bornes dentre couples audit modem en bande de base (124) et fournissant des troisime (112)
et quatrime (114) bornes dentre audit rcepteur (130);
un transformateur en ligne (126) coupl aux premire et deuxime bornes de sortie dudit circuit hybride
(400) ; et
une impdance de ligne (128) couple audit transformateur (126) ;

35

dans lequel ledit circuit hybride (400) offre une isolation entre lesdits signaux dmission et de rception dans
ledit circuit AFE.

40

8.

Dispositif de communication haute vitesse selon la revendication 7, dans lequel le dispositif de communication
haute vitesse est un dispositif de communication sur Ligne dAbonn Numrique (DSL).

45

50

55

EP 2 061 158 B1

10

EP 2 061 158 B1

11

EP 2 061 158 B1

12

EP 2 061 158 B1

13

EP 2 061 158 B1

14

EP 2 061 158 B1

15

EP 2 061 158 B1
REFERENCES CITED IN THE DESCRIPTION

This list of references cited by the applicant is for the readers convenience only. It does not form part of the European
patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be
excluded and the EPO disclaims all liability in this regard.

Patent documents cited in the description

EP 1128570 A [0006]

16