UNIT 1 - PART 1

COMPUTER ORGANISATION & ARCHITECTURE

o COMPUTER ARCHITECTURE is a set of rules and methods that describe the

functionality, organization, and implementation of computer systems.
o PROGRAM is a set of instructions that specify the operations, operands and
sequence by which processing has to occur.
o INSTRUCTION CODE is a group of bits that tell the computer to perform a specific
operation
o EFFECTIVE ADDRESS is the address of the instructions operand. It is the location
of the operand of an instruction, since the operand is the data to be accessed. This
address can be directly used without modification to access an operand.

A. BLOCK DIAGRAM OF COMPUTER

INPUT DEVICE: used to enter data and programs into a computer system. We input
data and instructions into the computer.

Ex: Keyboard , Mouse , Floppy disk , Scanner etc.

We give data, which is in raw form, process the data and convert it into information.

MEMORY:
o MAIN MEMORY:
Also called primary memory.
It is volatile i.e the contents are lost if a power failure or a system crash

occurs.
Computer programs must be in main memory to be executed.
Its size is small and it is expensive.
Ex: RAM.
Main memory can be accessed directly . So we want all the data to reside
in main memory, which is not possible because of 2 reasons:
a. Main memory is usually too small to store all the needed programs
and data permanently.
b. It is volatile and hence data is lost. So, we need secondary storage.

o SECONDARY MEMORY:

Most computers have secondary storage as an extension to main memory.

Main requirement is that it should be able to hold large quantities of data

permanently.
Speed is slow.
Cost is low.
Ex: Hard disk drive (HDD), FDD (Floppy disk Drive), Pendrive etc.

o CACHE MEMORY:

Fastest and most costly.

Frequently used data is copied into cache memory on a temporary basis.
When we need some information, we first check whether it is in the cache.
If it is present, we use the information directly from the cache. If it is not,
we use the information from the main memory, putting a copy in the cache
memory assuming that it will be needed again.

CPU: It is the heart of the computer.

Called the CENTRAL PROCESSING UNIT.

It is a combination of control unit and ALU.
It performs functions like making calculations and controlling all the units of the
computer.

o CONTROL UNIT: It directs and coordinates most of the computer activities.

Does not execute instructions by itself but tells other parts of the computer

to execute those instructions.

It determines movement of electronic signals between the main memory
and ALU as well as control signals between CPU and I/O devices.

o ALU: Performs arithmetic and logical functions i.e addition, subtraction,

multiplication, division and certain comparisons.
Controls the speed of the calculations.

OUTPUT DEVICE: Output Unit of a computer provides the information and results
of a computation to outside world.
Ex: Printers, Monitors, FDD, HDD.

B. COMPUTER HARDWARE COMPONENTS:

REGISTERS: A register is one of the small set of data holding places that are a part
of a computer processor.
It may hold a computer instruction or a storage address.
Ex: Accumulator, Data Register(DR), Memory Address Register(MAR),
Program Counter(PC), Memory Data Register(MDR), Index Register,

Instruction Register.
Operations performed by registers are:

a. Fetch: Used to take the instructions from the user, those

instructions go into the main memory and they will be fetched from
the main memory with the help of registers.
b. Decode: Used for interpreting the instructions. Instructions are
decoded by the CPU and it will find out which operation is to be
performed on the instruction.
c. Execute: Results produced by the CPU are stored into the memory
and after that they are displayed to the user.
i.

ACCUMULATOR: An accumulator is a register in which immediate

arithmetic and logical results are stored.

o Without a register like an accumulator, it would be necessary to write the result of
each calculation (addition, multiplication, shift, etc.) to main memory, perhaps
only to be read right back again for use in the next operation.
o Access to main memory is slower than access to a register like the accumulator
because the technology used for the large main memory is slower (but cheaper)
than that used for a register.
o The accumulator is a temporary memory location that is accessed speedily by the
CPU.
o The increments of values occur in the accumulator for programming calculations.
o For example, a small piece of code needs to fetch a value from main memory and
then add 3 to it and finally store the result back into memory. The accumulator
will be used

LDA 3001
ADC #3

STA 3001

This instruction will load the data at

address 3001 into the accumulator
This instruction adds 3 to the
content of the accumulator
This instruction stores the content
of

the

accumulator

into

main

memory at location 3001

o As shown above the role of the accumulator is to store intermediate results of the
current data processing being undertaken.

ii.

MEMORY DATA REGISTER:

o The Memory Data Register (MDR) or Memory Buffer Register (MBR) is

the register of a computer's control unit that contains the data to be stored in
the computer storage(e.g. RAM), or the data after a fetch from the computer
storage.
o It acts like a buffer and holds anything that is copied from the memory ready
for the processor to use it.
o The MDR is a two-way register. When data is fetched from memory and
placed into the MDR, it is written to go in one direction. When there is a write
instruction, the data to be written is placed into the MDR from another CPU
register, which then puts the data into memory.
o The Memory Data Register (MDR) contains the data value being fetched or
stored.
o The size of the MDR is usually a multiple of 8 bits. Typical values of MDR
width are 32 and 64 bits, which would allow us to fetch, in a single step, either
an integer or a float value.
o For example
a. to retrieve the contents of cell 123, we would load the value 123 (in
binary) into the MAR and perform a fetch operation. When the operation
is done, a copy of the contents of cell 123 would be in the MDR.
b. To store the value 98 into cell 4, we load a 4 into the MAR and a 98 into
the MDR and perform a store. When the operation is completed the
contents of cell 4 will have been set to 98, by discarding whatever was
there previously.
iii.

MEMORY ADDRESS REGISTER: Memory Address Register (MAR)

is CPU register that either stores the memory address from which data will be
fetched to the CPU or the address to which data will be sent and stored.
o In other words, MAR holds the memory location of data that needs to be
accessed.
o When reading from memory, data addressed by MAR is fed into the MDR
(memory data register) and then used by the CPU. When writing to memory,
the CPU writes data from MDR to the memory location whose address is
stored in MAR.
o However, to prevent the memory address register from continuously dumping
its output to the address bus, we'll place a 32-bit tri-state buffer between the
output of the MAR and the address bus. This allows other devices (say, I/O
devices) to use the address bus, if necessary.

o The MAR can hold two different kinds of addresses.

The MAR and MDR are two hidden registers. They are the "gateway" to the address
and data bus respectively. They are the only connection to the busses.
We use tri-state buffers and a MUX to control where the data comes from and where
the data goes to with these two registers.

iv. PROGRAM COUNTER: This is a 16 bit register accessible to the user.

o The program counter (PC), commonly called the instruction pointer (IP)
and sometimes called the instruction address register (IAR) is a processor
register that indicates where a computer is in its program sequence.
o PC is incremented after fetching an instruction, and holds the memory
address of ("points to") the next instruction that would be executed.
o Instructions are usually fetched sequentially from memory, but control
transfer instructions change the sequence by placing a new value in the PC.
These

include branches (sometimes

called

jumps), subroutine calls,

and returns. A transfer that is conditional on the truth of some assertion lets the
computer follow a different sequence under different conditions.
o A branch provides that the next instruction is fetched from somewhere else in
memory.
o When the computer restarts or is reset, the program counter normally reverts
to 0.
o For example if the program counter has the address 305 then the next
instruction will be at location 305 in main memory (RAM). When a program
is running, the program counter will often just be incrementing as it addresses
one instruction after the other, e.g. 305, 306, 307.

v.

INDEX REGISTERS: An index register in a computer's CPU is a processor

register used for modifying operand addresses during the run of a program,
typically for doing vector/array operations.

o The contents of an index register is added to (in some cases subtracted from)
an immediate address (one that is part of the instruction itself) to form the
"effective" address of the actual data (operand).

vi.

INSTRUCTION REGISTER: IR is a 32-bit hidden register, That is, they are

not directly accessible by the assembly language programmer.
o Instruction register (IR) is the part of a CPU's control unit that stores the
instruction currently being executed or decoded.
o In simple processors each instruction to be executed is loaded into the
instruction register which holds it while it is decoded, prepared and ultimately
executed, which can take several steps.
o Decoding the op-code in the instruction register includes determining the
instruction, determining where its operands are in memory, retrieving the
operands from memory, allocating processor resources to execute the
command etc.
o The output of IR is available to control circuits which generate the timing
signals that control the various processing elements involved in executing the
instruction.

SYSTEM BUSES:o A bus is a set of wires.

o To send information from one component to other, the source component outputs
data onto the bus and the destination component receives that data.
o As the complexity increases, it becomes more efficient to use buses rather than
direct connection b/w pair of devices.
o Bus uses space and power.
o They also require less pins on the chip.

 ADDRESS BUS:- When CPU reads data/instruction from or writes data to memory,
it must specify the address of the new location it wishes to access.
o CPU puts this address on the bus, memory takes the location as input and uses it
to access that location.
o All the components like keyboard, monitor or disk drive has a unique address as
well. While accessing address of such devices, CPU places address of that
particular device on the address bus. Each device reads the address placed on the
address bus and the designated device comes to know that it is being accessed.
o Address bus is unidirectional i.e. CPU can only place data on this bus , CPU never
reads data from it.
DATA BUS: Data is transferred using data buses.
o Fetch: When CPU fetches data from memory, it first places the memory
address on the address bus, the memory the outputs the data on the data bus
which is then read by the CPU.

o Write: CPU outputs the address on the address bus and then places data on the
data bus. Memory, then reads data and stores that data at the memory location
indicated by the address bus.
o It is bidirectional.
CONTROL BUS: Used by CPU for communicating with other devices within the
computer.
o Control bus carries the commands from the CPU and returns status signals
from the devices.
o Lines:
Read (R) single line that when active (at 0) indicates that device is

being read by the CPU.

Write (W) - single line that when active (at 0) indicates that device is

being written by the CPU.

ACK: It delivers information that data was acknowledged by the

device.
Bus request: Indicates that the device is requesting to access the bus.
Reset : reset the system.
Clock Signals: The signals on this line are used to synchronise data

between the CPU and a device.

o Control Bus is bidirectional.
Advantages of buses:
a. New elements can be easily added.
b. Low cost.
c. Reduce complexity.

Disadvantages of buses:
a.
b.

Creates a communication bottleneck.

Maximum speed is limited by
Length of the bus
No of devices on the bus

ARITHMETIC AND LOGICAL UNIT ( ALU ):

An arithmetic logic unit (ALU) is a combinational digital electronic circuit that

performs arithmetic and bitwise logical operations on integer binary numbers.

An ALU is a fundamental building block of many types of computing circuits,
including the central processing unit (CPU) of computers, FPUs, and graphics

processing units (GPUs).

A single CPU, FPU or GPU may contain multiple ALUs.
The inputs to an ALU are the data to be operated on, called operands, and a code
indicating the operation to be performed; the ALU's output is the result of the

performed operation.
ALU also exchanges additional information with a status register, which relates to the
result of the current or previous operations.

Signals

An ALU has a variety of input and output nets, which are the shared electrical connections
used to convey digital signals between the ALU and external circuitry. When an ALU is
operating, external circuits apply signals to the ALU inputs and, in response, the ALU
produces and conveys signals to external circuitry via its outputs.

Data

A basic ALU has three parallel data buses consisting of two input operands (A and B) and a
result output (Y). Each data bus is a group of signals that conveys one binary integer number.
Typically, the A, B and Y bus widths (the number of signals comprising each bus) are
identical and match the native word size of the encapsulating CPU (or other processor).

Opcode
The opcode input is a parallel bus that conveys to the ALU an operation selection code,
which is an enumerated value that specifies the desired arithmetic or logic operation to be
performed by the ALU. The opcode size (its bus width) is related to the number of different
operations the ALU can perform; for example, a four-bit opcode can specify up to sixteen
different ALU operations. Generally, an ALU opcode is not the same as a machine language
opcode, though in some cases it may be directly encoded as a bit field within a machine
language opcode.

Status
The status outputs are various individual signals that convey supplemental information about
the result of an ALU operation. These outputs are usually stored in registers so they can be
used in future ALU operations or for controlling conditional branching. The collection of bit
registers that store the status outputs are often treated as a single, multi-bit register, which is
referred to as the "status register" or "condition code register". General-purpose ALUs
commonly have status signals such as:

Carry-out, which conveys the carry resulting from an addition operation, the borrow
resulting from a subtraction operation, or the overflow bit resulting from a binary shift
operation.

Zero, which indicates all bits of the Y bus are logic zero.

Negative, which indicates the result of an arithmetic operation is negative.

Overflow which indicates the result of an arithmetic operation has exceeded the
numeric range of the Y bus.

Parity which indicates whether an even or odd number of bits on the Y bus are logic
one.

The status input allows additional information to be made available to the ALU when
performing an operation. Typically, this is a "carry-in" bit that is the stored carry-out from a
previous ALU operation.

CIRCUIT OPERATION:

An ALU is a combinational logic circuit, meaning that its outputs will change

asynchronously in response to input changes.

In normal operation, stable signals are applied to all of the ALU inputs and, when
enough time (known as the "propagation delay") has passed for the signals to
propagate through the ALU circuitry, the result of the ALU operation appears at the
ALU outputs.

The external circuitry connected to the ALU is responsible for

o ensuring the stability of ALU input signals throughout the operation, and
o for allowing sufficient time for the signals to propagate through the ALU

before sampling the ALU result.

In general, external circuitry controls an ALU by applying signals to its inputs.
For example, a CPU begins an ALU addition operation by routing operands from their
sources (which are usually registers) to the ALU's operand inputs, while the control
unit simultaneously applies a value to the ALU's opcode input, configuring it to
perform addition. At the same time, the CPU also routes the ALU result output to a
destination register that will receive the sum. The ALU's input signals, which are held
stable until the next clock, are allowed to propagate through the ALU and to the
destination register while the CPU waits for the next clock. When the next clock
arrives, the destination register stores the ALU result and, since the ALU operation
has completed, the ALU inputs may be set up for the next ALU operation.

FUNCTIONS:
Arithmetic operations

Add: A and B are summed and the sum appears at Y and carry-out.

Add with carry: A, B and carry-in are summed and the sum appears at Y and carryout.

Subtract: B is subtracted from A (or vice-versa) and the difference appears at Y and
carry-out. For this function, carry-out is effectively a "borrow" indicator. This operation
may also be used to compare the magnitudes of A and B; in such cases the Y output may
be ignored by the processor, which is only interested in the status bits (particularly zero
and negative) that result from the operation.

Subtract with borrow: B is subtracted from A (or vice-versa) with borrow (carry-in)
and the difference appears at Y and carry-out (borrow out).

Two's complement (negate): A (or B) is subtracted from zero and the difference
appears at Y.

Increment: A (or B) is increased by one and the resulting value appears at Y.

Decrement: A (or B) is decreased by one and the resulting value appears at Y.

Pass through: all bits of A (or B) appear unmodified at Y. This operation is typically
used to determine the parity of the operand or whether it is zero or negative.

Bitwise logical operations

AND: the bitwise AND of A and B appears at Y.

OR: the bitwise OR of A and B appears at Y.

Exclusive-OR: the bitwise XOR of A and B appears at Y.

One's complement: all bits of A (or B) are inverted and appear at Y.

Bit shift operations

Bit shift examples for an eight-bit ALU
Type

Arithmetic

Logical

Left shift

Right shift

Rotate

Rotate through carry

ALU shift operations cause operand A (or B) to shift left or right (depending on the opcode)
and the shifted operand appears at Y.

Arithmetic shift: the operand is treated as a two's complement integer, meaning that
the most significant bit is a "sign" bit and is preserved.

Logical shift: a logic zero is shifted into the operand. This is used to shift unsigned
integers.

Rotate: the operand is treated as a circular buffer of bits so its least and most
significant bits are effectively adjacent.

Rotate through carry: the carry bit and operand are collectively treated as a circular
buffer of bits.

Although an ALU can be designed to perform complex functions, the resulting higher circuit
complexity, cost, power consumption and larger size makes this impractical in many cases.
Consequently, ALUs are often limited to simple functions that can be executed at very high
speeds (i.e., very short propagation delays), and the external processor circuitry is responsible
for performing complex functions by orchestrating a sequence of simpler ALU operations.

BASIC COA TERMINOLOGY:

LOGIC GATES:

In electronics, a logic gate is an idealized or physical device implementing a Boolean

function; that is, it performs a logical operation on one or more logical inputs, and
produces a single logical output.

Logic circuits include such devices as multiplexers, registers, arithmetic logic

units (ALUs),

and computer

memory,

all

the

way

up

through

complete microprocessors, which may contain more than 100 million gates.
In modern practice, most gates are made from field-effect transistors (FETs),

particularly MOSFETs (metaloxidesemiconductor field-effect transistors).

In most logic gates, the low state is approximately zero volts (0 V), while the high

state is approximately five volts positive (+5 V).

There are seven basic logic gates: AND, OR, XOR, NOT, NAND, NOR, and XNOR.

AND GATE
A circuit which performs an AND operation is shown in figure. It has n input (n >= 2) and
one output.

OR GATE
A circuit which performs an OR operation is shown in figure. It has n input (n >= 2) and one
output.

NOT GATE
NOT gate is also known as Inverter. It has one input A and one output Y.

NAND GATE
A NOT-AND operation is known as NAND operation. It has n input (n >= 2) and one
output.

NOR GATE
A NOT-OR operation is known as NOR operation. It has n input (n >= 2) and one output.

XOR GATE
XOR or Ex-OR gate is a special type of gate. It can be used in the half adder, full adder and
subtractor. The exclusive-OR gate is abbreviated as EX-OR gate or sometime as X-OR gate.
It has n input (n >= 2) and one output.

XNOR GATE
XNOR gate is a special type of gate. It can be used in the half adder, full adder and
subtractor. The exclusive-NOR gate is abbreviated as EX-NOR gate or sometime as X-NOR
gate. It has n input (n >= 2) and one output.

MULTIPLEXER:

Multiplexer means many into one. A multiplexer is a circuit used to select and route

any one of the several input signals to a signal output.

Also called DATA SELECTOR.

Multiposition switches are widely used in many electronics circuits. However circuits
that operate at high speed require the multiplexer to be automatically selected.

Multiplexer handle two type of data that is analog and digital. For analog application,
multiplexer are built of relays and transistor switches. For digital application, they are

built from standard logic gates.

The multiplexer used for digital applications, also called digital multiplexer, is a
circuit with many input but only one output. By applying control signals, we can steer
any input to the output. Few types of multiplexer are 2-to-1, 4-to-1, 8-to-1, 16-to-1
multiplexer.

The 4-to-1 multiplexer has 4 input bit, 2 control bits, and 1 output bit. The four input bits are
D0,D1,D2 and D3. only one of this is transmitted to the output y. The output depends on the
value of AB which is the control input. The control input determines which of the input data
bit is transmitted to the output.
For instance, as shown in fig. when AB = 00, the upper AND gate is enabled while all other
AND gates are disabled. Therefore, data bit D0 is transmitted to the output, giving Y = Do.

If the control input is changed to AB =11, all gates are disabled except the bottom AND gate.
In this case, D3 is transmitted to the output and Y = D3.
Multiplexer are used in various fields where multiple data need to be transmitted using a
single line. Following are some of the applications of multiplexers

Communication system Communication system is a set of systems that enable

communication like transmission system, relay and tributary station, and
communication network. The efficiency of communication system can be increased
considerably using multiplexer. Multiplexer allow the process of transmitting different
type of data such as audio, video at the same time using a single transmission line.

Telephone network In telephone network, multiple audio signals are integrated on

a single line for transmission with the help of multiplexers. In this way, multiple audio

signals can be isolated and eventually, the desire audio signals reach the intended
recipients.

Computer memory Multiplexers are used to implement huge amount of memory

into the computer, at the same time reduces the number of copper lines required to
connect the memory to other parts of the computer circuit.

Transmission from the computer system of a satellite Multiplexer can be used

for the transmission of data signals from the computer system of a satellite or
spacecraft to the ground system using the GPS (Global Positioning System) satellites.

DEMULTIPLEXER:

Demultiplexer means one to many.

A demultiplexer is a circuit with one input and many output. By applying control

signal, we can steer any input to the output.

Few types of demultiplexer are 1-to 2, 1-to-4, 1-to-8 and 1-to 16 demultiplexer.

The 1-to-4 demultiplexer has 1 input bit, 2 control bit, and 4 output bits. An example
of 1-to-4 demultiplexer is IC 74155. The 1-to-4 demultiplexer is shown in figure
below-

The input bit is labelled as Data D. This data bit is transmitted to the data bit of the output
lines. This depends on the value of AB, the control input.
When AB = 01, the upper second AND gate is enabled while other AND gates are disabled.
Therefore, only data bit D is transmitted to the output, giving Y1 = Data.
If D is low, Y1 is low. IF D is high,Y1 is high. The value of Y1 depends upon the value of D.
All other outputs are in low state.
If the control input is changed to AB = 10, all the gates are disabled except the third AND
gate from the top. Then, D is transmitted only to the Y2 output, and Y2 = Data.

Applications of Demultiplexer:
1.

Demultiplexer is used to connect a single source to multiple destinations. The main

application area of demultiplexer is communication system where multiplexer are used.
Most of the communication system are bidirectional i.e. they function in both ways
(transmitting and receiving signals). Hence, for most of the applications, the
multiplexer and demultiplexer work in sync. Demultiplexer are also used for
reconstruction of parallel data and ALU circuits.

2.

Communication System Communication system use multiplexer to carry multiple

data like audio, video and other form of data using a single line for transmission. This
process make the transmission easier. The demultiplexer receive the output signals of
the multiplexer and converts them back to the original form of the data at the receiving
end. The multiplexer and demultiplexer work together to carry out the process of
transmission and reception of data in communication system.

3.

ALU (Arithmetic Logic Unit) In an ALU circuit, the output of ALU can be stored
in multiple registers or storage units with the help of demultiplexer. The output of ALU
is fed as the data input to the demultiplexer. Each output of demultiplexer is connected
to multiple register which can be stored in the registers.

4.

Serial to parallel converter A serial to parallel converter is used for reconstructing

parallel data from incoming serial data stream. In this technique, serial data from the
incoming serial data stream is given as data input to the demultiplexer at the regular
intervals. A counter is attach to the control input of the demultiplexer. This counter
directs the data signal to the output of the demultiplexer where these data signals are
stored. When all data signals have been stored, the output of the demultiplexer can be
retrieved and read out in parallel.