5

01

TWD DIS/UMA (15.6") Slim

Intel Chief River Platform Block Diagram

PCB 6L STACK UP

VRAM DDR3 x 8
Max 1GBs/2GBs

LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : SVCC
LAYER 6 : BOT

PAGE 19~20
DDR3 SODIMM1
DDR3 800 ~ 1600 MT/s
Maxima 4GBs
PAGE 12

Intel Ivy Bridge

Processor : Daul Core
Power : 35 (Watt)

DDR3 SO-DIMM2
DDR3 800 ~ 1600 MT/s
Maxima 4GBs
PAGE 13

SATA - CD-ROM
Package : 12.7 (mm)
Power :
PAGE 28
mSATA
Package : 12.7 (mm)
PAGE 28
Power :

FDI x 8

SATA0 6GB/s

BCLK133M

SATA - 1st HDD

Package : 9.5 (mm)
PAGE 28
Power :

Platform Controller Hub

O2Micro OZ8681

PAGE 14~18

27MHz
PAGE 16

Keyboard
Touch Pad

PAGE 26
PAGE 28

DP PortB

USB2.0 Interface

USB3.0 Port x 1

Ricktek RT8205

Support USB Charger

IC : TPS2543

System Power (+3VPCU/+5VPCU/

+3VS5/+5VS5)

PAGE 26

USB2.0 Port x 2(Left side)

Camera

Port9/Port11

Port2
Power :
Package :

Fingerprint
Port 12

NCP6132/NCP5911/RT8209/G9334
Processor Power (+VCC_CORE/
+1.05_VTT/+VCCSA)

PAGE 30

PCIE Gen 1 x 1 Lane

PAGE 30

Richtek RT8207

Realtek

RTS5229-GR

ALC269Q-VC2-GR

Card Reader

Atheros
AR8161-BL3A-R
LAN Controller

Power :

Power :

Power : (WJ)

Power :

Package : LQPF128

Package : LQPF48

Package : LQPF48

Package : OFN48

Size : 14 x 14 (mm)
PAGE 29

Size : 7 x 7 (mm)
PAGE 23

Size : 7 x 7 (mm)
PAGE 25

Size : 6 x 6 (mm)
PAGE 24

Embedded Controller
PAGE 29

PAGE 22

HDMI Interface

Size : 25 x 25 (mm)
PAGE 6~11

LPC Interface

System Discharge Power

(+1.5V/+3V/+5V)

HDMI Conn

PAGE 23

IT8518E/HX

EC SPI ROM

P2806

LVDS Interface

TPM
SLB9635TT1.2

PAGE 22

USB3.0 Interface USB 3.0 Port1(USB 2.0 Port0)

SMBUS

System Charge Power (+BATCHG)

CRT Conn

Package : FCBG989

Azalia

Accelerometer Sensor
LIS3DHTR
PAGE 30

Power Source

CRT Interface

Power : 3.5 Watt

SATA1 6GB/s

M2 Package 29*29mm

Green CLK
32.768KHz
PAGE 25

Intel Cougar/Panther Point

SATA2 3GB/s

PAGE 21
FCBGA908

Package : rPGA989
Size : 37.5 x 37.5 (mm)
PAGE 2~5
DMI x 4

LCD Conn (14")

Nvidia N13P-GLR/N13P-GSR (128bit)

PCI-E Gen3
x 8 Lane

FAN Controller
A

PAGE 28

Combo Jack
iPHONE type
PAGE 23

SPI Interface

System BIOS
SPI ROM
PAGE 7

System Memory Power (+1.5VSUS/

+0.75V_DDR_VTT)

Intel Rambo Peak

Halt Mini Card
WLAN / BT Combo

Richtek RT8209/RT9025
PCH Power (+1.05/+1.8V)

PAGE 27
O2Micro OZ8122

Green CLK
32.768KHz
PAGE 25

DGPU Power (+VGACORE/+3.3V_GFX/

+1.8_VGA/+1.5_GFX/+1.05_GFX)

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
A3

Document Number

Rev
A

Block Diagram

Date: Monday, October 22, 2012

5

Sheet
1

1 of

42

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

[6]
[6]
[6]
[6]

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

G21
E22
F21
D21

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

[6]
[6]
[6]
[6]

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

G22
D22
F20
C21

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]

A22
G19
E20
G18
B20
C19
D19
F17

FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]

FDI_FSYNC0
FDI_FSYNC1

J18
J17

FDI0_FSYNC
FDI1_FSYNC

FDI_INT

H20

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

J19
H17

FDI0_LSYNC
FDI1_LSYNC

[6]
[6]
[6]

eDP_COMP

A18
A17
B16

INT_eDP_HPD_Q

C15
D15
C17
F16
C16
G15

C18
E16
D16
F15

eDP_COMPIO 4mils
eDP_ICOMPO 12mils
eDP_HPD
eDP_AUX
eDP_AUX#

eDP

[6]
[6]

FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]

A21
H19
E19
F18
B21
C20
D18
E17

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

U16B

[14]
[7]

C26

H_SNB_IVB#
SKTOCC#

TP4

AN34

TP_CATERR#

PROC_SELECT#
SKTOCC#

AL33

CATERR#

H_PECI

AN33

PECI

H_PROCHOT#_R

AL32

PROCHOT#

AN32

THERMTRIP#

TP6

Placement close to EC.

[29]
PEG_RX[0..7]

02

H_PECI

[14]
[29,39]

R69

H_PROCHOT#

C182

56.2/F_4

43P/50V_4
[9,29]

PM_THRMTRIP#

PM_THRMTRIP#

BCLK
BCLK#

A28
A27

DPLL_REF_CLK
DPLL_REF_CLK#

A16
A15

CLK_CPU_BCLKP
CLK_CPU_BCLKN

[8]
[8]
D

CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R

R438
R440

1K/F_4
1K/F_4

+1.05V

SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,

SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

R8

CPU_DRAMRST#

AK1 SM_RCOMP_0
SM_RCOMP_1
A5
SM_RCOMP_2
A4

R109
R447
R450

140/F_4
25.5/F_4
200/F_4

CPU XDP

[14]

PEG_TX#[0..7]

[6]

PM_SYNC
R250

C_PEG_TX#0 C117
C_PEG_TX#1 C119
C_PEG_TX#2 C115
C_PEG_TX#3 C106
C_PEG_TX#4 C98
C_PEG_TX#5 C100
C_PEG_TX#6 C96
C_PEG_TX#7 C92

0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7

[9]

AM34

PM_SYNC

AP33

UNCOREPW RGOOD

10K/F_4

H_PWRGOOD
C616

*0.1U/10V_4

PM_DRAM_PWRGD_R

V8

SM_DRAMPW ROK

Intel DG request

CPU RESET#

PEG x8
[14]

[8,14,24,25,27,29,30]

CPU_RESET#

PLTRST#

R404

20110816 modify:
REGULATOR DEL FOR SHORT

PEG_TX[0..7]

AR33

1.5K/F_4

RESET#

R401

PRDY#
PREQ#

AP29 XDP_PRDY#
AP27 XDP_PREQ#

TCK
TMS
TRST#

AR26
AR27
AP30

XDP_TCLK
XDP_TMS
XDP_TRST#

TDI
TDO

AR28
AP26

XDP_TDI_R
XDP_TDO

DBR#

AL35

XDP_DBRST#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

XDP_BPM6
XDP_BPM7

TP8

XDP_DBRST#

[6]

TP7
TP5

+1.05V

750/F_4
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7

C116
C118
C114
C107
C99
C101
C97
C94

0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4

PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7

Ivy Bridge_rPGA_2DPC_Rev0p61

Processor pull-up (CPU)

+1.5VSUS
+1.5V_CPU

[6]

PM_DRAM_PWRGD

PM_DRAM_PWRGD

R76

62_4

XDP_TDO

R422

51_4

XDP_TMS

R418

51_4

XDP_TDI_R

R415

51_4

XDP_PREQ#

R410

*51_4

XDP_TCLK

R425

51_4

XDP_TRST#

R407

51_4

R151
1K/F_4

R103
200/F_4

Ivy Bridge_rPGA_2DPC_Rev0p61

H_PROCHOT#

DDR3 DRAM RESET

R106

130/F_4

PM_DRAM_PWRGD_R
Q15
2N7002K

R98

1K/F_4

R165

DDR3_DRAMRST#

[12,13]

B28
B26
A24
B23

PEG_RX#[0..7]

CLOCKS

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

J22
J21
H22

DDR3
MISC

[6]
[6]
[6]
[6]

PEG_COMP

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO

JTAG & BPM

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

H=4.5mm ? DGG^9000022 (3A)

H=4.7mm ? DGG^9000024 (3A)

THERMAL

B27
B25
A25
B24

PCI EXPRESS* - GRAPHICS

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

Intel(R) FDI

[6]
[6]
[6]
[6]

DMI

U16A

CPU Type (Reversed Version)

PEG_COMP connect to PIN G3&G4 W:4mils/S:15mils/L: 500mils.

PEG_COMP connect to PIN G1 W:12mils/S:15mils/L: 500mils.

MISC

Ivy Bridge Processor (DMI,PEG,FDI)

Footprint: pz98927-364r-01f-socket
CPU BKT P/N: FBSTD266010

PWR MANAGEMENT

CPU_DRAMRST#_R
[8,12,13]

R99
*39_4

DRAMRST_CNTRL_PCH

SM_DRAMPWROK
Processor Input.

MAIN_ONG

C338
0.047U/10V_4

[4,41]

*3K/F_4

CPU_DRAMRST#
Q10
*2N7002K
R146
4.99K/F_4

eDP_COMPIO and ICOMPO signals should be shorted

near balls and routed with typical impedance <25 mohms
+1.05V

R432

+1.05V

R423

24.9/F_4

For iFDIM
Trigger Point

eDP_COMP

R435

+1.05V

24.9/F_4

*10K/F_4

PEG_COMP

Connect a Test Point on

BPM# 6 signal, very close
to processor.
Connect a Test Point on
BPM# 7 signal, very close
to processor.

PROJECT :TWD (Chief River)

Quanta Computer Inc.

INT_eDP_HPD_Q

NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

Processor 1/4 (Host/GPU)

1

Sheet

2 of

42

03
Ivy Bridge Processor (DDR3)
D

M_A_DQ[63:0]

[12]
[12]
[12]

[12]
[12]
[12]

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_A_CAS#
M_A_RAS#
M_A_WE#

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

AE10
AF10
V6

SA_BS[0]
SA_BS[1]
SA_BS[2]

AE8
AD9
AF9

SA_CAS#
SA_RAS#
SA_W E#

SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]

AB6
AA6
V9

M_A_CLKP0 [12]
M_A_CLKN0 [12]
M_A_CKE0 [12]

SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]

AA5
AB5
V10

M_A_CLKP1 [12]
M_A_CLKN1 [12]
M_A_CKE1 [12]

SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]

AB4
AA4
W9

SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]

AB3
AA3
W 10

SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]

AK3
AL3
AG1
AH1

M_A_CS#0
M_A_CS#1

[12]
[12]

SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]

AH3
AG3
AG2
AH2

M_A_ODT0
M_A_ODT1

[12]
[12]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

C4
G6
J3
M6
AL6
AM8
AR12
AM15

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

D4
F6
K3
N6
AL5
AM9
AR11
AM14

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DQSN[7:0]

M_A_DQSP[7:0]

M_A_A[15:0]

[13]

M_B_DQ[63:0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

[12]

[12]

[12]

[13]
[13]
[13]

[13]
[13]
[13]

Ivy Bridge_rPGA_2DPC_Rev0p61

M_B_BS#0
M_B_BS#1
M_B_BS#2

M_B_CAS#
M_B_RAS#
M_B_WE#

C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

AA9
AA7
R6

SB_BS[0]
SB_BS[1]
SB_BS[2]

AA10
AB8
AB9

SB_CAS#
SB_RAS#
SB_W E#

DDR SYSTEM MEMORY B

[12]

U16D

DDR SYSTEM MEMORY A

U16C

SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]

AE2
AD2
R9

M_B_CLKP0 [13]
M_B_CLKN0 [13]
M_B_CKE0 [13]

SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]

AE1
AD1
R10

M_B_CLKP1 [13]
M_B_CLKN1 [13]
M_B_CKE1 [13]

SB_CLK[2]
SB_CLK#[2]
SB_CKE[2]

AB2
AA2
T9

SB_CLK[3]
SB_CLK#[3]
SB_CKE[3]

AA1
AB1
T10

SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]

AD3
AE3
AD6
AE6

SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]

AE4
AD4
AD5
AE5

M_B_CS#0
M_B_CS#1

M_B_ODT0
M_B_ODT1

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

D7
F3
K6
N3
AN5
AP9
AK12
AP15

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

C7
G3
J6
M3
AN6
AP8
AK11
AP14

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

[13]
[13]

[13]
[13]

M_B_DQSN[7:0]

[13]

M_B_DQSP[7:0]

[13]

M_B_A[15:0]

[13]

Ivy Bridge_rPGA_2DPC_Rev0p61

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

Processor 2/4 (DDR3 I/F)

1

Sheet

3 of

42

C648
22U/6.3VS_6

C645
22U/6.3VS_6

C197
22U/6.3VS_6

C647
22U/6.3VS_6

C635
22U/6.3VS_6

C195
22U/6.3VS_6

C631
22U/6.3VS_6

C638
22U/6.3VS_6

C624
22U/6.3VS_6

C649
22U/6.3VS_6

C644
22U/6.3VS_6

C630
22U/6.3VS_6

C187
22U/6.3VS_6

C175
22U/6.3VS_6

C176
22U/6.3VS_6

C634
22U/6.3VS_6

C626
22U/6.3VS_6

22uF_8 x8 Socket TOP cavity

22uF_8 x10 Socket BOT cavity
22uF_8 x8 Socket TOP edge
470uF_7343 x4

VCCIO40

C662
*22U/6.3VS_6

C660
22U/6.3VS_6

C215
*22U/6.3VS_6

C211
22U/6.3VS_6

C217
*22U/6.3VS_6

C212
22U/6.3VS_6

C628
22U/6.3VS_6

C221
22U/6.3VS_6

C204
22U/6.3VS_6

C653
22U/6.3VS_6

C208
22U/6.3VS_6

C665
*22U/6.3VS_6

C209
22U/6.3VS_6

C203
22U/6.3VS_6

C658
*22U/6.3VS_6

C629
22U/6.3VS_6

C642
22U/6.3VS_6

C659
*22U/6.3VS_6

C654
22U/6.3VS_6

C640
22U/6.3VS_6

J23

C219
*22U/6.3VS_6

+1.05V

VIDALERT#
VIDSCLK
VIDSOUT

C213
22U/6.3VS_6

AJ29
AJ30
AJ28

C657
22U/6.3VS_6

C220
22U/6.3VS_6

22uF_8 x7 Socket TOP cavity

22uF_8 x5 Socket BOT cavity
22uF_8 x2 Socket TOP cavity (no stuff)
22uF_8 x5 Socket BOT cavity (no stuff)
330uF_7343 x2

+1.8V

H_CPU_SVIDALRT#
VR_SVID_CLK
VR_SVID_DATA

IVB: 1.5A

C671
1U/6.3V_4

C670
1U/6.3V_4

B6
A6
A2

VCCPLL1
VCCPLL2
VCCPLL3

C672
10U/6.3V_6

VAXG_SENSE
VSSAXG_SENSE

VCC_AXG_SENSE
VSS_AXG_SENSE
100/F_4

R52

[39]
[39]

+VDDR_REF_CPU

SM_VREF

AL1

R456

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

R458

[12,13,33]
D

3.3K/F_4

MAIND

[41]

C273
470P/50V_4
SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3

20mils width

DDR_VTTREF

Q12
2N7002K
R118

*1K/F_4

SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3

B4
D1

+VDDR_REF_CPU and
DDR_VTTREF must use 10mils
width

C248
0.1U/10V_4

C641
22U/6.3VS_6

SENSE
LINES

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

C664
22U/6.3VS_6

C655
22U/6.3VS_6

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

VREF

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

C661
22U/6.3VS_6

C223
22U/6.3VS_6

SNB: 21.5A

+VCC_GFX

[12]
[13]

*1K/F_4
+1.5V_CPU

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

M27
M26
L26
J26
J25
J24
H26
H25

IVB: 5A
C249
10U/6.3V_6

C247
10U/6.3V_6

C259
10U/6.3V_6

C250
10U/6.3V_6

C49
10U/6.3V_6

C246
10U/6.3V_6

+VCCSA

C189
10U/6.3V_6

VCCSA_VID[0]
VCCSA_VID[1]

VCCIO_SEL

*100/F_4

H23

C22
C24

C177
10U/6.3V_6

C196
C200
10U/6.3V_6 10U/6.3V_6

330uF x1, 10uF_8 x1 Socket BOT edge,

10uF_8 x2 Socket BOT cavity.
R77

VCCSA_SENSE

IVB: 6A

+VCCSA
VCCUSA_SENSE

R68

10K_4

R71

10K_4

VCCSA_SEL0
VCCSA_SEL

[34]

VCCSA_SEL0 [34]
VCCSA_SEL [34]

Zo:55 ohm

A19

Ivy Bridge_rPGA_2DPC_Rev0p61

330uF x1, 10uF_8 x1, 1uF_4 x2 Socket

BOT edge.

+1.5VSUS
+1.5VSUS
R50

100/F_4 +VCC_CORE
VCC_SENSE
VSS_SENSE

VCC_SENSE
VSS_SENSE

AJ35
AJ34

R49

B10
A10

Q13
QM3002N3

[39]
[39]

100/F_4
10/F_4

VCCP_SENSE
VSSP_SENSE

+1.05V

VCCP_SENSE
VSSP_SENSE
R443

C285

0.1U/10V_4

C286

0.1U/10V_4

C284

0.1U/10V_4

C283

0.1U/10V_4

R100
220_8

1
2
3

R446

VCCIO_SENSE
VSS_SENSE_VCCIO

+1.5V_CPU

C643
22U/6.3VS_6

C666
22U/6.3VS_6

+VCC_GFX

04
R53

AK35
AK34

[35]
[35]

MAIND

Zo impedance: 27.4ohm

10/F_4

2
C276
*470P/50V_4

MAIN_ONG

[2,41]

Q11
2N7002K

C636
22U/6.3VS_6

C663
22U/6.3VS_6

+1.05V

DDR3 -1.5V RAILS

C202
22U/6.3VS_6

C656
22U/6.3VS_6

C632
22U/6.3VS_6

C188
22U/6.3VS_6

C174
22U/6.3VS_6

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

100/F_4

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17

SA RAIL

C639
22U/6.3VS_6

C625
22U/6.3VS_6

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

POWER

U16G

CAD Note: +VDDR_REF_CPU should

have 10 mil trace width

MISC

C637
22U/6.3VS_6

PEG AND DDR

SVID

C199
22U/6.3VS_6

SENSE LINES

C190
22U/6.3VS_6

SNB: 8.5A
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

CORE SUPPLY

C194
22U/6.3VS_6

POWER

IVB:55A
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

22uF_8 x2 Socket TOP cavity

22uF_8 x2 Socket BOT cavity
22uF_8 x4 Socket TOP edge
22uF_8 x4 Socket BOT edge
470uF_7343 x2

U16F
+VCC_CORE

GRAPHICS

1.8V RAIL

100- 1% pull-up to VCC near processor.

Zo impedance: 27.4ohm

R91,R98,R109 close to CPU

Ivy Bridge_rPGA_2DPC_Rev0p61

+1.05V

R74
130/F_4

H_CPU_SVIDALRT#
VR_SVID_CLK
VR_SVID_DATA

R67

C201
0.1U/10V_4

43_4

R75
75/F_4

PROJECT :TWD (Chief River)

Quanta Computer Inc.

VR_SVID_ALERT#
[39]
VR_SVID_CLK
[39]
VR_SVID_DATA
[39]

NB5

Size
Custom

Document Number

Rev
A

Processor 3/4 (POWER)

Date: Monday, October 22, 2012

1

Sheet

4 of

42

05

U16I
U16E

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W 35
W 34
W 33
W 32
W 31
W 30
W 29
W 28
W 27
W 26
U9
U8
U6
U5
U3
U2

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

CFG2
CFG3
CFG4
CFG5
CFG6
CFG7

TP11

VCC_DIE_SENSE
VSS_DIE_SENSE

AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]

AJ31
AH31
AJ33
AH33

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE

AJ26

RSVD5

F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29

RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23

J20
B18

RSVD24
RSVD25

J15

RSVD27

RESERVED

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25

T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29

CFG

U16H

AH27
AH26

RSVD28
RSVD29
RSVD30
RSVD31

L7
AG7
AE7
AK2

RSVD32

W8

RSVD33
RSVD34
RSVD35

AT26
AM33
AJ27

RSVD37
RSVD38
RSVD39
RSVD40

T8
J16
H16
G16

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

AR35
AT34
AT33
AP35
AR34

VCC_DIE_SENSE
VSS_DIE_SENSE

TP9
TP13

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

B34
A33
A34
B35
C35

RSVD51
RSVD52

AJ32
AK32

BCLK_ITP
BCLK_ITP#

AN35
AM35

RSVD56
RSVD57
RSVD58

KEY

AT2
AT1
AR1

B1

CFG[6:5] (PCIE Port Bifurcation Straps)

11:
10:
01:
00:

(Default) x16 - Device 1 functions 1 and 2 disabled

x8, x8 - Device 1 function 1 enabled ; function 2 disabled
Reserved - (Device 1 function 1 disabled ; function 2 enabled)
x8,x4,x4 - Device 1 functions 1 and 2 enabled

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

CFG2

R72

*1K/F_4

need check GPU(JW3 used x8 lane)

CFG4

R73

*1K/F_4

eDP Enable

CFG7

R403

*1K/F_4

CFG5

R65

1K/F_4

CFG6

R66

*1K/F_4

Ivy Bridge_rPGA_2DPC_Rev0p61

Processor Strapping

The CFG signals have a default value of '1' if not terminated on the board.

1
CFG2
(PCIe Static x16 Lane Numbering Reversal.)

CFG4
(DP Presence Strap)

0
A

Normal Operation(Default)

Lane Reversed

Disable; No physical DP attached to eDP

Enable; An ext DP device is connected to eDP

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

Processor 4/4 (RSV,Ground)

1

Sheet

5 of

42

Cougar Point/Panther Point (DMI,FDI,PM)

AW 24
AW 20
BB18
AV18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

[2]
[2]
[2]
[2]

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

AY24
AY20
AY18
AU18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]

BJ24

FDI_INT

FDI_FSYNC0

AV12

FDI_FSYNC0

[2]

FDI_FSYNC1

[2]

BG25

DMI_IRCOMP

FDI_FSYNC1

BC10

R485

750/F_4

DMI_RBIAS

BH21

DMI2RBIAS

FDI_LSYNC0

AV14

FDI_LSYNC0

[2]

FDI_LSYNC1

BB10

FDI_LSYNC1

[2]

[2]

XDP_DBRST#

XDP_DBRST#
*1U/6.3V_4

C533

IMVP_PWRGD

[29]

[2]

20110816 ES2 current leakage

RSMRST#

SUS_PWR_ACK

[29]

DNBSWON#

SUSACK#
SYS_RESET#
SYS_PW ROK

EC_PWROK

L22

PW ROK

EC_PWROK

L10

APW ROK

A18

DPW ROK

E22

RSMRST#

B9

PCIE_WAKE#

(+3V)
CLKRUN# / GPIO32
SUS_STAT# / GPIO61

CLKRUN#

G8

SUS_SATA#

TP32

N14

PCH_SUSCLK_L

TP29

(+3VS5)
SUSCLK / GPIO62

PCIE_WAKE#
CLKRUN#

DRAMPW ROK
RSMRST#

SUS_PWR_ACK

K16

SUSW ARN#/SUSPW RDNACK/GPIO30

DNBSWON#

E20

PW RBTN#

AC_PRESENT_R

H20

SLP_S5

[29]

H4

SUSC#

[29]

SLP_S3#

F4

SUSB#

[29]

SLP_A#

G10

TP33

SLP_SUS#

G16

TP28

PMSYNCH

AP14

(DSW)
ACPRESENT / GPIO31

R189

2.37K/F_4

LVD_IBG

PCH_LA_CLK#
PCH_LA_CLK
PCH_LA_DATAN0
PCH_LA_DATAN1
PCH_LA_DATAN2

[21]
[21]
[21]

PCH_LA_DATAP0
PCH_LA_DATAP1
PCH_LA_DATAP2

PCH_LB_CLK#
PCH_LB_CLK
PCH_LB_DATAN0
PCH_LB_DATAN1
PCH_LB_DATAN2

[21]
[21]
[21]

PCH_LB_DATAP0
PCH_LB_DATAP1
PCH_LB_DATAP2

[22]
[22]
[22]

SLP_S4#

SLP_S5# / GPIO63

L_CTRL_CLK
L_CTRL_DATA

AF37
AF36

LVD_IBG
LVD_VBG

AE48
AE47

LVD_VREFH
LVD_VREFL

PCH_LA_CLK#
PCH_LA_CLK

AK39
AK40

LVDSA_CLK#
LVDSA_CLK

PCH_LA_DATAN0
PCH_LA_DATAN1
PCH_LA_DATAN2

AN48
AM47
AK47
AJ48

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

PCH_LA_DATAP0
PCH_LA_DATAP1
PCH_LA_DATAP2

AN47
AM49
AK49
AJ47

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

PCH_LB_CLK#
PCH_LB_CLK

AF40
AF39

LVDSB_CLK#
LVDSB_CLK

PCH_LB_DATAN0
PCH_LB_DATAN1
PCH_LB_DATAN2

AH45
AH47
AF49
AF45

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

PCH_LB_DATAP0
PCH_LB_DATAP1
PCH_LB_DATAP2

AH43
AH49
AF47
AF43

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

[24,27]

(+3VS5)

C21

T45
P39

CTRL_CLK
CTRL_DATA

[21]
[21]
[21]

[29,30]

D10

L_DDC_CLK
L_DDC_DATA

2.2K_4
2.2K_4

[21]
[21]
[21]

[21]
[21]

0816 RSMRST# SHORT

DPWROK DEL

N3

(+3VS5)

RSMRST#

(+3VS5)

DSW VRMEN

W AKE#

B13

PM_DRAM_PWRGD

[29]

K3
P12

EC_PWROK

[29]

C12

L_BKLTCTL

T40
K47

R164
R173

[2]

49.9/F_4 DMI_COMP

SUS_PWR_ACK

P45
PCH_EDIDCLK
PCH_EDIDDATA

TP25

[21]
[21]

DSWVREN

PCH_EDIDCLK
PCH_EDIDDATA

+3V

R483

System Power Management

+1.05V

DMI_ZCOMP

PCH_DPST_PWM

[21]
[21]

AW 16

FDI_INT

[21]

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

[22]
[22]

PCH_DDCCLK
PCH_DDCDATA

[22]
[22]

PCH_HSYNC
PCH_VSYNC

R144
R143
R142

*0_2/S
*0_2/S
*0_2/S

PCH_HSYNC_R
PCH_VSYNC_R

33_4
33_4

DAC_IREF

20110818 DEL
SLP_A# / SLP_SUS#

E10

PM_RI#

A10

BATLOW # / GPIO72

(+3VS5)
RI#

SLP_LAN# / GPIO29

SDVO_TVCLKINN
SDVO_TVCLKINP

AP43
AP45

SDVO_STALLN
SDVO_STALLP

AM42
AM40

SDVO_INTN
SDVO_INTP

AP39
AP40

P38
M39

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

AT49
AT47
AT40

HDMI_HPD_CON

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

IN_D2#
IN_D2
IN_D1#
IN_D1
IN_D0#
IN_D0
IN_CLK#
IN_CLK

SDVO_CTRLCLK
SDVO_CTRLDATA

N48
P49
T49

CRT_BLUE
CRT_GREEN
CRT_RED

T39
M40

CRT_DDC_CLK
CRT_DDC_DATA

M47
M49

CRT_HSYNC
CRT_VSYNC

T43
T42

DAC_IREF
CRT_IRTN

K14

PM_SYNC

SDVO_CLK
SDVO_DATA

DDPC_CTRLCLK
DDPC_CTRLDATA

AP47
AP49
AT38

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

DDPD_CTRLCLK
DDPD_CTRLDATA

SDVO_CLK [22]
SDVO_DATA [22]

HDMI_HPD_CON

[22]

IN_D2# [22]
IN_D2 [22]
IN_D1# [22]
IN_D1 [22]
IN_D0# [22]
IN_D0 [22]
IN_CLK# [22]
IN_CLK [22]

P46
P42

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

M43
M36

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

AT45
AT43
BH41

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

R172
1K/F_4

(+3VS5)

PM_BATLOW#

CRT_BLUE
CRT_GREEN
CRT_RED

PCH_DDCCLK
PCH_DDCDATA
R149
R147

L_BKLTEN
L_VDD_EN

Digital Display Interface

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

J47
M45

INT. HDMI

[2]
[2]
[2]
[2]

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

PCH_LVDS_BLON
PCH_DISP_ON

LVDS

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

[21]
[21]

CRT

BE24
BC20
BJ18
BJ20

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

FDI

[2]
[2]
[2]
[2]

BC24
BE20
BG18
BG20

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

U18D
CPT_PPT_Rev_0p7

DMI

[2]
[2]
[2]
[2]

06

Cougar Point/Panther Point (LVDS,DDI)

U18C
CPT_PPT_Rev_0p7

[2]
B

SLP_LAN#
[7,8,9,10,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]
+3V
[7,10,21,22,23,27,28,41]
+5V
[7,8,9,10,21,26,27,29,30,32,35,36,38,41]
+3VS5
[2,4,7,8,10,26,29,35,38,39]
+1.05V
[7,21,26,27,28,29,31,32]
+3VPCU
[7,10,26] +3V_RTC

PCH Nut: QCI P/N: MBUL1001010 (Location:H13,H14)

System PWR_OK(CLG)

PCH Pull-high/low(CLG)
+3VS5
PM_RI#

R504

10K/F_4

PM_BATLOW#

R280

8.2K_4

PCIE_WAKE#

R489

10K/F_4

SLP_LAN#

R314

*10K/F_4

SUS_PWR_ACK

R257

10K/F_4

AC_PRESENT_R

R235

10K/F_4

INTEL DG

PD Res place close to PCH

IMVP_PWRGD

PCH to Res routeing 50 ohm Impedance.

Res to connector filter routeing 37.5ohm Impedance.
R154

150/F_4

CRT_BLUE

R153

150/F_4

CRT_GREEN

R152

150/F_4

CRT_RED

IMVP_PWRGD

[39]

EC_PWROK

R297
*100K/F_4

+3V
CLKRUN#

R496

8.2K_4

XDP_DBRST#

R312

1K/F_4

R294

*1K/F_4

R234

10K/F_4

INTEL DG

RSMRST#
IMVP_PWRGD

R324

+3V_RTC

R215

330K_4

DSWVREN

PROJECT :TWD (Chief River)

Quanta Computer Inc.

On Die DSW VR Enable

*100K/F_4

High = Enable (Default)

Low = Disable

NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

PCH 1/6 (Host/Display)

1

Sheet

6 of

42

Cougar Point/Panther Point (HDA,JTAG,SATA)

07

U18A
CPT_PPT_Rev_0p7

R219

+3V_RTC

[23]

[23]

1M_4

SPKR

SM_INTRUDER#

K22

PCH_INVRMEN

C17

N34

HDA_BCLK

ACZ_SYNC

L34

HDA_SYNC

SPKR

T10

SPKR

ACZ_RST#

K34

HDA_RST#

ACZ_SDOUT

+3VS5

INTVRMEN

ACZ_BCLK

ACZ_SDIN0

R201

INTRUDER#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

(+3V)

GPIO33

C36

10K/F_4 GPIO13

N32

FW H4 / LFRAME#

D36

LDRQ0#
LDRQ1# / GPIO23

E36
K36

PCH_DRQ#0
PCH_DRQ#1

R171

*10K/F_4

V5

SERIRQ

R315

8.2K_4

(+3V)

SERIRQ

HDA_DOCK_EN# / GPIO33

(+3VS5)

[29]

PCH_SPI_CS0#

[29]

PCH_SPI_CS1#

[29]
[29]

PCH_SPI_SI
PCH_SPI_SO

PCH_SPI_CLK

AM10
AM8
AP11
AP10

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AD7
AD5
AH5
AH4

SATA_RXN2
SATA_RXP2
SATA_TXN2
SATA_TXP2

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

AB8
AB10
AF3
AF1

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

Y7
Y5
AD3
AD1

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

H7

JTAG_TMS

SATAICOMPO

Y11

JTAG_TDI
JTAG_TDO

T3

SPI_CS0#

T1

SPI_CS1#

U3

SATAICOMPI

SPI_MOSI

+3V
SERIRQ

[29,30]

SATA_RXN0 [28]
SATA_RXP0 [28]
SATA_TXN0 [28]
SATA_TXP0 [28]
SATA_RXN1 [28]
SATA_RXP1 [28]
SATA_TXN1 [28]
SATA_TXP1 [28]

HDD0 (SATA3 6.0Gb/s)

AB12

SATA3COMPI

AB13

RTC_RST#

20110816 DSW Circuit DEL

C740
0.1U/10V_4

C442
1U/6.3V_4

SATA_COMP

R253

37.4/F_4

SATA3_COMP

R272

49.9/F_4

SATA3_RBIAS

R498

10K/F_4

SATA0GP / GPIO21

V14

R289

10K/F_4

SATA1GP / GPIO19

P1

(+3V)

R358

AH1

D18
*BAT54C

2
1

C741
0.1U/10V_4

RTC CONN
RTC_RST#

Reserve for
non-WWAN SKU

HDA Bus(CLG)

+1.05V

[23]

ACZ_RST#_AUDIO

R192

33_4

ACZ_RST#

ACZ_SDOUT_AUDIO

R193

33_4

ACZ_SDOUT

R186

33_4

ACZ_BCLK

[23]

BIT_CLK_AUDIO
C362
*10P/50V_4

[27]

+3V

[23]

*10K/F_4

PWROK

0 = Default (weak pull-down 20K)

1 = Setting to No-Reboot mode

INTVRMEN

Integrated 1.05V VRM enable

ALWAYS

Should be always pull-up

HDA_DOCK_EN#/GPIO33

Flash Descriptor Security

Only for Interposer

PWROK

0 = Override
1 = Default (weak pull-up 20K)

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

PWROK

GNT1#

GNT0#

1
0

1
0

PWROK

Boot Location

R199

ACZ_SYNC_AUDIO

GNT2# / GPIO53

ESI strap (Server only)

PWROK

NV_ALE

Intel Anti-Theft HDD protection

Only for Interposer

PWROK

0 = Disable (Internal pull-down 20kohm)

NV_CLE

DMI Termination voltage

PWROK

weak pull-down 20kohm

RSMRST

0 = Support by 1.8V (weak pull-down)

1 = Support by 1.5V

PWROK

0 = Override
1 = Default (weak pull-up 20K)

GPIO28

On-Die PLL VR Voltage Select

Flash Descriptor Security

Different from
Calpella

SPI_MOSI

ACZ_SYNC_R1 1

33_4

Q18
2N7002K

3 ACZ_SYNC

Circuit
+3V

Integrated Clock Chip Enable

RSMRST#

Should be pull-down (weak pull-up 20K)

On-die PLL Voltage Regulator

RSMRST#

0 = Disable
1 = Enable (Default)

iTPM function Disable

APWROK

0 = Default (weak pull-down 20K)

1 = Enable

R292

R127
R125

+3V

+3V_RTC

SPKR

*1K/F_4
*1K/F_4
10K/F_4

PCI_GNT3#

R182

ACZ_SDOUT

*1K/F_4

R497

*1K/F_4

R132

Vender

Size

EON

2MB

AKE38ZN0Q00 (EN25QH16-104HIP)

AMIC

2MB

AKE38ZN0802 (A25LQ16M-F/Q)

Socket

330K_4 PCH_INVRMEN

R228

GPIO33

[8]

[Need external pull-down for LPC BIOS]

Default weak pull-up on GNT0/1#

SPI
LPC

Should not be pull-down

(weak pull-up 20K)

GPIO8

10K/F_4

+3V

Configuration

PWROK

HDA_SDO

R207

+5V

10P/50V_4

Sampled

Top-Block Swap Override

HDA_SYNC

ACZ_SDOUT

[29]

P/N

DFHS08FS023

PCH_SPI_CS1#
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO

R515
R514
R325
R516
R348

*0_4
*0_4/S
33_4
33_4
33_4

+3V
U21

PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R

BBS_BIT0

*1K/F_4

BBS_BIT1

PCH SPI ROM(CLG)

1
6
5
2

CE#
SCK
SI
SO

VDD

HOLD#

W P#

VSS

C547
22P/50V_4

[8]

R518

3.3K_4
C718
0.1U/10V_4

A25LQ16M-F/Q

USE GPIO PIN

+1.8V

R267

*1K/F_4

+1.8V

R484

2.2K_4

+3VS5

R191

1K/F_4

+3VS5

R187

*1K/F_4

+3V
NV_ALE
R482

1K/F_4

R517

3.3K_4

[8]

NV_CLE [9]
H_SNB_IVB#

+3V [6,8,9,10,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]
+5V [10,21,22,23,27,28,41]
+1.8V [4,10,36]
+1.05V [2,4,6,8,10,26,29,35,38,39]
+3VS5 [6,8,9,10,21,26,27,29,30,32,35,36,38,41]
+3VPCU [21,26,27,28,29,31,32]
+3V_RTC [6,10,26]

[2]

ACZ_SYNC
ACZ_SDOUT

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Rev
A

PCH 2/6 (HDA/RTC/SATA/SPI)

Date: Monday, October 22, 2012

5

*0_6 SRTC_RST#

BBS_BIT0

GNT3# / GPIO55

GPIO19

R218

RTC Power trace width 20mils.

PDC suggestion

0 = "top-block swap" mode

1 = Default (weak pull-up 20K)

Different from
Calpella

C414
1U/6.3V_4

C380

No reboot mode setting

GNT1# / GPIO51

C409
1U/6.3V_4

R198
1M_4

Strap description

SPKR

SRTC_RST#
+3V_RTC_1

*1K/F_4
BT1

CN7
*BAT_CONN

[23]

P3

(+3V)

R216
20K/F_4

DG recommended that AC coupling capacitors should be

close to the connector (<100 mils) for optimal signal quality.

SATA_LED#

SPI_MISO

20K/F_4

ODD (SATA2 3Gb/s)

+3VPCU

750/F_4

SATALED#

+3V_RTC
R222

SATA_RXN2 [28]
SATA_RXP2 [28]
SATA_TXN2 [28]
SATA_TXP2 [28]

R501

SATA3RBIAS

30mils

RTC Circuitry(RTC)

mSATA (SATA4 3Gb/s)

PCH Strap Table

Pin Name

TP24
+3V

+3V_RTC_0

R513

[27,29,30]

+3V_RTC_0

Y10

SATA3RCOMPO

SPI_CLK

Y14

V4

JTAG

K5

PCH_SPI_CS1#

PCH_SPI_SO

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

JTAG_TCK

PCH_SPI_CS0#

PCH_SPI_SI

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

J3

SPI

PCH_SPI_CLK

AM3
AM1
AP7
AP5

Y3
Y1
AB3
AB1

[29]

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

HDA_DOCK_RST# / GPIO13

H1

LFRAME#

SRTCRST#

[27,29,30]
[27,29,30]
[27,29,30]
[27,29,30]

RTCRST#

G22

LAD0
LAD1
LAD2
LAD3

D20

SRTC_RST#

C38
A38
B37
C37

LPC

RTC_RST#

LAD0
LAD1
LAD2
LAD3

FW H0 /
FW H1 /
FW H2 /
FW H3 /

SATA 6G

RTCX2

SATA

RTCX1

TP55

RTC

A20
C20

CLKGEN_RTC_X1

IHDA

[26]

Sheet

7 of

42

RP5
10
9
8
7
6

USB_OC4#
USB_OC1#
USB_OC2#
USB_OC3#

USB_OC6#
USB_OC0#
USB_OC7#
USB_OC5#

1
2
3
4
5

B21
M20
AY16
BG46

10K_10P8R_6

[26]

USB3.0

BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30

USB30_RX1-

[26]

USB30_RX1+

[26]

USB30_TX1-

[26]

USB30_TX1+

TP21
TP22
TP23
TP24

RSVD23
RSVD24
RSVD25

USB3Rn1
USB3Rn2
USB3Rn3
USB3Rn4
USB3Rp1
USB3Rp2
USB3Rp3
USB3Rp4
USB3Tn1
USB3Tn2
USB3Tn3
USB3Tn4
USB3Tp1
USB3Tp2
USB3Tp3
USB3Tp4

[7]
[7]

BBS_BIT1

LCD_BK

[30]

INTH#

BBS_BIT1

D47
E42
F46

MPC_PWR_CTRL#
LCD_BK
PCH_GPIO4

+3V

R535

PCI_PME#

R471

CLK_PCI_TPM

CLK_33M_DEBUG
[29]

CLK_33M_KBC

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

K10

PME#

R155

C6

*22_4CLK_PCI_TPM_R

C738
CLK_PCI_FB R474
*18P/50V_4
CLK_PCI_FB_R
[27]

GNT1# / GPIO51 (+3V)

GNT2# / GPIO53 (+3V)
GNT3# / GPIO55 (+3V)

G42
G40
C42
D44

PCI_PLTRST#

10/19 C stage:reserve PU 10k.

[30]

(+3V)
(+3V)
(+3V)

(+3V)
(+3V)
(+3V)
(+3V)

H49
H43
J48
K42
H40

22_4

(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

AV5
AV10

C405
C404

0.1U/10V_4
0.1U/10V_4

PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C

BE34
BF34
BB32
AY32

[25] PCIE_RXN3_CR
[25] PCIE_RXP3_CR
[25] PCIE_TXN3_CR
[25] PCIE_TXP3_CR

C510
C511

0.1U/10V_4
0.1U/10V_4

PCIE_TXN3_CR_C
PCIE_TXP3_CR_C

BG36
BJ36
AV34
AU34

PERN3
PERP3
PETN3
PETP3

BF36
BE36
AY34
BB34

PERN4
PERP4
PETN4
PETP4

NV_ALE

NV_ALE

MPC_PWR_CTRL#

Low = MPC ON
High = MPC OFF (Default)

MPC_PWR_CTRL#

R160

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

USBP0USBP0+
USBP2USBP2+

[26]
[26]
[21]
[21]

BG37
BH37
AY36
BB36

Camera

BG40
BJ40
AY40
BB40

PERN7
PERP7
PETN7
PETP7

BE38
BC38
AW38
AY38

PERN8
PERP8
PETN8
PETP8

CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_CLKREQ_LAN#
CLK_PCIE_CRN
CLK_PCIE_CRP

Cardreader
USBP9- [23]
USBP9+ [23]
USBP10- [27]
USBP10+ [27]
USBP11- [23]
USBP11+ [23]
USBP12- [30]
USBP12+ [30]

Y40
Y39

PCIE_CLKREQ_WLAN# J2

WLAN

PCIE_CLKREQ_CR#

M1

V10
Y37
Y36

USB2.0 R_up

CLK_PCIE_REQ3#

A8

FP

CLK_PCIE_REQ4#

L12

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

[9]

L14

BOARD_ID0

CLK_PEGB_REQ#

E6

T13

INT_BT_COMBO_EN#

V38
V37

PLTRST#(CLG)

[17,29,30]

MBCLK2

MBDATA2

R491
*0_4/S

SML0DATA

CLK_REQ/Strap Pin(CLG)

[9]

+3V

BOARD_ID2

+3VS5
2.2K_4

PCIE_CLKREQ_LAN#
PCIE_CLKREQ_CR#

R511
R290

R299

SMB_ME1_DAT

2.2K_4

K12
AK14
AK13

10K/F_4
10K/F_4

SML1ALERT# / PCHHOT# / GPIO74

(+3VS5)

SML1CLK / GPIO58

(+3VS5)

SML1DATA / GPIO75

CL_CLK1

SMB_PCH_CLK

[28]

C9

SMB_PCH_DAT

SMB_PCH_DAT

[28]

A12

DRAMRST_CNTRL_PCH

C8

SMB_ME0_CLK

G12

SMB_ME0_DAT

C13

SML1ALERT#_R

E14

SMB_ME1_CLK

M16

SMB_ME1_DAT

T11

CL_RST1#

P10

DRAMRST_CNTRL_PCH

[28]

[2,12,13]

TP30

(+3VS5)

CLKOUT_PCIE0N
CLKOUT_PCIE0P

CLKOUT_PCIE1N
CLKOUT_PCIE1P

SMB_INT#

M7

CL_DATA1

PEG_A_CLKRQ# / GPIO47

PCIECLKRQ0# / GPIO73

*0_4

M10

CLK_PEGA_REQ#

AB37
AB38

CLK_PCIE_VGA#
CLK_PCIE_VGA

CLK_PEGA_REQ#

[14]
C

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P

PCIECLKRQ1# / GPIO18
CLKOUT_DP_N
CLKOUT_DP_P

CLKOUT_PCIE2N
CLKOUT_PCIE2P
CLKIN_DMI_N
CLKIN_DMI_P

PCIECLKRQ2# / GPIO20

AV22
AU22

CLKOUT_PCIE3N
CLKOUT_PCIE3P

CLKIN_GND1_N
CLKIN_GND1_P

PCIECLKRQ3# / GPIO25
CLKIN_DOT_96N
CLKIN_DOT_96P

CLKOUT_PCIE4N
CLKOUT_PCIE4P
CLKIN_SATA_N
CLKIN_SATA_P

PCIECLKRQ4# / GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P

REFCLK14IN

PCIECLKRQ5# / GPIO44

CLKIN_PCILOOPBACK

CLK_CPU_BCLKN
CLK_CPU_BCLKP

[2]
[2]

AM12
AM13
BF18
BE18

CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL

BJ30
BG30

CLK_BUF_BCLK_N
CLK_BUF_BCLK_P

G24
E24

CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK

AK7
AK5

CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK

K45

CLK_PCH_14M

H45

CLK_PCI_FB

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

XTAL25_IN
XTAL25_OUT

V47
V49

PCH_XTAL25_IN

[26]

TP54

PEG_B_CLKRQ# / GPIO56
XCLK_RCOMP

Y47

CLKOUT_PCIE6N
CLKOUT_PCIE6P

XCLK_RCOMP R477

PCIECLKRQ6# / GPIO45
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7# / GPIO46

(+3VS5)

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

90.9/F_4

+1.05V

(+3V)

(+3VS5)

CLKOUTFLEX0 / GPIO64

(+3V)

CLKOUTFLEX1 / GPIO65

(+3V)

CLKOUTFLEX2 / GPIO66

(+3V)

CLKOUTFLEX3 / GPIO67

K43
F47
H47
K49

+3VS5

SMB_ME1_CLK

SMB_PCH_CLK

(+3VS5)

R57

(+3VS5)
AB42
AB40

C347
18P/50V_4

[17,29,30]

SML0CLK

(+3VS5)

Q39

H14

(+3VS5)
V45
V46

V40
V42

R316

SML0ALERT# / GPIO60

(+3VS5)

R181
22.6/F_4

SMBus/Pull-up(CLG)

SMBALERT#

(+3V)

WLAN

22_4 CLK_PCI_EC_R

SMBDATA

E12

(+3VS5)

(+3V)
AA48
AA47

USB2.0 R_down

USB_BIAS

A14
K20
B17
C16
L16
A16
D14
C14

SMBCLK

(+3VS5)
AB49
AB47

Y43
Y45

B33

PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6

CLK_PCIE_WLANN
CLK_PCIE_WLANP

SMBALERT# / GPIO11

PERN2
PERP2
PETN2
PETP2

BJ38
BG38
AU36
AV36

USB3.0

LAN

C33

+3V

PCI_PLTRST#

*1K/F_4

[7]

22_4 CLK_PCI_LPC_R

R170

EMI(near PCH)

PCIE_TXN1_C
PCIE_TXP1_C

[24] PCIE_RXN2_LAN
[24] PCIE_RXP2_LAN
[24] PCIE_TXN2_LAN
[24] PCIE_TXP2_LAN

[27]
C332
18P/50V_4

0.1U/10V_4
0.1U/10V_4

AT8

AT12
BF3

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

C356
C357

MPC Switch Control

RSVD28
RSVD29

USBRBIAS
PLTRST#

Cardreader

AY5
BA2

USBRBIAS#

*10K/F_4
TP34

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

USB

C46
C44
E40

PIRQA#
PIRQB#
PIRQC#
PIRQD#

LAN

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

RSVD26
RSVD27

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

PCI

BT_COMBO_EN#
PCH_GPIO52
PCH_GPIO54

PCI_GNT3#

PCI_GNT3#

[21]

K40
K38
H38
G38

WLAN

(+3VS5)

PERN1
PERP1
PETN1
PETP1

SMBUS

RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

20111130 Modify USB3.0 for HM70

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

AT10
BC8

BG34
BJ34
AV32
AU32

Link

+3VS5

RSVD5
RSVD6

[27] PCIE_RXN1
[27] PCIE_RXP1
[27] PCIE_TXN1
[27] PCIE_TXP1

Controller

10K/F_4
10K/F_4
10K/F_4
10K/F_4

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

AY7
AV7
AU3
BG4

FLEX CLOCKS

+3V

RSVD1
RSVD2
RSVD3
RSVD4

CLOCKS

R468
R159
R124
R180

BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45

08

U18B
CPT_PPT_Rev_0p7

PCH_GPIO52
PCH_GPIO54

1
2
3
4
5

RSVD

10
9
8
7
6

10P8R-8.2K

Cougar Point-M/Panther Point (PCI-E,SMBUS,CLK)

U18E
CPT_PPT_Rev_0p7

RP8

PCI-E*

+3V

PCH_GPIO4
MPC_PWR_CTRL#
BT_COMBO_EN#
LCD_BK

Cougar Point-M/Panther Point (PCI,USB,NVRAM)

PCI/USBOC# Pull-up(CLG)
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCIE_CLKREQ_WLAN#
R493
CLK_PCIE_REQ3#
R505
CLK_PCIE_REQ4#
R263
Intel DG request
CLK_PEGB_REQ#
R284
CLK_PEGA_REQ#
R313

10K/F_4
10K/F_4
10K/F_4

CLK_PEGA_REQ#
CLK_PEGB_REQ#

R296
R285

*10K/F_4
*10K/F_4

CLK_BUF_BCLK_N
CLK_BUF_BCLK_P

R480
R481

10K/F_4
10K/F_4

CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M

R224
R232
R211
R212
R288
R287
R157

10K/F_4
10K/F_4
10K/F_4
10K/F_4
10K/F_4
10K/F_4
10K/F_4

PCIE Clock
[27] CLK_PCIE_WLANN
WLAN

10K/F_4
10K/F_4

[27]

[27] CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#

CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#

SMBus/Pull-up(CLG)

+3VS5
R503

1K/F_4

DRAMRST_CNTRL_PCH

R275
R298
R302
R490
R264
R256

10K/F_4
2.2K_4
2.2K_4
2.2K_4
2.2K_4
10K/F_4

SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R

2N7002DW
PLTRST#

PLTRST#

[2,14,24,25,27,29,30]
+3V

R506
100K/F_4
[12,13,28]

SMB_RUN_DAT
+3V

[12,13,28]

SMB_RUN_CLK

+3V
R337

Q38

4.7K_4

5
SMB_RUN_DAT
R335

SMB_PCH_DAT

4.7K_4
2

SMB_RUN_CLK

SMB_PCH_CLK

GPU

[14] CLK_PCIE_VGA#
[14] CLK_PCIE_VGA
[25]

CLK_PCIE_CRN
CLK_PCIE_CRP
PCIE_CLKREQ_CR#

Cardreader [25]
[25]

CLOCK TERMINATION for FCIM

2N7002DW

LAN

[24] CLK_PCIE_LANN
[24] CLK_PCIE_LANP
[24] PCIE_CLKREQ_LAN#

CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_CLKREQ_LAN#
CLK_PCIE_VGA#
CLK_PCIE_VGA

PROJECT :TWD (Chief River)

Quanta Computer Inc.

CLK_PCIE_CRN
CLK_PCIE_CRP
PCIE_CLKREQ_CR#

[6,7,9,10,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]
[6,7,9,10,21,26,27,29,30,32,35,36,38,41]
2

+3V
+3VS5

NB5

Size
Custom

Document Number

Rev
A

PCH 3/6 (Clock/PCI/PCIE/USB)

Date: Monday, October 22, 2012

1

Sheet

8 of

42

Cougar Point/Panther Point

(GPIO,VSS_NCTF,RSVD)
U18F

RF_PWR_OFF#

09

[27]

CPT_PPT_Rev_0p7
S_GPIO

T7

BMBUSY# / GPIO0

(+3V)

RF_PWR_OFF#

SIO_EXT_SMI#

SIO_EXT_SMI#

A42

TACH1 / GPIO1

TACH5 / GPIO69

B41

BOARD_ID5

[29]

SIO_EXT_SCI#

SIO_EXT_SCI#

H36

TACH2 / GPIO6

TACH6 / GPIO70

C41

DGPU_OPT_DIS#

BT_OFF#

E38

TACH3 / GPIO7

TACH7 / GPIO71

A40

BOARD_ID1

ICC_EN#

C10

GPIO8

20110819 ODD_PSNT# DEL

(+3V)

(+3V)

(+3V)

(+3V)

C4

LAN_PHY_PW R_CTRL / GPIO12

RF_OFF#

G2

GPIO15

ODD_PRSNT#_R

U2

A20GATE
PECI

SATA4GP / GPIO16
RCIN#

DGPU_HOLD_RST#

[37,38]

R240

DGPU_PWR_EN

0_4

T5

SCLOCK / GPIO22

DGPU_HOLD_RST#

E8

GPIO24
GPIO27

P8

GPIO28

BOARD_ID3

K1

STP_PCI# / GPIO34

BOARD_ID4

K4

SATA3GP / GPIO37

MFG_MODE

N2

SLOAD / GPIO38

DF_TVS

AY1

TS_VSS1

AH8

TS_VSS2

AK11

TS_VSS3

AH10

TS_VSS4

AK10

V13

SDATAOUT1 / GPIO48

VSS_NCTF_15

BG2

(+3V)

V3

SATA5GP / GPIO49 / TEMP_ALERT#

VSS_NCTF_16

BG48

SV_DET

D6

GPIO57

VSS_NCTF_17

BH3

MODEL BIT0
MODEL BIT1
MODEL BIT2
MODEL BIT3
No Dolby=0, Dolby=1
HM76=0,HM70=1
Optimus=1, UMA=0
Optimus=0, Dis only=1

PCH_THRMTRIP#

R271

390_4

PM_THRMTRIP#

[2]

MFG-TEST

[2,29]

NV_CLE

NV_CLE

+3VS5

[7]

MFG_MODE

R512

10K/F_4
R492

10K/F_4

R183
R469
R169
R311
R293
R500

10K/F_4
10K/F_4
10K/F_4
10K/F_4
10K/F_4
10K/F_4

ODD_PRSNT#_R
DGPU_PWROK

R499
R174

10K/F_4
*10K/F_4

DGPU_PWROK
GPIO27

R175
R227

*10K/F_4
10K/F_4

+3V

8/24 B stage: reserve R534 for board

R534

(+3V)

(+3VS5)

VSS_NCTF_18

BH47

A4

VSS_NCTF_1

VSS_NCTF_19

BJ4

A44

VSS_NCTF_2

VSS_NCTF_20

BJ44

A45

VSS_NCTF_3

VSS_NCTF_21

BJ45

VSS_NCTF_22

BJ46

A5

VSS_NCTF_5

VSS_NCTF_23

BJ5

A6

VSS_NCTF_6

VSS_NCTF_24

BJ6

B3

VSS_NCTF_7

VSS_NCTF_25

C2

SIO_EXT_SCI#
SIO_EXT_SMI#
ID
BT_OFF#
EC_A20GATE
EC_RCIN#
*10K/F_4 SATA5GP

VSS_NCTF_8

VSS_NCTF_26

C48

BD1

VSS_NCTF_9

VSS_NCTF_27

D1

BD49

VSS_NCTF_10

VSS_NCTF_28

D49

BE1

VSS_NCTF_11

VSS_NCTF_29

E1

BE49

VSS_NCTF_12

VSS_NCTF_30

E49

BF1

VSS_NCTF_13

VSS_NCTF_31

F1

BF49

VSS_NCTF_14

VSS_NCTF_32

F49

BOARD_ID0

[8]

BOARD_ID2

R291

10K/F_4

+3VS5
+3V
RF_OFF#

R507

1K/F_4
BIOS_REC

Intel ME Crypto Transport Layer

Security (TLS) cipher suite

BIOS RECOVERY

R310

10K/F_4

High = Disable (Default)

Low = Enable

Low = Disable (Default)

High = Enable

B47

[8]

S_GPIO

+3V
TEST_SET_UP

R309

10K/F_4

R303

100K/F_4

SV_DET

SV_SET_UP

TEST DETECT

High = Strong (Default)

Low = Default

BOARD_ID0
BOARD_ID2
R295

R246

*10K/F_4 BOARD_ID0

R245

10K/F_4

+3VS5

R476

10K/F_4 BOARD_ID1

R478

*10K/F_4

+3V

R276

*10K/F_4 BOARD_ID2

R281

10K/F_4

+3VS5

R495

*10K/F_4 BOARD_ID3

R509

10K/F_4

+3V

R494

10K/F_4 BOARD_ID4

R508

*10K/F_4

SATA2GP/GPIO36

Reserved only

100K/F_4 FDI_OVRVLTG

FDI TERMINATION
VOLTAGE OVERRIDE

Reserved only

R472

10K/F_4 BOARD_ID5

R470

*10K/F_4

R502

*10K/F_4 DGPU_PRSNT

R510

10K/F_4

R473

10K/F_4 DGPU_OPT_DIS#

R475

*10K/F_4

[6,7,8,10,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]
[6,7,8,10,21,26,27,29,30,32,35,36,38,41]

+3V
+3VS5

PROJECT :TWD (Chief River)

Quanta Computer Inc.

0804 Board_ID1 change to +3V

Board_ID5 change to +3V
5

GPIO Pull-up/Pull-down(CLG)
+3V

P37

SATA5GP

Chief River BOARD ID SETTING

[29]

H_PWRGOOD

+3V

(+3V)

VSS_NCTF_4

EC_RCIN#

Bios swap GPIO.

NC_1

TEST_SET_UP

Model Name
QLGA
TWC
JW2
TBD
LG3
LG5
LG2C
LG4C
TBD
JW6/JW7
JW3
TWD

20110816 Define BRD_ID[3:0]

T14

(+3V)

SDATAOUT0 / GPIO39

GPIO36

GPIO44
GPIO71
GPIO46
GPIO34
GPIO35
GPIO69
GPIO39
GPIO70

INIT3_3V#

(+3V)

M3

[29]

LAN_DISABLE#_R

(+3V)

DGPU_PRSNT

GPIO24

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
DGPU_PRSNT
DGPU_OPT_DIS#

AY10

(+3V)
SATA2GP / GPIO36

EC_RCIN#

P5

THRMTRIP#

GPIO35

V8

EC_A20GATE

AU16

AY11

(+3V)

M5

P4

PROCPW RGD

(+3VS5)

FDI_OVRVLTG

A46

BOARD_ID[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1101

(DSW)

DGPU_PWR_EN_R

GPIO17

DGPU_PWR_EN

(+3VS5)

E16

OPTIMUS POWER control pin

DGPU_HOLD_RST#

(+3V)

PLL_ODVR_EN

2011 12 01 : Modify net from DGPU_PRSNT# to DGPU_PRSNT

DGPU_PWROK

(+3V)

BIOS_REC

GPIO27
TP31

TACH0 / GPIO17

NCTF

[14]

+3V

(+3VS5)
(+3VS5)

D40

DGPU_PWROK

*10K/F_4

(+3VS5)

LAN_DISABLE#_R

(+3V)
[14,18]

R479

(+3V)

CPU/MISC

RF_OFF#

(+3V)

GPIO

TP56

[27]

C40

[29]

TACH4 / GPIO68

(+3V)

NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

3

Rev
A

PCH 4/6 (GPIO)

1

Sheet

of

42

Cougar Point/Panther Point (POWER,WJ)

C415
*1U/6.3V_4

+1.05V

C319
1U/6.3V_4

C408
1U/6.3V_4

C385
1U/6.3V_4

C315
22U/6.3VS_6

C368
22U/6.3VS_6

VCCIO[14]
DCPSUS[3]

+1.05V

VCCASW [2]

AA24

VCCASW [3]

AA26

VCCASW [4]

AA27

VCCASW [5]

AA29

VCCASW [6]

AA31

VCCASW [7]

AC26

VCCASW [8]

AC27

VCCASW [9]

AC29

VCCASW [10]

AC31

VCCASW [11]

AD29

VCCASW [12]

AD31

VCCASW [13]

+VCCAFDI_VRM

*0_4/S

VCCASW [15]

W 24

VCCASW [16]

W 26

VCCASW [17]

W 29

VCCASW [18]

W 31

VCCASW [19]

W 33

VCCASW [20]

Y49

160mA (20mils)

*0_4/S

V23
V24

VCCSUS3_3[6]

P24

VCCIO[34]

T26

BF47

VCCADPLLB

+VCCDIFFCLKN

+V1.05V_SSCVCC

AF17
AF33
AF34
AG34

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

AG33

VCCSSC

95mA (10mils)
+VCCSST
C468
0.1U/10V_4

+5V_PCH_VCC5REFSUS

DCPSUS[4]

AN23

+VCCA_USBSUS

V16

C407

N20

VCCSUS3_3[3]

N22

VCCSUS3_3[4]

P20

VCCSUS3_3[5]

P22

1mA (10mils)

VCC3_3[1]
VCC3_3[8]

W 16

VCC3_3[4]

T34

119mA (15mils)

C401
1U/6.3V_4

+3VS5

266mA (20mils)

C465
10U/6.3VS_6

+3V
+3V

C350
0.1U/10V_4

70mA

AH13

VCCIO[13]

AH14

VCCIO[6]

AF14

VCCAPLLSATA

C429
1U/6.3V_4

VCCVRM[1]
VCCIO[2]

AC16

VCCIO[3]

AC17

VCCIO[4]

AD17

C371
1U/6.3V_4

C474
1U/6.3V_4

+3V

CRT

AK37

VCCTX_LVDS[1]

AM37

VCCTX_LVDS[2]

AM38

VCCTX_LVDS[3]

AP36

VCCTX_LVDS[4]

AP37

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

+VCCAFDI_VRM
+1.05V

R268

+1.5V_CPU

VCC3_3[6]

V33

VCC3_3[7]

V34

C456
1U/6.3V_4

+VCC_TX_LVDS

DCPSUS[1]
DCPSUS[2]

VCCASW [22]

0.01U/16V_4

AT20

VCCCLKDMI

AB36

VCCIO[26]

VCCDFTERM[1]

BH29

VCC3_3[3]

VCCDFTERM[2]

AG17

VCCDFTERM[3]

AJ16

AP16

VCCVRM[2]

VCCDFTERM[4]

AJ17

BG6

VccAFDIPLL

AP17

+1.05V

C387
1U/6.3V_4

C365
1U/6.3V_4

C438
*10U/6.3V_6

+1.8V

2 mA (10mils)

AU20

+1.05V

VCCIO[27]
VCCDMI[2]

VCCSPI

C446
0.1U/10V_4

V1

+1.05V
+3V

C482
1U/6.3V_4

L31
10uH/100MA_8

+1.05V_VCCA_A_DPL

C706

1U/6.3V_4

L32
10uH/100MA_8

+1.05V_VCCA_B_DPL

C707

1U/6.3V_4

10mA (10mils)

+1.05V
C445
1U/6.3V_4

+3V

T21

C530
1U/6.3V_4

+5V_PCH_VCC5REF

20mA (10mils)

VCCASW [23]

V21

VCCASW [21]

T19

10mA (10mils)

R200
D9
C358
1U/6.3V_4

V5REF= 1mA

C360

1U/6.3V_4

C328

10U/6.3VS_6

VCCSUSHDA

P32

+5V_PCH_VCC5REFSUS

+3VS5
+VCCAFDI_VRM
C373
0.1U/10V_4

[6,7,8,9,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]
[7,21,22,23,27,28,41]
[4,7,36]
[2,4,6,7,8,26,29,35,38,39]
[6,7,8,9,21,26,27,29,30,32,35,36,38,41]
[21,23,26,32,33,34,35,37,39,40,41]

+3V
+5V
+1.8V
+1.05V
+3VS5
+5VS5

[6,7,26] +3V_RTC
[2,4,12,13,33,38]
+1.5VSUS
[2,4,27,28]
+1.5V_CPU

+5V

+VCCA_DAC_1_2

C410
*1U/6.3V_4

+5V
+3V

R196
D11
C375
0.1U/10V_4

10_4

+5VS5

RB500V-40

+3VS5
A

U5
G910T21U

Close to Y49

C327
1U/6.3V_4

C463
1U/6.3V_4
Close to AT16

C476
1U/6.3V_4
Close to AP16

Vin

C297
1U/6.3V_4

Vout

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Rev
A

PCH 5/6 (Power)

Date: Monday, October 22, 2012

4

10_4
RB500V-40

L11
10uH/100MA_8

20mA (10mils,WJ)

+1.05V

GND

C441
0.1U/10V_4

0.01U/16V_4

C324

42mA (10mils)
VCCDMI[1]

C426
0.1U/10V_4

22U/6.3VS_6

C320

C354
0.1U/10V_4

AG16

+3V_SUS_CLKF33

HDA

C421
1U/6.3V_4

VCCRTC

C316

+1.8V

+1.05V

RTC

A22

+3V_RTC

VCCRTC<1mA
(10mils)(WJ)

L9
0.1uH/250mA_8

AT16 +VCCAFDI_VRM

VCC5REFSUS=1mA
A

+3V

160mA (15mils)

+1.05V

+VCCAFDI_VRM

0.01U/16V_4

+3V

AN34

*0_4/S

0.1U/10V_4

C704

60mA (10mils)

VCCVRM[3]

(Mobile 1.5V)

350mA

10U/6.3VS_6

C705

1mA (10mils)

SG & UMA : Ra
DIS : Rb

C708
0.1U/10V_4

C532
0.1U/10V_4

AK1
AF11

AK36

VSSALVDS

C314

VCCAPLLEXP

+3V

AF13

U47

178m A (20mils)

AJ2

DCPSST

V_PROC_IO

+1.05V

C416
1U/6.3V_4

AA16

VSSADAC

*PBY160808T-300Y-N

VCCALVDS

*1U/6.3V_4
+3VS5

+5V_PCH_VCC5REF

U48

1mA (10mils)

AN24

P34

VCCADAC

VCCIO[28]

BJ22

VCCSUS3_3[2]

VCC3_3[2]

CPU

BJ8
C340
0.1U/10V_4

AN19

C363
0.1U/10V_4

+1.05V
C513
0.1U/10V_4

+1.05V

1.01A (60mils)

T17
V19

C514
4.7U/6.3V_6

C425
0.1U/10V_4

30mA

+1.05V_VCCA_B_DPL

C374
1U/6.3V_4

VCCIO:3.799 A (140mils)

VCCVRM[4]

VCCADPLLA

C392
1U/6.3V_4

VCCSUS3_3:65mA(15mils)
C395
10U/6.3VS_6

M26

VCCIO[12]

65mA (10mils)

55mA (10mils)

C403
0.1U/10V_4

V5REF_SUS

DCPRTC

BD47

8mA (10mils)

C369
1U/6.3V_4

V_PROC_IO=2mA
(10mils)

VCCSUS3_3[9]
VCCSUS3_3[10]

V5REF

SATA

R188

T24

VCCSUS3_3[1]

+1.05V_VCCA_A_DPL

C366
1U/6.3V_4

+1.05V

VCCASW [14]

W 23

+VCCRTCEXT N16
C460
0.1U/10V_4

C424
1U/6.3V_4
+3VS5

+1.05V

MISC

R185

T23

VCCSUS3_3[8]

VCCIO[5]

C466
1U/6.3V_4

+1.05V

VCCSUS3_3[7]

VCCASW [1]

AA21

W 21

VCCIO[33]

T29

VCCAPLLDMI2

AL24

VCCASW:803mA (40mils)

T27

VCC3_3[5]

AL29

AA19

P28

VCCIO[32]

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]

LVDS

+VCCSUS1

VCCIO[31]

+3V
L10

AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31

HVCMOS

BH23

DCPSUSBYP

+VCCA_DAC_1_2

VCCCore:1.73 A (100mils)

C388
1U/6.3V_4

DMI

+1.05V

P26

6.3mA (10mils)

POWER

DFT / SPI

+3V_SUS_CLKF33 T38

VCCIO[30]

U18G
CPT_PPT_Rev_0p7

+1.05V

+1.05V

VCCIO

V12

USB

3mA (10mils)
C452
0.1U/10V_4

N26

VCCDSW 3_3

PCI/GPIO/LPC

T16

+3VS5

VCCIO[29]

10

Cougar Point/Panther Point (POWER)

POWER

VCCACLK

Clock and Miscellaneous

AD49

FDI

U18J
CPT_PPT_Rev_0p7

VCC CORE

Sheet

10

of

42

Cougar Point/Panther Point (GND)

11

Cougar Point/Panther Point (GND)

U18I
CPT_PPT_Rev_0p7

AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

U18H
CPT_PPT_Rev_0p7

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W 34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W 17
W 19
W2
W 27
W 48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW 14
AW 18
AW 2
AW 22
AW 26
AW 28
AW 32
AW 34
AW 36
AW 40
AW 48
AV11
AY12
AY22
AY28

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

PCH 6/6 (Ground)

1

Sheet

11

of

42

M_A_A[15:0]

R190
R195

10K/F_4
10K/F_4

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

[8,13,28]
[8,13,28]

M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
SMB_RUN_CLK
SMB_RUN_DAT

[3]
[3]

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
W E#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

M_A_ODT0
M_A_ODT1

[3]

[3]

M_A_DQSP[7:0]

M_A_DQSN[7:0]

M_A_DQ[63:0]

JDIM1A
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

PC2100 DDR3 SDRAM SO-DIMM

(204P)

[3]

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ0
M_A_DQ1
M_A_DQ3
M_A_DQ2
M_A_DQ9
M_A_DQ8
M_A_DQ15
M_A_DQ10
M_A_DQ12
M_A_DQ13
M_A_DQ11
M_A_DQ14
M_A_DQ20
M_A_DQ21
M_A_DQ19
M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ23
M_A_DQ22
M_A_DQ28
M_A_DQ29
M_A_DQ27
M_A_DQ31
M_A_DQ25
M_A_DQ24
M_A_DQ26
M_A_DQ30
M_A_DQ32
M_A_DQ37
M_A_DQ34
M_A_DQ38
M_A_DQ36
M_A_DQ33
M_A_DQ35
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ43
M_A_DQ42
M_A_DQ44
M_A_DQ45
M_A_DQ47
M_A_DQ46
M_A_DQ53
M_A_DQ52
M_A_DQ55
M_A_DQ50
M_A_DQ49
M_A_DQ48
M_A_DQ54
M_A_DQ51
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ63
M_A_DQ56
M_A_DQ57
M_A_DQ62
M_A_DQ58

[3]

2.48A

JDIM1B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

PM_EXTTS#0

198
30

EVENT#
RESET#

+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM

1
126

VREF_DQ
VREF_CA

+3V

+3V
[13,30] PM_EXTTS#0
[2,13] DDR3_DRAMRST#

[4]

SMDDR_VREF_DQ0_M1 R209
SMDDR_VREF_DQ0_M3 R217

SMDDR_VREF_DQ0_M3

*0_6/S
*0_6

R166

12

+1.5VSUS

10K/F_4

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

GND
GND

205
206

+0.75V_DDR_VTT

DDR3-DIMM0_H=5.2_STD
ddr-ddrsk-20401-tp4b-204p-ldv
DGMK4000059

[6,7,8,9,10,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]

+3V

[2,4,13,33,38]
+1.5VSUS
[13,33,41] +0.75V_DDR_VTT

DDR3-DIMM0_H=5.2_STD
ddr-ddrsk-20401-tp4b-204p-ldv
DGMK4000059
B

+1.5VSUS

Place these Caps near So-Dimm0.

+1.5VSUS

For EMI RESERVE 8/30

DDR_VTTREF
C330

1U/6.3V_4

C361

1U/6.3V_4

C377

1U/6.3V_4

C359

1U/6.3V_4

R220

*0_6
R197
1K/F_4

SMDDR_VREF_DQ0_M3 1
C336

*120P/50V_4

C398

1U/6.3V_4

C384

1U/6.3V_4

C325

1U/6.3V_4

C402

1U/6.3V_4

C494

*120P/50V_4

C379

10U/6.3VS_6

C353

10U/6.3VS_6

C492

*120P/50V_4

C378

10U/6.3VS_6

C339

*10U/6.3V_6

C337

*120P/50V_4

C331

10U/6.3VS_6

C451

*120P/50V_4

C334

10U/6.3VS_6

C329

*120P/50V_4

C393

10U/6.3VS_6

C396

*120P/50V_4

+0.75V_DDR_VTT
C342

*120P/50V_4

C341

*120P/50V_4

C381

10U/6.3VS_6

C322

*10U/6.3V_6

C437

10U/6.3V_6

C491

10U/6.3V_6

SMDDR_VREF_DQ0_M1

+1.5VSUS

+1.5VSUS

VREF DQ0 M1 Solution

+0.75V_DDR_VTT

[2,8,13]

Q19
A03416

R206
1K/F_4
R163
1K/F_4

DRAMRST_CNTRL_PCH

+SMDDR_VREF_DIMM
C346

0.1U/10V_4

C345

2.2U/6.3V_6

[4,13,33]

DDR_VTTREF

R168

*0_6

R167
1K/F_4

+SMDDR_VREF_DQ0
0.1U/10V_4

C394

2.2U/6.3V_6

C399

0.1U/10V_4

C382

2.2U/6.3V_6

PROJECT :TWD (Chief River)

Quanta Computer Inc.

+3V

Size
Custom

Document Number

Rev
A

System Memory 1/2 (5.2H)

Date: Monday, October 22, 2012

4

C343
470P/50V_4
A

C391

NB5
5

+SMDDR_VREF_DIMM

Sheet

12

of

42

M_B_A[15:0]

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

SMB_RUN_CLK
SMB_RUN_DAT

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
W E#
SA0
SA1
SCL
SDA

[3]
[3]

116
120

ODT0
ODT1

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

+3V

R262
R252

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

10K/F_4
10K/F_4
[8,12,28]
[8,12,28]

M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#

DIMM1_SA0
DIMM1_SA1

M_B_ODT0
M_B_ODT1

[3]

[3]

M_B_DQSP[7:0]

M_B_DQSN[7:0]

M_B_DQ[63:0]

JDIM2A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

PC2100 DDR3 SDRAM SO-DIMM

(204P)

[3]

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ0
M_B_DQ1
M_B_DQ6
M_B_DQ7
M_B_DQ9
M_B_DQ13
M_B_DQ14
M_B_DQ10
M_B_DQ8
M_B_DQ12
M_B_DQ11
M_B_DQ15
M_B_DQ20
M_B_DQ21
M_B_DQ18
M_B_DQ22
M_B_DQ17
M_B_DQ16
M_B_DQ19
M_B_DQ23
M_B_DQ25
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ28
M_B_DQ24
M_B_DQ26
M_B_DQ27
M_B_DQ36
M_B_DQ37
M_B_DQ35
M_B_DQ34
M_B_DQ33
M_B_DQ32
M_B_DQ39
M_B_DQ38
M_B_DQ44
M_B_DQ40
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ41
M_B_DQ46
M_B_DQ47
M_B_DQ49
M_B_DQ48
M_B_DQ54
M_B_DQ55
M_B_DQ52
M_B_DQ53
M_B_DQ50
M_B_DQ51
M_B_DQ61
M_B_DQ56
M_B_DQ63
M_B_DQ62
M_B_DQ57
M_B_DQ60
M_B_DQ58
M_B_DQ59

DDR3-DIMM1_H=5.2_RVS
ddr-ddrrk-20401-tp4b-204p-ruv
DGMK4000028

JDIM2B

SMDDR_VREF_DQ1_M1 R225
SMDDR_VREF_DQ1_M3 R210

SMDDR_VREF_DQ1_M3

2.48A

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

+3V

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

PM_EXTTS#0

198
30

EVENT#
RESET#

*0_6/S
*0_6

+SMDDR_VREF_DQ1

1
126

VREF_DQ
VREF_CA

+SMDDR_VREF_DIMM1

+1.5VSUS

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

R205
1K/F_4

[4,12,33]

13

+1.5VSUS

[3]

[12,30] PM_EXTTS#0
[2,12] DDR3_DRAMRST#

[4]

R203

DDR_VTTREF

*0_6

+SMDDR_VREF_DIMM1
R202
1K/F_4

C436
470P/50V_4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

GND
GND

205
206

+0.75V_DDR_VTT

DDR3-DIMM1_H=5.2_RVS
ddr-ddrrk-20401-tp4b-204p-ruv
DGMK4000028

[6,7,8,9,10,12,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]

+3V
B

[2,4,12,33,38]
+1.5VSUS
[12,33,41] +0.75V_DDR_VTT

+0.75V_DDR_VTT

+1.5VSUS

+SMDDR_VREF_DIMM1

R236
1K/F_4

C397

1U/6.3V_4

C454

1U/6.3V_4

C435

0.1U/10V_4

C487

1U/6.3V_4

C467

1U/6.3V_4

C431

2.2U/6.3V_6

C493

1U/6.3V_4

C411

1U/6.3V_4

DDR_VTTREF

R221

*0_6

+SMDDR_VREF_DQ1

C449

1U/6.3V_4

C439

1U/6.3V_4

C506

10U/6.3VS_6

C367

10U/6.3VS_6

C455

0.1U/10V_4

C432

10U/6.3VS_6

C372

*10U/6.3V_6

C458

2.2U/6.3V_6

C502

10U/6.3VS_6

C501

10U/6.3VS_6

C427

10U/6.3VS_6

C472

0.1U/10V_4

C450

10U/6.3VS_6

C480

2.2U/6.3V_6

C428

*10U/6.3V_6

C344

10U/6.3V_6

C386

10U/6.3V_6

+3V

[2,8,12]

Q21
AO3416
A

DRAMRST_CNTRL_PCH

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Rev
A

System Memory 2/2 (9.2H)

Date: Monday, October 22, 2012

5

SMDDR_VREF_DQ1_M1
R237
1K/F_4

SMDDR_VREF_DQ1_M3

+1.5VSUS

VREF DQ1 M1 Solution

Place these Caps near So-Dimm1.

Sheet

13

of

42

PLACE NEAR BALLS

0727 PEX_IOVDD/Q
TOTAL 3500mA

PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14

AN12
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27

PEG_TX0
PEG_TX#0
PEG_TX1
PEG_TX#1
PEG_TX2
PEG_TX#2
PEG_TX3
PEG_TX#3
PEG_TX4
PEG_TX#4
PEG_TX5
PEG_TX#5
PEG_TX6
PEG_TX#6
PEG_TX7
PEG_TX#7

PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N

AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25

C_PEG_RX0
C_PEG_RX#0
C_PEG_RX1
C_PEG_RX#1
C_PEG_RX2
C_PEG_RX#2
C_PEG_RX3
C_PEG_RX#3
C_PEG_RX4
C_PEG_RX#4
C_PEG_RX5
C_PEG_RX#5
C_PEG_RX6
C_PEG_RX#6
C_PEG_RX7
C_PEG_RX#7

PEX_REFCLK
PEX_REFCLK_N

AL13
AK13

CLK_PCIE_VGA
CLK_PCIE_VGA#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

AJ26
AK26

PEX_TSTCLK
PEX_TSTCLK#

PEX_WAKE
PEX_RST_N

AJ11
AJ12

[PEG Interface]

0.088mA

2500mA

AC6
AJ28
AJ4
AJ5
AL11
C15
D19
D20
D23
D26
H31
T8
V32

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13

+3V_GFX
+3V_GFX

J8
K8
L8
M8

VDD33_1
VDD33_2
VDD33_3
VDD33_4

0.085mA

[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]

R448
4.7K_4

[9,18]

C70
C69
C80
C81
C75
C74
C76
C77
C82
C83
C85
C84
C88
C89
C86
C87

0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4
0.22U/10V_4

PEG_RX0
PEG_RX#0
PEG_RX1
PEG_RX#1
PEG_RX2
PEG_RX#2
PEG_RX3
PEG_RX#3
PEG_RX4
PEG_RX#4
PEG_RX5
PEG_RX#5
PEG_RX6
PEG_RX#6
PEG_RX7
PEG_RX#7

C667

2.2U/6.3V_6

C183
C168
C161
C171

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

[2,8,24,25,27,29,30]
[9]

C469
0.1U/10V_4
B

PLTRST#

DGPU_HOLD_RST# 1

DGPU_HOLD_RST#

PEGX_RST#
R329

20120508,MV

VDD33
+3.3V_GFX
IFP(AB)_IOVDD
+1.8V_GFX

FBVDDQ
+1.5V_GFX

VGA_RST#

R382

*0_4/S PEGX_RST#

PEX_VDD
+1.05V_GFX

PEX_CLKREQ_N

AK12

PEX_CLKREQ#

R445

10K/F_4

PEX_TERMP

AP29

PEX_TERMP

R376

2.49K/F_4

TESTMODE

R380

10K/F_4

TESTMODE

AK11

L2

+3V_GFX

C71

4.7U/6.3V_6

AH12
AG12

C79

1U/6.3V_4

t>0
t>0

t>0
t>=0

IFP(CDEF)_IOVDD
+1.05V_GFX

HCB1608KF-300T30

AG26 PEX_PLLVDD

t>=0

PEX_RST timing

+1.05V_GFX

PLACE NEAR BGA

CLOSE TO CAPS

I/O 3.3V

PLACE UNDER BGA

C78

PEX_RST

0.1U/10V_4
PLACE NEAR BALLS

N13x

3.3V_AUX_NC

P8

VDD_SENSE

L4

GND_SENSE

L5

PLACE NEAR BGA

0.1U/10V_4
4.7U/6.3V_6
4.7U/6.3V_6

C105
C600
C64

+3V_GFX

Trise >= 1uS

[15,16,18,38] +1.05V_GFX
[16,17,18,37,38]
+3V_GFX

VGPU_CORE_SENSE [37]
VSS_GPU_SENSE [37]

Size
A3

NB5

Document Number

Rev
A

DGPU 1/5 (PEG)

Date: Monday, October 22, 2012

3

Tfail <=500nS

PROJECT :TWD (Chief River)

Quanta Computer Inc.

12~16 mils width

N13P
2

[17]

*330/F_4

PLACE CLOSE TO GPU BALLS

PEGX_RST#

100K/F_4
R318

*200/F_4

PEX_PLL_HVDD
PEX_SVDD_3V3

Q35
DTC144EUA

U19
MC74VHC1G08DFT2G

[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]

R383

PEX_PLLVDD

R449
*0_4/S

DGPU_PW ROK

Power up sequence

4.7U/6.3V_6

0.130mA
0.022mA
0.167mA

[8]

+3V

NVVDD
+VCC_DGFX_CORE

PLACE CLOSE TO BGA

CLK_PEGA_REQ#

PEX_CLKREQ# 2
Q36
*DTC144EUA

CLK_PCIE_VGA [8]
CLK_PCIE_VGA# [8]

+3V_GFX

PEG_TX0
PEG_TX#0
PEG_TX1
PEG_TX#1
PEG_TX2
PEG_TX#2
PEG_TX3
PEG_TX#3
PEG_TX4
PEG_TX#4
PEG_TX5
PEG_TX#5
PEG_TX6
PEG_TX#6
PEG_TX7
PEG_TX#7

AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28

PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N

22U/6.3VS_6
22U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
4.7U/6.3V_6
1U/6.3V_4
1U/6.3V_4

PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6

PLACE UNDER BGA

C61
C60
C73
C72
C111
C103
C104

+3V_GFX

U15A

AG19
AG21
AG22
AG24
AH21
AH25

+1.05V_GFX
To be placed no further from the GPU
than bewteen the PS and GPU

22U/6.3VS_6
22U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
4.7U/6.3V_6
1U/6.3V_4
1U/6.3V_4

PLACE NEAR BALLS

C68
C108
C110
C109
C102
C113

PLACE UNDER BGA

C627

14

VGA BKT P/N: FBAX1017010

+1.05V_GFX
To be placed no further from the GPU
than bewteen the PS and GPU C67

Sheet

14of
8

42

15
U15B

U15C
[20]

[19]

[19]

FBA_CMD[30:0]

VMA_DM[7:0]

[19]

VMA_WDQS[7:0]

[19]

VMA_RDQS[7:0]

+1.5V_GFX

+1.5V_GFX

PLACE CLOSE TO GPU BALLS

C244
C185
C166
C184
C143
C159
C170
C135
C123
C179
C173
C181

4.7U/6.3V_6
4.7U/6.3V_6
2.2U/6.3V_6
2.2U/6.3V_6
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

C280
C282
C210
C53

10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6

PLACE CLOSE TO BGA

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31

VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7

P30
F31
F34
M32
AD31
AL29
AM32
AF34

VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7

M31
G31
E33
M33
AE31
AK30
AN33
AF33

VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7

M30
H30
E34
M34
AF30
AK31
AM34
AF32
AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27
B13
B16
B19
E13
E16
E19
H10
H11
H12
H13
H14
H15
H16
H18
H19
H20
H21
H22
H23
H24
H8
H9
L27
M27
N27
P27
R27
T27
T30
T33
V27
W27
W30
W33
Y27

FBA_CMD0 (FBA_CMD25)
FBA_CMD1 (FBA_CMD23) [MEMORY
FBA_CMD2
FBA_CMD3 (FBA_CMD0)
FBA_CMD4 (FBA_CMD10)
FBA_CMD5 (FBA_CMD26)
FBA_CMD6 (FBA_CMD14)
FBA_CMD7
FBA_CMD8 (FBA_CMD1)
FBA_CMD9 (FBA_CMD22)
FBA_CMD10 (FBA_CMD20)
FBA_CMD11 (FBA_CMD24)
FBA_CMD12 (FBA_CMD18)
FBA_CMD13 (FBA_CMD9)
FBA_CMD14 (FBA_CMD29)
FBA_CMD15 (FBA_CMD8)
FBA_CMD16 (FBA_CMD27)
FBA_CMD17 (FBA_CMD15)
FBA_CMD18 (FBA_CMD11)
FBA_CMD19 (FBA_CMD16)
FBA_CMD20 (FBA_CMD28)
FBA_CMD21 (FBA_CMD3)
FBA_CMD22 (FBA_CMD17)
FBA_CMD23 (FBA_CMD5)
FBA_CMD24 (FBA_CMD4)
FBA_CMD25 (FBA_CMD21)
FBA_CMD26 (FBA_CMD6)
FBA_CMD27 (FBA_CMD13)
FBA_CMD28 (FBA_CMD19)
FBA_CMD29 (FBA_CMD12)
FBA_CMD30
FBA_CMD31 (NC)
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38
FBVDDQ_39
FBVDDQ_40
FBVDDQ_41
FBVDDQ_42
FBVDDQ_43
FBVDDQ_44

I/F A]

FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
(FBA_DEBUG) FBA_DEBUG0
(NC) FBA_DEBUG1
FB_VREF_NC
FBA_CMD_RFU0
FBA_CMD_RFU1

FBVDD+FBVDDQ
8A

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

R30
R31
AB31
AC31

VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#

J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33

FBVDDQ_PROBE
GND_PROBE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND

VMC_WDQS[7:0]

[20]

VMC_RDQS[7:0]

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30

D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17

VMC_DM0
VMC_DM1
VMC_DM2
VMC_DM3
VMC_DM4
VMC_DM5
VMC_DM6
VMC_DM7

E11
E3
A3
C9
F23
F27
C30
A24

VMC_WDQS0
VMC_WDQS1
VMC_WDQS2
VMC_WDQS3
VMC_WDQS4
VMC_WDQS5
VMC_WDQS6
VMC_WDQS7

D10
D5
C3
B9
E23
E28
B30
A23

VMC_RDQS0
VMC_RDQS1
VMC_RDQS2
VMC_RDQS3
VMC_RDQS4
VMC_RDQS5
VMC_RDQS6
VMC_RDQS7

D9
E4
B2
A9
D22
D28
A30
B23

FBB_CMD0 (FBC_CMD25)
FBB_CMD1 (FBC_CMD23)
FBC_CMD2
FBB_CMD3 (FBC_CMD0)
FBB_CMD4 (FBC_CMD10)
FBB_CMD5 (FBC_CMD26)
FBB_CMD6 (FBC_CMD14)
FBC_CMD7
FBB_CMD8 (FBC_CMD1)
FBB_CMD9 (FBC_CMD22)
FBB_CMD10 (FBC_CMD20)
FBB_CMD11 (FBC_CMD24)
FBB_CMD12 (FBC_CMD18)
FBB_CMD13 (FBC_CMD9)
FBB_CMD14 (FBC_CMD29)
FBB_CMD15 (FBC_CMD8)
FBB_CMD16 (FBC_CMD27)
FBB_CMD17 (FBC_CMD15)
FBB_CMD18 (FBC_CMD11)
FBB_CMD19 (FBC_CMD16)
FBB_CMD20 (FBC_CMD28)
FBB_CMD21 (FBC_CMD3)
FBB_CMD22 (FBC_CMD17)
FBB_CMD23 (FBC_CMD5)
FBB_CMD24(FBC_CMD4)
FBB_CMD25 (FBC_CMD21)
FBB_CMD26 (FBC_CMD6)
FBB_CMD27 (FBC_CMD13)
FBB_CMD28 (FBC_CMD19)
FBB_CMD29 (FBC_CMD12)
FBC_CMD30
FBC_CMD31 (NC)

MEMORY I/F C

FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7

R439
R44

E1
K27

+1.5V_GFX

PLACE CLOSE
TO BALL

VMC_CLK0
VMC_CLK0#
VMC_CLK1
VMC_CLK1#

N13P-GSR
Stuff Ra

FBA_CMD2

R86

10K/F_4

FBA_CMD3

R434

10K/F_4

FBA_CMD5

R55

10K/F_4

FBA_CMD18

R369

10K/F_4

FBA_CMD19

R43

10K/F_4

FBC_CMD2

R122

10K/F_4

FBC_CMD3

R461

10K/F_4

FBC_CMD5

R463

10K/F_4

FBC_CMD18

R457

10K/F_4

FBC_CMD19

R452

10K/F_4

For Fermi
VMA_DQ[63:0]
VMC_DQ[63:0]

VMA_DQ[63:0]

[19]

VMC_DQ[63:0]

[20]

VMC_CLK0 [20]
VMC_CLK0# [20]
VMC_CLK1 [20]
VMC_CLK1# [20]
C

C12
C20

R437
*10K/F_4

Ra

PS_FB_CLAMP

D12
E12
E20
F20

FBB_CMD_RFU0
FBB_CMD_RFU1
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N

Reserve Ra

VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
VMC_DQ5
VMC_DQ6
VMC_DQ7
VMC_DQ8
VMC_DQ9
VMC_DQ10
VMC_DQ11
VMC_DQ12
VMC_DQ13
VMC_DQ14
VMC_DQ15
VMC_DQ16
VMC_DQ17
VMC_DQ18
VMC_DQ19
VMC_DQ20
VMC_DQ21
VMC_DQ22
VMC_DQ23
VMC_DQ24
VMC_DQ25
VMC_DQ26
VMC_DQ27
VMC_DQ28
VMC_DQ29
VMC_DQ30
VMC_DQ31
VMC_DQ32
VMC_DQ33
VMC_DQ34
VMC_DQ35
VMC_DQ36
VMC_DQ37
VMC_DQ38
VMC_DQ39
VMC_DQ40
VMC_DQ41
VMC_DQ42
VMC_DQ43
VMC_DQ44
VMC_DQ45
VMC_DQ46
VMC_DQ47
VMC_DQ48
VMC_DQ49
VMC_DQ50
VMC_DQ51
VMC_DQ52
VMC_DQ53
VMC_DQ54
VMC_DQ55
VMC_DQ56
VMC_DQ57
VMC_DQ58
VMC_DQ59
VMC_DQ60
VMC_DQ61
VMC_DQ62
VMC_DQ63

G14
G20

T1

N13P-GLR

G9
E9
G8
F9
F11
G11
F12
G12
G6
F5
E6
F6
F4
G4
E2
F3
C2
D4
D3
C1
B3
C4
B5
C5
A11
C11
D11
B11
D8
A8
C8
B8
F24
G23
E24
G24
D21
E21
G21
F21
G27
D27
G26
E27
E29
F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26

(FBC_DEBUG) FBB_DEBUG0
(NC) FBB_DEBUG1

FBC_DEBUG *60.4/F_4
FBC_DEBUG1 *60.4/F_4

R91
R92

+1.5V_GFX

F8
E8
A5
A6
D24
D25
B27
C27

FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N

D6
D7
C6
B6
F26
E26
A26
A27

FBB_PLL_AVDD

H17

+FB_PLLAVDD

C178

0.1U/10V_4

PLACE CLOSE TO BALL

Rb

+FB_PLLAVDD

U27

+FB_PLLAVDD

F1

FBVDDQ_SENSE

F2

FB_GND_SENSE

J27

FB_CAL_PD_VDDQ R441

H27

FB_CAL_PU_GND

C172
0.1U/10V_4

N13x
PLACE NEAR BGA CLOSE TO CAPS

L27
HCB1608KF-300T30
C601
22U/6.3VS_6

PLACE CLOSE TO BGA

TP52

C155
C149

TP53

H25 FB_CAL_TERM_GND

+1.05V_GFX

40.2/F_4

R442

40.2/F_4

R444

51_4

0.1U/10V_4
0.1U/10V_4

PLACE CLOSE TO BALL

+1.5V_GFX

PROJECT :TWD (Chief River)

Quanta Computer Inc.

PLACE CLOSE TO GPU BALLS

N13x

Size
Custom

2011 12 07 : Change to 51ohm for NVIDIA requirement

[18,19,20,38] +1.5V_GFX
[14,16,18,38] +1.05V_GFX

FBC_D00
FBC_D01
FBC_D02
FBC_D03
FBC_D04
FBC_D05
FBC_D06
FBC_D07
FBC_D08
FBC_D09
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N

VMA_CLK0 [19]
VMA_CLK0# [19]
VMA_CLK1 [19]
VMA_CLK1# [19]

R32
AC32

FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N

FB_DLL_AVDD

VMC_DM[7:0]

[20]

FBA_DEBUG *60.4/F_4
FBA_DEBUG1 *60.4/F_4

R28
AC28
H26

FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N

FBA_PLL_AVDD

[20]

15mils width

K31
L30
H34
J34
AG30
AG31
AJ34
AK34

RSVD

0.062mA

L28
M29
L29
M28
N31
P29
R29
P28
J28
H29
J29
H28
G29
E31
E32
F30
C34
D32
B33
C33
F33
F32
H33
H32
P34
P32
P31
P33
L31
L34
L32
L33
AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28
AJ29
AK29
AJ30
AK28
AM29
AM31
AN29
AM30
AN31
AN32
AP30
AP32
AM33
AL31
AK33
AK32
AD34
AD32
AC30
AD33
AF31
AG34
AG32
AG33

FBC_CMD[30:0]

NB5

Document Number

Rev
A

DGPU 2/5 (Memory)

Date: Monday, October 22, 2012

15of

Sheet
8

42

16

[14,15,18,38] +1.05V_GFX
[14,17,18,37,38]
+3V_GFX

U15D
10K/F_4

IFPAB_PLLVDD

AH8

IFPAB_IOVDD
R372

10K/F_4

IFPAB_PLLVDD

AG8

IFPA_IOVDD

AG9

IFPB_IOVDD

R373

*1K/F_4

AJ8

AF7

IFPC_PLLVDD

10K/F_4

IFPCD_PLLVDD

AG7

IFPD_PLLVDD

AF6

IFPC_IOVDD

R387

10K/F_4

IFPCD_IOVDD

AG6

IFPD_IOVDD

R391

R389

*1K/F_4

10K/F_4

IFPEF_PLLVDD

10K/F_4

IFPEF_IOVDD

10K/F_4

DACA_VDD

IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N

AJ9
AH9
AP6
AP5
AM7
AL7
AN8
AM8
AK8
AL8

IFPC_AUX_I2CW_SCL

IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N

AG3
AG2
AK1
AJ1
AJ3
AJ2
AH3
AH4
AG5
AG4

IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N

AK3
AK2
AM1
AM2
AM3
AM4
AL3
AL4
AK4
AK5

IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N

AB3
AB4
AD2
AD3
AD1
AC1
AC2
AC3
AC4
AC5

IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N

AF3
AF2
AE3
AE4
AF4
AF5
AD4
AD5
AG1
AF1

[IFPC/D_TMDS]IFPC_AUX_I2CW_SDA_N

AF8

IFPC_RSET

AN2

IFPD_RSET

AB8

IFPEF_PLLVDD

AC7
AC8

IFPE_IOVDD
IFPF_IOVDD

AD6

IFPEF_RSET

[IFPE/F_DP]

R371

AM6
AN6
AP3
AN3
AN5
AM5
AL6
AK6
AJ6
AH6

IFPAB_RSET

R388

R375

IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N

[IFPA/B_LVDS]

AG10

DACA_VDD

T3

AP9

DACA_VREF

T2

AP8

DACA_RSET

[DACA/B_CRT]

DACA_RED
DACA_GREEN
DACA_BLUE

AK9
AL10
AL9

DACA_HSYNC
DACA_VSYNC

AM9
AN9

I2CA_SCL
I2CA_SDA

L28

+1.05V_GFX

HCB1608KF-300T30

NV_PLLVDD

C614
22U/6.3VS_6

AD8

PLLVDD

AE8

SP_PLLVDD

R4
R5

0824 Update Symbol

I2CA_SCL
I2CA_SDA

R64
R70

2.2K_4
2.2K_4

+3V_GFX

0.052mA

C613
0.1U/10V_4

C198

0.067mA

4
3

PLACE CLOSE TO GPU

0.041mA

AD7
C144

VID_PLLVDD

C129

[XTAL IN]

XTAL_IN
XTAL_OUT
XTAL_OUTBUFF
XTAL_SSIN

H3
H2
J4
H1

CLK_27M_XTAL_IN
CLK_27M_XTAL_OUT
R78
10K/F_4
R428
10K/F_4

12P/50V_4

Y2
27MHZ +-10PPM

1
2

R374

PROJECT :TWD (Chief River)

Quanta Computer Inc.

C192

N13x

C124
22U/6.3VS_6 4.7U/6.3V_6

12P/50V_4
0.1U/10V_4

PLACE CLOSE TO BALLS

1

Size
A3

NB5

within 150mils

Document Number

Rev
A

DGPU 3/5 (Display)

Date: Monday, October 22, 2012

Sheet

16of
8

42

For N13P-GLR
ROM_SO PD 10K
ROM_SCLK PD 15K
N13P-GLR

N13P-GSR

R20
*1K/F_4

ROM_SO

PD 10K

PU 10K

ROM_SCLK

PD 15K

PU 5K

STRAP0

PU 45K

PU 45K

STRAP1

PD 45K

PD 5K

STRAP2

PD 20K

PU 10K

STRAP3

UN-STUFF

PD 5K

STRAP4

UN-STUFF

PD 45K

R24
*1K/F_4

R27
*1K/F_4

R32
*1K/F_4

R34
1K/F_4

R36
1K/F_4

5K
10K
15K
20K
25K
30K
35K
45K

GPU_VID0
GPU_VID1
GPU_VID2
GPU_VID3
GPU_VID4
GPU_VID5

R22
1K/F_4

R25
1K/F_4

R26
1K/F_4

R31
1K/F_4

R33
*1K/F_4

R35
*1K/F_4

1000
1001
1010
1011
1100
1101
1110
1111

20120508,MV

PEGX_RST# [14]
B

0000
0001
0010
0011
0100
0101
0110
0111

DGPU_OVT#

DGPU_OVT#

[29]

Q34
*2N7002K

+3V_GFX
C

2.2K_4
2.2K_4

R399
R400

+3V_GFX

JTAG_TRST#
N12E_SCL
N12E_SDA

R7
R6

2.2K_4 DGPU_EDIDCLK
2.2K_4 DGPU_EDIDDATA

R2
R3

R58
R62

GFx_SCL
GFx_SDA
TP17
TP16

THERM+
THERM-

JTAG_TCK
JTAG_TMS [MISC_GPIO/I2C/JTAG/THER]
JTAG_TDI
JTAG_TDO
JTAG_TRST_N
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA

T4
T3

I2CS_SCL
I2CS_SDA

K4
K3

THERMDP
THERMDN

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

DGPU_DPST_PW M
DPRSLPVR_R1 R61
DGPU_LVDS_BLON

TP18
*0_4
TP44
TP12

VGA_OVT#
ALERT

TP50
TP51

GPU_GPIO16

R60

R426

40.2K/F_4

J2
J7
J6
J5
J3

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

J1

[MISC2_ROM]

MULTISTRAP_REF_GND

ROM_SCLK
ROM_CS_N
ROM_SI
ROM_SO

H4
H6
H5
H7

ROM_SCLK
R85
10K/F_4
ROM_SI
ROM_SO

GPU_VID4
GPU_VID3

[37]
[37]

GPU_VID1
GPU_VID2

[37]
[37]

GPU_VID0

[37]

DGPU_PROCHOT#

[29,37]

10K/F_4+3V_GFX
[37]

GPU_VID5

DPRSLPVR

[37]

Change to TP

L2

R421

*10K/F_4

CEC

L3

R417

10K/F_4

R397

Rc
+3V_GFX

Stuff Rc

Un-stuff Rc

R95

R84
R430

R87

R80

*4.99K/F_4 45.3K/F_4

20K/F_4 *4.99K/F_4 *45K/F_4

VGA_DEVICE

SLOT_CLK_CFG

PEX_PLL_EN_TERM

0011

ROM_SI

RAMCFG[3]

RAMCFG[2]

RAMCFG[1]

RAMCFG[0]

XXXX

STRAP0

USER[3]

USER[2]

USER[1]

USER[0]

1111

STRAP1

3GIO_PADCFG[3]

3GIO_PADCFG[2]

3GIO_PADCFG[1]

3GIO_PADCFG[0]

0110

STRAP2

PCI_DEVID[3]

PCI_DEVID[2]

PCI_DEVID[1]

PCI_DEVID[0]

0111

STRAP3

SOR3_EXPOSED

SOR2_EXPOSED

SOR1_EXPOSED

SOR0_EXPOSED

XXXX

STRAP4

RESERVED

PCI_MAX SPEED

DP_PLL_VDD33

XXXX

PCI SPEED CHANGE GEN3

JTAG_TDI

R377

VGA_OVT#

R412

ALERT

R406

JTAG_TCK

R381

JTAG_TRST#

R379

DGPU_DPST_PW M

R424

+3V_GFX

*0_4

Q33

R396
4.7K_4

GFx_SCL

GFx_SDA

MBCLK2

R398
4.7K_4

MBDATA2

4
5
*10K/F_4
6
10K/F_4
7
10K/F_4
8
*10K/F_4
9
10K/F_4
10
*2K/F_4
11
12
13
14
15
16
17
MBCLK2 [8,29,30]
18
19
MBDATA2 [8,29,30]
20/21
*10K/F_4

**

I/O

USAGE

PIN

OUT
GPU_VID4
OUT
GPU_VID3
OUT LCD_BL_PWM
OUT
LCD_VCC
OUT LCD_BLEN
OUT
GPU_VID1
OUT
GPU_VID2
OUT
3D VISION
OVERT
I/O
I/O
ALERT
OUT MEM VREF
OUT
GPU_VID0
PWR_LEVEL
IN
OUT
GPU_VID5
HPD_AB
IN
HPD_C
IN
OUT MEM VDD
HPD_D
IN
HPD_E
IN
HPD_F
IN
RESERVE

GPU CORE_VDD VID4

GPU CORE_VDD VID3
LCD BACKLIGHT PWM
PANEL POWER ENABLE
PANEL BACKLIGHT ENABLE
GPU CORE_VDD VID1
GPU CORE_VDD VID2
3D VISION LEFT/RIGHT VISION
ACTIVE LOW THERMAL OVER TEMP
ACTIVE LOW THERMAL ALERT
MEMMORY VREF CONTROL
GPU CORE_VDD VID0
Power Detect ,HIGH=AC, LOW=DC
GPU CORE_VDD VID5
HOT PLUG DETECT FOR IFPAB
HOT PLUG DETECT FOR IFPC
MEMMORY VDD CONTROL
HOT PLUG DETECT FOR IFPD
HOT PLUG DETECT FOR IFPE
HOT PLUG DETECT FOR IFPF

PROJECT :TWD (Chief River)

Quanta Computer Inc.

*0_4

Size
Custom

NB5
5

1001

GPIO ASSIGNMENTS

2N7002DW
R409

Logical
Strapping Bit0

Document Number

Rev
A

DGPU 4/5 (MIO/GPIO)

Date: Monday, October 22, 2012

2

R414

SMB_ALT_ADDR

R378

Logical
Strapping Bit1

2011 12 01 : Add off-page connector

R82

15K/F_4

SUB_VENDOR

2
+3V_GFX

N13P-GSR

R93

10K/F_4 10K/F_4

FB_0_BAR_SIZE

GFx SMBus Isolation

N13P-GLR

*4.99K/F_4 *10K/F_4
ROM_SI
*4.99K/F_4
ROM_SO
ROM_SCLK

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

PCI_DEVIDE[4]

JTAG_TMS

N13x

R94

XCLK_417

+3V_GFX

+3V_GFX

BUFRST_N

R408

ROM_SCLK

2011 12 01 : Add net DGPU_PROCHOT#

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

R81

*15K/F_4 *34.8K/F_4 *20K/F_4

ROM_SO

ROM_SI
GPIO
1G Hynix 64Mx16 (D-Die) -->15K PD
1G Samsung 64Mx16(G-Die)-->20K PD
0
2G Hynix 128Mx16 (D-Die) -->30K PD
1
-------------------------------------------------2G Samsung 128Mx16 E-die
2
N13P-GLR ---------------------------->10K PD
3
N13P-GSR ---------------------------->25K +3V_GFX
PD

DPRSLPVR

R405
TP14
TP48
*0_4
TP15
TP47
TP46
TP45
TP49

R79

Logical
Strapping Bit2

VRAM Configuration Table

P6
M3
L6
P5
P7
L7
M7
N8
M1
M2
L1
M5
N3
M4
N4
P2
R8
M6
R1
P3
P4
P1

R89

45.3K/F_4 *4.99K/F_4

R83

Logical
Strapping Bit3

For N13P-GLR, N13P-GSR

Defult : 2G Samsung

AM10
AP11
AM11
AP12
AN11

R427
R96

Default: Sunsamg 2G VRAM

VID 0 0 0 0 1 1 0 ---> 0.9V

VGA_OVT#

+3V_GFX

Logical Strap Bit Mapping

PU-VDD
PD

[MIOB]

JTAG_TCK
JTAG_TMS
JTAG_TDI

DANIEL

+3V_GFX

[MIOA]

ROM_SI
A

17

N13P-GLR ID:0xDE3
N13P-GSR ID:0xDF9

+3V_GFX

U15E

Net name

Sheet

17of
8

42

U15G
A2 GND_1
AA17 GND_2
AA18 GND_3
AA20 GND_4
AA22 GND_5
AB12 GND_6
AB14 GND_7
AB16
GND_8
AB19
GND_9
AB2 GND_10
AB21
GND_11
A33
GND_12
AB23 GND_13
AB28
GND_14
AB30
GND_15
AB32 GND_16
AB5
GND_17
AB7 GND_18
AC13 GND_19
AC15 GND_20
AC17
GND_21
AC18
GND_22
AA13
GND_23
AC20 GND_24
AC22 GND_25
AE2 GND_26
AE28
GND_27
AE30
GND_28
AE32 GND_29
AE33 GND_30
AE5 GND_31
AE7 GND_32
AH10 GND_33
AA15 GND_34
AH13 GND_35
AH16 GND_36
AH19 GND_37
AH2 GND_38
AH22 GND_39
AH24 GND_40
AH28 GND_41
AH29 GND_42
AH30 GND_43
AH32 GND_44
AH33 GND_45
AH5 GND_46
AH7 GND_47
AJ7
GND_48
AK10 GND_49
AK7 GND_50
AL12 GND_51
AL14 GND_52
AL15 GND_53
AL17 GND_54
AL18 GND_55
AL2
GND_56
AL20 GND_57
AL21 GND_58
AL23 GND_59
AL24 GND_60
AL26 GND_61
AL28 GND_62
AL30 GND_63
AL32 GND_64
AL33 GND_65
AL5
GND_66
AM13 GND_67
AM16 GND_68
AM19 GND_69
AM22 GND_70
AM25 GND_71
AN1 GND_72
AN10 GND_73
AN13 GND_74
AN16 GND_75
AN19 GND_76
AN22 GND_77
AN25 GND_78
AN30 GND_79
AN34 GND_80
AN4
GND_81
AN7 GND_82
AP2 GND_83
AP33 GND_84
B1 GND_85
B10 GND_86
B22 GND_87
B25 GND_88
B28 GND_89
B31 GND_90
B34
GND_91
B4 GND_92
B7 GND_93
C10 GND_94
C13 GND_95
C19 GND_96
C22 GND_97
C25 N13x
GND_98
C28 GND_99
C7 GND_100

+VGACORE
U15F
AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23
M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22
T12
T14
T16
T19
T21
T23
U13
U15
U17
U18
U20
U22
V13
V15
V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y18
Y17
Y20
Y22

VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041
VDD_042
VDD_043
VDD_044
VDD_045
VDD_046
VDD_047
VDD_048
VDD_049
VDD_050
VDD_051
VDD_052
VDD_053
VDD_054
VDD_055
VDD_056
VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072

[GPU VDD]

29A(TDP)

XVDD_001
XVDD_002
XVDD_003
XVDD_004
XVDD_005
XVDD_006
XVDD_007
XVDD_008
XVDD_009
XVDD_010
XVDD_011
XVDD_012
XVDD_013
XVDD_014
XVDD_015
XVDD_016
XVDD_017
XVDD_018
XVDD_019
XVDD_020
XVDD_021
XVDD_022
XVDD_023
XVDD_024
XVDD_025
XVDD_026
XVDD_027
XVDD_028
XVDD_029
XVDD_030
XVDD_031
XVDD_032
XVDD_033
XVDD_034
XVDD_035
XVDD_036
XVDD_037
XVDD_038

U1
U2
U3
U4
U5
U6
U7
U8
V1
V2
V3
V4
V5
V6
V7
V8
W2
W3
W4
W5
W7
W8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8

N13x

[GPU GND]

GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_OPT_1
GND_OPT_2

18

D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11

+VGACORE

C125
C137
C162
C141
C127
C140
C130
C165
C154

PLACE UNDER GPU

C164

C128

4.7U/6.3V_6

C151

4.7U/6.3V_6
4.7U/6.3V_6
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6
4.7U/6.3V_6
4.7U/6.3V_6
4.7U/6.3V_6
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6

C136

C126 C138

D21

C596

C595

C598

C599

C597

C587

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

22U/6.3VS_6
47U/6.3V_8_S

+3V

R366
*4.7K_4

4.7K_4

R41

DGPU_PWROK
Q31

DGPU_PGOK-1

C16
W32

+1.05V_GFX

R42
4.7K_4

DGPU_POK4

1
3

R40
4.7K_4

2
DTC144EUA
C51

Q8

[9,14]

R367
100K/F_4

1000P/50V_4

11/10 add for DGPU_PWROK circuit

DGPU_POK2 2
D

Q7
MMBT3904-7-F

+VGACORE
+1.05V_GFX
+1.5V_GFX
+3V_GFX
+3V

PROJECT :TWD (Chief River)

Quanta Computer Inc.
Size
Custom

NB5

Document Number

Rev
A

DGPU 5/5 (Power/Ground)

Date: Monday, October 22, 2012

4

C59

+3V_GFX

C50
*1000P/50V_4

C112

[37]
[14,15,16,38]
[15,19,20,38]
[14,16,17,37,38]
[6,7,8,9,10,12,13,14,21,22,23,24,25,27,28,29,30,35,37,39,41]
2

C152

+VGACORE

+3V_GFX

C63

Place to GPU Center

for meet Power down sequence for +3V_GFX

RB500V-40

C163 C167 C62

100U/6.3V_1206

+1.5V_GFX

C66

C150
+

+1.5V_GFX

D22

C153 C65

PLACE NEAR GPU

MMBT3904-7-F

RB500V-40

1U/6.3V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

+VGACORE

C52
*1000P/50V_4

+VGACORE

Sheet

18of
8

42

[15] VMA_DQ[63..0]
[15] VMA_DM[7..0]
[15] VMA_WDQS[7..0]
[15] VMA_RDQS[7..0]

[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

[15]
[15]
[15]

FBA_CMD12
FBA_CMD27
FBA_CMD26

[15] VMA_CLK0
[15] VMA_CLK0#
[15] FBA_CMD3

[15]
[15]
[15]
[15]
[15]

[15]

FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13

FBA_CMD5

M8
H1

VREFCA
VREFDQ

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBA_CMD12
FBA_CMD27
FBA_CMD26

M2
N8
M3

BA0
BA1
BA2

VMA_CLK0
VMA_CLK0#
FBA_CMD3

J7
K7
K9

FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13

K1
L2
J3
K3
L3

VMA_WDQS1
VMA_RDQS1

F3
G3

VMA_DM1
VMA_DM0

E7
D3

VMA_WDQS0
VMA_RDQS0

C7
B7

FBA_CMD5

T2

VMA_ZQ1

CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU

RESET

L8

ZQ

Should be 240
Ohms +-1%
R56
243/F_4
J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

VRAM6
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ12
VMA_DQ10
VMA_DQ15
VMA_DQ11
VMA_DQ14
VMA_DQ8
VMA_DQ13
VMA_DQ9

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ5
VMA_DQ0
VMA_DQ6
VMA_DQ3
VMA_DQ7
VMA_DQ2
VMA_DQ4
VMA_DQ1

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

VREFC_VMA1
VREFD_VMA1

M8
H1

VREFCA
VREFDQ

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBA_CMD12
FBA_CMD27
FBA_CMD26

M2
N8
M3

BA0
BA1
BA2

VMA_CLK0
VMA_CLK0#
FBA_CMD3

J7
K7
K9

A1
A8
C1
C9
D2
E9
F1
H2
H9

FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13

K1
L2
J3
K3
L3

VMA_WDQS3
VMA_RDQS3

F3
G3

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMA_DM3
VMA_DM2

E7
D3

VMA_WDQS2
VMA_RDQS2

C7
B7

FBA_CMD5

T2

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GFX

VMA_ZQ2

CK
CK
CKE
ODT
CS
RAS
CAS
WE

DML
DMU
DQSU
DQSU

RESET
ZQ

R433
243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
VRAM _DDR3_SAMSUNG_64MX16

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ24
VMA_DQ31
VMA_DQ27
VMA_DQ28
VMA_DQ26
VMA_DQ29
VMA_DQ25
VMA_DQ30

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ16
VMA_DQ20
VMA_DQ18
VMA_DQ23
VMA_DQ17
VMA_DQ22
VMA_DQ19
VMA_DQ21

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

DQSL
DQSL

L8

VRAM1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

Should be 240
Ohms +-1%

B1
B9
D1
D8
E2
E8
F9
G1
G9

NC#J1
NC#L1
NC#J9
NC#L9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B2
D9
G7
K2
K8
N1
N9
R1
R9

[15] VMA_CLK1
[15] VMA_CLK1#
[15] FBA_CMD19

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

[15]
[15]

FBA_CMD18
FBA_CMD16

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VREFC_VMA3
VREFD_VMA3

M8
H1

VREFCA
VREFDQ

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBA_CMD12
FBA_CMD27
FBA_CMD26

M2
N8
M3

BA0
BA1
BA2

VMA_CLK1
VMA_CLK1#
FBA_CMD19

J7
K7
K9

FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13

K1
L2
J3
K3
L3

VMA_WDQS5
VMA_RDQS5

F3
G3

VMA_DM5
VMA_DM4

E7
D3

VMA_WDQS4
VMA_RDQS4

C7
B7

FBA_CMD5

T2

VMA_ZQ3

L8

+1.5V_GFX

DQSL
DQSL

J1
L1
J9
L9

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ42
VMA_DQ45
VMA_DQ43
VMA_DQ46
VMA_DQ41
VMA_DQ44
VMA_DQ40
VMA_DQ47

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ32
VMA_DQ36
VMA_DQ34
VMA_DQ38
VMA_DQ33
VMA_DQ37
VMA_DQ35
VMA_DQ39

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

RESET
ZQ

VREFCA
VREFDQ

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBA_CMD12
FBA_CMD27
FBA_CMD26

M2
N8
M3

BA0
BA1
BA2

VMA_CLK1
VMA_CLK1#
FBA_CMD19

J7
K7
K9

A1
A8
C1
C9
D2
E9
F1
H2
H9

FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13

K1
L2
J3
K3
L3

VMA_WDQS7
VMA_RDQS7

F3
G3

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMA_DM7
VMA_DM6

E7
D3

VMA_WDQS6
VMA_RDQS6

C7
B7

FBA_CMD5

T2

+1.5V_GFX

B1
B9
D1
D8
E2
E8
F9
G1
G9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

VREFC_VMA3
VREFD_VMA3

M8
H1

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

DQSU
DQSU

NC#J1
NC#L1
NC#J9
NC#L9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

DML
DMU

R45
243/F_4

VMA_ZQ4

L8

[15]

FBA_CMD17

[15]

FBA_CMD1

ODT
CS
RAS
CAS
WE
DQSL
DQSL

J1
L1
J9
L9

RESET
ZQ

TP3

FBA_CMD1

TP10

R436
1.33K/F_4

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ55
VMA_DQ51
VMA_DQ54
VMA_DQ50
VMA_DQ52
VMA_DQ48
VMA_DQ53
VMA_DQ49

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9

96-BALL
SDRAM DDR3
VRAM _DDR3_SAMSUNG_64MX16

+1.5V_GFX

FBA_CMD17

VMA_DQ61
VMA_DQ57
VMA_DQ60
VMA_DQ59
VMA_DQ63
VMA_DQ58
VMA_DQ62
VMA_DQ56

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

DQSU
DQSU

NC#J1
NC#L1
NC#J9
NC#L9

E3
F7
F2
F8
H3
H8
G2
H7

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

DML
DMU

R386
243/F_4

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

CK
CK
CKE

Should be 240
Ohms +-1%

96-BALL
SDRAM DDR3
VRAM _DDR3_SAMSUNG_64MX16

+1.5V_GFX

R392
1.33K/F_4

ODT
CS
RAS
CAS
WE

19

VRAM5

CK
CK
CKE

Should be 240
Ohms +-1%

B1
B9
D1
D8
E2
E8
F9
G1
G9

96-BALL
SDRAM DDR3
VRAM _DDR3_SAMSUNG_64MX16

VMA_CLK0

900MHz VRAM size:

Samsung 64Mx16, G-die P/N = AKD5EGGT500
Samsung 128Mx16, E-die P/N = AKD5MGGT520
Hynix 64Mx16, P/N D-die = AKD5LZWTW02
(D-Die)Hynix 128Mx16, P/N = AKD5MGWTW16

CHANNEL A: 256MB/512MB DDR3

VRAM2
VREFC_VMA1
VREFD_VMA1

+1.5V_GFX

R385
1.33K/F_4

R368
1.33K/F_4

VMA_CLK1

R429
162/F_4
VMA_CLK0#

VREFC_VMA1

Fermi : Change to 160 ohm

1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)

R393
1.33K/F_4

C608

VREFD_VMA1
R431
1.33K/F_4

0.1U/10V_4

R46

VREFC_VMA3

162/F_4
VMA_CLK1#
C650
0.1U/10V_4

R384
1.33K/F_4

C604

VREFD_VMA3
R370
1.33K/F_4

0.1U/10V_4

Fermi : Change to 160 ohm

1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)

C589
0.1U/10V_4

+1.5V_GFX
+1.5V_GFX

+1.5V_GFX
+1.5V_GFX
C131
C603
C605
C610

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

C607
C593
C591
C611
C588
C57

10U/6.3V_6
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

+1.5V_GFX

C122

10U/6.3V_6

C652

10U/6.3V_6

C592
C205
C612

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

C90

10U/6.3V_6

C651

10U/6.3V_6
10U/6.3V_6

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

C54

C646
C132
C206
C609

C55
C133
C93

C207
C594
C590

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

C134
C56

0.1U/10V_4
0.1U/10V_4

[15,18,20,38]

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Rev
1A

DGPU Memory 1/2 (DDR3)

Date: Monday, October 22, 2012

5

+1.5V_GFX

Sheet

19

of

42

[15] VMC_DQ[63..0]
[15] VMC_DM[7..0]
[15] VMC_WDQS[7..0]
[15] VMC_RDQS[7..0]

[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

[15]
[15]
[15]

FBC_CMD12
FBC_CMD27
FBC_CMD26

[15] VMC_CLK0
[15] VMC_CLK0#
[15] FBC_CMD3

[15]
[15]
[15]
[15]
[15]

[15]

FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13

FBC_CMD5

M8
H1

VREFCA
VREFDQ

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBC_CMD12
FBC_CMD27
FBC_CMD26

M2
N8
M3

BA0
BA1
BA2

VMC_CLK0
VMC_CLK0#
FBC_CMD3

J7
K7
K9

FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13

K1
L2
J3
K3
L3

VMC_WDQS2
VMC_RDQS2

F3
G3

VMC_DM2
VMC_DM1

E7
D3

VMC_WDQS1
VMC_RDQS1

C7
B7

FBC_CMD5

T2

VMC_ZQ1

L8

ODT
CS
RAS
CAS
WE
DQSL
DQSL

J1
L1
J9
L9

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMC_DQ10
VMC_DQ13
VMC_DQ11
VMC_DQ15
VMC_DQ9
VMC_DQ14
VMC_DQ8
VMC_DQ12

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

DQSU
DQSU

RESET
ZQ

NC#J1
NC#L1
NC#J9
NC#L9

VMC_DQ18
VMC_DQ22
VMC_DQ16
VMC_DQ21
VMC_DQ19
VMC_DQ17
VMC_DQ20
VMC_DQ23

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

DML
DMU

R121
243/F_4

E3
F7
F2
F8
H3
H8
G2
H7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

CK
CK
CKE

Should be 240
Ohms +-1%

VRAM8
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

M8
H1

VREFCA
VREFDQ

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBC_CMD12
FBC_CMD27
FBC_CMD26

M2
N8
M3

BA0
BA1
BA2

VMC_CLK0
VMC_CLK0#
FBC_CMD3

J7
K7
K9

A1
A8
C1
C9
D2
E9
F1
H2
H9

FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13

K1
L2
J3
K3
L3

VMC_WDQS3
VMC_RDQS3

F3
G3

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMC_DM3
VMC_DM0

E7
D3

VMC_WDQS0
VMC_RDQS0

C7
B7

FBC_CMD5

T2

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_GFX

VMC_ZQ2

L8

CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU

RESET
ZQ

Should be 240
Ohms +-1%
R462
243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
VRAM _DDR3_SAMSUNG_64MX16

NC#J1
NC#L1
NC#J9
NC#L9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMC_DQ25
VMC_DQ29
VMC_DQ27
VMC_DQ31
VMC_DQ26
VMC_DQ30
VMC_DQ24
VMC_DQ28

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMC_DQ3
VMC_DQ6
VMC_DQ1
VMC_DQ7
VMC_DQ0
VMC_DQ5
VMC_DQ2
VMC_DQ4

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B2
D9
G7
K2
K8
N1
N9
R1
R9

[15] VMC_CLK1
[15] VMC_CLK1#
[15] FBC_CMD19

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

[15]
[15]

FBC_CMD18
FBC_CMD16

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VREFC_VMC3
VREFD_VMC3

M8
H1

VREFCA
VREFDQ

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBC_CMD12
FBC_CMD27
FBC_CMD26

M2
N8
M3

BA0
BA1
BA2

VMC_CLK1
VMC_CLK1#
FBC_CMD19

J7
K7
K9

FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13

K1
L2
J3
K3
L3

VMC_WDQS4
VMC_RDQS4

F3
G3

VMC_DM4
VMC_DM5

E7
D3

VMC_WDQS5
VMC_RDQS5

C7
B7

FBC_CMD5

T2

VMC_ZQ3

+1.5V_GFX

CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU

RESET

L8

ZQ

Should be 240
Ohms +-1%

B1
B9
D1
D8
E2
E8
F9
G1
G9

R105
243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
VRAM _DDR3_SAMSUNG_64MX16

VMC_CLK0

20

VRAM4

VREFC_VMC1
VREFD_VMC1

B2
D9
G7
K2
K8
N1
N9
R1
R9

CHANNEL B: 256MB/512MB DDR3

VRAM3
VREFC_VMC1
VREFD_VMC1

NC#J1
NC#L1
NC#J9
NC#L9

VRAM7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMC_DQ36
VMC_DQ34
VMC_DQ39
VMC_DQ32
VMC_DQ37
VMC_DQ35
VMC_DQ38
VMC_DQ33

VREFC_VMC3
VREFD_VMC3

M8
H1

VREFCA
VREFDQ

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMC_DQ47
VMC_DQ42
VMC_DQ45
VMC_DQ41
VMC_DQ44
VMC_DQ43
VMC_DQ46
VMC_DQ40

FBC_CMD12
FBC_CMD27
FBC_CMD26

M2
N8
M3

BA0
BA1
BA2

VMC_CLK1
VMC_CLK1#
FBC_CMD19

J7
K7
K9

A1
A8
C1
C9
D2
E9
F1
H2
H9

FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13

K1
L2
J3
K3
L3

VMC_WDQS6
VMC_RDQS6

F3
G3

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMC_DM6
VMC_DM7

E7
D3

VMC_WDQS7
VMC_RDQS7

C7
B7

FBC_CMD5

T2

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

VMC_ZQ4

R460
1.33K/F_4

VMC_CLK1

CK
CK
CKE
ODT
CS
RAS
CAS
WE

J1
L1
J9
L9

VMC_DQ53
VMC_DQ55
VMC_DQ51
VMC_DQ49
VMC_DQ50
VMC_DQ52
VMC_DQ48
VMC_DQ54

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMC_DQ59
VMC_DQ60
VMC_DQ58
VMC_DQ63
VMC_DQ57
VMC_DQ62
VMC_DQ56
VMC_DQ61

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

DQSL
DQSL
DML
DMU

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

DQSU
DQSU

RESET
ZQ

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

R454
243/F_4
NC#J1
NC#L1
NC#J9
NC#L9

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9

96-BALL
SDRAM DDR3
VRAM _DDR3_SAMSUNG_64MX16
+1.5V_GFX

R451

L8

E3
F7
F2
F8
H3
H8
G2
H7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

Should be 240
Ohms +-1%

96-BALL
SDRAM DDR3
VRAM _DDR3_SAMSUNG_64MX16

+1.5V_GFX

R465
1.33K/F_4

+1.5V_GFX

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

+1.5V_GFX

R113
1.33K/F_4

R455
1.33K/F_4

R108
VREFC_VMC1

162/F_4
VMC_CLK0#

Fermi : Change to 160 ohm (WJ)

1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)

R464
1.33K/F_4

C691
0.1U/10V_4

VREFD_VMC1
R459
1.33K/F_4

VREFC_VMC3

162/F_4
VMC_CLK1#

Fermi : Change to 160 ohm

1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)

C683
0.1U/10V_4

R111
1.33K/F_4

VREFD_VMC3

C252
0.1U/10V_4

R453
1.33K/F_4

C679
0.1U/10V_4

+1.5V_GFX

C237
C668
+1.5V_GFX
C702
C697
C260
C676

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

[15]

10U/6.3V_6

+1.5V_GFX

10U/6.3V_6

C251

1U/6.3V_4

C684
C678
C701

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

C239
C673
C281
C680
C234
C699
C669
C674

+1.5V_GFX
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

C700
C243
C266
C685
C233
C675
C681
C677

[15]
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

FBC_CMD17
FBC_CMD1

FBC_CMD17
FBC_CMD1

TP19
[15,18,19,38]

TP20

900MHz VRAM size:

Samsung 64Mx16, G-die P/N = AKD5EGGT500
Samsung 128Mx16, E-die P/N = AKD5MGGT520
Hynix 64Mx16, P/N D-die = AKD5LZWTW02
(D-Die)Hynix 128Mx16, P/N = AKD5MGWTW16

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Rev
1A

DGPU Memory 2/2 (DDR3)

Date: Monday, October 22, 2012

5

+1.5V_GFX

Sheet

20

of

42

21

USB Camera Connector

MIC
FCM1608KF-301T02/SDIGITAL_D1_R
FCM1608KF-301T02/SDIGITAL_CLK_R
C576
100P/50V_4

RP9
D

1
4

[8] USBP2[8] USBP2+

+3VLCD_CON
C575
100P/50V_4

C37
C44
C582
C581

+3V

Change from +5V to +3V

*10P/50V_4
*10P/50V_4
33P/50V_4
33P/50V_4

PCH_EDIDCLK
PCH_EDIDDATA

[6] PCH_EDIDCLK
[6] PCH_EDIDDATA

EMI request

8/27 B stage:del RP9

USBP2USBP2+
DIGITAL_D1
DIGITAL_CLK

C42

0.01U/16V_4

C573

*4.7U/6.3V_6

C41

+3V

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

1000P/50V_4

[6]
[6]

PCH_LA_DATAN0
PCH_LA_DATAP0

PCH_EDIDCLK
PCH_EDIDDATA
PCH_LA_DATAN0
PCH_LA_DATAP0

[6]
[6]

PCH_LA_DATAN1
PCH_LA_DATAP1

PCH_LA_DATAN1
PCH_LA_DATAP1

[6]
[6]

PCH_LA_DATAN2
PCH_LA_DATAP2

PCH_LA_DATAN2
PCH_LA_DATAP2

2.2K_4
2.2K_4

USBP2USBP2+

2
3

*MCM2012B900GBE

CAMERA

R30
R29

+3V

PCH_LA_CLK#
PCH_LA_CLK

[6] PCH_LA_CLK#
[6] PCH_LA_CLK
[6]
[6]

PCH_LB_DATAN0
PCH_LB_DATAP0

PCH_LB_DATAN0
PCH_LB_DATAP0

[6]
[6]

PCH_LB_DATAN1
PCH_LB_DATAP1

PCH_LB_DATAN1
PCH_LB_DATAP1

[6]
[6]

PCH_LB_DATAN2
PCH_LB_DATAP2

PCH_LB_DATAN2
PCH_LB_DATAP2
PCH_LB_CLK#
PCH_LB_CLK

[6] PCH_LB_CLK#
[6] PCH_LB_CLK

DIGITAL_D1_R
DIGITAL_CLK_R

Change from +5V to +3V

+3V

+3V
+LCDVCC

+3VLCD_CON
[6]

C580
1U/6.3V_4

[6]

PCH_DISP_ON

PCH_DPST_PW M

U12
5

PCH_DISP_ON

C578

IN

IN

ON/OFF

R363

OUT

GND

L22
TI160808U600/S

C43

*10U/6.3V_6

C40

*0.01U/16V_4

C39

0.1U/10V_4

USBP2USBP2+
PCH_DPST_PW M_R
BLON_CON

1K/F_4
22P/50V_4

+VIN_BLIGHT

G_1

G_2

G_3

G_4

G_5

L26
L25

[23] DIGITAL_D1
[23] DIGITAL_CLK

G_0

CN1

GS12407-11141-9F

IC(5P) G5243AT11U
R361
100K/F_4
R362
C577
D19
[29]
+5V

+3VS5

C142
C58
C443
C253
C570
C560

R360

C545
C352
C542
C523
C531
C534

PCH_LVDS_BLON

PCH_LVDS_BLON

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

R365

1K/F_4

D20

*RB500V-40

47K/F_4
LID_EC#

+3VPCU

+VIN

L24

*TI160808U600/S

L23

*TI160808U600/S

[28,29]
C574
0.1U/50V_6

R364
100K/F_4

+VIN_BLIGHT
C579

*4.7U/25V_8

C583

0.1U/50V_6

C584

0.01U/25V_4

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

BLON_CON

+3V
[6]

+VIN_BLIGHT

RB500V-40

LID_CONTROL

LID_CONTROL

100K/F_4
22P/50V_4

[8]

+5V

+5VS5

C564
C241
C400
C561
C563
C191

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

+3VS5
A

+5VS5

C553
C548
C351
C556
C557
C712

C193
C333
C229
C303
C516
C507

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

LCD_BK

Q30
*DTC144EUA
1

+3V

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

[6,7,8,9,10,12,13,14,18,22,23,24,25,27,28,29,30,35,37,39,41]
+3V
[7,26,27,28,29,31,32]
+3VPCU
[7,10,22,23,27,28,41]
+5V
[31,32,33,35,37,38,40,41]
+VIN
[38,41] +12VALW
[10,23,26,32,33,34,35,37,39,40,41]
+5VS5

+VIN
C725
C726
C727
C728

0.1U/25V_4
0.1U/25V_4
0.1U/25V_4
0.1U/25V_4

PROJECT :TWD (Chief River)

Quanta Computer Inc.

EMI/ESD
Stitching Cap(each 1" place one cap)

NB5

Size
Custom

Document Number

Rev
A

LCD Connector (LVDS)

Date: Monday, October 22, 2012

1

Sheet

21of

42

40 MIL
+5V

C139

22

CRT PORT

FUSE1A6V_POLY
+5VCRT
1

+5VCRT

8/24 B stage:change CRT conn PN from "DFDS15FR176"to "DFDS15FR261" for ID

0.1U/10V_4

16

40 milsF1

SSM14 spec is 40V 1A

PCH_CRT_R

L5

SBK160808T-680Y

CRT_R_CON

[6]

PCH_CRT_G

L4

SBK160808T-680Y

CRT_G_CON

[6]

PCH_CRT_B

L3

SBK160808T-680Y

CRT_B_CON

[6]
D

+5VCRT

+5V
R54
C180
6.8P/50V_4

C158
6.8P/50V_4

C121
6.8P/50V_4

C120
C160
6.8P/50V_4 6.8P/50V_4

C186
6.8P/50V_4

11
12

[6]

PCH_VSYNC

PCH_VSYNC

14
15
CRT CONN
CN12

EMI

PCH_HSYNC

PCH_HSYNC

U13
M74VHC1GT125DF2G

[6]

13

17

150/F_4

150/F_4

.1U/10V_4
5

R59

150/F_4

R63
C602

6
1
7
2
8
3
9
4
10
5

CRTVSYNC1

R390

*0_4/S

CRTVSYNC2

CRTHSYNC1

R394

*0_4/S

CRTHSYNC2

R51

*0_4/S

DDCCLK3

R402

*0_4/S

DDCDAT3

PCH_DDCCLK

+3V
[6]

R177

2.2K_4

RB500V-40
+5V_CRT2
1

R194

2.2K_4

D25
*BAV99W

D24
*BAV99W

SET

Y - port 0

Y - port 1

Disconnect

+5V

HDMI PORT

EMI Solution

+3V

8/24 B stage:change CRT conn PN from "DFHD19MR190"to "DFHD19MR280" for ID

CN15

HDMI_SDA_R 1
+3V

+3V

C_TX2_HDMI+
HDMI_SCLK

2
SDVO_DATA

D26
*BAV99W

function

Q17

[6]

D2
*BAV99W

2.2K_4

5
HDMI_SCL_R

SDVO_CLK

D3
*BAV99W

R395

2.2K_4

HDMI SMBus Isolation

D4
*BAV99W

/E
R47

+5VCRT

R156

100/F_4

C_TX2_HDMI-

C_TX1_HDMI+

R139

100/F_4

C_TX1_HDMI-

C_TX0_HDMI+

R145

100/F_4

C_TX0_HDMI-

C_IN_CLK

R131

100/F_4

C_IN_CLK#

IN_D2

C335

0.1U/10V_4

C_TX2_HDMI+

[6] IN_D2#
[6] IN_D1

IN_D2#
IN_D1

C326
C317

0.1U/10V_4
0.1U/10V_4

C_TX2_HDMIC_TX1_HDMI+

[6] IN_D1#
[6] IN_D0

IN_D1#
IN_D0

C313
C321

0.1U/10V_4
0.1U/10V_4

C_TX1_HDMIC_TX0_HDMI+

[6]
[6]

IN_D0#
IN_CLK

C318
C309

0.1U/10V_4
0.1U/10V_4

IN_CLK#
C304
RB500V-40
5V_HSMBCK
1
5V_HSMBDT
1
RB500V-40

0.1U/10V_4

[6]

HDMI_SDATA
R128

2N7002DW

*0_4/S

C_IN_CLK#
C_IN_CLK

Close to HDMI connector

C_TXC_HDMIC_TXC_HDMI+
R133

[6]
+5V

*0_4/S

IN_D2

IN_D0#
IN_CLK
IN_CLK#
D8

2
2
D7

R137
R136

C_IN_CLK

C_TX0_HDMIC_TXC_HDMI+

C_IN_CLK#

C_TXC_HDMI-

2.2K_4
2.2K_4

C305
C306

HDMI_SCLK
HDMI_SDATA

*10P/50V_4
*10P/50V_4
+5VCRT

+3V

HDMI_HPD

1
R184
C348

2
100K/F_4

510/F_4 C_TX2_HDMI+
510/F_4 C_TX2_HDMI-

R140
R138

510/F_4 C_TX1_HDMI+
510/F_4 C_TX1_HDMI-

R148
R141

510/F_4 C_TX0_HDMI+
510/F_4 C_TX0_HDMI-

R134
R129

510/F_4 C_IN_CLK
510/F_4 C_IN_CLK#

R123

C296

SHELL3
SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL2
SHELL4

22
20

21
23

HDMI CONN_4 pin GND

D6

add for EMI

220P/50V_4

+5V

1
3

Q16
2N7002K
[6]

0.1U/10V_4

HDMI_HPD_CON

HDMI_HPD_CON

Q14
MMBT3904-7-F
2 HDMI_DET_P

R126
150K/F_4
1

HDMI_HPD

R130
110K/F_4

+5VCRT

2
*BAV99W
A

B-stage change
C267
*0.01U/16V_4

R135
10K/F_4

Close to Q24

PROJECT :TWD (Chief River)

Quanta Computer Inc.

for EMI request

NB5

Size
Custom

Document Number

Rev
A

CRT/HDMI Connector

Date: Monday, October 22, 2012

5

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

HDMI_DET_C

*0_4/S

+3V

R158
R150

DGPU_CL_HDMIP

C617
*47P/50V_6
C

inputs

DDCDATA2

3
Q32
2N7002K

D23
2

D5
*BAV99W

.1U/10V_4

C95

PCH_DDCDATA

C615
*470P/50V_4

C606
*47P/50V_6

DDCCLK2

[6]

C91
*470P/50V_4

10K/F_4
2

R413

[6]
+3V

CRTVSYNC2

CRTHSYNC2

.1U/10V_4

DDCDAT3

C169
Q9
2N7002K

DDCCLK3

10K/F_4

PCH_CRT_B

R48

+3V

PCH_CRT_R

+3V

PCH_CRT_G

U14
M74VHC1GT125DF2G

Sheet

22of

42

23

+5V
+5V_AVDD
5V_AMP_PWR39

L18
*HCB1608KF-181T15/S

5V_AMP_PWR39

C529

5V_AMP_PWR46

0.1U/10V_4

+3V

+5V

C500
1U/6.3V_4

C528

C418
4.7U/6.3V_6

C457
0.1U/10V_4

C461
*0.1U/10V_4

4.7U/6.3V_6

ANALOG

DIGITAL

5V_AMP_PWR46

L17
*HCB1608KF-181T15/S

+5V_AVDD

AGND

L16

*HCB1608KF-181T15/S

+5V

+5V_AVDD
C459
0.1U/10V_4

+3V

ACZ_SDOUT_AUDIO

ACZ_SDOUT_AUDIO
[7]

[7]

R277
22_4 HD_SDIN0
ACZ_SYNC_AUDIO
C509
*10P/50V_4

[7] ACZ_SDIN0
ACZ_SYNC_AUDIO

ACZ_RST#_AUDIO

ACZ_RST#_AUDIO

C475

[21]

SDATA-IN
SYNC

11

RESET#

40
41

SPK-L+
SPK-L-

R_SPKR_SPK+

44
45

SPK-RSPK-R+

COMBOJACK

47
48

SPDIFO2/EAPD
SPDIFO

DIGITAL_CLK

DMIC_CLK_R

C481

GPIO0/DMIC-DATA

GPIO1/DMIC-CLK

*0_4/S

ALC269Q-VC2-GR

C383
1U/6.3V_4

C464
*0.1U/10V_4

C420
10U/6.3V_6

25
AVDD1

38
AVDD2

39
PVDD1

MIC1_VREF_L
MIC1-VREFO-R

31
30

MIC2-VREFO

29

VREF

27

LINE1-R
LINE1-L

24
23

MIC1-R
MIC1-L

22
21

MONO-OUT
Sense B

20
18

MIC2-R
MIC2-L

17
16

LINE2-R
LINE2-L

15
14

Sense A

13

CPVEE
JDREF
LDO_CAP

*0_4

R213

C453
1U/6.3V_4

VREFOUT_AL

R266

ALC269_VREF

EXT_MIC_R1
EXT_MIC_L1

Moat
40mils

AGND

2.2K_4

EARP_R
EARP_L
EXT_MIC_R

C517
1

2.2U/6.3V_6
2

C508

0.1U/10V_4

C527
C526

0812 De-POP Noise DEL

R321

AGND

Internal Speaker
SPK trace width
Speaker 4 ohm: 40mils

AGND

EXT_MIC_2

4.7U/6.3V_6
4.7U/6.3V_6

22K/F_4

R322

1K/F_4 EXT_MIC_R

INT SPEAKER CONN

L_SPK+
L_SPKR_SPKR_SPK+

SENSE_A R319

39.2K/F_4

L12
L13
L14
L15

C735
1000P/50V_4
C733
1000P/50V_4

C703
1000P/50V_4

L_SPK+_R
L_SPK-_R
R_SPK-_R
R_SPK+_R

TI160808U600
TI160808U600
TI160808U600
TI160808U600

1
2
3
4
CN6

C370
C734
1000P/50V_4

C349
680P/50V_4

C355
C364
680P/50V_4 680P/50V_4

680P/50V_4

SENSE_COMBO

34
19
28

*0_4/S

R259

PD#
PCBEEP

AVSS2
AVSS1

*0_4

R305

4
12

37
26

R330

HD_APD#_P4
AMP_BEEP

ALC269_CBN
C448
2.2U/6.3V_6
EARP_R1
R249
75/F_4
EARP_L1
R258
75/F_4

33
32

10P/50V_4

DVSS2
PGND
PVSS1
PVSS2

*0_4/S

ALC269_CBP

CBN

*0_4

R162

36

HP-OUT-R
HP-OUT-L

10P/50V_4

100/F_4

CBP

35

ALC269Q-VC2-GR

7
49
42
43

R239

EMI

BIT-CLK

8
10

DIGITAL_D1
R244

SDATA-OUT

L_SPK+
L_SPK3

[21]

Digital

[7]

BIT_CLK_AUDIO
C486
*10P/50V_4

BIT_CLK_AUDIO

Analog

[7]

*10P/50V_4

PVDD2

C485

DVDD-IO
DVDD1

U8

46

C434
4.7U/6.3V_6

9
1

C417
4.7U/6.3V_6

R306

20110817 Change to +5V for

ALC269Q-VC2-GR(MQFN)

*0_8/S

Moat AGND
40mils

+5V

ALC269_CPVEE

R486

AMP_BEEP 0.1U/10V_4
C504

*0.047U/25V_4

C524

10U/6.3V_6

R320

HDA_BEEP2

1U/6.3V_4

C525

SPKR

[7]

47K/F_4
100P/50V_4

C520

2.2U/6.3V_6

R286

AGND

AGND

Place the R8244 under

Codec Digital Gnd and
Analog Gnd(Bot side)

8/29 B stage: change CN5 footprint

from "50505-01841-001-18p-l " to "50505-01841-v01-18p-l"

R255
10K/F_4

R304
10K/F_4

CN5
AGND

USB_ENABLE#

HD_APD#_P4

C323
0.1U/25V_4
Q23
2N7002K

HP_VOLMUTE

R254
*4.7K_4

[29]

USBP9-_MB_R
USBP9+_MB_R
USBP11-_MB_R
USBP11+_MB_R

RP3

USBP9USBP9+

2
3

1
4

USBP9-_MB_R
USBP9+_MB_R

MCM2012B900GBE
Q22

[29]

VOLMUTE#

VOLMUTE#

+5VS5

DUAL USB CONN

RP2
[8]
[8]

USBP11USBP11+

2
3

1
4

Update Footprint(0322)
20120322,B

USBP11-_MB_R
USBP11+_MB_R

MCM2012B900GBE

2
3

ACZ_RST#_AUDIO 5

PROJECT :TWD (Chief River)

Quanta Computer Inc.

2N7002DW
[6,7,8,9,10,12,13,14,18,21,22,24,25,27,28,29,30,35,37,39,41]
+3V
[7,10,21,22,27,28,41]
+5V
[10,21,26,32,33,34,35,37,39,40,41]
+5VS5

NB5

Size
Custom

Document Number

Audio Codec (Realtek_ALC269Q-VC2-GR)

Date: Monday, October 22, 2012

A

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

COMBOJACK
EXT_MIC_R
EARP_L
EARP_R
SENSE_COMBO

AGND
USB_ENABLE#

[8]
[8]

Audio Jack type:

Normal Open or Close?
Combo Jack(IPHONE)

20K/F_4
4.7K_4

C473

C515

Sheet

23of

Rev
A
42

Atheros Lan

24

+3VLANVCC

Reserve for 100/10

C268
C690
C275
C682
C687
C292
C291
C289

AVDDL

10U/6.3V_6
10U/6.3V_6
1U/6.3V_4
0.1U/10V_4
*1000P/50V_4

AVDDL
0_4 AVDDL
AVDDL
AVDDVCO

R110

R119

*4.7K_4

R112

2.37K/F_4

RBIAS

[26]

LAN_XTAL25_IN

C265

5.6P/16V_4

LAN_XTAL1

AVDDL_REG
AVDDL
AVDDL
AVDDL
AVDDL

LED1
LED0
LED2

39
38
23

LAN_GLED#
LAN_TX#
LED2

SMCLK
SMDATA

40

ISOLATn

XTLI

C293

1U/6.3V_4

C287

0.1U/10V_4

L7
AVDDL

*PBY160808T-300Y-N/S

TP22

LX

DVDDL

C300
C299
C298

*4.7uh_C_1A
ISOLAT#

DVDDL
*PBY160808T-300Y-N

R116

30K/F_4

LDO mode:

*10U/6.3V_6
*1000P/50V_4
*0.1U/10V_4

AVDDH

C255
C264
C261

Stuff

Rb(R5208)

+3V

28
27
41

L5006

No stuff

L5004

No stuff

C5291

No stuff

C5293.

No stuff

C5294

No stuff

Ra(R5210)

No stuff

+3VLANVCC

AVDDH
DVDDL TP23

*0_4

L6
AVDDVCO

PPS

AR8161-BL3A-R

NC
TESTMODE
GND1

LAN_CLKRQ

R208

LDO mode no stuff

XTLO

PCIE_CLKREQ_LAN#

L8

LX

25
26

MDI0+
MDI0MDI1+
MDI1MDI2+
MDI2MDI3+
MDI3-

CLKREQn
RBIAS

Green Clk

11
12
14
15
17
18
20
21

AR8161-BL3A-R

10

7
C

Atheros

PERSTn
WAKEn

PCIE_WAKE#
LAN_CLKRQ

[8]

TRXP0
TRXN0
TRXP1
TRXN1
TRXP2
TRXN2
TRXP3
TRXN3

R204
4.7K_4

Q20
2N7002K

GND
GND
GND
GND
GND
GND
GND
GND
GND

2
3

+3V

42
43
44
45
46
47
48
49
50

PLTRST#
PCIE_WAKE#_R

*4.7K_4

AVDD33
AVDDH
AVDDH_REG

R120

DVDDL_REG
PPS

[6,27]

+3VLANVCC
PLTRST#
+3VLANVCC

0.1U/10V_4
0.1U/10V_4

REFCLKP
REFCLKN
TX_P
TX_N
RX_P
RX_N

16
22
9

[2,8,14,25,27,29,30]

C274
C269

33
32
30
29
35
36

37
24

[8] CLK_PCIE_LANP
[8] CLK_PCIE_LANN
[8] PCIE_RXP2_LAN
[8] PCIE_RXN2_LAN
[8] PCIE_TXP2_LAN
[8] PCIE_TXN2_LAN

VDD33

U4
CLK_PCIE_LAN_L
CLK_PCIE_LAN#_L
PCIE_RXP2_LAN_L
PCIE_RXN2_LAN_L

+3VLANVCC

6
13
19
31
34

1U/6.3V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
*1U/6.3V_4
*4.7U/6.3V_6

Close to pin1
C295
C294
C279
C278
C277

1U/6.3V_4
0.1U/10V_4
0.1U/10V_4

+3VLANVCC

R107
4.7K_4

R467
*4.7K_4

Ra

R114
*4.7K_4

R466
4.7K_4

Rb

+3VLANVCC
LAN_GLED#
LAN_TX#

C688
1U/6.3V_4

C689
0.1U/10V_4

C696

C262

1000P/50V_4

1000P/50V_4

8/24 B stage:change RJ45 conn PN from "DFTJ12FR202" to "DFTJ12FR288" for ID

+3VLANVCC

CN14

R
E
M
R
O
F
S
N
A
R
T

LAN_TX#

R115
C263

U17
MDI0+
MDI0MDI1+
MDI1MDI2+
MDI2MDI3+
MDI3-

C224
C231
C228
C235
C222
C240
C242
C230
C236

*1U/6.3V_4
*1000P/50V_4
0.1U/10V_4
*1000P/50V_4
0.1U/10V_4
*1000P/50V_4
0.1U/10V_4
*1000P/50V_4
0.1U/10V_4

TRA_V_DAC
TRA_V_DAC
TRA_V_DAC
TRA_V_DAC

2
3
5
6
8
9
11
12
1
4
7
10

TD1+
TD1TD2+
TD2TD3+
TD3TD4+
TD4TCT1
TCT2
TCT3
TCT4

MX1+
MX1MX2+
MX2MX3+
MX3MX4+
MX4MCT1
MCT2
MCT3
MCT4

LAN_MX0+
LAN_MX0LAN_MX1+
LAN_MX1LAN_MX2+
LAN_MX2LAN_MX3+
LAN_MX3-

23
22
20
19
17
16
14
13

LAN_MCTG3
LAN_MCTG2
LAN_MCTG1
LAN_MCTG0

24
21
18
15

C245

*0.01U/100V_06

C238

*0.01U/100V_06

C232

*0.01U/100V_06

C227

*0.01U/100V_06

R97
R101
R102
R104

330/F_4

LED_AMB_N

C214
LAN_GLED#
LAN_MCTG

C686

R88

RJ45_CONN

LED_AMB_P A1
LED_AMB_N A2

1000P/50V_4
LAN_MX3LAN_MX3+
LAN_MX1LAN_MX2LAN_MX2+
LAN_MX1+
LAN_MX0LAN_MX0+

75/F_4
75/F_4
75/F_4
75/F_4

9
10
8
7
6
5
4
3
2
1

RX1RX1+
RX0TX1TX1+
RX0+
TX0TX0+

GND1

14

GND

13

1000P/50V_4
330/F_4

LED_GRE_N

10P/3KV_1808

11
12

LED_GRE_P B1
LED_GRE_N B2
A

NS892407

FCE:NS892407,DB0LL1LAN00

PROJECT :TWD (Chief River)

Quanta Computer Inc.

BOT:GST5009B LF,DB0Z06LAN00
NB5

Size
Custom

Document Number

LAN Controller (Atheros_AR8161)

Date: Monday, October 22, 2012

5

Sheet
1

24 of

Rev
A
42

C478

AV12

3V3_IN

15
R214
6.2k/F_4

C423
0.1U/10V_4

EMI Solution
Please help to close to connector
20
18
17
16
14
13
11

SP7
SP6
SP5
SP4
SP3
SP2
DV12_S

SD_WP
SP6_R R261
SP5_R R251
SP4_R R243
SP3_R R238
SP2_R R229
DV12_S
C433
0.1U/10V_4

EMI solution
0_4
0_4
0_4
0_4
0_4

SD_D2
SD_D3 C484
SD_CMD
SD_CLK C471
SD_D0

SD_CMD

SD_D0

SD_D1

SD_D2

SD_D3

C489
*5.6P/16V_4

C488
*5.6P/16V_4

C499
*5.6P/16V_4

C498
*5.6P/16V_4

R230

C497
*5.6P/16V_4

*10P/50V_4

14" ONLY
Place close to
Connector +3VCARD

SD_D2
SD_D3
SD_CMD
SD_CD#

10/22 C stage:change R230 footprint form

"short0402" to "RC0402"
10K/F_4

C490
*5.6P/16V_4

C444
4.7U/6.3V_6

0_4 SD_D1

R260

SD_CLK

*10P/50V_4

Close to chip pin

SP1_R

GPIO

8
RREF

RTS5229-GR

Share Pin

SD_CD#
MS_INS#
SP1

RTS5229

PERST#
CLKREQ#

C419
4.7U/6.3V_6

DV33_18

10

25

HSOP
HSON

23
24

[2,8,14,24,27,29,30]
PLTRST#
[8] PCIE_CLKREQ_CR#

CARD_3V3

GND

5
6

C422
0.1U/10V_4

21
22
12

0.1U/10V_4 PCIE_RXP3_CR_R
0.1U/10V_4 PCIE_RXN3_CR_R

REFCLKP
REFCLKN

19

C477
C470

PCIE_RXP3_CR
PCIE_RXN3_CR

3
4

C413
10U/6.3VS_6

SD_CD#

[8]
[8]

CLK_PCIE_CRP
CLK_PCIE_CRN

HSIP
HSIN

RREF

[8]
[8]

1
2

PCIE_TXP3_CR
PCIE_TXN3_CR

AV12

[8]
[8]

25

+3V

1U/6.3V_4

U7
4

DV33_18

+3VCARD

+3VCARD

SD_CLK

+3V
C496
10U/6.3VS_6

SD_D0
SD_D1
SD_WP

C495
0.1U/10V_4

SD / MMC
CARDCN8READER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

DAT2
DAT3
CMD
C/D
VSS1
VDD
CLK
VSS2
DAT0
DAT1
W/P
GND
GND
GND
GND

*CARDREADER CONN

H10

CPU Bracket

H7
*H-C315I158D118P2

H3
*H-C315I158D118P2

H2
*H-C315I158D118P2

*H-C315D315N

H6

H11

1
2

15" ONLY

*h-tsbsd118p2

20120614: Co-layer for 15" panel of JW3

SD_D2
SD_D3
SD_CMD
SD_CD#

*INTEL-CPU-BKT3
H8
*H-C236I190D150P2

H5
*H-C236I190D150P2

H13
MBUL1001010

H14
MBUL1001010
+3VCARD

SD_CLK
SD_D0
SD_D1
SD_WP

H17
*H-C315I158D118P2

H16
*O-JW3-3

DAT2
DAT3
CMD
C/D
VSS1
VDD
CLK
VSS2
DAT0
DAT1
W/P
GND
GND
GND
GND

CARDREADER CONN

PAD1
*SPAD-RE177X206NP

H4
*O-JW6-1

CN19

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

H12
MBJW6001010

H15
MBJW6001010

H9

H1
*H-C98D98N

*H-C315D315N

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Card Reader control (RTS5229-GR)

Date: Monday, October 22, 2012

A

Sheet
E

25 of

Rev
A
42

[29]

MY[0..15]

[29]

MX[0..7]

9/3 B stage:change R308 value form "330" to "360" for safety issue.

MX[0..7]

20mils width(min)
+3VPCU

RP6

10
9
8
7
6

MY4
MY5
MY6
MY7

MY3
MY2
MY1
MY0

1
2
3
4
5
10P8R-8.2K

RP7

10
9
8
7
6

MY12
MY13
MY14
MY15

MY11
MY10
MY9
MY8

1
2
3
4
5

220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4

MX4
MX6
MX3
MX2

C27
C24
C28
C29

220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4

MY5
MY6
MY3
MY7

C20
C19
C22
C18

220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4

MY8
MY9
MY10
MY11

C17
C16
C15
C14

220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4

MX7
MX0
MX5
MX1

C23
C33
C26
C32

220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4

MY12
MY13
MY14
MY15

C13
C12
C11
C10

220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4

+3V_RTC_0,+3V_RTC_R,+3V_RTC..
+3VLANVCC

6906-25

[24]
[8]
[7]
[30]

R331

LAN_XTAL25_IN
PCH_XTAL25_IN
CLKGEN_RTC_X1
CLKGEN_TPM_XIN
C537

+3VLANVCC
+1.05V
+3VS5

C549
R525

33_4

CLKGEN_RTC_X1
CLKGEN_TPM_XIN

25M_A 6
5
9
12

0.1U/10V_4

8
3
11

0.1U/10V_4

GEN_XTAL25_IN 16
GEN_XTAL25_OUT 1

*0_4

For 3NB246 stuff R525

C522

0.1U/10V_4

+V3.3A
VDD
VBAT

15
2
10

VDD_RTC_OUT
VDDIO_25M_A
VDDIO_25M_B
GND
VDDIO_32K_B
GND
GND
XTAL_IN
THEMPAD
XTAL_OUT

14

+3V_RTC

7
13
4
17

C521
2.2U/6.3V_6

25M_A
25M_B
32K_A
32K_B

+3V_RTC_R R308

360/F_4

C518

22U/6.3VS_6

SLG3NB244VTR
20120321,B
8/27 B stage:change C540 value form "15p" to "12p" for RTC issue.
vendor recommend C540 use 12p
C540
GEN_XTAL25_OUT
12P/50V_4

C554

10P/50V_4

LAN_XTAL25_IN

C550

*10P/50V_4

PCH_XTAL25_IN

EMI

25MHZ +-10PPM
C535

FOR TPM option

GEN_XTAL25_IN

TPM

15P/50V_4

R525

U5

Charger USB

+3V_RTC_0

U9

Y1

27

10P8R-8.2K

25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

C30
C25
C21
C31

2
1

MX0
MX1
MY0
MY1
MX2
MX3
MX4
MX5
MY2
MX6
MX7
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY2

+3VPCU

MY1
MY2
MY4
MY0

3
4

Green CLK Circuitry

CN2

26

Keyboard Connector

26

MY[0..15]

+5VS5

Non-TPM

Stuff
AL3NB246000

NA

AL3NB244000

USB3.0 X 1/USB2.0 COMBO

default: Auto-detect
high active

USB_CHR_C1
USB_CHR_C2
USB_CHR_C3

C462
C447
C430

*0_4/S

USBP0-_C
USBP0+_C
[8]
[8]

220P/50V_4
220P/50V_4
220P/50V_4

USBP0USBP0+

5
6
7
8
11
10
2
3

USBP0-_C
USBP0+_C

To Host

1
+5VSUS_USBP0
12
14
STATUS
9
TP26
17
20K/F_4
16 ILIM_HI R231
ILIM_LO
R226
*80.6K/F_4
15
0_4
4 ILIM_SELR247
R248
*4.7K_4 +5VS5
13
FAULT
TP27
TPS2540ARTER

EN
CTL1
CTL2
CTL3
DM_IN
DP_IN
DM_OUT
DP_OUT

IN
OUT
GND
STATUS
PADGND
ILIM_HI
ILIMI_LO
ILIM_SEL
FAULT

CN17
USB3.0 CONN

RP4

+5VSUS_USBP0

*4.7K_4

1
4

+5VSUS_USBP0
USBP0-_R
USBP0+_R

2
3
MCM2012B900GBE

C412

C440

470P/50V_4

USB30_RX1USB30_RX1+

C698
USB30_TX1-_C
USB30_TX1+_C

+
0.1U/10V_4
100U/6.3V_1206

1
2
3
4
5
6
7
8
9

1
2
3
4
5
6
7
8
9

VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+

13
12
11
10

[29]
[29]
[29]

USB 3.0

U6
R242

Charger_ON

C483
*4.7U/6.3V_6

[8]
[8]

USB30_RX1USB30_RX1+

[8]
[8]

USB30_TX1USB30_TX1+

13
12
11
10

+5VS5
[29]

R233

C479
0.1U/10V_4

200mills

Ios = 48000/RILIM0

EMI
C390
C376

0.1U/10V_4
0.1U/10V_4

TPS2543/45 Control Truth Table

ILIM_SEL

Charging
Mode
Discharge

DCP/auto

Current Limit
Setting
NA

TPS2543 STATUS
Output (active low)
off

IOS_PW &
ILIM_HI (1)

DCP load present

SDP

ILIM_HI

off

DCP/auto

ILIM_HI

DCP load present

SDP

ILIM_HI

off

CDP

ILIM_HI

CDP load present

D10
*SP3010-04UTG

USBP0-_R
C406

USBP0+_R
C389

*Clamp-Diode

USB30_RX1+

9
2

7
4

USB30_TX1-_C

USB30_RX1-

10
1

6
5

USB30_TX1+_C

*Clamp-Diode

[10,21,23,32,33,34,35,37,39,40,41]
[7,21,27,28,29,31,32]

+5VS5
+3VPCU

CTL1 CTL2 CTL3

(1) ILIM_HI: 20K(R5233), 2.4A

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Rev
A

USB 3.0/KB/Green CLK

Date: Monday, October 22, 2012

1

Sheet

26of

42

+1.5V_CPU

+1.5V_CPU

INT_BT_OFF#
[8]

[8]

CLK_33M_DEBUG

[8] PCIE_TXP1
[8] PCIE_TXN1
[8] PCIE_RXP1
[8] PCIE_RXN1
[8] CLK_PCIE_WLANP
[8] CLK_PCIE_WLANN
PCIE_CLKREQ_WLAN#

C36
0.1U/10V_4

C35
0.1U/10V_4

27

C45
10U/6.3VS_6

+1.5V
+1.5V
+1.5V
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PETp0
PETn0
PERp0
PERn0
REFCLK+
REFCLKCLKREQ#
BT_CHCLK
BT_DATA
WAKE#
Reserved
Reserved
GND
GND
GND
GND
GND

52
2
24
41
39
44
46
42
38
36
32
30
22
20
16
14
12
10
8
50
40
34
26
18
4
9

+3.3V
+3.3V
+3.3Vaux
Reserved
Reserved
LED_WLAN#
LED_WPAN#
LED_WWAN#
USB_D+
USB_DSMB_DATA
SMB_CLK
PERST#
W_DISABLE#
Reserved
Reserved
Reserved
Reserved
Reserved
GND
GND
GND
GND
GND
GND
GND

+3VS5
R17
WLAN_LED#

R21

0_4

R18
D1

2
LAD0 [7,29,30]
LAD1 [7,29,30]
LAD2 [7,29,30]
LAD3 [7,29,30]
LFRAME# [7,29,30]

LAD0
LAD1
LAD2
LAD3
LFRAME#

[29]

[8]
[8]
10K/F_4

WLANE_PLTRST#

+3V_WLAN_P

20120309 nonstuff
R9
*0_8

Add +3VS5, 20120105

RF_LINK#

USBP10+
USBP10-

+3V

4.7K_4 +3V_WLAN_P

C3

10U/6.3VS_6

C47

0.1U/10V_4

C6

0.1U/10V_4

C46

0.1U/10V_4

+3V_WLAN_P

1 RB500V-40

RF_OFF#

R1
100K/F_4

[9]

ME2303T1
Q3

R523

Ra
[9]
[29]

RF_PWR_OFF#

RF_PWR_OFF#

RF_PWR_ON

R8

*0_4

R2

*0_4/S

R14
*100K/F_4
C724
0.1U/10V_4

Q1
DTC144EUA

Rb

AAA-PCI-049-P01_A

100K/F_4

20120308 stuff
+3V_WLAN_P

PIN7

minicard-110021-52131-52p-ruv
3

R12

Support Wake Function(Reserve)

Mini Card Reset

*10K/F_4

REQ_WLAN# 1
+3V

[29]

R339

AOAC_PCIE_WAKE#

*0_4

R351

20120309 stuff

+3V_WLAN_P

R11

*100/F_4 WLAN_RST_OUT 4

PLTRST#

1
C1
*0.1U/10V_4

*0_4/S

AOAC_MINICARD_PME#

PIN44

+3V_WLAN_P
PLTRST#

WLANE_PLTRST#

20120308 stuff
1 MINICAR_PME#
Q4
*DTC144EUA

PCIE_WAKE#

PLTRST#

10K/F_4

2
[6,24]

0_4

R10

PCIE_CLKREQ_WLAN#

Q2
*2N7002K

Avoid leakage issue

+3V_WLAN_P

R15

[29]

R38
R37

+5V
EC_DEBUG1

C4
0.1U/10V_4

C48
10U/6.3VS_6

6
28
48
*0_6
INT_BT_OFF#
51
*0_4
49
47
R23
*0_4
45
19
PLTRST# 17
33
31
25
23
13
11
R13
0_4 REQ_WLAN# 7
5
TP2
3
MINICAR_PME#
1
43
37
35
29
27
21
15

C7
0.1U/10V_4

H=4.0

CN11
Intel DG request

EC debug pin

C38
0.01U/16V_4

+3V_WLAN_P

Mini Card
WLAN/BT(Option)

+3V_WLAN_P

[2,8,14,24,25,29,30]

WLAN_LED# 1
Q5

U2
*MC74VHC1G08DFT2G

3 RF_LINK#
*2N7002K

LGE mini-pcie power status

WLAN
Bluetooth +3V_WLAN_P

[29]

20120309 stuff

For EMI Suggestion

CLK_33M_DEBUG
R19

Add for AOAC

C34
*0_4

*33P/50V_4

Radio-ON

Radio-ON

Power-ON

Radio-ON

Radio-OFF

Power-ON

Radio-OFF

Radio-ON

Power-ON

Radio-OFF

Radio-OFF

Power-OFF

LED Status
+3V_WLAN_P

(White)

PIN19,51

LED1
R354

MBATLED0#

*150_6

R28
10K/F_4

+3VPCU

3
1

220P/50V_4
220P/50V_4

LED 3P WHITE/AMBER

(Orange)

INT_BT_OFF#

LG

EMI
[29]

PWR_LED#

[7,27]
20120321 Add

20120321 Add

[27,29]
[7,27]

Q6

R524

49.9/F_6

C739

220P/50V_4
R526

SATA_LED#

*0_6

R527

BATLOW#

R350

*0_4

RF_LED# 1

3
3

*150_6

R529

20120321 Add
49.9/F_6
+3VPCU

INT_BT_COMBO_EN#

2
DTC144EUA

+3V

R39

[6,7,8,9,10,12,13,14,18,21,22,23,24,25,28,29,30,35,37,39,41]
+3V
[7,10,21,22,23,28,41]
+5V
[7,21,26,28,29,31,32]
+3VPCU
[2,4,10,28]
+1.5V_CPU

*0_4

(White)
2RFON_R_LED1

R357

49.9/F_6

9/4 Intel COMBO card control circuit

1.add R1001,R1002,Q1001
2.add net name"INT_BT_COMBO_EN#" -> "INT_BT_OFF#"

+3V

3P WHITE LED
Q29
*DTC144EUA

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Q28
*ME2303T1

CB
2

+3V_WLAN_P

*10K/F_4
1

R356

INT_BT_COMBO_EN#

*0_6/S
LED3

R341

SATA_R_LED1

2
3P WHITE LED

RF_LINK#

[8]

(White)

*0_6/S

R528

SATA_LED#

LED2

C565
C566

R355
*39_6

BATLOW#

[29]
[27,29]

RF_LINK#

NB5

Size
Custom

Document Number

Rev
A

MINI-PCIE/LED

Date: Monday, October 22, 2012

A

Sheet
E

27 of

42

Left side

Power Botton Connector

For CB
C148

[21,28,29]
[28,29]

Pin1 : +3VPCU(LIDSWITCH PWR)

Pin2 : POWER LED
Pin3 : LIDSWITCH
Pin4 : GND
Pin5 : GND
Pin6 : POWERON#

Right side

Power Botton Connector(2)

For LG

20120326,B

CN3

0.1U/10V_4

+3VPCU
+3V
LID_EC#

C732

1
2
3
4
5
6

NBSWON1#

[28,29]

C146

C145

NBSWON1#

LG:

C729
220P/50V_4

C730

C731

220P/50V_4

220P/50V_4

Main HDD

SATA_TXP0_D C716
SATA_TXN0_D C715

0.01U/16V_4
0.01U/16V_4

SATA_RXN0_D C714
SATA_RXP0_D C713

0.01U/16V_4
0.01U/16V_4

[7]
[7]

SATA_RXN0
SATA_RXP0

[7]
[7]

Update Footprint(0321)
20120321,B

LG

TPCLK L29
TPDATA L30
20120326 Stuff

[8,12,13] SMB_RUN_DAT
[8,12,13] SMB_RUN_CLK
[8] SMB_INT#
[8] SMB_PCH_DAT
[8] SMB_PCH_CLK

[29]

C571

10U/6.3VS_6

C572

0.1U/10V_4

15
2
3
46

FAN1_PWM
FAN1SIG

C157

0.1U/10V_4

C156

0.1U/10V_4

R530
R531

*0_4
*0_4
10P/50V_4

C622

10P/50V_4

TPDATA

R411

4.7K_4

TPCLK

20120326,B
TP_L

5
6

TPCLK-1
TPDATA-1
TP_SMB_RUN_DAT
TP_SMB_RUN_CLK

C620

4.7K_4

1
2
5

SBK160808T-680Y-N
SBK160808T-680Y-N
*0_4/S
*0_4/S

R416

SW2
3
4
6

25 mils

R420
R419

+3V_5V_TP

+3V_5V_TP
*TOUCH PAD CONN
TPDATA-1
TPCLK-1
TP_R
TP_L

SW1
3
4
6

1
2
5

*TME-533B-Q-T/R

1
2
3
4
5
6
7
8
CN4
TOUCH PAD CONN
DFFC08FR056
50505-00841-001-8p-l

Update Footprint(0322)
20120322,B

1
2
3
4
5
6
TPC9

For LG

20120326 modify
3

Mini PCI-E Card 2- Full size

MINISATA

FAN Connect
+3V

DFHD04MR155

+5V

Update Footprint(0307)
20120307,B

C717

*10U/6.3V_6

C720

*10U/6.3VS_6

FAN1_PWM C585

220P/50V_4

C721

4.7U/6.3V_6

FAN1SIG

220P/50V_4

C719

0.1U/10V_4

+1.5V_CPU
C586

CN16

+5V: 2 A(4 Pin)

+3V: 2 A(4 Pin)

Place Cap close to

conn within 100mils

19

Gnd : (5 Pin)
[7]
[7]

SATA_TXP1
SATA_TXN1

C692
C693

0.01U/16V_4
0.01U/16V_4

SATA_TXP1_D
SATA_TXN1_D

[7]
[7]

SATA_RXN1
SATA_RXP1

C301
C302

0.01U/16V_4
0.01U/16V_4

SATA_RXN1_D
SATA_RXP1_D

+3V

SATA ODD Connector

+5V

*0_6

20120509,MV

FAN1

+3V

DFHS13FS019
sata-ah534-00-13p-r

120 mils

R533

+5V

*TME-533B-Q-T/R

[29]

SATA HDD(1ST)
2

SATA_TXP0
SATA_TXN0

0_6

28

+3V_5V_TP

20120326,B
R532

+5V

Bypass CAP close conn

+5V

+3V

CB

[29] TPCLK
[29] TPDATA

TP_R

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

CPU FAN

SATA HDD Connector(Cable type)

CN18

R533

8/24 B stage:del CN3/C145/C146, add CN20/C729~C732 for change power conn location (machine ID)

R532

POWER BTN CONN

Update Footprint(0321)
20120321,B

220P/50V_4 *220P/50V_4 *220P/50V_4

CB:

1
2
3
4
5
6

*POWER BTN CONN

C147

Touch Pad Connector

CN20

0.1U/10V_4

+3VPCU
+3V
LID_EC#

[21,28,29]

Pin1 : +3VPCU(LIDSWITCH PWR)

Pin2 : POWER LED
Pin3 : LIDSWITCH
Pin4 : GND
Pin5 : GND
Pin6 : POWERON#

CN13
C633

10U/6.3VS_6

C618

0.1U/10V_4

C619

0.1U/10V_4

C623

0.1U/10V_4

C621

0.1U/10V_4

[7]
[7]
[7]
[7]

SATA_TXP2
SATA_TXN2
SATA_RXN2
SATA_RXP2
+5V

C226
C225

0.01U/16V_4
0.01U/16V_4

SATA_TXP2_D
SATA_TXN2_D

2
3

C218
C216

0.01U/16V_4 SATA_RXN2_D
0.01U/16V_4 SATA_RXP2_D
1
2
R90
1K/F_4

5
6
8
9
10
11
1
4
7
12
13

TXP
TXN
RXN
RXP
DP
+5V
+5V
MD
GND1
GND2
GND3
GND
GND

C695

4.7U/6.3V_6

C290

0.1U/10V_4

C694

0.1U/10V_4

C311

0.1U/10V_4

C310

*4.7U/6.3V_6

C288

4.7U/6.3V_6

S1

14

14

16

16

H=4.0

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

Presence Detection
DA/DSS
Vendor Specific
Vendor Specific
Reserved
+3.3 V
+3.3 V
GND
GND
SATA TX+
SATA TXGND
GND
SATA RXSATA RX+
GND
Reserved
Reserved

15
13
11
9
7
5
3
1

GND
Reserved
Reserved
GND
Reserved
Reserved
Reserved
Reserved

+3.3V
GND
+1.5V
Reserved
Reserved
Reserved
GND
Reserved
Reserved
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3 V
Reserved
Reserved
GND

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

MINI SATA H=4.0

minicard-110021-52131-52p-ruv

S7
P1

17

17

15

15

+1.5V_CPU

P6
SATA ODD

C312
0.01U/16V_4

[6,7,8,9,10,12,13,14,18,21,22,23,24,25,27,29,30,35,37,39,41]
+3V
[7,10,21,22,23,27,41]
+5V
[7,21,26,27,29,31,32]
+3VPCU
[2,4,10,27]
+1.5V_CPU
[38,41] +12VALW

C308
*0.1U/10V_4

PROJECT :TWD (Chief River)

Quanta Computer Inc.

C307
*4.7U/6.3V_6

NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

A

Rev
A

SATA HDD/ODD/MSATA CONN

Sheet
E

28 of

42

Select Pin
Rb

+3V_ECACC

L21
C555
1U/6.3V_4

C558
1000P/50V_4

Vpro

Ra

Non-Vpro

Rb

IT8502_AGND
L19

Rb

[28] TPDATA
[28] TPCLK

TPDATA
TPCLK
CB/LG

[17,37]

[7]

ACZ_SDOUT

[27] EC_DEBUG1
[23] USB_ENABLE#

DGPU_PROCHOT#
[26] USB_CHR_C3
[32,33,34,35,36] HWPG
[21] LID_CONTROL
[27] RF_PWR_ON
1
2
D12
RB500V-40 EMI
R274
*0_4

EC_SCK

R487

C709
33P/50V_4

+3VPCU

47_4

EMI

EC_FSCK
EC_SO
EC_SI
EC_CE#

EMI
B

[26]

MY[0..15]

R326
470K_4
EC_WRST
C543
0.1U/10V_4

[26]

MX[0..7]

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

20110818 RTC XTAL DEL

86
85
90
89

GPC0
TMA0/GPB2

PS2DAT2/WUI21/GPF5
PS2CLK2/WUI20/GPF4
DAC4/DCD0#/GPJ4
DSR0#/GPG6
GINT/CTS0#/GPD5
PS2DAT1/RTS0#/GPF3
DAC5/RIG0#/GPJ5
PS2CLK1/DTR0#/GPF2
RXD/SIN0/GPB0
TXD/SOUT0/GPB1

106
105

GPG0
FSCK

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
58
59
60
61
62
63
64
65
128
2

IT8518E/HX

82

EC_PM_SLP_A#

KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5

56
57

L80HLAT/BAO/WUI24/GPE0
L80LLAT/WUI7/GPE7

19
20

UART

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/SSCK/GPA6
PWM7/GPA7

PWM

TACH0/GPD6
TACH1/TMA1/GPD7

VRON

LG

Ra

CB

Rb

[2,39]

R328

H_PROCHOT#

SUSON
TP37

MBATLED0
R278
R279
R282

*0_4/S
*0_4/S
*0_4/S

Num LK
AC_PRESENT

R359 10K/F_4

120
124

125
18
21

WUI5/GPE5
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7

35
112

A/D D/A

ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/WUI28/GPI4
ADC5/WUI29/GPI5
ADC6/WUI30/GPI6
ADC7/WUI31/GPI7

66
67
68
69
70
71
72
73

CLOCK

2
6

BATLOW#

*0_4/S
*0_4

PCH_SPI_CS1#
PCH_SPI_CS0#

[7]
[7]

R270
10K/F_4

LAN_POWER [41]
TP39
TP41
TP42
FAN1_PWM [28]
SUS_PWR_ACK [6]
VOLMUTE# [23]
USB_CHR_C2 [26]
+3V
FAN1SIG [28]
TP43
SUSC#
S5_ON

[6]
[32]

NBSWON1#

[27]

PWR_LED

GPI0
GFX_HWPG_EC

MBATLED0#

2N7002DW

thermal shutdown circuit

EC_WRST

0815 DEL PC_BEEP_EC

+3VPCU

MBCLK
MBDATA

R223
R241

TPCLK
TPDATA
MBCLK2
MBDATA2

10K/F_4
10K/F_4

R323
R317
R265
R273

R338
10K/F_4
Q25
2 OVT_DETC
*MMBT3904-7-F
SYS_SHDN-1#

*10K/F_4
*10K/F_4
10K/F_4
10K/F_4
3
Q24

[6]

R347

*10K/F_4 GPI0

R346

Platfrom

10K/F_4

+3VPCU

1DGPU_OVT#
*RB500V-40

2
D14

R327
4.7K_4
C541

DGPU_OVT#

[17]

+1.05V

*220P/50V_4

PM_THRMTRIP#

[2,9]

MMBT3904-7-F

Vender

Size

P/N

EON

4MB

AKE39ZN0Q02 (EN25Q32B-104HIP)

AMIC

4MB

AKE39F-0800 (A25LQ32AM-F/Q)
DFHS08FS023

Socket

ADC

+3V

1 EC_PWROK
*RB500V-40

2
D13

TP38

SETVPRO
USB_CHR_C1

76
77
VFAN
78
79 D15

C737
220P/50V_4
MBATLED0 2

LAN_S5_WAKE#

TP40
SYS_I [31]
AD_AIR [31]
TEMP_MBAT [31]

PWR_LED#

[27]

2011 12 01 :Add USB_CHR_C2

NBSWON1# [28]
LID_EC# [21,28]
ACIN [31]
SUSB#

Q27

C736
220P/50V_4
PWR_LED 5

C512
0.1U/10V_4

RB500V-40
R336

USB_CHR_C1

JW6/7

0V

Reserve

0.75V

TP36
DNBSWON#

[6]

10K/F_4

+3VS5

Reserve

1.5V

Reserve

2.25V

JW3

3V

+3VPCU

Socket: DG008000031
EC_CE#
EC_SCK R349
EC_SI R353
EC_SO R344

[26]

+3VPCU

0_4
47_4
15_4
R352

U11

1
EC_SCK_R 6
EC_SI_R
5
EC_SO_R
2
10K/F_4

CE#
SCK
SI
SO

VDD
HOLD#

WP#

VSS

8
7R345
4

10K/F_4
C559
0.1U/10V_4

A25LQ32AM-F/Q

PROJECT :TWD (Chief River)

Quanta Computer Inc.

C551
0.1U/10V_4

NB5

IT8502_AGND

Size
Custom

Document Number

Embedded Controller (ITE_IT8518)

Date: Monday, October 22, 2012

4

+3VPCU
R301
R300

*BLM18BA470SN1D/S

2N7002DW

PCH_SPI_SI [7]
PCH_SPI_SO [7]
PCH_SPI_CLK [7]

9/15 Modify for EC

DAC0/GPJ0
DAC1/GPJ1
DAC2/GPJ2
DAC3/GPJ3

[33]

MAINON [31,33,35,36,41]
RF_LINK# [27]
CLKRUN# [6,30]

47
48

PWRSW/GPE4
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1

WAKE UP

H_PROCHOT#_Q
BATLOW

[27]

EC_CT_UP

KBMX

EC_PWROK [6]
BATSHIP [31]
PM_SLP_LAN#

C569
0.1U/10V_4

Q26

H_PROCHOT#_EC

[39]

TP35

2011 11 30 : Delete net"Cap_int" for non-Capacity function

EC_PECI_R
R269
43_4
117
H_PECI [2]
118
AOAC_PCIE_WAKE# [27]
MBCLK
110
MBCLK [30,31]
MBDATA
111
For
Battery
charge
MBDATA [30,31]
MBCLK2
115
MBCLK2 [8,17,30]
MBDATA2
116
MBDATA2 [8,17,30] For PCH SMB/DDR Thermal IC/VGA and Cap board

24
25
28
29
30
31
32
34

*0_4/S

+3V

IT8502_AGND
L20

107
99
98
97
96
95
94
93

C567
0.1U/10V_4

*10K/F_4

NBSWON1#

SMCLK2/WUI22/GPF6/PECI
SMDAT2/WUI23/GPF7
SMCLK0/GPB3
SMDAT0/GPB4
SM_BUS
SMCLK1/GPC1
SMDAT1/GPC2

PS/2

C536
0.1U/10V_4

R342 100K/F_4

127
VSTBY

3
74
VBAT
AVCC

EGAD/WUI25/GPE1

TMR0/WUI2/GPC4
TMR1/WUI3/GPC6

KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7
CK32K
CK32KE

BATLOW

SBUSY/GPG1/ID7
HMOSIGPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
HSCE#/WUI19/GPH3/ID3
CTX1/WUI18/GPH2/SMDAT3/ID2
CRX1/WUI17/GPH1/SMCLK3/ID1
CLKRUN#/WUI16/GPH0/ID0

FLASH

FMISO
FMOSI
FSCE#
SSCE0#/GPG2

R333

IT8518E/HX

80
104
33
88
81
87
108
109

103
102
101
100

84
83

GPIO

PS2DAT0/TMB1/GPF1
PS2CLK0/TMB0/GPF0

C505
0.1U/10V_4

+3VPCU

Ra

10K/F_4 CB/LG

Charger_ON

H_PROCHOT#_EC
Charger_ON

GA20/GPB5
SERIRQ
ECSMI#/GPD4
ECSCI#/GPD3
WRST#
KBRST#/GPB6
PWUREQ#/BBO/GPC7

C562
0.1U/10V_4

2011 12 05 : Change to CX8BA121000

EGCLK/WUI27/GPE3
EGCS#/WUI26/GPE2

VCORE

[26]

119
123

[31] D/C#
RSMRST#

[6]

C503
0.1U/10V_4

CB/LG Select

12

[9] EC_RCIN#
AOAC_MINICARD_PME#

126
5
15
23
14
4
16

AVSS

RB500V-40
RB500V-40
EC_WRST

LPC

VSS
VSS
VSS
VSS
VSS

[27]

D16
D17

LPCPD#/WUI6/GPE6

VSS

[9] EC_A20GATE
[7,30] SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#

17

[9]
[9]

SLP_S5

LAD0
LAD1
LAD2
LAD3
LPCRST#/WUI4/GPD2
LPCCLK
LFRAME#

27
49
91
113
122

[6]

10
9
8
7
22
13
6

75

U10

[7,27,30] LAD0
[7,27,30] LAD1
[7,27,30] LAD2
[7,27,30] LAD3
[2,8,14,24,25,27,30]
PLTRST#
[8] CLK_33M_KBC
[7,27,30] LFRAME#

VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

EMI

C519
0.1U/10V_4
11
26
50
92
114
121

*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4

12 MILS

Select Pin

*HCB1608KF-181T15/S
+3VPCU

0.1U/10V_4

Layout Note:
Place all capacitors close to IT8502N.

+3VPCU

Vpro Select

*HCB1608KF-181T15/S +3VPCU

R334

C546
C544
C539
C538
C568

*10K/F_4

+3VPCU
IT8502_AGND
+3v_STBY

C552

10K/F_4 SETVPRO R343

+3V

29

+3VPCU

Ra

R340

20110818
RTC XTAL DEL

Sheet

29of

Rev
A
42

TPM (1.2)

+3VS5

+3V

+3V_VDD

30

U1

[7,29]

SERIRQ

LAD0
LAD1
LAD2
LAD3
LCLK

LFRAME#
PLTRST#
LPCPD#_TPM
SERIRQ

22
16
28
27

LFRAME#
LRESET#
LPCPD#
SERIRQ

R5

+3V
[6,29]

26
23
20
17
21

*4.7K/F_4

CLKRUN#

CLKRUN#

Address

TEST/BADD

15

CLKRUN#

1
3
12

NC
NC
NC

VDD
VDD
VDD
VSB

10
19
24
5

GND
GND
GND
GND

4
11
18
25

C9
*0.1U/10V_4

C5
*0.1U/10V_4

C8
*0.1U/10V_4

DDR3 Thermal Sensor

U20

GPIO
GPIO2

6
2

PP
TESTI

7
8

TPM_PP

13
14

TPM_XIN
TPM_XOUT

XTALI/32K IN
XTALO

C2
*0.1U/10V_4

[8,17,29,30]
[8,17,29,30]
R7

*0_4

[12,13]

CLKGEN_TPM_XIN

CLKGEN_TPM_XIN

TP1

MBCLK2
MBDATA2

PM_EXTTS#0

[26]

MBCLK2

SCLK

VCC

MBDATA2

SDA

DXP

PM_EXTTS#0

ALERT#

DXN

OVERT#

GND

R488

+3V

C711

+3V
DDR_THERMDA

*10K/F_4

C710
*2200P/50V_4

*SLB9635TT1.2-FW3.17

HIGH

BADD
4EH/4F

(default)

R6

*0_4

LPCPD#_TPM

R16

*4.7K/F_4

R4

*4.7K/F_4

R3

*0_4/S

*EMC1412-1-ACZL-TR

+3V
+3V
+3V

Main:AL001412003

EMC1412-1-ACZL-TR(98h)

2nd:AL000431014

TMP431ADGKR(98h)

Thermal Solution(Close to CRT)

U22

Finger Printer

+3V

C722

THEM2_CLK

SCLK

VCC

THEM2_SDA

SDA

DXP

ALERT#

DXN

OVERT#

GND

R519

*10K/F_4

+3V

*0.01U/16V_4
+3V +3V

R520

5
C

THEM2_SDA
+3V

R521

USBP12+

C258

FP1

*Clamp-Diode

[8]
[8]

1
2
3
4

USBP12+
USBP12-

16
2
3
45

MBDATA

[29,31]

2
1

+3V

MBCLK

[29,31]

2N7002DW

6
C257
0.1U/10V_4

*88513-044N
DFFC04FR045

2 *Clamp-Diode

4.7K_4

*EMC1412-1-ACZL-TR

+3V

Q41

4.7K_4

THEM2_CLK

C256

Q37
*MMBT3904-7-F

DDR_THERMDC
+3V_VDD

TPM_PP

USBP12-

*0.01U/16V_4

[7,27,29] LFRAME#
[2,8,14,24,25,27,29]
PLTRST#

LAD0
LAD1
LAD2
LAD3
CLK_PCI_TPM

[7,27,29] LAD0
[7,27,29] LAD1
[7,27,29] LAD2
[7,27,29] LAD3
[8] CLK_PCI_TPM

Thermal Solution(Close to GPU)

C723

*0.01U/16V_4

U23
[8,17,29,30]
[8,17,29,30]

MBCLK2

SCLK

VCC

MBDATA2

SDA

DXP

Main:AL000781039

G781-1P8(9Ah)

ALERT#

DXN

2nd:AL001412005

EMC1412-2-ACZL-TR(9Ah)(WJ)

GND

+3V

Accelerometer Sensor(WJ)

+3V

R522

*10K/F_4

OVERT#

+3V

*G781-1P8

U3
*LIS3DHTR
C254
0.1U/10V_4

[8]

[8,17,29,30]
[8,17,29,30]

C270
0.1U/10V_4

INTH#
TP21

INTH#

MBDATA2
MBCLK2
+3V

R117

*0_4/S

1
14

Vdd_IO
VDD

11
9

INT1
INT2

7
6
4

SDO
SDA
SCL

CS

NC
NC

RESERVED
RESERVED
RESERVED
RESERVED

10
13
15
16

GND
GND

5
12

AL0LIS3DA00
MBDATA2

C272

*33P/50V_4

MBCLK2

C271

*33P/50V_4

2
3

SGT-LIS302DLTR interrupt pin default

is low / active Hi , BIOS need to
programming 22h to change status
from active Hi to low

Pin 12: Low

38hex

Pin 12: unconnected/floating

3Ahex

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Rev
1A

G-SENSOR

Date: Monday, October 22, 2012

5

Sheet
1

30

of

42

CN21
PMPCRB-08MLBS1ZZ4H0
1
1
2
2

IDEA diode for shipmode only

Model
PR197
*1K_6

PQ37
*MMDT2907A

PC171
0.1U/25V_4

PC170
0.1U/25V_4
PD15
MESMAJ20A-G

HS3404F

ACOK_IN

PQ3
ME4411-G

+BATCHG

PL2
80/5A
PC7
0.1U/25V_4

B modify 120321

PD7

10

VDDA

IACP

SCL

SCL

15

12 8681B_2

PR2
2_6

11

SDL

HDR

[41]

ACIN_PG

LX

8681_ACAV 9

PU1

+VAD_2

DCIN

BAS316

PR16
*2.2_8
PQ2
QM3002N3

VAC

B modify 120330

10_8

PC165

PC166

PC167
1500P/50V_4
PR203
*0_2/S

COMP

PR15
0_4

17

PC163
0.1U/10V_4

GND

AD_AIR

PR8
12.4K/F_4

ICHM

PC1
0.47U/10V_4

Place this cap

close to EC

8681ICHP

5
PC18
*1U/10V_4

8681ICHM

8681ICHM1

PR199
*470_8

Place this cap

close to IC

PR6
10/F_4

Using Kevin connection

for layout

PR22
0_4

8681IAC

SYS_I

+BATCHG

[29]

PC162
0.01U/50V_4

BATSHIP

[29]

+3VPCU
ACOK#

PC164
0.1U/25V_4

8681ICSP1

PC22
*0.01U/50V_4

PC13
0.01U/50V_4

PR32
100K/F_4

PD14
RB501V-40

PR23
0_4
ICHP

PR34
*0_4

PR196
*0_2/S

PC11
*2200P/50V_4

PC21
1U/25V_8

ACIN_PG

+BATCHG
2

+VAD_1

8
[29]

16 8681LDR

PR18

PR7
75K/F_4

LDR

IAC

1
BAS316

PC20
0.1U/25V_4

PR201
RL1206-R010

8681LR

PL10
EM-68AM05V06

14 8681LX

OZ8682
PD5

PC26
0.1U/25V_4

include charger boost function

B modify 120330

ACAV

PR1
100K/F_4

+VAD_1
PD3

PC25
1000P/50V_4

10U/25V_8

100K/F_4

BAS316

PC24
*4.7U/25V_8

10U/25V_8

PR11

ACIN_PG

+VIN

8
7
6
5

PD8

+VA

PC23
4.7U/25V_8

PQ5
QM3002N3

13 8681HDR

BAS316
8681_ACAV 2

PL3
*0_8/S

PC8
8681B_1
0.1U/50V_6

SDL

PD4
PDZ5.6B

+VIN_CHG

PD2
RB501V-40

BST

MBDATA

[29]

PC161
0.01U/25V_4

PC14
1U/10V_4

PR3
*0_4/S

8681_VDDP

VDDP

IACP

*2.2U/10V_6

PR4
*0_4/S
MBCLK

PC6
0.01U/25V_4

Place this cap

close to EC

PR17
100/F_4

3
2
1

MAINON

PC17

PD1
PDZ5.6B

3
2
1

[29,33,35,36,41]

PC27
1U/10V_4

PR139
PQ7
*0_4 METR3904-G

ACAVD

PQ6
IMD2

IACM

ACIN_PG

PC9
*68P/50V_4

1U/10V_4

8681_VDDA

PR33

1M_4

PR21
0_4

PR41
100K/F_4

PR20
0_4

PQ8
2N7002K

PD9
BAS316

PR13
1K/F_4
TEMP_MBAT

PC16

IACM

B modify 120314
B modify 120321

PR202
1M_4

ACOK#

ACIN_1

+VAD

B modify 120314

+3VPCU

Place this ZVS close to

Far-Far away +VIN

8681_VDDA

10
9

PR14
200K/J_4

PC10
*68P/50V_4

ACOK_IN

PQ27
2N7002K

IDEA_G

PR206
*0_2/S

8
7
6
5

PR42
PR26
*100K/F_4 *0_4/S

3
4
5
6
7 10
8 9

PR40
100K/F_4

PR9
330/F_4

[29,30] MBDATA
[29,30] MBCLK

ACOK# 2
+VAD

PR192
1M_4

SMC
SMD

PR10
330/F_4

Parallel routing

3
4
5
6
7
8

PR205
*0_2/S
CSIN

8681_VDDP

CSIP

B modify 120321
3

220K_4

220K_4

+VAD
PR29
100/F_4

Q2

PR191

1K_6

PR195

Q1

+VA

PC4
0.1U/25V_4

PD17
MESMAJ20A-G
150K/F_4

PQ36
MMDT2907A
1

CN9
*PMPCRA-08MLBS2ZZ4H0
1
1
2 2

B_TEMP_MBAT

+VH28

31
New Battery Pack
4S1P (2600mAH)

BATT+

8
7
6
5

PR28

PR200

10
9

PL1
80/5A

+VIN

BATDIS_G

3
4
5
6
7 10
8 9

BATDIS_G

PR204
RL1206-R010

PR30
*100/F_4

PMPCRA-08MLBS2ZZ4H0

+PRWSRC

1
2
3
4

PR25
*0_4/S

Kelvin Connections for the

Current-Sense Resistors

PC19
0.22U/25V_8

PR19
*0_4

14"

3
4
5
6
7
8

PC168
0.1U/25V_4

3
PR194
*1M_4

+PRWSRC

PMPCRB-08MLBS1ZZ4H0

3
4

1
2
3

PL11
80/5A

PQ39
QM3016D

1
2

5
6
7
8

J1-1

CN10

+VAD

PQ38
EMB20P03V

+VA

PL9
80/5A

TOP DC_JACK
90W/4.75A

PR198
*1M_4

Part Number

15"

Place this ZVS close to

idea diode

PR193
*220K_4

Q2

Do Not add test point on

BATDIS_G signal

Q1

+BATCHG

PR5
*220K_4

Place this cap

close to EC

+VAD

PQ35
*ME2N7002D

For shipmode

EMI Suggestion
ACOK_IN
PR27
*0_4

ACIN
3

[29]

PR12
0_4

+PRWSRC

PR24
1M_4

B modify 120321

PD6
3

PC15
*10U/25V_8

PC12
*10U/25V_8

PC3
*10U/25V_8

PQ1
PDTC144EU

D/C#_S6A

ACIN_PG

D/C#

[29]

*BAS316
PC5
*10U/6.3V_8

PC2
*10U/25V_8

PR31
1M_4

PQ4
2N7002K

PQ9
2N7002K
1

B modify 120321

[21,32,33,35,37,38,40,41]
+VIN
[41] +VAD
[41] +VH28
[41] +VAD_1
[7,21,26,27,28,29,32]
+3VPCU

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Rev
A

Charger (OZ8682)

Date: Monday, October 22, 2012

1

Sheet

31of

42

DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW

32
Place these CAPs
close to FETs

+VIN_3VS5

Place these CAPs

close to FETs
+VIN

PL5
*0_8/S

+VIN_5VS5

+VIN

+5VPCU
+VIN

PC93
0.1U/25V_4

PL6
*0_8/S

PC92
0.1U/25V_4

PC129

PC96
2200P/50V_4

PC104
4.7U/25V_8

PC103
4.7U/25V_8

PC98
0.1U/25V_4

4.7U/6.3V_6
PC101
4.7U/25V_8

PC102
4.7U/25V_8

PR135
10_8

+3VPCU

+2VREF

+VIN

+5VPCU
PC139

PR158
15.4K/F_4

2_6
3V_PHASE2

12

3V_LGATE2

5V_FB1

24
2

VOUT1
FB1

PGOOD

23

PGOOD

Rds(on) 14m ohm

+3VS5

PL19
EM-22AM05V04

PR249
PR130
2.2_8

3V_FB2

PC110
0.1U/10V_4

*0_2/S

FB2

0.1U/25V_4

B modify 120328

4
PQ19
AON7702A

PC111
2200P/50V_4

14
25
15

18

OUT2

8
7
6
5

17

11

LGATE2
SKIPSEL
GND
GND

PHASE2

LGATE1

ENC

PHASE1

+3.3 Volt +/- 5%

Countinue current:4A
Peak current:6A
OCP minimum:7.5A

PQ18
EMB20N03V

4
PC136

3
2
1

REF

VREG5

4.7U/6.3V_6

PR151

19

PQ20
AON7702A

1
2
3

B modify 120314

3V_UGATE2

20

PC113
2200P/50V_4

RT8223PZ

ENTRIP2

5
6
7
8
1

B modify 120328

10

BOOT2

5V_LGATE1

+
PC213
220u_6.3V_6.3x4.5_ESR18

UGATE2

5V_PHASE1

PR131
2.2_8

*0_2/S

BOOT1

TONSEL

PR161
0_4

8
7
6
5

2_6

0.1U/25V_4

PR252
PC115
0.1U/10V_4

5V_BST1 22

1
2
3

PL20
EM-22AM05V04

UGATE1

ENTRIP2

+5VS5

EN

21

PR160
*0_4

3
2
1

PR152

13

ENTRIP1

PC135

VREG3

8205EN
5V_UGATE1

VIN

PU6

PQ17
EMB20N03V

16

PR144
*665K/F_4
PR143
*330K/F_4

ENTRIP1

PC95
0.1U/25V_4

5
6
7
8

PC91
2200P/50V_4

PC141
1U/6.3V_4

PC131
0.1U/25V_4

+5V +/- 5%
Countinue current:4A
Peak current:6A
OCP minimum:7.5A

PC214
220u_6.3V_6.3x4.5_ESR18

B modify 120314

Rds(on) 14m ohm

PR142

0_4

PR163
6.8K/F_4

PR154
*0_4/S
PR159
10K/F_4

[29,33,34,35,36]

PR157
80.6K/F_4

HWPG

B modify 120321

PR141
0_4

PR153
10K/F_4

PR162
10K/F_4

+3VPCU

+3VS5

B modify 120321

PR165
100K/F_4

PC130
*0.1U/10V_4

2
PQ31
2N7002K

+3VPCU

S5_ON

Current Limit setting

VILIMx = (RILIMx x10A)/10 = IILIMx x RDS(ON)
RILIMx = (IILIMx x RDS(ON)) x 10/10A

PR164
90.9K/F_4

TONSEL= VREG5
Vout1=400kHz/Vout2=500kHz

PQ30
PDTC144EU

[29,32]

For USB charge function

B modify 120321

PR156
100K/F_4

S5_ON

PQ28
2N7002K

2
PQ29
PDTC144EU

[29,32]

PC140
*0.1U/10V_4

+3VPCU

[21,31,33,35,37,38,40,41]
+VIN
[6,7,8,9,10,21,26,27,29,30,35,36,38,41]
+3VS5
[10,21,23,26,33,34,35,37,39,40,41]
+5VS5
[7,21,26,27,28,29,31]
+3VPCU

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

3/5VS5 (RT8223P)
1

Sheet

32of

42

33

( VTT/2A )
+0.75V_DDR_VTT

+VIN_DDR

PL25
*0_8/S

+VIN

VTTSNS

24

VLDOIN

23

+1.5VSUS

PC156
*0.1U/50V_6

GND

VBST

22

8207BST

MODE

DRVH

21

8207DRVH

8207BSTR

LL

20

8207LX

DRVL

19

8207DRVL

0.1U/25V_4

PC159
0.033U/10V_4

V5FILT

VTTREF

COMP

3
2
1

D
7

NC

PGND

18

VDDQSNS CS_GND

17

VDDQSET

CS

16

OCP minimum 15A

B modify 120330

0_4

DDR_VTTREF

Peak current:12A

PQ57
QM3002N3

[4,12,13]

PC248
0.1U/25V_4

+1.5VSUS +/- 5%

PC153

2_6

PC157
2200P/50V_4

Countinue current:6A

PR190

( 3mA )

PC155
4.7U/25V_8

8
7
6
5

VTT

PR185

+1.5VSUS

PC251
4.7U/25V_8

PR276
2.2_8

S
1
2
3

PC246
0.1U/10V_4

B modify 120328

PQ58
FDMS0310AS

RILIM = ILIM x RDS(ON) / 10uA

+1.5VSUS

PL24
EM-82BM05V04

PR189
*0_4

PC252
0.1U/25V_4

PR275
*0_2/S

PC253
2200P/50V_4

VTTGND

GND

PU8
1

PC158
10U/6.3V_8

25

PC160
10U/6.3V_8

PC249
390U/2.5V_6X5.8ESR10

PR181
8207CS

+5VS5
6.98K/F_4

B modify 120321
[29]

SUSON

10

S3

V5IN

15

11

S5

V5FILT

14

PC152

PR184

1U/6.3V_4
8207S5

*0_4/S
8207TON

+VIN_DDR

RDSon= 5m ohm

PR183
619K/F_4

12

NC

PGOOD

13

V5FILT
DDRPG

PC151
1U/6.3V_4

Place this short pad

close to output CAP

PR180
10_6

PR182
*0_4/S

RT8207LGQW

HWPG

[29,32,34,35,36]

B modify 120321

PR188
10K/F_4

PR186
10K/F_4

PD13
D

MAINON

[21,31,32,35,37,38,40,41]
+VIN
[10,21,23,26,32,34,35,37,39,40,41]
+5VS5
[2,4,12,13,38]
+1.5VSUS
[12,13,41] +0.75V_DDR_VTT

[29,31,35,36,41]

RB501V-40

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Place this FB parts close to IC

PC154
0.1U/10V_4
PR187
100K/F_4

NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

1

Rev
A

DDR3 (RT8207)
Sheet
5

33 of

42

34
CPU system agent
voltage slew rate of 0.5 -10 mV/s
D

SEL0

SEL1

+VCCSA

0.9V

0.8V

0.725V

0.675V

TPS51462RGER for SV CPU

PR228
*0_4/S

HWPG

B modify 120321

VCCSA_VID1
PC196
1U/6.3V_4

VCCSA_VID0
PR232
*0_4/S
51461EN

SW

10

51461REF 2

MODE

VOUT

VREF

PGND
PGND
PGND
GND

SW

SW

SW

PR244
*2.2_6

PC205
*2200P/50V_4

PC208

PC210

PC207

PC206

PR247
*0_2/S

51461FB
PR237
0_4

*33K/F_4

VCCUSA_SENSE

PR236
4.99K/F_4

PC209

PR239
100/F_4
PR121

+VCCSA

PL18
EM-47BM05V05

0.1U/10V_4

11

22U/6.3V/X5R_8

SW

22U/6.3V/X5R_8

12

PC201

22U/6.3V/X5R_8

BST

TPS51462RGER

PC195
0.22U/6.3V_4

[35]

13
EN

14

15

VID0

PGOOD

VID1

16

17
V5FILT

PU9

PC181
0.1U/10V_4

19
20
21
1

PR242
0_6

PC184
10U/6.3V_8

PC191
10U/6.3V_8

1.05V_VTT_PWRGD

+VCCSA Volt +/- 5%

Countinue current:4A
Peak current:6A
OCP minimum:7A

0.1U/25V_4

SLEW

VIN
VIN
VIN

22
23
24

COMP

+5VS5

VCC_TPS51461

51461COMP 3

PJP1
*POWER_JP/S

V5DRV

18

PC194
2.2U/6.3V_4

PR235
0_4

[4]
[4]

PC199
*0.1U/10V_4

51461VCC

PR223
0_6

VCCSA_SEL
VCCSA_SEL0

22U/6.3V/X5R_8

[29,32,33,35,36]

[4]
B

PC198
0.01U/16V_4

PC197
3300P/50V_4

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

+VCCSA (TPS51462RGER)
1

Sheet

34of

42

35
D

+3VS5

PR167
10K/F_4

+VIN_1.05V_VTT

PR168
PR178

PL8
*0_8/S

H_VTTVID1

*0_4

+5VS5

+VIN

RT8240TON

11

PAD

RT8240RGND

PC146
4.7U/25V_8

PC244
0.1U/25V_4

8
7
6
5
PR174
RT8240BST_1

PHASE

RT8240LX

LGATE

RT8240DL

PQ33
QM3002N3

4
PC148
RT8240BST

2_6

+1.05V_VTT +/- 5%
Countinue current:10A
Peak current: 12A
OCP minimum: 14.5A

B modify 120330

0.1U/25V_4

D
4

+1.05V

PL23
EM-82BM05V04

3
2
1

RT8240DH

RT8240BZ

EN

PC145
4.7U/25V_8

600 mils

PR179
2.2_8

*0_2/S

PC241
0.1U/10V_4

PQ34
FDMS0310AS

PR271

13

PGOOD

12

PC147
*0.1U/10V_4

PC144
0.1U/25V_4

RT8240EN

PR172
0_4

UGATE
BOOST

MAINON

CS

1
2
3

1.05V_VTT_PWRGD

[29,31,33,36,41]

10

TON

RT8240ILIM

FB

[34]

PU7
PR169
61.9K/F_4

PR170
*0_4/S

PC143
2200P/50V_4

RT8240FB

BAS316

PR171
100K/F_4

RGND

GND

PD12
HWPG

B modify 120321
[29,32,33,34,36]

RT8240VCC

+3V

VCC

PC149
1U/6.3V_4

10_6

PC150
2200P/50V_4

PC240
390U/2.5V_6X5.8ESR10

RDSon=5m ohm
Vo=0.5(R1+R2)/R2

PR173

PR176

*10/F_4

*10/F_4

PR177
0_4
PR175
0_4

VCCP_SENSE
VSSP_SENSE

[4]
[4]

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

+1.05V (RT8240B)
1

Sheet

35of

42

36
D

PC223
*2200P/50V_4

+3VS5

PR256
*2.2_6

+1.8V +/- 5%
Countinue current:1.2A
Peak current:2A

PU10
G5173R41U
PC233
0.1U/10V_4

MAINON

G5173EN

PR265
[29,32,33,34,35]
PC235
*0.01U/50V_4

G5173PG

HWPG

*0_4/S

PC226
*100P/50V_4

PR258
20K/F_4
PR257
182K/F_4

2
15
14

PH

10

VIN

PH

11

VIN

PH

12

EN

BOOT

13

PWRGD

VSNS

VIN

G5173COMP

COMP

GND

G75173RT

RT/CLK

GND

G5173SS

SS

PC225
0.01U/50V_4

PAD
PAD
PAD
PAD
PAD
PAD

B modify 120321
[29,31,33,35,41]

AGND

G5173LX
+1.8V

PL22
EM-10AM05V06
PR264
2_6

PC236
PR261
0.1U/25V_4

PC228
10U/6.3V_8

*0_2/S

R1

PC229
10U/6.3V_8

PC227
0.1U/10V_4

PR259
12K/F_4

G5173VSNS

22
21
20
19
18
17

PC231
10U/6.3V_8

16

R2

PC224
470P/50V_4

PR260
10.2K/F_4

V0=0.827*(R1+R2)/R2
B

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
B

Document Number

Rev
A

+1.8V (G9661)

Date: Monday, October 22, 2012

5

Sheet
1

36of

42

37
PL12
*0_8/S
+VIN_GPU

PL13
*0_8/S

+VIN

N13P-GS
PC59
4.7U/25V_8

Connect to input caps

1
2
3

+3V

PR80
0_4

PR50
10K/F_4

OCP minimum 56A

S

1
2
3

PR124
2.2_8

PR231
*0_2/S

B modify 120328

PQ45
FDMS0308S

DRVH1

AGND

BST1

PC203
0.1U/10V_4

PR238
*0_2/S

PC78
2200P/50V_4

38

39

D
4
PQ12
FDMS0308S

PC255
390U/2.5V_6X5.8ESR10

2012/02/22 update
PR118
*0_4/S

35

+
PC254
390U/2.5V_6X5.8ESR10

PR117
10/F_4

3212_DRVH1

36

AGND

+VGACORE

PL15
0.36UH/30A

PWRGD

PH1

PH0

16

37
49

RAMP

VCC
12

B modify 120321

DGPU_PROCHOT#

PQ42
TPCA8064-H

G
S

[38]

Peak current: 50A

B modify 120330

G
4
DGPU_VC_EN

PC45
2.2U/6.3V_6
PR43
*0_4/S

4
PQ43
TPCA8064-H

PR87
10_6
PR54
649K/F_4

[17,29]

PC36
1000P/50V_4

B modify 120330

PR74
*0_4

+5VS5

PR207
*0_4/S

PR94
1_6
PR51
1K/F_4

+VGA_CORE
Countinue current: 45A

+5VS5

PC172
2200P/50V_4

PC169
0.1U/25V_4

PC44
0.1U/25V_4

PC46
2200P/50V_4

PC66
*4.7U/25V_8

+VIN_GPU

1
2
3

PC63
4.7U/25V_8

Phase

1
2
3

PH1

PH0

PC53
4.7U/25V_8

B modify 120321
1

+3V

41

PC51
0.22U/25V_6

PSI#

PU2

PR59
10K/F_4

PQ10
2N7002K

34

3212_SW1

+VIN_GPU

3212_DRVL1

PC175
*4.7U/25V_8

PC54
4.7U/6.3V_6

VARFR

GPU_VID6

B modify 120328
PD10 RB501V-40
1
2

PR55
*0_4/S

PR39
*10K/F_4

+3V_GFX

BOOT2

SW2

25

DPRSLPVR_R

PR70
*499/F_4

DPRSLPVR

40
4

22
B

23
24

EN

DRVL2

DPRSLPVR
PGND

29

PR212
2.2_8

PR222
*0_2/S

SWFB2

28

PR93
100/F_4

3212_CS_PH2

33

PR96
100/F_4

3212_CS_PH1

OD3#
PWM3

SWFB1

SWFB3

19

COMP

PR37
0_4

CSCOMP
LLINE

20

+
PC256
390U/2.5V_6X5.8ESR10

PC77
330U_2V_7343_H1.4_ESR6_20%

2012/02/22 update
PR213
10/F_4

Close to
Phase 1 Inductor

CSREF

ILIM

3212_CSCOMP

21

PR78
165K/F_4
PR243
220K_6 NTC

PR58
20K/F_4
PR82
1.07K/F_4
PR61
20K/F_4

18

RPM

RT
15

IMON

PR90
249K/F_4

B modify 120327

17

FBRTN

IREF

PR86
249K/F_4
PC39
1000P/50V_4

14

PC32
1000P/50V_4

PC84
0.1U/10V_4

Shortest the
net trace

3218_CCSUM

FB

13

PR49
*4.7K/F_4

B modify 120322
PR229
*0_2/S

B modify 120328

PQ46
FDMS0308S

PR214
*0_4/S

PR79
73.2K/F_4
7
5

PR125
100/F_4

4
PQ44
FDMS0308S

3212_DRVL2

PC31
12P/50V_4

1.65K/F_4

PR35
0_4

D
G

PC40
470P/50V_4
PR47
39.2K/F_4

+VGACORE

PL14
0.36UH/30A

30

PC28
150P/50V_4
PC29
150P/50V_4

PC34
0.1U/25V_4

CLK_EN#

CSSUM
6

PR36

D
G
4

27 3212_SW2

PQ41
TPCA8064-H

B modify 120330

PC178
2200P/50V_4

PR62
0_4

PR48
100K/F_4

3212_DRVH2

PC49
0.22U/25V_6

PC33
0.22U/6.3V_4

1
[17]

DRVH2

26

PC35
2200P/50V_4

DGPU_PWR_EN
PR38
47K/F_4

VID0
VID1
VID2
VID3
VID4
VID5
VID6

PC174
4.7U/25V_8

48
47
46
45
44
43
42

PC173
4.7U/25V_8

D
4
PQ40
TPCA8064-H

This NTC Close

to Phase 1 Inductor

GPU_VID0
GPU_VID1
GPU_VID2
GPU_VID3
GPU_VID4
GPU_VID5

1
2
3

[17]
[17]
[17]
[17]
[17]
[17]

PC177
4.7U/25V_8

B modify 120330

32

1
2
3

PVCC

PR92
1_6

+5VS5

31

TRDET#

DRVL1
TTSNS

1
2
3

PC30
0.01U/25V_4

1
2
3

2
1

PR211
220K_6 NTC

PR46
5.1K/F_4

+5VS5

11
7.32K/F_4

PR45
+5VS5

[9,38]

NCP3218G
VR_TT

10

SW1

B modify 120327
PR60
*0_4/S

PR44
80.6K/F_4

PC37
1U/6.3V_4

PR126
100/F_4

+VGACORE

PR52
47.5K/F_4

PR53
162K/F_4

VSS_GPU_SENSE
VGPU_CORE_SENSE

[14]
[14]

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
C

Document Number

Rev
A

+VGA CORE ( NCP3218G)

Date: Monday, October 22, 2012

1

Sheet

37 of

42

38

VGA

[2,4,12,13,33] +1.5VSUS
8,9,10,21,26,27,29,30,32,35,36,41]
+3VS5
[14,16,17,18,37] +3V_GFX
[15,18,19,20] +1.5V_GFX
[14,15,16,18] +1.05V_GFX
[41] +12VALW
A
[2,4,6,7,8,10,26,29,35,39]
+1.05V

+3V_GFX

+12VALW
+3VS5

PR262
22_8

PR267
1M_4

PR266
1M_4

PQ50
2N7002K

PQ32
PDTC144EU

+3V_GFX

PQ49
2N7002K

PC234
*10U/6.3V_8

PC232
0.1U/10V_4

B modify 120321

DGPU_PR_EN_G

PC142
*1U/10V_4

PR263
1M_4

0_4

(0.4A )

220P/50V_4

3
DGPU_PWR_EN

PC238
0.1U/10V_4

3
PC237

PR166
[9,37]

3VGFX_OND

B modify 120321
PD11
*BAS316
1

PQ53
EMB32N03K

1
2
5
6

+VIN

+1.5VSUS

+12VALW
+1.05V_GFX

PQ56
RJK0392DPA
+VIN
PR268
22_8

PR270
1M_4

PR108
22_8

(9A )

S
1
2
3

+1.5V_GFX

PC242
2200P/50V_4

PC247
*10U/6.3V_8

PQ54
2N7002K

PC245
0.1U/10V_4

B modify 120321
B modify 120321
B modify 120321
+12VALW

+1.05V

PQ48
RJK0392DPA

1.05VGFX_OND

+1.05V +/- 3%
Countinue current:2.1A
Peak current:3A

PC222
0.1U/10V_4

PC239
2200P/50V_4

S
1
2
3

PR269
1M_4

2
1

PQ55
PDTC144EU

PR273
1M_4

DGPU_VC_EN
PC243
*0.22U/6.3V_4

PR272
47K/F_4
[37]

PQ11
2N7002K

2
2

PQ52
2N7002K

PR274
1M_4

1.5VGFX_OND 4
PD16
*BAS316
1

PC250
0.1U/10V_4

+1.5V_GFX

+1.05V_GFX

B modify 120321

PQ51
2N7002K

PC218
10U/6.3V_8

PC216
0.1U/10V_4

PROJECT :TWD (Chief River)

Quanta Computer Inc.
Size
Custom

NB5

Document Number

Rev
A

+VGA POWER

Date: Monday, October 22, 2012

Sheet

38of
8

42

PC186

PC55

10/F_4

33P/50V_4

PR75

3300P/50V_4

2
SWN1A

SWN1A

CSREFA

VCC 1
2
3
6132EN 4
*0_4/S
SDIO
*0_4/S
5
VR_SVID_ALERT# 6
SCLK 7
PR67
*0_4/S
PR66
10K/F_4 VBOOT 8
B modify 120321
PR65
95.3K/F_4 ROSC 9
6132AGND
6132VRMP 10
H_PROCHOT# 11
[2,29] H_PROCHOT#
IMVP_PWRGD 12
PR215
VSN 13
PC179
1K/F_4
VSP 14
0.01U/50V_4
DIFF 15

VCC
VDDBP
VRDYA
EN
SDIO
ALERT#
SCLK
VBOOT
ROSC
VRMP
VRHOT#
VRDY
VSN
VSP
DIFF

GFX_HWPG

[29] VRON
VR_SVID_DATA
VR_SVID_ALERT#
VR_SVID_CLK

+VIN_VCC_CORE

SDIO

6132AGND

VSS_SENSE
VCC_SENSE

PR63
0_4

1K/F_4

PR73
PC52

PR88
10/F_4
TRBST#

49.9/F_4

100P/50V_4

4.3K/F_4

0.1U/10V_4

CSREF

2.2U/6.3V_6

LG1 [40]
HG1 [40]
SW1 [40]

PR285
*11K/F_4
PR111
6.98K/F_4

[40]

PR226
0_4

PC62
47n/10V_4

PR100
*0_4

DROOP

SWN1
SWN2

PR107
6.98K/F_4

+5VS5

TSENSE

PR104
*0_4

CSREF

POP Rc
For CPU 1PHASE only
operation

PR123
8.25K/F_4

PR119
100K_4 NTC

CSSUM
PC182
PR220
22.6K/F_4

PC64

6132AGND 6132AGND

PC58
*1000P/50V_4

1200P/50V_4

PC65

470P/50V_4

PR95
*4.7K/F_4

PR116
150K/F_6
PR113

SWN1
SWN2

SWN1

[40]

SWN2

[40]

Place close with

VCORE hot spot
A

150K/F_6

CPU

PR3214

35W

22.6K

PR103

PR106

75K/F_4
PR98
0_4

Rc

PR284
*11K/F_4

24.9K/F_4

PC57
*820P/50V_4

POP Rd
For discrete only
operation

CSP1A

PC69
47n/10V_4

6132AGND

6132AGND
PR99
*1K/F_4

PR110
*0_4

Rd

CSREF

[40]

PC185
1000P/50V_4

3300P/50V_4

6132AGND

+5VS5

LG1
HG1
SW1
BST1

+5VS5

PR76

PC42
4700P/25V_4

CSCOMP

SW2 [40]
HG2 [40]
LG2 [40]

0.22U/25V_6
PC193

680P/50V_4
PR83

1.21K/F_4

PC71
BST2
SW2
HG2
LG2

DRVEN

PC50

PR84

+5VS5

33P/50V_4
PC43

[40]

6132_PWM

PC190

PR77

6132_PWMA

PC70
0.22U/25V_6

PC41
1000P/50V_4
PR91
11.5K/F_4
PC47

6132_PWMA

45
44
42
43
41
40
38
39
37
36
35
34
32
33
31

PR112
41.2K/F_4

TRBST#
FB
COMP
IMON
ILIM
DROOP
CSCOMP
CSSUM
CSREF
CSP3
CSP2
CSP1
TSENSE
DRVEN

PR64
0_4

[4]
[4]

PW MA
BSTA
SW A
HGA
LGA
BST2
SW 2
HG2
LG2
PVCC
PGND
LG1
HG1
SW 1
BST1

PU3

NCP6132B

PR253
100K_4 NTC

Place NTC close with

V_GT hot spot

PR114
25.5K/F_4

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

Using Kevin connection

for layout

PR250
SWN1A

PR115
6.98K/F_4

6132AGND

PC176
0.1U/10V_4

PR69
PR68

VR_SVID_ALERT#

SCLK

0.1U/10V_4

TRBST#
FB
COMP
IOUT
ILIM
DROOP
CSCOMP
CSSUM
CSREF
CSP3
CSP2
CSP1
TSNS
DRVEN
PWM

PR209
54.9/F_4

PC192

EPAD
VSNA
VSPA
DIFFA
TRBSTA#
FBA
COMPA
IOUTA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA

PC180
2.2U/6.3V_6

PC67
47n/10V_4
CSP1A

+5VS5

6132AGND

PR208
*75/F_4

[40]

+5VS5

61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46

PR216
2_6

VSNA
VSPA
DIFFA
TRBSTA#
FBA
COMPA
IMONA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSENSEA

6132AGND

H_PROCHOT#

[4]

[40]

PC189
1000P/50V_4
PR105
0_4

PR227

PR57
*75/F_4

[4]

8.25K/F_4

PC38
1000P/50V_4

*0_4/S

[4]

CSREF

ULV
17W

23.7K

165K/F_4

1
PR122
220K_6 NTC

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Put close with VCORE

Phase 1 Inductor

NB5

Size
Custom

Document Number

Rev
A

CPU Core1 (NCP6132B)DC

Date: Monday, October 22, 2012

5

39
CSREFA

*4.7K/F_4

PR72
0_4

+3V

+1.05V

PR225

DROOPA

PR219
1K/F_4

TSENSEA

VCC_AXG_SENSE
VSS_AXG_SENSE

CSCOMPA

1000P/50V_4

B modify 120327

6132AGND

CSREFA

GFX_HWPG

PC188

*100P/50V_4

PR109
75K/F_6

0_4

+1.05V

PR210
130/F_4

PR251
220K_6 NTC

Place NTC close

with GT Inductor

IMVP_PWRGD

PR71
10K/F_4

PC183

1200P/50V_4

IMONA

PR102
165K/F_4

0.1U/10V_4

[6]

[4]
[4]

PR101
75K/F_4

PR56
10K/F_4

PR224
0_4

10P/50V_4

4.3K/F_4

PR85
1K/F_4

PC60
470P/50V_4

PC56

PR89

TRBSTA#

+3V

PR221
21.5K/F_4

PC48

PR81

Using Kevin connection

for layout

PC61

PR97
14K/F_4

PR217
0_4

0.1U/10V_4

6132AGND

+5VS5

PR218
*1K/F_4

Sheet

39of

42

40
Dummy This Schematic
For CPU 1-Phase operation
D

+VIN_VCC_CORE
+VIN_VCC_CORE

+VIN

PL4
*0_8/S

SW2

B modify 120322

PL17
0.36UH/30A

1
+

PC138
330u_2.5V_7343

S
1
2
3

LG2

PC85
2200P/50V_4

PC87
2200P/50V_4

PC105
330u_2.5V_7343

Place this CAP in CPU

SOCKET inside
PR245
*0_2/S

B modify 120322
SWN1

+
PC89
330u_2.5V_7343

PQ15
FDMS0308S

PR234
10/F_4
CSREF

+VCC_CORE

G
[39]

PR246
*0_2/S

PR128
2.2_8

PC88
330u_2.5V_7343

PQ16
FDMS0308S

B modify 120322

PQ13
FDMS7698

[39]

PC75
2200P/50V_4

G
4

1
+

S
1
2
3

LG1

HG2

PC83
0.1U/25V_4

Countinue current:33A
Peak current: 53A
Load Line : -1.9mV/A

PR127
2.2_8

SW1

[39]
+VCC_CORE

PL16
0.36UH/30A

PC82
*4.7U/25V_8

PQ14
FDMS7698

PC79
4.7U/25V_8

1
2
3

PC81
4.7U/25V_8

Place this resistor

close to MOS
PR230
1_6

G
[39]

PC187
100U/25V

G
4

HG1

1
2
3
[39]

PC211
100U/25V

PC80
4.7U/25V_8

PC68
0.1U/25V_4

PR120
1_6
[39]

PC73
2200P/50V_4

PC74
0.1U/25V_4

PC86
4.7U/25V_8

PC204
4.7U/25V_8

+VCC_CORE (ONLY SUPPORT 35W)

PC202
4.7U/25V_8

Place this resistor

close to MOS

PR233
10/F_4
CSREF

[39]
[39]

SWN2

PR241
*0_2/S

[39]

PR240
*0_2/S

+VCC_CORE (ONLY SUPPORT 35W)

Countinue current:33A
Peak current: 53A
Load Line : -1.9mV/A

+VIN_VCC_GT

+VCC_CORE (ULV 17W)

TDC : 25A
Peak current: 33A
Load Line : -2.9mV/A

+VIN

PL7
*0_8/S

2.74K/F_4

PQ21
FDMS7698

+VCC_GFX

PL21
0.36UH/30A

GND 6

EN
VCC

LG

LGTA

G
S
1
2
3

PC90
2.2U/6.3V_6

PR138
2.2_8

PAD

PQ25
FDMS0308S

B modify 120328

PC133
*330u_2.5V_7343

SWGTA

1
2
3

HGTA

+VCC_GFX(WJ)
Countinue current:21.5A
Peak current: 33A
Load Line : -3.9mV/A

+
PC215
390U/2.5V_6X5.8ESR10

+
PC212
390U/2.5V_6X5.8ESR10

+5VS5

SW

PWM

PC94
0.1U/25V_4

DRVEN

HG

PC97
2200P/50V_4

PR129
[39]

BST

6132_PWMA

PR132
1_6

[39]

PC100
2200P/50V_4

0.22U/25V_6
PU4
NCP5911
1

PC106
0.1U/25V_4

Place this resistor

close to MOS

PC107
4.7U/25V_8

PC99
VGTA_BST1

PC112
4.7U/25V_8

PC108
4.7U/25V_8

PC230
390U/2.5V_6X5.8ESR10

PC128
2200P/50V_4
PR254
*0_2/S

PR248
10/F_4
CSREFA
PR255
*0_2/S

SWN1A

[39]
[39]

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
C

Document Number

Rev
A

CPU Core2 (NCP5911)DC

Date: Monday, October 22, 2012

1

Sheet

40 of

42

41

+VH28
+VAD

PR133
0_4
PR136
22_6
D

[29]

CP

ACIN_PG

16 DCAP

VOUT

18 G5934CP

17 G5934VOUT

PC124
1U/35V_6

PC126
0.47U/25V_6
PR134
*0_4/S

D_CAP

LAN_POWER

CN

VIN

20 G5934VIN

PC127
0.1U/25V_4

19 G5934CN

PC125
0.1U/25V_4
2
1

ON1

PG

[31]

B modify 120321
+VAD_1

G5934PG

15

PR137
750K/F_4
[29,31,33,35,36]

MAINON

ON2

VSENSE

+12VALW

PU5
SLG55448VTR

ON3

G5934VSENSE

14

REG

PR140
100K/F_4

13
PC132
1U/16V_4

MAINON

DISC3

PR147
*0_4/S

1
2
3

+3V

G5934DISC3

G5934DISC2

+0.75V_DDR_VTT

PR150
*0_4/S

+5V

B modify 120321
+5VS5

8
7
6
5

21

GND

DRIVER2
10

DRIVER1

DISC2

G5934DISC4

MAIND3.3V

4.6A

12

PQ22
EMB20N03V

5
6
7
8

B modify 120321

DISC4

DISC1

DRIVER3

+3VLANVCC

G5934DISC1

11

+3VS5

PC109
0.1U/10V_4

PR148
*0_4

ON4

DRIVER4

PC137
2200P/50V_4

PQ24
EMB20N03V
MAIND

PC119
0.1U/10V_4

6A
+VIN

PC121
0.1U/10V_4

PC117
*10U/6.3V_8

3
2
1

PC134
2200P/50V_4
PR149
*0_4/S

PC114
*10U/6.3V_8

+5V

PR145
1M_4

PC118
0.1U/10V_4

B modify 120321

[2,4]

MAIN_ONG

B modify 120321

+3V

PR146
1M_4

2
PQ26
2N7002K
MAIND

PQ23
EMB32N03K

PC116
2200P/50V_4

[4]

PC122
0.1U/10V_4

0.67A
+3VLANVCC

LAN_ON

1
2
5
6

+3VS5

PC120
*10U/6.3V_8

PC123
0.1U/10V_4

[6,7,8,9,10,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39]
[7,10,21,22,23,27,28]
[21,31,32,33,35,37,38,40]

+3V
+5V
+VIN

[31] +VH28
[31] +VAD_1
[6,7,8,9,10,21,26,27,29,30,32,35,36,38]
+3VS5
[10,21,23,26,32,33,34,35,37,39,40]
+5VS5
[38]

+12VALW

[24,26] +3VLANVCC
[12,13,33]
+0.75V_DDR_VTT

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
Custom

Document Number

Date: Monday, October 22, 2012

5

Rev
A

Dis-charge IC (SLG55448V)
1

Sheet

41

of

42

PROJECT :TWD (Chief River)

Quanta Computer Inc.
NB5

Size
C

Document Number

Rev
A

History

Date: Monday, October 22, 2012

1

Sheet

42 of

42

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