Lab 8 Report

Frequency Response of a Common-Emitter BJT

Amplifier
Kevin Bradshaw & Kai Qin
ECEN 326-502
Instructor: Sebastian Hoyos
Date Performed: March 31, 2016

Objectives
Understand the frequency response of a common-emitter BJT amplifier.
Design and analyze a common-emitter configuration meeting certain constraints.
Evaluate the DC operating point of a single transistor amplifier.
Procedure
In this lab, the BJT circuit designed from the pre-lab was constructed. The commonemitter amplifier was designed to fit the constraints shown in Figure 1:
Figure 1: BJT Amplifier Design Constraints

Using a chosen value for the emitter voltage and a Q2N2222 BJT, this circuit was
designed by finding the minimum and maximum values of the collector resistance.
Choosing a collector resistance between these ranges of values, the collector current
could easily be found by using the common topology formulas. Then, the rest of the
resistances for the circuit were calculated using these currents. Figure 2 shows the
resulting circuit designed and Table 1 shows the actual values used in the circuit. These
values were adjusted after construction in order to get an optimum gain with no clipping
in the voltage swing.
Figure 2: Circuit schematic with DC bias points annotated.

After the circuit was adjusted, the operating currents and voltages (including the
maximum unclipped output signal voltage amplitude) were measured and can be seen
in Table 2. Furthermore, the input resistance, output resistance, current supply, and gain
were measured and can also be seen in Table 2. The overall gain of this circuit to
achieve an output swing greater than 1.5 V can be seen in Figure 3. Lastly, to obtain the
higher and lower 3-dB frequencies, a signal of 20 mV was placed at the input and
output frequencies when the output voltages decreased to approximately 0.68 V was
obtained. Figure 6 and 7 show the 3-dB frequencies achieved.
Figure 3: Overall BJT Amplifier Gain of 50

Figure 4: 0-to-peak unclipped output swing of 1.5V

Figure 5: Maximum unclipped output swing with Gain of 50

Figure 6: Lower 3-dB frequencies of 210Hz

Figure 7: Higher 3-dB frequencies of 1.17MHz

Data Tables
Table 1: Final Design Circuit Parameters
Parameter

Value

Base Resistor 1 (RB1)

143 k

Base Resistor 2 (RB2)

75 k

Collector Resistor (RC)

1 k

Emitter Resistor 1( RE)

140

Load Resistor (RL)

1 k

Source Resistor 2 (Rs)

50

Capacitors 1, 2, 3 (C)

10 F

Table 2: Measured Circuit Values

Parameter

Value

Collector Current

2.86 mA

Emitter Voltage

0.423 V

Collector Voltage

2.21 V

Base Voltage

1.23 V

Supply Current

2.88 mA

Gain

50

Input Resistance

432.71

Output Resistance

1.92 k

Maximum Unclipped Out Signal

Amplitude

2.6 V

Discussion
In this lab, a single-supply common-emitter BJT amplifier circuit designed from the prelab was constructed using PSPICE. The common-emitter amplifier bias point was
calculated from the equations given in the lab instructions. The collector resistance is a
key factor that the circuit required to meet the given constraints. It was calculated using
the equation below. Matlab was used to solve this quadratic equation. In able to achieve
the unclipped output swing of 1.5V, adjustment of DC bias point and Rc was made.
Figure 4 shows that when the maximum swing reached 3V the Gain decreased to 36.
Figure 5 shows that within 10% of the gain of 50 the maximum swing the output can
reach was 2.56V.

Equation 1. Minimum Collector resistance calculation

Conclusion
The main lessons of this lab was to understand the frequency response of a commonemitter BJT Amplifier. By using PSPICE, the bias point was chosen to fit the design
constraints. During the lab, we used a potentiometer to adjust the collector resistance to
adjust the output voltage clipping.