Indian Institute of Technology Kharagpur

EC31003: Digital Electronic Circuits

Assignment 2: August 6, 2015
Submission Date: August 10, 2015

1. Simplify the following Boolean functions to (1) a sum of products form

(2) a product of sums form:
+ ACD
f1 (A, B, C, D) = AB C + ABD
Y
f2 (A, B, C, D) =
(1, 3, 5, 7, 13, 15)
2. Parity is a common error detection mechanism that is often used in data
reception or retrieval systems. Consider a parity encoder that is used for
data transmission or storage. If a word contains an even number of 1s,
the parity bit is 0. If the word has an odd number of 1s, the parity bit is 1.
Derive the minimized function for a parity bit generator, where every word
contains 4 bits. Use a 4 variable Karnaugh map for the minimization. Can
you come up with any other, simpler, logic circuit to generate the parity
bit?
3. Realize each of the following switching functions with a (static) hazard-free
two-level AND-OR or OR-AND circuit.
(a) f (x1 , x2 , x3 , x4 ) = x01 x3 + x2 x4 + x1 x03 x04
(b) f (x1 , x2 , x3 , x4 ) = (x02 + x3 + x4 )(x01 + x4 )(x1 + x03 + x04 )(x2 + x3 + x04 )
4. Find the minimal 2-level realization for the following sets of functions
(considering them together):
X
X
f1 (x1 , x2 , x3 ) =
m(0, 3) +
m(2, 7)
dc

f2 (x1 , x2 , x3 ) =

m(2, 3, 4) +

m(7)

dc

5. Use the Quine-McCluskey method to find a minimal 2-level SOP realization of the function,
X
X
f (x1 , x2 , x3 , x4 ) =
m(4, 5, 7, 12, 14, 15) +
m(3, 8, 10)
dc

6. Give simplified expression of Y = (A, B, C, D) = m(1, 2, 8, 9, 10, 12, 13, 14)

using QM method
7. With the aid of a map, minimize the function
f (v, w, x, y, z) = m(1, 2, 6, 7, 9, 13, 14, 15, 17, 22, 23, 25, 29, 30, 31).
8. Analyze the circuit of Figure 1 for static hazards. Redesign it to make it
hazard-free

Figure 1