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VSC-MMC STATION MODELS

MODULAR MULTILEVEL CONVERTER


in EMTP-RV

January 20, 2014

Prepared by:
Hani Saad and Jean Mahseredjian
cole Polytechnique de Montral, Canada
Sbastien Dennetire
Rseau de transport dlectricit, France

Table of Contents
1

ACKNOWLEDGEMENT .............................................................................................................................. 3

OBJECTIVE ................................................................................................................................................. 3

INTRODUCTION .......................................................................................................................................... 3

MMC STATION MODEL .............................................................................................................................. 6


4.1

OVERALL MODEL DESCRIPTION .............................................................................................................. 6

4.2

STEP-UP TRANSFORMER......................................................................................................................... 7

4.3

MAIN AC BREAKER .................................................................................................................................. 8

4.4

AC CONVERTER BREAKER ...................................................................................................................... 8

4.5

START POINT REACTOR .......................................................................................................................... 8

4.6

MODULAR MULTILEVEL CONVERT (MMC) ............................................................................................... 8

4.6.1

Model 1 Full Detailed ................................................................................................................................. 9

4.6.2

Model 2 - Detailed equivalent...................................................................................................................... 10

4.6.3

Model 3 - Switching function of Arm ........................................................................................................... 13

4.6.4

Model 4 - AVM based on power frequency .................................................................................................. 15

4.7

CONTROL SYSTEM ............................................................................................................................... 16

4.7.1

Principle of operation .................................................................................................................................. 16

4.7.2

Upper Level Control and Protection system ................................................................................................ 17

4.7.3

Upper Level Control .................................................................................................................................... 17

4.7.4

Lower Level Control .................................................................................................................................... 25

4.8

PROTECTION SYSTEM .......................................................................................................................... 27

4.9

START-UP SEQUENCE ........................................................................................................................... 28

4.10

INITIAL CONDITIONS AND LOAD-FLOW SOLUTION .................................................................................... 28

SIMULATION RESULTS ........................................................................................................................... 29


5.1

STEP CHANGE ON ACTIVE POWER REFERENCE ....................................................................................... 29

5.2

THREE-PHASE AC FAULT ....................................................................................................................... 30

5.3

POLE-TO-POLE DC FAULT ...................................................................................................................... 31

5.4

START-UP SEQUENCE ........................................................................................................................... 32

REFERENCES ........................................................................................................................................... 35

1 Acknowledgement
The development of the models presented in this document was funded by RTE-France (Rseau de transport
dlectricit).

2 Objective
The objective of this document is to present the Modular Multilevel Converter (MMC) Station model in EMTPRV. The document describes the main components and control blocks of MMC station models. A comparison
between different MMC modeling is also included for validation purposes.

3 Introduction
The development of controllable semiconductor switches and Voltage Source Converter (VSC) technologies is
rapidly expanding the fields of applications of HVDC and FACTS in power systems. VSC-based HVDC
systems present several advantages in comparison with traditional line-commutated converter (LCC) based
HVDC transmission [1]. VSC-HVDC technology combines IGBT-based VSC with dc transmission lines to
transfer power up to 1,000 MW [2]. The potential applications of VSC-HVDC systems include interconnections
of asynchronous systems, grid integration of off-shore wind farms, electrification of remote islands, oil and gas
stations, and multi-terminal dc grids [11]-[3]. VSC-HVDC systems can independently control both active and
reactive powers by maintaining stable voltage and frequency [4] which enables the supply of very weak grids
and even passive networks [5]. Various VSC topologies, including the conventional two-level, multi-level
diode-clamped and floating capacitor multi-level converters, have been proposed and reported in [6]. However,
due to the complexity of controls and practical limitations, the VSC-HVDC system installations have been
limited to the two-level and three-level diode-clamped converters. Recently, the development of the Modular
Multilevel Converter (MMC) technology with series-connected half-bridge modules, has overcome the
limitations of other multilevel converter topologies for HVDC applications [7]. MMC topologies allow using a
lower switching frequency for reducing converter losses. In addition, filter requirements are eliminated by using
a significant number of levels per phase. Scalability to higher voltages is easily achieved and reliability is
improved by increasing the number of sub-modules (SMs) per arm [8].
In the EMTP-RV model, two types of MMC station configurations are available: Monopole configuration (Figure
1) and Bipole with earth grounding return (Figure 2). The Bipole configuration is composed from two identical
Monopole configurations connected at ac and dc sides (see Figure 2).

vabc _ sec ondary


iabc _ sec ondary

DC
side

AC
breaker

converter
breaker

Transformer

start point
reactor

AC
side

vabc _ primary
iabc _ primary

MMC

Figure 1: Typical Monopole Configuration of a MMC station

Transformer2
AC
side

MMC1

DC
side

Transformer2
MMC2
Figure 2: Bipole with earth grounding return Configuration of a MMC station

Figure 3.a shows the three-phase configuration of the MMC topology. This MMC model is based on the
preliminary MMC-HVDC system design for the planned interconnection between France and Spain 400 kV
networks in 2013 [9][10]. The MMC is comprised of N SMs per arm which results into a line-to-neutral voltage
waveform of (N+1) levels [10]. The inductor Larm is added on each arm to limit arm-current harmonics and
fault currents. Each SM is a half-bridge converter as depicted in Figure 3.b and includes mainly a capacitor C
and two IGBTs with antiparallel diodes (S1 and S2).
Since the IGBT device is controllable, through gate signals g1i and g 2i , the SM can have three different states.
In the ON state: g1i is on, g 2i is off and the SM voltage vSM i is equal to the capacitor voltage vCi . In the OFF
state: g1i is off, is g 2i is on and vSM i 0 . In the Blocked state: g1i is off, g 2i is off and vSM i depends on the arm
current ( iarm ) direction. The capacitor may charge through S1 and cannot discharge.

Idc

iua

SM1ua

vua

iub

SM1ub

SM2ua
..
.

Larm

Sub-module

SM2uc

..
.

..
.

SM Nub

SM Nuc

Larm

Arm

Larm

vSM i+ g 2i

Larm

va

SM1

SM1

SM2

SM2

SM2

SM N

SM N

ib

vCi C
-

b)

Larm

..
.

S2

SM1

..
.

ia

Larm

S1 +

g1i

iarm

Vdc

SM1uc

SM2ub

SM Nua

va ia
vb ib
vc ic

iuc

..
.
b

ic

SM N

a)
Figure 3: a) MMC topology b) Half-bridge converter for the ith SM
Since the MMC topology is of VSC type [13], it uses an upper level control similar to the previous VSC
technology. However, the MMC topology requires additional controllers in order to stabilize internal variables
(Lower Level Control): SM capacitor voltages, second harmonic circulating currents of each phase and
modulation technique [18][14]. A top level view of the control structure is presented in Figure 4.

AC
side

DC
side

VSC-MMC
measurements

Powerangle
control
(or V/F
control)

or

BCA
suabc , slabc

Outer
Control
P/Q/Vdc

NLC
Modulation

vrefuabc , vreflabc

Inner
Control

CCSC

vrefabc
Figure 4: Control hierarchy for the MMC station

Lower level control

Upper level control

gate signal

Several control methods area available for Upper Level Control. Among them the power-angle and vectorcurrent controls are the mostly widely used. The principle of power-angle control is simple. The active power is
controlled by the phase-angle shift between the VSC and the ac system, while the reactive power is controlled
by varying the VSC voltage magnitude [15]. Power-angle control (or V/F control) is used when the VSC
converter is connected to an ac system with passive load or for wind-turbine applications [11]. Vector-current
control [4] is a current-control-based technology. Thus, it can naturally limit the current flowing into the
converter during disturbances. The basic principle of vector-current control is to regulate the instantaneous
active and reactive powers independently through a fast inner current control loop. By using a dq
decomposition technique with the grid voltage as phase reference, the inner current control loop decouples the
current into d and q components, where outer loops can use the d component to control active power or dc
voltage, and the q component to control reactive power or ac voltage. Due to its successful application in
HVDC transmission system, vector-current control has become the dominant control method for gridconnected VSCs in almost all applications today [17].

4 MMC station model


This section describes the main components and control system of the MMC station model available in EMTPRV.

4.1

Overall Model Description

The model is a 1,060 MVA MMC station connected to a 400 kV ac system at the Point of Common Coupling
(PCC) through a 400/320 kV step-up transformer and 640 kV pole-to-pole dc voltage, as shown in Figure 5. It
should be noted that these parameters can be modified in the main mask.

Primary3

MMC 401Levels

AC

Page activate_ConvBRK
+
1000

Input
S_up_A Page

Page Vdc_V

Ouput

S_low_A

Page

S_up_A
S_low_A

S_up_B
S_low_B

Page
Page

S_up_B Gate
S_low_B signals

S_up_C
S_low_C

Page
Page

S_up_C
S_low_C

1e15

+
cSW1

StarPointReactor_BRK Page

+
-

AC_convertor_BRK2
Secondary1

Transformer2

Star_point_react2
+
7700,6500

AC_BRK2

Page Iac_secondary_A

Page Vac_secondary_V
1

This device is used for


load-flow and initialization (t<t_init)
of the MMC station model

MMC_401L1

Page Iac_primary_A

Page Vac_primary_V
v

Load-Flow and
initialization

AC

Page activate_AC_BRK
LF_init2

Page Idc_A
i(t)

AC_Converter

Vc_up_A
Vc_low_A

Page Vc_up_A
Page Vc_low_A

Capa.
Vc_up_B
Voltages Vc_low_B

Page Vc_up_B
Page Vc_low_B

Vc_up_C
Vc_low_C

Page Vc_up_C
Page Vc_low_C

Current
Arms

i_up_A
i_low_A

Page i_up_A
Page i_low_A

i_up_B
i_low_B

Page i_up_B
Page i_low_B

i_up_C
i_low_C

Page i_up_C
Page i_low_C

Va_ref Va_ref
Vb_ref Vb_ref
Vc_ref Vc_ref

Page Vabc_ref

Vac_secondary_V Page
Iac_secondary_A Page
Vdc_V Page
Idc_A Page

Vac_primary_V
Iac_primary_A
Vac_secondary_V
Iac_secondary_A
Vdc_V
Idc_A

Vabc_ref
theta_rad
Vdc
P
Q
block_MMC
AC_BRK
converter_BRK
StarPointReactor

theta

block_MMC

Upper Level Control


and Protection system
Vac_primary_V Page
Iac_primary_A Page

SM_protection1

Page

Lower_Level_Ctrl1

Lower Level Control

UpperCtrl_Protec1

SM
Protection
order

Page P
Page Q
Page
Page
Page
Page

block_MMC
activate_AC_BRK
activate_ConvBRK
StarPointReactor_BRK

Vc_up_A Page
Vc_low_A Page

Vc_up_A
Vc_low_A

Vc_up_B Page
Vc_low_B Page

Vc_up_B Capa.
Vc_low_B Voltages

Vc_up_C Page
Vc_low_C Page

Vc_up_C
Vc_low_C

i_up_A Page
i_low_A Page

i_up_A
i_low_A

i_up_B Page
i_low_B Page

i_up_B
i_low_B

i_up_C Page
i_low_C Page

i_up_C
i_low_C

S_up_A
S_low_A

B1
B3

B2
B4

Page S_up_A
Page S_low_A

Gate
S_up_B
signals S_low_B

B5
B7

B6
B8

Page S_up_B
Page S_low_B

B9
B11

B10
B12

Page S_up_C
Page S_low_C

S_up_C
S_low_C

Current
Arms

Figure 5: MMC station EMTP-RV

The main components of the MMC station include:

Initialization and load-flow system to represent the MMC station for load-flow solution.

Step-up transformer

The main ac breaker

Star point reactor

AC converter breaker and the insertion resistance for start-up procedure

The ac/dc converter based on Modular Multilevel Converter (MMC) technology

Control and protection system composed from the Upper and Lowe Level control.
A detailed description of each component is presented in the following sections.

4.2

Step-up transformer

The MMC is connected to the ac grid through a step-up transformer. The transformer connection is wyegrounded on the primary side (ac grid) and Delta on the secondary side (converter side). The transformer
impedance has a value of 18% and can be configured from the main mask. In this version the remaining
parameters can be configured from the MMC_m.dwj file found in the Toolboxes\MMC folder.

4.3

Main ac breaker

The main ac breaker is used to connect the MMC station to the ac grid. During normal operation, the ac
breaker is closed. The breaker is controlled from the protection system. If the protection system is active and a
dc overcurrent is detected, the MMC station is tripped (by opening the ac breaker) and the MMC is blocked.

4.4

AC converter breaker

The ac converter breaker is used for the start-up sequence. When it is open, the insertion resistance
(connected in parallel) will limit the current flowing into the MMC. If the start-up sequence is unchecked, the ac
converter breaker is always closed.

4.5

Start point reactor

Since the secondary winding of the transformer has a Delta connection, the start point reactor is used to give
to the MMC a reference to ground.

4.6

Modular Multilevel Convert (MMC)

The large number of IGBTs in MMCs complicates the simulations in electromagnetic transient type (EMT-type)
simulation tools. Detailed MMC models must include the representation of thousands of IGBTs and small
numerical integration time steps are required to accurately represent fast and multiple simultaneous switching
events. The excessive computational burden introduced by such models highlights the need to develop more
efficient models. A current trend is based on simplified and averaged value models capable of delivering
sufficient accuracy [19] in dynamic simulations.
Average Value Models (AVMs) approximate system dynamics by neglecting switching details [20]. They
require significantly less computational resources and can use larger integration time steps leading to much
faster computations.
Circuit reduction is achieved by the replacement of IGBTs by on/off resistors in the SMs. The equivalent circuit
usage allows reducing the number of operations and improving computational performance.
Four types of MMC models are available in EMTP-RV. These models can be used according to the type of
study and required accuracy. MMC model evolution in decreasing complexity is depicted in Figure 6. Black
boxes represent simplifications of each model. It is expected, that by decreasing model complexity,
computational performance can be increased.

..
.

Model 1

..
.

Model 3

Model 2

Model 4

Figure 6: MMC model evolution in decreasing complexity


The model details are presented in the next sections.

4.6.1 Model 1 Full Detailed


This model is based on nonlinear IGBT representation. It is the most accurate model and can account for
every conduction mode of the MMC. This model requires the highest computational time. It can be used for
advanced studies, prototyping different SM circuit topologies and to validate results obtained with simplified
models listed below [18]. It can be also used to calibrate parameters in simplified models. Figure 7 shows the
subcircuit hierarchy of a full detailed model of MMC-401L (i.e. 400SM/arm).

pos

pos

pos

SM_11

Sub-module (SM)

Gate_signals
if S=0 --> [S1 S2] = [0 1]
if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S1

S1
S2

S1
S2
V1

Vc

vc1

V0
SM_12

Sub-module (SM)

Gate_signals
if S=0 --> [S1 S2] = [0 1]
if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S2

S1
S2

S1
S2
V1

Vc

vc2

V0
SM_13

Sub-module (SM)

Gate_signals
S

S3

if S=0 --> [S1 S2] = [0 1]


if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S1
S2

S1
S2
V1

Vc

vc3

V0
SM_14

Sub-module (SM)

Gate_signals
S

S4

if S=0 --> [S1 S2] = [0 1]


if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S1
S2

S1
S2
V1

Vc

vc4

V0
SM_15

Sub-module (SM)

Gate_signals
S5

if S=0 --> [S1 S2] = [0 1]


if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S1
S2

S1
S2
V1

Vc

vc5

V0
SM_16

Sub-module (SM)

Gate_signals
S6

S1

if S=0 --> [S1 S2] = [0 1]


if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S1
S2

S1
S2
V1

Vc

vc6

V0

+
#Cp#

RLC +

V1
1M

SM_17

Sub-module (SM)

Gate_signals

Cp
!v

S7

if S=0 --> [S1 S2] = [0 1]


if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S1
S2

V1

SM_18

S8

S1
S2

S1
S2
V1

Vc

vc8

V0
SM_19

Sub-module (SM)

Gate_signals

V0

S9

if S=0 --> [S1 S2] = [0 1]


if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S1
S2

S1
S2
V1

Vc

vc9

V0
SM_20

p1

vc7

Sub-module (SM)

if S=0 --> [S1 S2] = [0 1]


if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

nonlinear diode model


+

Vc

V0

Gate_signals

S2

p2

S1
S2

Sub-module (SM)

Rn1

Gate_signals
S10

if S=0 --> [S1 S2] = [0 1]


if S=1 --> [S1 S2] = [1 0]
if S=2 --> [S1 S2] = [0 0]
if S=3 --> [S1 S2] = [1 1]

S1
S2

S1
S2
V1

V0

Vc

vc10

pos
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph
pos ph

10SM15

10 SM

pos ph

10SM16

10 SM

pos ph

10SM17

10 SM
10SM18

pos ph

10SM14

10 SM

10 SM
10SM19

pos ph

i_low_C

i_low_C

400SM_low_C

10SM13

10 SM
10SM20

pos ph

i_low_B

Vc_low_C

10 SM
10SM40

pos ph

400SM_low_B

Vc

10 SM

10 SM
10SM41

pos ph

400 SM

10SM12

10 SM

10 SM
10SM42

pos ph

S_low_C

Vc_low_B

10SM11

10 SM

10 SM
10SM43

pos ph

Larm4

Vc

10 SM

10 SM
10SM44

pos ph

400 SM

ilb

i_low_B

#Larm_H#

pos

400SM_low_A

i_low_A

ila

10SM10

10 SM
10SM45

pos ph

S_low_B

?s

i_low_A

#Larm_H#

Larm5
Vc_low_A

i(t)

MMC-401 levels
Model 1

Vc

10SM9

10 SM

10 SM
10SM46

pos ph

400 SM

10SM8

10 SM

10 SM
10SM47

pos ph

ph

S_low_A

i(t)

+
-

ilc

ph

scope
Varm_la

ph

i_up_C
i_low_C

pos

Larm6

+
pos

i_up_B
i_low_B

i(t)

Current
Arms

#Larm_H#

i_up_A
i_low_A

10SM7

10 SM

10 SM
10SM48

pos ph

AC b
AC

10SM6

10 SM

10 SM
10SM49

pos ph

10SM5

10 SM

10 SM
10SM50

pos ph

Vc_up_C

10SM4

10 SM

10 SM
10SM51

pos ph

Larm3

Vc

400SM_up_C

10SM3

10 SM

10 SM
10SM52

pos ph

400 SM

Vc_up_B

400SM_up_B

ph
Larm2

Vc

ph

400 SM

#Larm_H#

S_up_B

10SM2

10 SM

10 SM
10SM53

pos ph

pos
Vc_up_A

10 SM

10 SM
10SM54

pos ph

Vc_up_C
Vc_low_C

Vc

400SM_up_A

Larm1

Capa.
Vc_up_B
Voltages Vc_low_B

S_up_C
S_low_C

400 SM

ph

S_up_B Gate
S_low_B signals

scope
Varm_ua

S_up_C

#Larm_H#

Vc_up_A
Vc_low_A

S_up_A

#Larm_H#

S_up_A
S_low_A

+
-

pos

Ouput

10SM1

10 SM
10SM55

pos ph

10 SM

10 SM
10SM56

pos ph

i(t)

i_up_C

iuc

i_up_C

iub

i_up_B

?s

iua

i_up_B

pos

Input

i_up_A

S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10

10 SM
10SM57

pos ph

MMC 401Levels

AC

i_up_A

i(t)

i(t)

MMC_401L

Vc
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
S51
S52
S53
S54
S55
S56
S57
S58
S59
S60
S61
S62
S63
S64
S65
S66
S67
S68
S69
S70
S71
S72
S73
S74
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86
S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98
S99
S100
S101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112
S113
S114
S115
S116
S117
S118
S119
S120
S121
S122
S123
S124
S125
S126
S127
S128
S129
S130
S131
S132
S133
S134
S135
S136
S137
S138
S139
S140
S141
S142
S143
S144
S145
S146
S147
S148
S149
S150
S151
S152
S153
S154
S155
S156
S157
S158
S159
S160
S161
S162
S163
S164
S165
S166
S167
S168
S169
S170
S171
S172
S173
S174
S175
S176
S177
S178
S179
S180
S181
S182
S183
S184
S185
S186
S187
S188
S189
S190
S191
S192
S193
S194
S195
S196
S197
S198
S199
S200
S201
S202
S203
S204
S205
S206
S207
S208
S209
S210
S211
S212
S213
S214
S215
S216
S217
S218
S219
S220
S221
S222
S223
S224
S225
S226
S227
S228
S229
S230
S231
S232
S233
S234
S235
S236
S237
S238
S239
S240
S241
S242
S243
S244
S245
S246
S247
S248
S249
S250
S251
S252
S253
S254
S255
S256
S257
S258
S259
S260
S261
S262
S263
S264
S265
S266
S267
S268
S269
S270
S271
S272
S273
S274
S275
S276
S277
S278
S279
S280
S281
S282
S283
S284
S285
S286
S287
S288
S289
S290
S291
S292
S293
S294
S295
S296
S297
S298
S299
S300
S301
S302
S303
S304
S305
S306
S307
S308
S309
S310
S311
S312
S313
S314
S315
S316
S317
S318
S319
S320
S321
S322
S323
S324
S325
S326
S327
S328
S329
S330
S331
S332
S333
S334
S335
S336
S337
S338
S339
S340
S341
S342
S343
S344
S345
S346
S347
S348
S349
S350
S351
S352
S353
S354
S355
S356
S357
S358
S359
S360
S361
S362
S363
S364
S365
S366
S367
S368
S369
S370
S371
S372
S373
S374
S375
S376
S377
S378
S379
S380
S381
S382
S383
S384
S385
S386
S387
S388
S389
S390
S391
S392
S393
S394
S395
S396
S397
S398
S399
S400

10 SM
10SM58

pos ph

10 SM
10SM59

ph

vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
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vc7
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vc9
vc10
vc1
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vc4
vc5
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vc7
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vc9
vc10
vc1
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vc7
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vc9
vc10
vc1
vc2
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vc7
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vc9
vc10
vc1
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vc9
vc10
vc1
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vc3
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vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10
vc1
vc2
vc3
vc4
vc5
vc6
vc7
vc8
vc9
vc10

Vc

Vc1
Vc2
Vc3
Vc4
Vc5
Vc6
Vc7
Vc8
Vc9
Vc10
Vc11
Vc12
Vc13
Vc14
Vc15
Vc16
Vc17
Vc18
Vc19
Vc20
Vc21
Vc22
Vc23
Vc24
Vc25
Vc26
Vc27
Vc28
Vc29
Vc30
Vc31
Vc32
Vc33
Vc34
Vc35
Vc36
Vc37
Vc38
Vc39
Vc40
Vc41
Vc42
Vc43
Vc44
Vc45
Vc46
Vc47
Vc48
Vc49
Vc50
Vc51
Vc52
Vc53
Vc54
Vc55
Vc56
Vc57
Vc58
Vc59
Vc60
Vc61
Vc62
Vc63
Vc64
Vc65
Vc66
Vc67
Vc68
Vc69
Vc70
Vc71
Vc72
Vc73
Vc74
Vc75
Vc76
Vc77
Vc78
Vc79
Vc80
Vc81
Vc82
Vc83
Vc84
Vc85
Vc86
Vc87
Vc88
Vc89
Vc90
Vc91
Vc92
Vc93
Vc94
Vc95
Vc96
Vc97
Vc98
Vc99
Vc100
Vc101
Vc102
Vc103
Vc104
Vc105
Vc106
Vc107
Vc108
Vc109
Vc110
Vc111
Vc112
Vc113
Vc114
Vc115
Vc116
Vc117
Vc118
Vc119
Vc120
Vc121
Vc122
Vc123
Vc124
Vc125
Vc126
Vc127
Vc128
Vc129
Vc130
Vc131
Vc132
Vc133
Vc134
Vc135
Vc136
Vc137
Vc138
Vc139
Vc140
Vc141
Vc142
Vc143
Vc144
Vc145
Vc146
Vc147
Vc148
Vc149
Vc150
Vc151
Vc152
Vc153
Vc154
Vc155
Vc156
Vc157
Vc158
Vc159
Vc160
Vc161
Vc162
Vc163
Vc164
Vc165
Vc166
Vc167
Vc168
Vc169
Vc170
Vc171
Vc172
Vc173
Vc174
Vc175
Vc176
Vc177
Vc178
Vc179
Vc180
Vc181
Vc182
Vc183
Vc184
Vc185
Vc186
Vc187
Vc188
Vc189
Vc190
Vc191
Vc192
Vc193
Vc194
Vc195
Vc196
Vc197
Vc198
Vc199
Vc200
Vc201
Vc202
Vc203
Vc204
Vc205
Vc206
Vc207
Vc208
Vc209
Vc210
Vc211
Vc212
Vc213
Vc214
Vc215
Vc216
Vc217
Vc218
Vc219
Vc220
Vc221
Vc222
Vc223
Vc224
Vc225
Vc226
Vc227
Vc228
Vc229
Vc230
Vc231
Vc232
Vc233
Vc234
Vc235
Vc236
Vc237
Vc238
Vc239
Vc240
Vc241
Vc242
Vc243
Vc244
Vc245
Vc246
Vc247
Vc248
Vc249
Vc250
Vc251
Vc252
Vc253
Vc254
Vc255
Vc256
Vc257
Vc258
Vc259
Vc260
Vc261
Vc262
Vc263
Vc264
Vc265
Vc266
Vc267
Vc268
Vc269
Vc270
Vc271
Vc272
Vc273
Vc274
Vc275
Vc276
Vc277
Vc278
Vc279
Vc280
Vc281
Vc282
Vc283
Vc284
Vc285
Vc286
Vc287
Vc288
Vc289
Vc290
Vc291
Vc292
Vc293
Vc294
Vc295
Vc296
Vc297
Vc298
Vc299
Vc300
Vc301
Vc302
Vc303
Vc304
Vc305
Vc306
Vc307
Vc308
Vc309
Vc310
Vc311
Vc312
Vc313
Vc314
Vc315
Vc316
Vc317
Vc318
Vc319
Vc320
Vc321
Vc322
Vc323
Vc324
Vc325
Vc326
Vc327
Vc328
Vc329
Vc330
Vc331
Vc332
Vc333
Vc334
Vc335
Vc336
Vc337
Vc338
Vc339
Vc340
Vc341
Vc342
Vc343
Vc344
Vc345
Vc346
Vc347
Vc348
Vc349
Vc350
Vc351
Vc352
Vc353
Vc354
Vc355
Vc356
Vc357
Vc358
Vc359
Vc360
Vc361
Vc362
Vc363
Vc364
Vc365
Vc366
Vc367
Vc368
Vc369
Vc370
Vc371
Vc372
Vc373
Vc374
Vc375
Vc376
Vc377
Vc378
Vc379
Vc380
Vc381
Vc382
Vc383
Vc384
Vc385
Vc386
Vc387
Vc388
Vc389
Vc390
Vc391
Vc392
Vc393
Vc394
Vc395
Vc396
Vc397
Vc398
Vc399
Vc400

ph
ph

ph

Figure 7: Subcircuit hierarchy of Model 1-Full Detailed for a MMC-401L

For this type of model, three MMC levels are available in EMTP-RV and can be set from the main mask: MMC401L (400SM/arm), MMC-101L (100SM/arm) and MMC-21L (20SM/arm).

4.6.2 Model 2 - Detailed equivalent


In this model the SM power switches are replaced by ON/OFF resistors: RON (small value in m) and ROFF
(large value in M). This approach allows performing an arm circuit reduction for eliminating internal electrical
nodes and allowing the creation of a Norton equivalent for each MMC arm. R1 and R2 are controlled and used
for replacing the two IGTB/diode combinations. With the trapezoidal integration rule, each SM capacitor is
replaced by an equivalent current history source iCh i (t t ) in parallel with a resistance RC t / 2C (Figure
8), where t is the numerical integration time-step. The derivation of these equations and the block station
conditions can be found in [21].

10

iCi

vSM i

vCi RC

iarm
+

R1i
R2i

iChi

Figure 8: Discretized SM with simplified IGBT/diode models


Table 1 shows the algorithm used for Model 2. In point 2 of Table 1, it can be seen that the computation of
ON/OFF states is straight forward since only gate signal values are required. When the Blocked state is set,
only the freewheeling diodes can conduct. The diode conduction states depend on voltage and current
variables (Table 1 point 2) that are known only from the previous iteration ( vSM i (t1 ) and vCi (t1 ) ).
Table 1: MMC arm algorithm of Model 2
1. Retrieve varm (t ) from network solution and compute iarm (t )
2. For i 1, 2,..., N
Set R1i and R2 i values:

R1i RON ; R2 i ROFF


elseif (SMi is OFF) R1i ROFF ; R2 i RON

if (SMi is ON)

elseif (SMi is Blocked)


if

arm (t )

0 and vSM i (t1 ) vCi (t1 )

R1i RON ; R2 i ROFF


if iarm (t ) 0 and vSM i (t1 ) 0
R1i ROFF ; R2 i RON
else R1i ROFF ; R2 i ROFF

Compute vCi (t ) and iCi (t )


Compute Thevenin equivalent of each SM
Compute SM voltages for next iteration: vSM i (t )
3. Compute and send Norton equivalent of the arm

When the Blocked state is set for one of the SMs and a change in conduction state of one of the diodes is
detected, the EMTP-RV iterative process is activated in the current time-step in order to find the correct
conduction states and the trapezoidal integration rule is switched to the Backward Euler method for the next
time-step (see Figure 9).

11

Current time-step

Compute network solution

Compute Model 2 code ( Table 1)

Activate
iterative
process

Blocked
state detected and diode conduction
change ?

Yes

No
Yes

No

Iterative process
was activated ?

Switch from trapezoidal


to Backward-Euler for
next time-step

Update state
variables
Next time-step

Figure 9: Bloc diagram, iterative process used for Model 2


The main advantage of Model 2 is the significant reduction in the number of electrical nodes in the main
system of network equations. The algorithm still considers each SM separately and maintains a record for
individual capacitor voltages. Figure 10 presents the subcircuit hierarchy of model 2.
MMC_401L1

P
AC

Detailed Equivalent-Circuit-based Model (DECM)

Input

MMC 401Levels

Ouput

S_up_A
S_low_A

Vc_up_A
Vc_low_A

S_up_B Gate
S_low_B signals

Capa.
Vc_up_B
Voltages Vc_low_B
i_up_B

i_up_A
i_low_A
i_up_B
i_low_B

i_up_C

iuc

iua

i_up_A

Current
Arms

i(t)

i(t)

i(t)

Vc_up_C
Vc_low_C

iub

S_up_C
S_low_C

MMC arm

S_up_A

MMC arm
Vc_up_A

SM1

S_up_B

MMC arm

Vc_up_B

SM1

S_up_C

Vc_up_C

SM1

i_up_C
i_low_C

Vc1

Vc1
Vc1

SM2

SM2
SM2

scope
Varm_up_phA

Vc2

+
-

Vc2
Vc2

..
..
.

..
..
.

SMi

..
..
.

SMi
SMi

Vci

Model 2

Vci

Vc_tot_ua
scope

Vc_tot

Vci

Vc_tot

Vc_tot

Larm2

#Larm_H#

MMC_arm_DECM5
ModelData=MMC_arm_DLLemtp_06112012,
#Csm_C#, #V_Csm_init#, #Ron_IGBT_Ohm#, 1e5 ,100
ParamsA=2,0,0,2,100,101,1,

#Larm_H#

Larm1

#Larm_H#

MMC_arm_DECM4
ModelData=MMC_arm_DLLemtp_06112012,
#Csm_C#, #V_Csm_init#, #Ron_IGBT_Ohm#, 1e5 ,100
ParamsA=2,0,0,2,100,101,1,

#Larm_H#

Larm

#Larm_H#

#Larm_H#

MMC_arm_DECM1
ModelData=MMC_arm_DLLemtp_06112012,
#Csm_C#, #V_Csm_init#, #Ron_IGBT_Ohm#, 1e5 ,100
ParamsA=2,0,0,2,100,101,1,

a
b
AC

Larm5

Larm4

Larm3

MMC arm
MMC arm

S_low_B

S_low_A

MMC arm

Vc_low_B

SM1

Vc_low_A

SM1

S_low_C

Vc_low_C

SM1

Vc1
scope
Varm_low_phA

Vc1

+
-

Vc1
SM2

SM2

SM2

Vc2
Vc2

Vc2

..
..
.

SMi

..
..
.

..
..
.

SMi

SMi

Vci
Vc_tot

i(t)

MMC_arm_DECM8
ModelData=MMC_arm_DLLemtp_06112012,
#Csm_C#, #V_Csm_init#, #Ron_IGBT_Ohm#, 1e5 ,100
ParamsA=2,0,0,2,100,101,1,

i_low_B

ilb

i(t)

MMC_arm_DECM6
ModelData=MMC_arm_DLLemtp_06112012,
#Csm_C#, #V_Csm_init#, #Ron_IGBT_Ohm#, 1e5 ,100
ParamsA=2,0,0,2,100,101,1,

i_low_A

Vci

Vc_tot
MMC_arm_DECM7
ModelData=MMC_arm_DLLemtp_06112012,
#Csm_C#, #V_Csm_init#, #Ron_IGBT_Ohm#, 1e5 ,100
ParamsA=2,0,0,2,100,101,1,

i_low_C

ila

DLL block
MMC_arm_DLLemtp_06112012.dll

Vc_tot_la
scope

i(t)

Vc_tot

ilc

Vci

Figure 10: Subcircuit hierarchy of Model 2-Detailed Equivalent for a MMC-401L

12

For this type of model, three MMC levels are available in EMTP-RV and can be set from the main mask: MMC401L (400SM/arm), MMC-101L (100SM/arm) and MMC-21L (20SM/arm).

4.6.3 Model 3 - Switching function of Arm


In this model each MMC arm is averaged using the switching function concept of a half-bridge converter. Let Si
be the switching function which takes the value 0 when the state of SM is OFF and 1 when it is ON. For each
SM

vSM i Si vC i

(1)

iCi Si iarm

Assuming that capacitor voltages of each arm are balanced, the average values of capacitor voltages are
equal. In addition, by neglecting the voltage differences between capacitors, the following assumption can be
made:

vC1 vC2 ... vCi

vCtot
N

(2)

where vCtot represents the sum of all capacitor voltages of an arm. The accuracy of assumption (2) increases
when the number of SMs per arm is increased and/or when the fluctuation amplitudes of capacitor voltages
are decreased. This assumption allows deducing an equivalent capacitance Carm C N for each arm.
By defining the switching functions of an arm as follows:
1
N

Si sn

(3)

i 1

and including the linear conductivity losses ( RON ) for each SM, the following switching functions can be
derived for each arm when the SMs are in ON/OFF states:
varm sn vCtot NRON iarm
iCtot sn iarm

(4)

where varm is the arm voltage. Half-bridge converters are non-reversible in voltage. In order to avoid negative
voltages, a diode D is added in parallel with the equivalent capacitor (Figure 11.a).
When all SMs are in the Blocked state, each MMC arm can be simply represented by an equivalent half-bridge
diode connected to the equivalent capacitor (Figure 11.b).

13

vCtot
sn
+

iarm
sn

NRON

iCtot

iarm

a) ON/OFF states

varm

D1

NRON

D2

C
N

vCtot

b) BLOCKED state

Figure 11: Switching function model of MMC arm: a) ON/OFF states model, b) Blocked state model

By reducing each arm to an equivalent switching function model, the SMs are no longer represented. This
means that the balancing controls of capacitor voltages in each arm and redundant SM impacts cannot be
studied using this approach. However, circulating currents and the linear conduction losses can be
represented. Moreover, the energy transferred from ac and dc sides into each arm of the MMC is taken into
account, which is useful for control system strategies based on internal MMC energy balance.
Since this model includes two circuit models (see Figure 11), its implementation in EMT-type programs is hardcoded, using a DLL block, to increase computational performance. Depending on the states of each arm, the
adequate circuit is interfaced with the main network.

MMC_SF_arm

Switching function model


of MMC arm

S_up_B
S_low_B

Vctot_up_A
Vctot_low_A

S_up_C
S_low_C

Vctot_up_B
Vctot_low_B
Vctot_up_C
Vctot_low_C
P

i(t)

i_up_A
i_low_A

i_up_A

i(t)

S_up_A
S_low_A

P
N

i(t)

AC

i_up_B

i_up_B
i_low_B

arm_up_phA

arm_up_phB

SF-arm

i_up_C
i_low_C

scope
Varm_up_A

+
-

SF-arm

Vpos

Vpos

Vneg
S_up_A

arm_up_phC

SF-arm

Vpos
V

i_up_C

Vneg

s_arm

Vc_tot_arm

Vctot_up_A

S_up_B

Vneg

s_arm

Vc_tot_arm

Vctot_up_B

S_up_C

s_arm

Vc_tot_arm

Vctot_up_C

Larm3

#Larm_H#

mmc

#Larm_H#

Larm2

#Larm_H#

#Larm_H#

Larm1

#Larm_H#

#Larm_H#

mmc

MMC Model 3
c

AC

Larm6

Larm5

Larm4

arm_low_phA

arm_low_phB

SF-arm

Vneg

DLL block
Switching_Function_Arm_10062013.dll

s_arm

i(t)

S_low_A

i_low_A

SF-arm
Vpos

Vneg
Vc_tot_arm

Vctot_low_A

S_low_B

s_arm

Vneg
Vc_tot_arm

Vctot_low_B

S_low_C

s_arm

Vc_tot_arm

Vctot_low_C

i(t)

Vpos

i(t)

scope
Varm_low_A

arm_low_phC

SF-arm

Vpos

+
-

i_low_B

i_low_C

Figure 12: Subcircuit hierarchy of Model 3-Switching function, MMC arm

For this type of model, any number of MMC levels can be represented in EMTP-RV and can be set from the
main mask.

14

4.6.4 Model 4 - AVM based on power frequency


In the average value model (AVM), the IGBTs and their diodes are not explicitly represented and the MMC
behavior is modeled using controlled voltage and current sources. The classical AVM approach developed for
2 and 3 level VSCs in [22] is extended to MMCs in [9]. It is used by assuming that the internal variables of the
MMC are perfectly controlled, i.e. all SM capacitor voltages are perfectly balanced and second harmonic
circulating currents in each phase are suppressed. Based on the approach presented in [9], the following
equation can be derived from Figure 3 for each phase j a, b, c

vconv j

Larm di j
vj
2 dt

(5)

Assuming that the total number of inserted SMs in each phase is constant and since the circulating current is
assumed to be zero,

vu j vl j Vdc

(6)

With the above equations (5) and (6), the MMC can be represented as a classical VSC (2 and 3 level
topologies). Thus, using an approach similar to [22], the controlled voltage sources become:

vconv j vref j

Vdc
2

(7)

where vref j are the voltage references generated from the inner controller. The dc side model is derived using
the principle of power balance, thus it assumes that no energy is stored inside the MMC converter:

Vdc I dc

vconv j i j

(8)

vref j i j

(9)

j a ,b , c

The dc current function is derived from(7):


I dc

1
2

j a ,b , c

The equivalent capacitor Cdc (shown in Figure 13) is derived using the energy conservation principle [9] and it
is given by Cdc 6C N .
Unlike the classical VSC model, an inductance is included in each arm of the MMC, thus an equivalent
inductance should be also added on the dc side. Since one third of the dc current flows in each arm and the
same dc current flows in upper and lower arms of each phase, the equivalent inductance is given by

Larmdc 2 3 Larm . The total conduction losses of the MMC can be found using Rloss 2 3 N RON . The
implementation of Model 4 in EMTP-RV is presented in Figure 13

15

AVM1

AC

P
N

AVM
MMC

varef
vbref
vcref

Trip

Page Ia
Page Ib
Page Ic

MMC Model 4

i(t)

c
Req_DC
+
#AVM_Req_Ohm#

Iac

AC

Leq_DC

#AVM_Leq_DC_H#

Vdc
Vref

Vac
0/1e15

Vc_tot Page
Vcref Page

Vdc
Vref

+
-

DCside1

Ia Page
Ib Page
Ic Page

Vac

C1
#AVM_Ceq_C#

Vref_phA
Vref_phB
Vref_phC

I_dc

cI1

Page Vc_tot

DC_side
Varef Page
Vbref Page
Vcref Page

AC_side
+

+
0/1e15

Vc_tot Page
Vbref Page

AC_side_phC

AC_side

Vac

#AVM_Leq_AC_H#

Larm_equi

AC_side_phB

AC_side
Vdc
Vref

Trip

AC_side_phA

Vc_tot Page
Varef Page

#AVM_Leq_AC_H#

Larm_equi1

#AVM_Leq_AC_H#

Larm_equi2

!v

0/1e15

Iac_phA
Iac_phB
Iac_phC

0/1e15

N
varef
vbref
vcref

Page Varef
Page Vbref
Page Vcref

Figure 13: Subcircuit hierarchy of Model 4-AVM

4.7

Control System

Since the MMC topology is of VSC type [13], it uses an upper level control similar to the previous VSC
technology.

4.7.1 Principle of operation


In order to understand the principle of the VSC-MMC control system, let us first consider the two bus system
(Figure 14), where Vs is the ac voltage source, Vconv is the ac voltage of the converter and X is the equivalent
inductance between the ac source and converter (i.e. transformer leakage inductance, equivalent arm
inductance, etc.). The losses are neglected for simplification purposes. The transferred active and reactive
powers from the source to the converter are given by the following relationships:

VSVconv
sin( )
X
2
VV
cos( ) Vconv
QR S conv
X
PR

where is the angle between the two voltages.

16

(10)

R
X

Vs

+
Vconv

Figure 14: Two-bus system representing the functionality of the VSC-MMC control system
Assuming that the angle is small, the power equations (10) can be linearized as follow:

PR
QR

VSVconv

X
Vconv VS Vconv

(11)

From (11), on can see that by controlling the voltage amplitude and phase angle of the converter, it is then
possible to regulate the active and reactive powers at a desired set-point.

4.7.2 Upper Level Control and Protection system


The contents of the UpperCtrl_Protect block are presented in Figure 15. All measured signals entering the
control system are, first, converted to pu (Convert_to_pu bloc) and then filtered by means of a Low-pass filter
with a cut-off frequency equal to 2kHz (LP_filter bloc). The UpperCtrl block includes the Upper Level Control
system that will be described in the next section. The Protect_StartUp block includes the dc overcurrent and
Deep Voltage Sag detectors for protecting the converter and the start-up sequence devices.

LP_filter1
convert_pu1

Low_pass filter
2nd order

Convert to pu
Vdc_V
Idc_A
Vac_primary_V
Iac_primary_A
Vac_secondary_V
Iac_secondary_A

Vdc_V
Idc_A

Vdc_pu
Idc_pu

Vac_primary_V
Iac_primary_A
Vac_secondary_V
Iac_secondary_A

UpperCtrl1

Upper Level Control


Vdc_meas

Vac_primary_pu
Iac_primary_pu

Vabc_ref
Vdc
P
Q

Vac_primary
Iac_primary

Vac_secondary_pu
Iac_secondary_pu

Vac_secondary
Iac_secondary

theta_rad

Vabc_ref
Vdc
P
Q
theta_rad

Protect_StartUp

Start-up sequence
and Protection system
Idc
Vac_primary

AC_BRK
converter_BRK
block_MMC
StarPointReactor

AC_BRK
converter_BRK
block_MMC
StarPointReactor

Figure 15: Upper Level Control and Protection System

4.7.3 Upper Level Control


The UpperCtrl block is presented in Figure 16. As previously mentioned, all variables are in pu except for the
theta angle that is in radians.

17

The three following blocks: Clarke_transfo, signal_calculations and dq_transfo compute the required variables
needed for the control system. Clarke transformation is implemented in the Clarke_transfo block. AC voltage,
active and reactive powers are computed in the signal_calculations block. The dq_transfo block is used to
extract the dq components from the three-phase ac voltages and currents.
The transformation matrix T in equation (12) transforms the three-phase variables (voltages and currents) to
two quadrature axis (d and q reference frame) components rotating at synchronous speed w d / dt . The
phase angle is derived, found by mans of an internal oscillator (if V/F control is selected from the main
mask) or found by the PLL allowing the synchronization of control parameters with the system voltage. In the
matrix T , the direct axis d is aligned with the grid voltage.
T

cos(t ) cos(t 2 / 3) cos(t 2 / 3t )


2
sin(t ) sin(t 2 / 3) sin(t 2 / 3)
3
1/ 2

1/ 2
1/ 2

(12)

Using the transformation matrix T , the dq voltage and current variables can be deduced:

idq Tiabc

(13)

vdq Tvabc _ grid

(14)

The active and reactive powers and the ac grid voltage (in pu) are calculated from the dq reference as follows:

P vd id vq iq

(15)

Q vd iq vq id

(16)

vgrid vd2 vq2

(17)

Two main structures of upper level controls exist (see Figure 4): V/F control (or power-angle control)
represented by the VFcontrol block and vector-current control represented by the Outer_control and
Inner_control (Figure 16). The regulations of variables are performed through a PI control loop. All PI
controllers are equipped with anti-windup function. This later will prevent the integral part from the
accumulation of errors when the output value reaches the limit set by the user and enhances control
performances [23]. The integral and proportional gains of each PI controller are automatically calculated based
on the settling time (within 5% of error) chosen by the user. These settling times (or constant times) can be
modified in the main mask. The background color of the MMC station block changes automatically depending
on the selected type (see Table 2).

18

Table 2 Assigned background colors for each Outer control type


Outer Controller Type

Assigned Color for MMC model


MMC1
MMC

Active Power Control (Green color)


S
MMC1
MMC

DC voltage Control (Cyan color)

S
MMC1
MMC

P/Vdc Droop Control (Pink color)

S
MMC1
MMC

V/F control (Gray color)

A detailed description of each control block is provided in the following sections.


The selector block is used to switch automatically between vector-current control and V/F control depending
on the outer control type chosen by the user from the main mask.
The Synchronization block is required for synchronization with the ac grid. It includes PLL and the internal
oscillator. The Linearization_dq2abc block is for linearization and converts from dq to abc reference.
LP_filter_2nd2
Vdc_meas

Vdc

LP Filter
2nd Odrer o

P
Q
Outer_Control

signal_calculations

P/Q/Vac
calculations

Clarke_transfo

Clarke transformation
Vac_primary
Iac_primary

Vabc_Y
Iabc_Y

Vac_secondary
Iac_secondary

Vabc_D
Iabc_D

Outer Control
Inner_Control2

Inner Control

Vdc

V_alpha_Y
V_beta_Y

V_alpha_Y
V_beta_Y

I_alpha_Y
I_beta_Y

I_alpha_Y
I_beta_Y

Vac_grid

Id_ref
Iq_ref

id_ref
iq_ref

Vac_grid

V_alpha_D
V_beta_D

Vd
Vq

Iq

Vd_ref
Vq_ref

id
iq

I_alpha_D
I_beta_D

dq_transfo

dq
transfomrations
Vd
Vq

I_alpha_D
I_beta_D

Id
Iq

theta

V_alpha_Y
V_beta_Y

Inner_Control3
DEV1

selector

Linearization
& dq to abc
Vd_ref
Vq_ref

Vabc_ref

Vabc_ref

m
Vdc
VF_control1

theta

Vdc_meas

V/F control
Vac_grid
Id

Vd_ref
Vq_ref

Synchronisation

Synchronisation
U_alpha

theta_rad

theta_rad

U_beta

Figure 16: Upper Level Control block

4.7.3.1 V/F control (Vac/f control)


To produce three-phase ac voltages, the converter needs three variables: magnitude, phase angle and
frequency. In the V/F control, the phase angle and frequency are generated from the internal oscillator (see
Synchronization/oscillator bloc). However the ac voltage magnitude is controlled by means of a PI control. The
control law is

19

vgrid k p i vref vgrid


s

(18)

Only the integer part is used in the presented EMTP-RV model; however user can use also a PI control. The
tuning of the integral gain (VFctrl_ki) is dependent from the ac grid impedance at PCC.
As grid voltage vector is aligned with the d axis and based on [24], the following equation can be driven:
vd _ ref V0 vgrid H HP s id

(19)

vq _ ref 0

(20)

where V0 is the nominal voltage (equal to vref ), H HP s is a high-pass filter and the term H HP s id is used for
damping (further information can be found in [24]). The VF_control block is shown in Figure 17.
The integral value is forced to zero
during initialization betwen 0<t<0.05
PI_control1
(t<0.05)
f(u)

0
Limit
0.3

Vref
scope

sg1

max
min

-1

#VFctrl_Ki#

PI

Kp
Ki

step

Reset_Int
Reset_Value

out

Vd_ref

Vac_grid

V_grid
scope

reference

c
#V_ref#
HPfilter_1st2

Id

0.3

HighPass
Filter
o
1stOrder

Vq_ref

Vq_ref

Figure 17: V/F control (Vac/f control)


V/F control is usually used when the VSC converter is connected to an ac system with passive load or for
wind-turbine applications.

4.7.3.2 Vector-current control (Outer/Inner control)


Outer_control and Inner_control blocks represent the vector-current control. The basic principle of vectorcurrent control is to regulate the instantaneous active and reactive powers independently through a fast inner
current control loop. By using a dq decomposition technique with the grid voltage as phase reference, the
inner current control loop decouples the current into d and q components, where outer loops can use the d
component to control active power (P control) or dc voltage (Vdc control), and the q component to control
reactive power (Q control) or ac voltage (Vac control). One of the main advantages of this control system is his
ability to limit the current flowing into the converter during disturbances. Due to its successful application in
HVDC transmission system, vector-current control has become the dominant control method for gridconnected VSCs in almost all applications today [17].
Using the current sign convention from Figure 1 and Figure 3 (current entering into the MMC) and neglecting
the start point reactor, the following equations can be written for each phase j a, b, c

20

diu j
di j
Vdc
vu j Larm
Rarmiu j Ltransfo
Rtransfoi j vgrid j
2
dt
dt
Vdc
v
2

Larm

di

Rarm i

dt

Ltransfo

di j
dt

(21)

Rtransfoi j vgrid j

(22)

The following variable is defined

vconv j

vu j

(23)

Using (23) and subtracting (21) and (22):


L
di j Rarm

vgrid j vconv j arm Ltransfo

Rtransfo i j
2
dt 2

(24)

By applying Park transformation, (24) becomes:

vconvd irefd id k p i vd arm Ltransfo iq


s
2

ki

Larm

vconvq iref q iq k p vq
Ltransfo id
s

(25)

The inner controller is presented in Figure 18 and permits controlling the reference voltages (Vd_ref and
Vq_ref) that will be used for the Lower Level Control. In order to decouple the d- and q-axis, a feed-forward
technique is used to compensate cross-coupling terms.
LPfilter_1st5

LowPass
Filter
i
o
1stOrder

Vd

PI_control1
0.5

Gain2

id_ref
scope
id_ref

max
min

-1

Kp
Ki

c
#Ictrl_Kp#c
#Ictrl_Ki#

PI

out

Vd_ref

id

1
2

id
scope

PROD

c
#Lac_equi_pu#

1
2

iq
scope
0.5

-1

iq

c
iq_ref

PROD

PI_control2

#Ictrl_Kp# c
#Ictrl_Ki#

max
min
Kp
Ki

PI

out

Vq_ref

u
LPfilter_1st6

iq_ref
scope
Vq

LowPass
Filter
o
1stOrder

Figure 18: Inner Control


The outer controller is shown in Figure 19. It provides the reference currents (Id_ref, Iq_ref) to the inner
controller. From the main mask, the user can choose between three types of outer controls: active power
control (P control), DC voltage control (Vdc control) and droop control (P/Vdc control). The selector blocks

21

(violet color) are configured to automatically switch depending on the chosen control type. Also, in the main
mask, the user can choose between reactive power control (Q control) and ac voltage control (Vac control).
For the later, the selector is colored in pink to switch automatically form Q control and Vac control.

4.7.3.2.1

Active power control (P control)

As grid voltage vector is aligned with the d axis, the q component of the grid voltage is equal to zero and d
component is equal to the voltage magnitude. Equation (15) becomes:

P vd id

(26)

An integral control is sufficient to produce the desired d current reference (Id_ref). The control law of P control
is defined respectively as:
idref

4.7.3.2.2

k
1
k p i Pref P
vd
s

(27)

DC voltage control (Vdc control)

From the MMC-AVM model (described in section 4.6.4) it can be found that SM capacitors can be represented
as an equivalent capacitor Cdc . Since the energy in the equivalent inductance LDC is small, it can be
neglected. The following equation can be deduced
Cdc

dVdc
id I dc
dt

(28)

After neglecting the feed-forward component I dc , a PI-control can be applied to regulate the DC voltage:

idref k p i Vdcref Vdc


s

4.7.3.2.3

(29)

P/Vdc Droop control

The Droop control functionality in the dc grid is similar to the Droop control in the ac grid. In the ac grid the
relationship is between frequency and active power, in the dc grid the DC voltage is a function of active power
and the droop coefficient is given by:

kdroop

Vdc
P

(30)

The active power delta is added over the active power reference (Pref) as shown in Figure 19.

4.7.3.2.4

Reactive power control (Q control)

As the grid voltage vector is aligned with the d axis, the q component of the grid voltage is equal to zero and d
component equal to the voltage magnitude. The equation (16) becomes:

Q vd iq

(31)

22

An integral control is sufficient to produce the desired q current reference (iq_ref). The control law of Q control
is defined as

1 ki
Pref P
vd s

iqref

4.7.3.2.5

(32)

AC voltage control (Vac control)

From the reactive power equation(11), the voltage drop vgrid over the reactance ( X PCC ) of the ac grid at
PCC can be approximated as:

X PCC Q
vs

vgrid vs vgrid

(33)

Since the grid voltage vector is aligned with the d axis and using (31), (33) becomes:

vgrid X PCC id

(34)

An integral control is sufficient to produce the desired q current reference (Iq_ref):

k
iqref i Vref Vgrid
s

(35)

#Start_up# + 1
f(u)

sg3
rate_limiter5

Gain6

PI_control2
0

step
1

f(u)

ABS(u[1])

1.0005

f(u)

select

#Choice_regulator#
1.2

SIGN(u[2])*u[1]

step

max
min

-1

Ki
Kp

#VdcCtrl_Ki# c

0
0
0

Vdc_reference

Vdc_ref
scope

select

1
3

Anti-Windup
PI control

out

#VdcCtrl_Kp#

Vdc

Page Vdc_ref

Page Vdc
Vdc
scope

#Choice_regulator#

c
#Choice_regulator#

deadband_control2

Droop_control1

Vdc_ref

Vdc_ref Page

Vdc

Vdc Page

0
0

Droop
Control

1.05
0.95

select

#Pctrl_Vdc_Kp#

delta_P

Vdc_max
Vdc_min

kp_Udc

Vdc

Pref

0
0
0
0

Pref

Vdc

Vdc Page

0
0

c
c

4
5

select

2
3
4
5

Limiter over active power : Pmax=f(Vac)


Attention: P direction is flowing into VSC
Ftb2
Pref_max

Vac_grid Page

-1

PI_control

Pref_min

Pref
scope

#Start_up# + 1
Power_reference

1.2

max
min

-1

f(u)

step
1

f(t)

select

#Pctrl_Ki#

1.2

f(t)

Anti-Windup
PI control

Ki
Kp

out

-1.2

sg2
rate_limiter1
step
1

f(u)

ABS(u[1])

P
scope

f(u)

#Choice_regulator#

#Start_up#+1

SIGN(u[2])*u[1]

f(u)

Power_to_Current
LP_filter_2nd2
Vac_grid Page

Limiter over reactive power :


Qmax=f(Vac) and Qmin=f(Vac)
Attention: Q direction is flowing into VSC
Ftb3

LP Filter
2nd Odrer o

1
f(u)

select

2
1

Power To Current

0
0

P_ref

Id_ref

Q_ref

Iq_ref

#Choice_QVac_regulator#

Qref_min

select

Uf_meas

f(u)

Idq_ref_limiter2

4
5

Idq reference limiter


Id_ref_in

Id_ref_out

Id_ref

Iq_ref_in

Iq_ref_out

Iq_ref

#Start_up# + 1
f(u)

Vac_grid Page
Ftb4

PI_control3

Qref_max

Qref
scope

c
0.5

max
min

-1

Q_reference

rate_limiter4

f(t)

Ki
Kp

#Qctrl_Ki# 0

step
1
f(t)

f(u)

ABS(u[1])

1
2

f(u)

Anti-Windup
PI control

out

select
1

select

-1

SIGN(u[2])*u[1]

Q
scope

PI_control1

c
Vac_reference

Vac_ref
scope

0.5

max
min

-1

c
#VacCtrl_Ki#

step

Ki
Kp

Anti-Windup
PI control

out

+
-

Vac_grid

Vac_grid
scope
Page Vac_grid
HPfilter_1st1

Iq

0.2

HighPass
Filter
o
1stOrder

Figure 19: Outer Control block


When the start-up sequence is selected from the main mask, the reference values Pref and Vdc have to be
varied during simulation. Thus, the selectors colored in green are added in order to switch automatically from

23

constant references (used for normal operation of MMC station) to a time-domain varying reference (used for
start-up sequence).
A current limiter is included in the outer control block in order to limit the converter current reference to a preset value. The current limiter control block is presented in Figure 20. The maximum converter currents are
defined in the main mask. The user can choose between P or Q priority. The choice of which priority to choose
will depend on the application. For instance, if the converter is connected to a strong grid used for
transmission, the active reference current will be given high priority to produce more active power, when the
current limit is exceeded. If the converter is connected to a weak grid or used to supply an industrial plant, the
VSC will give high priority to the reactive reference current to keep up the ac voltage when the current limit is
exceeded. The remaining capability is then available for active power production.

(#P_priority#==1)*#Id_lim# +
(#P_priority#==0)*u[1]
1

Id_ref_in

Limiter2

MAX

f(u)

Id_ref_out
Id_ref_in

MIN

-1

Id_ref_out

c
1

f(u)

(#P_priority#==0)*#Iq_lim# +
(#P_priority#==1)*u[1]
1

Iq_ref_in

SQRT(u[1]*u[1]-u[2]*u[2])

f(u)

#I_lim#
SQRT(u[1]*u[1]-u[2]*u[2])

Limiter1

#I_lim#

MAX

f(u)

Iq_ref_out

Iq_ref_in

Iq_ref_out
-1

MIN

Figure 20: Current reference limiter EMTP-RV


The synchronization block includes the internal oscillator and the PLL. Depending on the outer control type
chosen from the main mask, the selector block (colored in violet) switches automatically between islanded and
non-islanded operations.
PLL1

PLL
U_alpha
U_beta

U_alpha
U_beta

v1

freq_Hz

Freq_Hz
scope

#Choice_regulator#

theta_rad

select

Oscillator2

Oscillator

theta_rad

freq
theta_rad

Figure 21: Synchronization - EMTP-RV


The main function of the PLL is to synchronize with the phase angle and frequency of the ac grid voltage. The
grid voltage vector is chosen to align with the d axis reference. The PLL model is presented in Figure 22.

24

2*pi*#Freq#
f(u)

Avg. Value
Mean Freq.

Park1

theta

q
0

in
freq

f(t)

PI_Ctrl
out_ini out
u

Park d

U_alpha
U_beta

average

(u[1]) MODULO (2*pi)


1

f(u)

wt

theta_rad

f(t)

PI controller

Avg_Mean_Freq
w

LP_filter_2nd1

Limiter_Variation
u[1] / (2*pi)
1

f(u)

Limiter
variation

LP Filter
2nd Odrer o

Delay

freq_Hz

!h1

Figure 22: PLL Model


The internal oscillator is presented in Figure 23. It simply produces the phase angle.
Freq

2_PI
freq

theta_rad

wt

#Freq#
freq

Figure 23: Internal oscillator


The magnitude of the reference vector Vdq_ref is linearized and limited at 1.5pu maximum value. The
reference voltages are then converted to abc frame (Vabc_ref) as shown in Figure 24. Note that for P/Vdc
droop control, the linearization is by-passed for better dynamic performance.
#Choice_regulator#

c
1

select
1.5

2
3
4

to_SI1

Vd_ref
Vq_ref

5
1

#Vac_secondary_V#

DIV

ParkClark_inv
mag x
rad y

x mag
y rad

polar to xy

xy to polar

d
q
0

a
b
c

Vabc_ref
Va_ref
Vb_ref
Vc_ref

to_SI
1
2

Vdc

theta

#Vdc_V#

Figure 24: Linearization and dq to abc transformation

4.7.4 Lower Level Control


Unlike previous VSC technology, the MMC topology requires additional controllers in order to stabilize internal
variables. The top level view of the control structure is presented in Figure 4.
The Lower Level Control block is hidden by means of a DLL block; hence, this control system is not accessible
and cannot be modified by the user.
Lower level control is composed of: Circulating Current Suppression Control (CCSC), Nearest Level Control
(NLC) modulation and Capacitor Balancing Algorithm (CBA). In this section, only a brief description is given for
each main component.

25

4.7.4.1 Circulating Current Suppression Control (CCSC)


Voltage unbalances between the arm phases of the MMC introduce circulating currents containing a second
harmonic component which not only distorts the arm currents, but also increases the ripple of SM capacitor
voltages. Circulating currents can be eliminated by adding a parallel capacitor (resonant filter) between the
mid-points of the upper and lower arm inductances on each phase [26] or using an active control over the ac
voltage reference vref abc [25]. The latter is chosen in this control system.
Vref_j
Icircular_d*= 0

PI

Icircular_d
Iup_j

+
+

1 Iz_j
2

Icircular_q

Icircular_q*= 0

PI

Ucircular_j

d-q
acb

Vref_up_j

2w0L

Ilow_j

2w0t

2w0L

acb
d-q

2w0t

Vdc/2
Vref_j

Vref_low_j

+
Vdc/2
7

Figure 25: Circulating Current Suppression Control (CCSC)

4.7.4.2 NLC modulation


Traditional modulation techniques proposed to date for MMCs include Phase-Disposition Modulation (PDPWM), Phase-Shift Modulation (PS-PWM), Space-Vector Modulation (SV-PWM), and the improved Selective
Harmonic Elimination method (SHE). As the number of levels increases in MMCs, PWM and SHE techniques
become cumbersome for EMT-type simulations. Therefore, more efficient staircase-type methods, such as the
Nearest Level Control (NLC) technique, can be used. The models developed in EMTP-RV use the NLC
technique proposed in [25].

4.7.4.3 Capacitor Balancing Control


The capacitor voltage at all SMs must be balanced and kept the same during normal operation. To achieve
this, the capacitor voltage (Figure 3.a) must be monitored and switched ON and OFF based on a Balancing
Control Algorithm (BCA). The BCA measures the capacitor voltages at each SM at any instant and sorts them
before selecting the upper and lower SM to switch ON. The number of SMs is determined based on the Nup(t)
and Nlow(t) switching functions, where Nup(t)+Nlow(t) corresponds to the total number of SMs per arm. To
improve the efficiency of the algorithm, the model includes a trigger control that activates the BCA only when a
new (ON/OFF) state in the Nup,low(t) functions is reached. This will avoid switching the SMs at each time step.

26

Trigger when nup or


nlow changes
Determine the number
of required sub-modules
in the upper arm (nup)
and lower arm (nlow) :
nup + nlow = N

Modulate
d voltage

if (iup , ilow) > 0


Select (nup , niow) sub-modules with
the lowest values of (Vcup , Vclow)

if (iup , ilow) < 0


(VCup1,VCl ow1)

(VCup2,VCl ow2)
...

lower arms
capacitor voltages

(VCup400,VCl ow400
) (iup , il ow)

...

Select (nup , niow) sub-modules with

Sort upper and


...

Gating
signal

...

the highest values of (Vcup , Vclow)


...

Set the switching functions of the


selected sub-modules to one, i.e. (Sup,,
Slow) = 1

Figure 26: Balancing control algorithm (BCA)

It is noted that, all these controllers are included when the MMC Model 1 (Full detailed) and Model 2 (Detailed
equivalent) are chosen from the main mask. However, if the Model 3 (Switching function of Arm) is selected,
the BCA device is excluded from the Lower Level Control and if the Model 4 (AVM) is selected, the Lower
Level Control is not represented.

4.8

Protection System

The protection system includes dc overcurrent and Deep voltage sag detectors (see Figure 27). The protection
system can be activated or deactivated from the main mask. During initialization, all protection systems are
activated after 300 ms of simulation (i.e. init_Protection = 0.3s).
When the dc current is higher than the maximum current limit set in the main mask, the MMC station is tripped:
the MMC is blocked and main ac breaker is opened. When grid voltage is lower than 0.1 pu, the MMC is
blocked with a release delay of 20 ms.
When the start-up sequence is activated from the main mask, the closing times of both breakers (ac breaker
and converter breaker, see Figure 1) are set in this device.

27

Start-up sequence
Page AC_BRK_start_up
0 -> switch is opened
1 -> switch is closed

f(u)

(#Start_up#==1) * (t<#CloseTime_AC_BRK#)

converter_BRK
0 -> switch is opened
1 -> switch is closed

f(u)

(#Start_up#==1) * (t<#CloseTime_converter_BRK#)
Page block_MMC_BRK

f(u)

(#Start_up#==1) * (t<#DeblockTime_SMs#)

0 -> MMC blockked


1 -> MMC activated
0.04
AC_BRK_start_up Page
AC_BRK_IdcProtection Page

Delay
Artificial delay to account
for AC Breaker dynamic

Idc protection system

Page AC_BRK_IdcProtection

Protection_init1
Idc

f(u)

u[1]*( t>#init_Protection# )

f(u)

f(u)

u[1]*(u[2]<0.5)+ (u[2]>0.5)

If current exceed 5pu:


- AC breaker is open
- converter is blocked

Fm8

activate_protection

ABS(u[1])>#Idc_limit#

block_MMC_BRK Page
block_MMC_IdcProtection Page
block_MMC_DeepVoltageSag Page

f(u)

u[1]*( #activate_Protection# > 0)

AC_BRK
0 -> switch is opened
1 -> switch is closed

4e-5

1
2

SUM

Delay
Artificial delay

block_MMC
0 -> MMC activated
1 -> MMC blocked

Page block_MMC_IdcProtection

Delay
C1

StarPointReactor

#StarPointReactor_BRK#

Deep Voltage Sag protection

Vac_primary
LP_filter_2nd1
va

ph_1
in mag
rad

inst to polar
vb

ph_2
in mag
rad

ph_3
in mag
rad

threshold
1

f(u)

DVS_signal
scope

u[1]<0.1

LP_filter_2nd2

LP Filter
i
2nd Odrer o

inst to polar
vc

LP Filter
2nd Odrer o

Fm3
threshold
1

release_delay1
Protection_init3

f(u)

u[1]<0.1

OR

f(u)

activate_protect1

release_delay

u[1]*( t>#init_Protection# )

f(u)

Page block_MMC_DeepVoltageSag

u[1]*( #activate_Protection# > 0)

LP_filter_2nd3

LP Filter
2nd Odrer o

threshold

inst to polar

f(u)

u[1]<0.1

Figure 27: Protection system and Start-up sequence

4.9

Start-up sequence

When the Start-up Sequence is unchecked, at simulation t=0:

the initial Capacitor voltage of each SM ( vCi ) is set to nominal voltage

the main ac breaker is closed

the ac converter breaker is closed

the SMs are at deblock state

the P and Vdc references are set at their desired values (Pref, Vdc_ref)

When the Start-up sequence is checked, 6 parameters have to be configured:

closing time of ac breaker

closing time of ac converter breaker

deblocking time of SMs

ramping start time dc voltage reference

time to switch from Vdc-Control to P-control

start time ramping of active power reference

4.10

Initial Conditions and Load-flow solution

For the load-flow solution the MMC station model is represented by a PQ constraint (Figure 28). The PQ
constraint is set from the main mask. The voltage source (PQ_ init) initializes the steady-state operation with
the load-flow parameters and is disconnected form the system after the initialization time set in the main
mask.

28

Closed switch for


Load-Flow and initialization

BUS_PCC

LF

P=#LF_P1_W#
Q=#LF_Q_VAR#
PQ_LF

SW_LF
+
-1|#t_init#|0

+
1m

PQ_init

SW1
+
1e-15|1E15|0
Initialization trick, the MMCstation is initially
isolated and then immediately (t=1e-15s)
switched on for the time-domain simulation

PCC

MMCstation

Figure 28: Load-flow and initialization - EMTP-RV

5 Simulation results
This section provides a comparison between the four types of MMC models: Model 1, 2, 3 and 4. The dynamic
behavior comparison is conducted for step-change of active power reference, three-phase: ac fault, pole-topole DC fault and start-up sequence [10].
The studied system is presented in Figure 29 and is available in the Examples folder of EMTP-RV. The control
strategy considers an active/reactive power control on the sending end (VSC_1) and a dc voltage/reactive
power control on the receiving end (VSC_2). The ac grids are represented as equivalent sources with a shortcircuit level of 10,000 MVA. The transmission capacity of the system is 1,000 MW from S1 to S2. The DC
cable is modeled using a wideband line model [27]. Each MMC station considers a 401-level MMC (400
SMs/arm). The Model 1 (with nonlinear IGBT/diode model) constitutes the reference model.
VSC_1
PQ1

MMC

Equivalent_sourc1

Cable_70km1
P2
P1

VSC_2
MMC

N2

N1
monopole
model3
20 SM

PQ2

+
Equivalent_sourc2

monopole
model3
20 SM

Figure 29: MMC-HVDC transmission test system

5.1

Step change on active power reference

A step change in the active power reference for VSC_1 is applied at 0.5 s of simulation. The active power
reference is reduced from 1 to 0.5 pu. In Figure 30 all four models deliver identical results. Figure 31 presents
internal variables related to the studied MMC topology. The difference current in phase A is defined as

idiffa iua ila / 2 and the sum of all capacitor voltages of each arm of phase A are given by vCtot

ua

29

and vCtot ,
la

respectively (see Figure 3). Since arm details are not represented in Model 4 (see Figure 13), only Models 1, 2
and 3 are compared here. As it can be noticed, the three models give similar and accurate results.

1
P (pu)

Pref
0.8

Model 1,2,3 and 4


0.6
0.45

0.5

0.55

0.6
time (s)

0.65

0.7

0.75

Figure 30: Active power responses, power flowing into VSC_1

(pu)
current current
(pu)

-0.1
-0.15
-0.1
-0.2
-0.15
-0.25
-0.2
-0.3
0.45
-0.25

(pu)
voltage voltage
(pu)

-0.3
0.45
1.1

Model 1, 2 and 3
Model 1, 2 and 3
0.5

0.55

0.6
time (s)

0.65

0.7

0.75

0.5
0.55
0.6
0.65
idiff0.7
a) VSC_1
phase
A, difference
current
upper arm
a

0.75

Model 1, 2 and time


3 (s)

1.05
1.1
1
1.05
0.95
1
0.9
0.45
0.95
0.9
0.45

upper arm
Model 1, 2 and 3

lower arm
Model 1,2 and 3
0.5
0.5

0.55
0.55

0.6
time (s)

0.65 lower arm


0.7

0.6
time (s)

0.65

0.75

Model 1,2 and 3


0.7

0.75

b) VSC_1 phase A upper and lower arms, vCtot


Figure 31: Step change in active power reference for VSC_1

5.2

Three-phase ac fault

A 200 ms three-phase-to-ground fault is applied on the ac side of VSC_2 (see Figure 29) at 1 s of simulation
time. Figure 32 compares the dynamic responses. The results from Models 2 and 3 are similar to Model 1, and
Model 4 remains sufficiently accurate. Figure 32.d shows an attenuated oscillation around 413 Hz during the
fault, which has slightly higher amplitude (peak-to-peak mean value 0.008 pu) in Models 1 and 2 than in Model
3 (peak-to-peak mean value 0.001 pu). This oscillation is related to the interaction between the MMC and the
dc cable. The current increases rapidly during the ac fault. The capacitor voltage fluctuations of each SM will
also increase and the assumption in equation (2) will become less accurate. This transient generates
harmonics in the MMC that interact with the dc cable.

30

current (pu)
current (pu)

Model 1, 2 and 3
1
0

-1

Model 1, 2 and 3
1
0

-2
-1
0.95

Model 4
1

-2
0.95

1.05

1.1
Model 4

1.05

voltage (pu)
voltage (pu)

1.1

a) VSC_2

1
0.5

1.15

1.2 1.25 1.3


time (s)
1.15 1.2 1.25 1.3
phase
current ia
timeA(s)

1.35

1.4

1.35

1.4

1.35

1.4

1.35

1.4

1.35

1.4

Model 1, 2, 3 and 4
1

0
0.5
-0.5
0
-1
-0.5
0.95
-1
0.95

Model 1, 2, 3 and 4

1.05
1

1.1

1.05

1.15

1.1

1.2 1.25 1.3


time (s)
1.15 1.2 1.25 1.3
time (s)

b) VSC_2 phase A voltage va


0.5

voltage
(pu) (pu)
voltage

(pu) (pu)
currentcurrent

Model 1, 2 and 3
0
0.5
-0.50

Model 1, 2 and 3
Model 4

-1
-0.5

Model 4

-1.5
-1
0.95

1.05

-1.5
0.95
1.15

1.05

c)

1.1
1.15

1.1

1.15

1.2 1.25 1.3


time (s)
1.1 1.15 1.2 1.25 1.3
VSC_2 dctime
current
I dc
(s)

Model 3

1.05
1.1

Model 1 and 2

1
1.05

1.35

1.4

Model 1 and 2
Model 4
Model 3
Model 4

0.951
0.95

1.05

1.1

0.95
0.95

1.05

1.1

1.15

1.2 1.25
time (s)
1.15 1.2 1.25
time (s)

1.3
1.3

1.35
1.35

1.4
1.4

d) VSC_2 dc voltage Vdc


Figure 32: Three-phase ac fault, 401 levels, blue line for Models 1 and 2, green line for Model 3 and red
line for Model 4.

5.3

Pole-to-pole dc fault

The models are tested for a permanent dc fault between the positive and negative poles in the middle of the dc
cable. The fault is applied at 1.9 s. Since the protection system is activated, the ac breaker is opened and the
MMCs are blocked after fault occurrence. The dc and ac currents in VSC_1 are compared in Figure 33 for

31

different models. The dc current peak during a pole-to-pole fault reaches a value of approximately 8.2 pu for
Models 1 to 3. A peak value of 7.3 pu is reached with Model 4. However, the ac waveforms of Model 4 are
close to the other models.
From the zoomed waveform of Figure 34, it can be noticed, that just after the dc fault occurence, Model 4
accurately mimics the slope and peak values of I dc . However, after around 1 ms, the behavior becomes
different, due to the inaccurate representation of the MMC blocked state in Model 4.
5

(pu) (pu) current (pu)currentcurrent


(pu) (pu) current (pu)currentcurrent
current (pu)currentcurrent
(pu) (pu)

Model 1, 2 and 3
5

Model 1, 2 and 3

0
0
5
-5
0.95

Model 4

Model 1, 2 and 3

Model 4

-5
0
0.95
10

1.05

1.1

1.05

1.1

time (s)

a) VSC_1time
ac current:
ia
(s)

Model 1, 2 and 3

Zoomed
Model 4

10
-5
0.95
5
Zoomed

5
10
0
0.95 Zoomed

1.05

Model 1, 2 and 3

1.1

time (s)
Model
4

Model 1, 2 and 3

Model 4
1.05

1.1

1.05

1.1

time (s)

0
5
0.95
10

Model
4
time (s)
Model 1, 2 and 3

10
0
0.95
5

b) VSC_1dc current: I dc

Model11, 2 and 3

1.05

1.1

Figure 33: DC fault results blue line for Models 1 and


time 2,
(s)green line for Model 3 and red line for Model 4
5
10
0
0
5

Model 4
1

Model
1, 2 and
1.005
Model
4 3

1.01
time (s)
1.005
1.01
time (s)

1.015
1.015

Model 4
0

1.005

1.01
time (s)

1.015

Figure 34: Zoomed waveform, VSC_1, I dc

5.4

Start-up sequence

The start-up sequence procedures of all MMC stations are activated for this simulation. In this report, only the
first 200 ms of simulation are shown. However, the entire start-up sequence example is available in the
example folder: MMC_HVDC_link_StartUp.ecf. Since arm details are not represented in Model 4 (Figure 13),
this model cannot be used to study start-up. Only Models 1, 2 and 3 are compared in this document.

32

current (pu)
voltage
voltage
voltage (pu) current (pu) current (pu)
(pu) (pu) voltage (pu)voltage
(pu) (pu)
voltage

1
0.5
1

Model 1, 2 and 3

0.50
1

Model 1, 2 and 3

-0.5

0
0.5

Zoomed

-1

-0.500
-1
-0.5
0
0.6

-1

0.4 0

0.6
0.2

0.05

Zoomed

Model 1, 2 and 3
0.1
time (s)

0.15

Model 1, 2 and
0.053

0.1 arm current


0.15i
a) VSC_1 phase A; upper
ua

Zoomed

0.05

Model 1, 2 and 3

time (s)
0.1
time (s)

0.2

0.2

0.15

0.2

0.15

0.2

Zoomed

0.40 Model 1, 2 and 3


0.05
0.60
0.2
0.4
0
0.2

0.60

0.4 0
0.2

0.1
time (s)

0.05

0.1
0.15
time (s)
0.05
0.1
0.15
b) VSC_1 phase A; upper
voltage
Model
1, 2 andv3ua
time (s)arm

0.2

0.2

0.6

0.4
0.6

0.05

0.1
time (s)

0.2

Model 1, 2 and 3

0.2
0.4
0
0.2
0

0.15

Model 1, 2 and 3
0.05

0.05

0.1
time (s)
0.1
time (s)

0.15

0.2

0.15

0.2

c) VSC_1 phase A; upper arm vCtot

ua

Figure 35: VSC_1 phase A variables, start-up sequence, 401 levels

Since in Figure 35 both Models 2 and 3 are able to match the results from Model 1, it is concluded that these
two simplified models can be used to study converter start-up.
The zoomed waveforms of Figure 36 are used to highlight the detailed modeling effect of power switches in
Model 1. It is observed that Model 1 mimics the reverse recovery behavior of diodes, whereas in Models 2 and
3 this behavior cannot be represented due to the linear representation of power switches.

33

-4

x 10

-4

x 10

(pu)(pu)
current
current

Model 1
0

Model 1

0
-5

Model 2 and 3

-5

Model 2 and 3

-10
26.72

-10
26.72

26.74
time (ms)

26.76

26.74

26.76

(pu) (pu)
voltagevoltage

(ms) A, upper arm current iu


b) Zoomed waveform VSC_1time
phase
a
0.2

0.2
0.1
0
0.1

26.72

0
26.72

Model 1
Model 3

Model 1

Model 3

Model 3 and 2

26.74
time (ms)

26.76

26.74
time (ms)

26.76

b) Zoomed waveform VSC_1 phase A, upper arm voltage vua


Figure 36: Zoomed waveform VSC_1, phase A variables for start-up sequence

34

6 References
[1]

N. Flourentzou, V. G. Agelidis and G. D. Demetriades, VSC-Based HVDC Power Transmission


Systems: An Overview, IEEE Trans. on Power Electronics, vol. 24, no. 3, pp. 592-602, March 2009.

[2]

It is time to connect, Technical description of HVDC Light technology, ABB, Sweden, March 2008.

[3]

U. Karaagac, J. Mahseredjian, H. Saad, S. Jensen and L. Cai, Examination of Fault-Ride-Through


Methods for Off-Shore Wind Farms Connected to the Grid through VSC-Based Multi-terminal HVDC
Transmission, IPST 2013, International Conf. on Power Systems Transients, Vancouver, Canada, 18-20
July 2013.

[4]

A. Lindberg, PWM and Control of Two and Three level High Power Voltage Source Converters,
Licentiate Thesis, Royal Institute of Technology, Stockholm, Sweden, 1995.

[5]

C. Du, VSC-HVDC for industrial power systems, Ph.D. Thesis, Chalmers Univ. of Technology,
Gteborg, Sweden, 2007.

[6]

B. R. Andersen, L. Xu, and K. T. G. Wong, Topologies for VSC transmission, 7th International
conference on AC-DC Power Transmission, pp. 298-304, London, Nov. 2001.

[7]

A. Lesnicar and R. Marquardt, An Innovative Modular Multilevel Converter Topology Suitable for a Wide
Power Range, Proc. IEEE Power Tech. Conference, vol. 3, Bologna, June 2003.

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