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712
1975
Proceedings Letters
TABLE I
This section is intended primarily
for rapid dissemination of brief
CONVERGENCE COMPARISON BETWEEN D L F A N D
reports on new research results in technical areas of interest to IEEE
NLF; 5 3 0 0 - B u s CASE
members. Contributions are reviewed immediately, and acceptance is
determined by timeliness and importance of the subject, and brevity
and clarity of the presentation. Research letters must contain a clear
Decoupled Load Flow
Newton
Load
Flow
concise statement of the problem studied, identifv new
results, and Unsolved
Unsolved
make evident their utility, importance, or relevance to electrical engiIteration XIAPI x l a Q l Equations XIAPI X I A Q I
neering. Key references to related literature must be given.
Conmbutions should besubmitted
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40
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10
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31
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T A B L E I1
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TIMECOMPARISON (SECONDS)
BETWEEN D L F AND
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NLF; 5 3 0 0 - B u s CASE
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~
AND
M. FLAM
Modules
DLF
3 assembly
Input and data
Voltage solution
2
Line flow calculation
Output routines 202
3
19
2
202
~~
Buses
5201
488
10
0
NLF
61
two methods for a typically large system having 5300 buses and 8722
branches. The case contained no tapchangingunderload(TCUL)
transformers, interchange control, or reactive limit constraints which
are normallyaccountedforbycorrectionsbetweeniterations.
A
tolerance of 1 MW and 1 Mvar was used in both cases. The difference
in slack bus injection between the two solutions
was of 4.9 MW and
0.3 Mvar, whichshowed thattheywerequite
close toeachother.
The Unsolved Equations column refers to the sumof both P and Q
equationsineachhalf-iteration
of DLF, while the UnsolvedBuses
column refers to buses where either P,Q,.or both had not converged.
The results of Table I can be considered typical in that DLF requires
one or two iterations more than NLF, although there are cases where
they both converge in thesame number of iterations.
Great care was exercised in making a proper time comparison. The
NLF production program is a modular program for which the voltage
solution is a module by itself. This module is apart from all input and
output modules and those that form the admittance matrix and determine the optimal ordering. Some parts of the voltage solution module,
which shall be referred to as pre- and postsolution, were identical in
530O-bus case were
thetwo programs. Corerequirementsforthe
650K forthe NLF. Forameaningfulcomparison,
thereductionin
corerequirementsfortheDLF
was compensatedbykeepingthe
admittance matrix in core between the P and Q half-iterations and by
storing in the same locations sine and cosine terms between the following Qand P half-iterations.CorerequirementsforDLFwerethen
648K. Table I1 compares timings in seconds for the various modules
of both programs for an IBM 370/168 machine. This is task time or
actual central processing unit (CPU) time.
Table I1 shows that the voltage solution has been made faster by a
factor greater than 3. It has been found that, for large cases, a factor
in the 3-4 range is typical. For smaller cases, the advantage of DLF
685-bus 1393over NLF is reduced considerably. For example, for a
line case, the voltage solution timings were 3.1 and 5.4 s, respectively.
It is of some interest to further break up the voltage solution time
19 s
for DLF. Table 111 presents the components that went into the
quoted in Table 11. Given that the programs have identical pre- and
postsolution routines which took
4 s, DLF reduced a 56-s figure of
NLF to 15 s. Table 111 shows that an iteration of DLF is of the order
of 1 s for the 5300-bus case, with 80 percent of this time going into
mismatch computations anddata handling.
PROCEEDINGS LETTERS
71 3
TABLE Ill
VOLTAGESOLUTION
COMPONENTTIMINGS
FOR
DLF; 5300-BusCASE
Time (s)
Function
2
Resolution
5
Triangularization of B
Triangularization
3
of
B
7
Timetakenfor
seven iterations
80-percent mismatch computation and data handling
10-percent forward-backward substitutions
10-percent voltage corrections
Postsolution
2
19
Total
time
Thethree tablespresentedshowadefinite
advantage in replacing
V F by DLF in those
installationswhere large cases arecommonly
solved. In the 5000-bus case range, DLF does not leave much room for
furtherimprovements in reducing significantly computer timings. A
savings to be achieved by
conservative projection of yearly estimated
the conversion to DLFis in our installation in excess of $100 000.
We have followed Stottssuggestion of using a Taylor-series expansion
for cosine and sine computations within mismatch calculations. It was
found that in some large cases the 3-term cosine, 2-term sine expansion
affects convergence by requiring one extra iteration as compared with
using the4-term cosine,3-termsine
expansion. These cases tend to
lines with largeangle differences. Alincludeagreaternumberof
though retaining an extra term in the expansion has a negligible effect
on timings, one alternative lies in the use of a Chebyshev economization of the Taylor series. The Chebyshev polynomialhasauniform
errorcharacteristicwithin
its defined range,while the Taylorpolynomial is better at the center point of the range and gets progressively
worse toward the end points. For example, the *45 range Chebyshev
and the Taylor sine expansions retaining two terms are
c = 0.9990211 e - 0.1603402 e3
T = e - 0.1666666 e 3 .
Themaximumerror of C in the range -45,45 is 1.54 X
while
the error of Tat +45is 23.71 X
Some convergence problems have been detected in certain cases with
the NLF programs. In these cases, NLF voltages
both the DLF and
dropped more severely than DLF voltages, but it is too early to form
any definite conclusions on this point.
to timings of outputroutines presented in
A final pointrefers
Table 11. It reveals quite clearly that further payoffs lie in this area,
possibly by reducing actual output by moreanalysis with less printing.
AND
B. F. WOLLENBERG
TABLE IV
12WBus 1667-LINE LOAD-FLOW
TIME
~
Function
Time
25 s
45 (I
18 s
7 s
11
usage parameters are very high in that increased usage in one area then
forcesapainfuleconomictradeoffbetweensoftwareeffort
insome
other area versus overall hardware improvement costs.
Stotts fast decoupled load flow is therefore an attractive alternative
to Newton load-flow algorithms for use in such systems. We would like
to share our experiences with the fast decoupled load flow anddescribe
someadvantages of using it whichhave not beenmentioned asof
this writing.
I. TIMING
First, our comparative timings are presented in Table IV. These times
are foraFortranfastdecoupled
load flowandapartially
Fortran,
partially optimized assembly-language Newton load flow, running on an
XDS Sigma 5 computer.
The relative improvement realized has been obtained with load flows
as small as 246 buses.
11. PROGRAMMING
A carefully coded Newton load-flow solution algorithm (partially in
assemblylanguage) requires roughly 2000 32-bit words of storage. A
fast decoupled program performing the identical tasks requires
about
1000 words.These
savings mayseem trivial whenextremely large
systems (upwards of several thousand buses) are involved, but for typical small-to-medium-sized systems it becomes significant. For instance,
a straightforward implementation of a 1200-bus Newton load flow requiresonly about 30Kwordsof core.Most important,thefastdecoupled method i s an inherently simpler algorithm.
Also, the coding of the fast decoupled method is readily modularized
(relative to aNewton) so thatstructuredprogramming can be used
without serious loss of efficiency. A structured implementation of the
simplerlogic results indecreasedoverall costs for design, coding, debugging, and code optimization. These last points should be of interest
to anyone who has avoided implementing a Newton load flow for fear
of the complexity involved.
111. APPROXIMATIONS
TO THE TRIGONOMETRIC
FUNCTIONS
It has been suggested that truncated polynomial expressions be used
in computing the mismatch vectors where sine and cosine functions are
required. This improves machine speed periteration;howwer,too
severe an approximation hinders iterativeconvergence.
Asuperiormethod
is tostorethe
rectangularcoordinatesofthe
voltage vector and thevoltage magnitudes, updating these for magnitude
corrections by the use of 1) and updating these for angular corrections
by the use of 2). A considerablesavingin machine time is achieved.
Sinceangular corrections quickly become small, efficient polynomial
expansions can be used without loss of accuracy. Themismatch,of
course, is exact to machine resolution. The cost is the use of a vector
of bus voltage magnitude.
I ) Magnitude Corrections:
Let AVi be the solved voltage magnitude correction at bus i. Then the
rectangular components are corrected by
~ + AVi/Vi)
a) V R =~ V R (1
b) Vri = Vzi ( 1 + A Vi/ Vi)
and the magnitude, trivially, by
C) Vi = Vi + A Vi.
2) Angle Corrections:
Mi is the solved correction to busi angle:
a) C = cos M i
S = sin Mi
B. Stott, P~oc.IEEE, VOI.
6 2 , pp.
916-929,
July
1974.