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Applications
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Ordering Information
RT8223P
Pin Configurations
(TOP VIEW)
VOUT1
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
Package Type
QW : WQFN-24L 4x4 (W-Type)
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
18
17
16
GND
15
25
5
6
8
ENC
VREG5
VIN
GND
SKIPSEL
EN
9 10 11 12
WQFN-24L 4x4
14
13
20 : Product Code
Marking Information
20 YM
DNN
VOUT2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2
24 23 22 21 20 19
ENTRIP1
FB1
REF
TONSEL
FB2
ENTRIP2
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1
RT8223P
Typical Application Circuit
C1
10F
C10
0.1F
R4 0
Q1
BSC119
N03S
C3
220F
0
C2
0.1F
L1
6.8H
VOUT1
5V
VIN
6V to 25V
R8
3.9
C4
C19
0.1F
22 BOOT1
LGATE2 12
19 LGATE1
VREF
2V
C15
0.22F
2 FB1
3 REF
Frequency Control
4 TONSEL
PWM/DEM/Ultrasonic
14 SKIPSEL
13 EN
ON
OFF
ON
OFF
Q2
BSC119
N03S
0
C11
0.1F
VOUT2 7
5
FB2
ENTRIP1
GND
1
6
C12
10F
VOUT2
3.3V
C17
220F
R11
C14
R14
6.5k
RILIM1
150k
R15
10k
RILIM2
150k
C21
C20
0.1F
25 (Exposed Pad)
VREG5 17
PGOOD 23
VREG3 8
18 ENC
C13
10F
L2
4.7H
Q4
BSC119
N03S
GND 15
ENTRIP2
R13
10k
R10
0
RBOOT2
PHASE2 11
20 PHASE1
R12
15k
21 UGATE1
24 VOUT1
C18
UGATE2 10
BOOT2
RBOOT1
Q3
BSC119
N03S
R5
RT8223P
16 VIN
C9
4.7F
5V Always On
R6
100k
PGOOD Indicator
C16
4.7F
3.3V Always On
Pin Name
Pin Function
Channel 1 Enable and Current Limit Setting Input. Connect a resistor to GND to
set the threshold for channel 1 synchronous RDS(ON) sense. The GND PHASE1
current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.515V to 3V
range. There is an internal 10A current source from VREG5 to ENTRIP1. Leave
ENTRIP1 floating or short ENTRIP1 to GND to shut down channel 1.
SMPS1 Feedback Input. Connect FB1 to a resistive voltage divider from VOUT1
to GND to adjust output from 2V to 5.5V.
ENTRIP1
FB1
REF
2V Reference Output. Bypass to GND with a minimum 0.22F capacitor. REF can
source up to 100A for external loads. Loading REF degrades FBx and output
accuracy according to the REF load-regulation error.
TONSEL
FB2
ENTRIP2
VOUT2
VREG3
SMPS2 Feedback Input. Connect FB2 to a resistive voltage divider from VOUT2
to GND to adjust output voltage from 2V to 5.5V.
Channel 2 Enable and Current Limit Setting Input. Connect a resistor to GND to
set the threshold for channel 2 synchronous RDS(ON) sense. The GND PHASE2
current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.515V to 3V
range. There is an internal 10A current source from VREG5 to ENTRIP2. Leave
ENTRIP2 floating or short ENTRIP2 to GND to shut down channel 2.
Bypass Pin for SMPS2. Connect to the SMPS2 output to bypass efficient power
for VREG3 pin. VOUT2 is also for the SMPS2 output soft-discharge.
3.3V Linear Regulator Output.
To be continued
www.richtek.com
2
RT8223P
Pin No.
Pin Name
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
13
EN
14
SKIPSEL
16
VIN
17
VREG5
18
ENC
19
LGATE1
20
PHASE1
21
UGATE1
22
BOOT1
23
PGOOD
24
VOUT1
15, 25
GND
(Exposed Pad)
Pin Function
Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor
according to the typical application circuits.
Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and
BOOT2.
Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the
UGATE2 high side gate driver. PHASE2 is also the current-sense input for the
SMPS2.
Lower Gate Driver Output for SMPS2. LGATE2 swings between GND and
VREG5.
Master Enable Input. The REF/VREG5/VREG3 are enabled if it is within logic
high level and disabled if it is less than the logic low level.
Operation Mode Selectable Input.
Connect to VREG5 or VREG3 : Ultrasonic Mode
Connect to REF : PWM Mode
Connect to GND : DEM Mode
Supply Input for 5V/3.3V LDO and Feed Forward On-Time circuitry.
5V Linear Regulator Output. VREG5 is also the supply voltage for the lower gate
driver and analog supply voltage for the device.
SMPS Enable Input. Pull up to VREG3 or VREG5 to turn on both switch channels.
Short to GND to shutdown them.
Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and
VREG5.
Switch Node for SMPS1. PHASE1 is the internal lower supply rail for the
UGATE1 high side gate driver. PHASE1 is also the current-sense input for the
SMPS1.
Upper Gate Driver Output for SMPS1. UGATE1 swings between PHASE1 and
BOOT1.
Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor
according to the typical application circuits.
Power Good Output for Channel 1 and Channel 2. (Logical AND).
Bypass Pin for SMPS1. Connect to the SMPS1 output to bypass efficient power
for VREG5 pin. VOUT1 is also for the SMPS1 output soft-discharge.
Ground for SMPS Controller. The exposed pad must be soldered to a large PCB
and connected to GND for maximum power dissipation.
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3
RT8223P
Function Block Diagram
TONSEL SKIPSEL
BOOT1
BOOT2
UGATE1
UGATE2
PHASE1
VREG5
PHASE2
VREG5
LGATE1
VREG5
SMPS1
PWM Buck
Controller
SMPS2
PWM Buck
Controller VREG5
LGATE2
10A
10A
FB1
VOUT2
FB2
ENTRIP2
ENTRIP1
EN
ENC
Power-On
Sequence
Clear Fault Latch
SW5 Threshold
PGOOD
SW3 Threshold
GND
VOUT1
Thermal
Shutdown
VREG3
VREG5
VREG5
REF
VREG3
VIN
REF
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4
RT8223P
Absolute Maximum Ratings
(Note 1)
0.3V to 30V
0.3V to 30V
8V to 38V
0.3V to 6V
0.3V to 6V
0.3V to 6V
0.3V to (VREG5 + 0.3V)
5V to 7.5V
0.3V to (VREG5 + 0.3V)
2.5V to 7.5V
1.923W
52C/W
7C/W
260C
150C
65C to 150C
2kV
200V
(Note 4)
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5
RT8223P
Electrical Characteristics
(VIN = 12V, VEN = VENC = 5V, VENTRIP1 = VENTRIP2 = 2V, No Load, TA = 25C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
200
--
--
20
40
--
mW
1.975
2.025
--
--
Ultrasonic Mode
--
2.032
--
SMPS1, SMPS2
--
5.5
10
45
--
mA
1895
2105
2315
999
1110
1221
1227
1403
1579
647
740
833
895
1052
1209
475
555
635
VFBx = 1.9V
200
300
400
ns
22
33
--
kHz
--
--
ms
9.4
10
10.6
--
4700
--
ppm/C
0.515
--
180
200
220
mV
--
--
mV
Input Supply
VIN Standby Current
IVIN_SBY
PVIN
+PPVCC
VFBx
PWM Mode
(Note 6)
TONSEL = GND
On-Time Pulse Width
tON
TONSEL = REF
TONSEL = REG5
Minimum Off-Time
Ultrasonic Mode
Frequency
Soft-Start
tOFF
Soft-Start Time
tSSx
Internal Soft-Start
IENTRIPx
VENTRIPx = 0.9V
ns
Current Sense
ENTRIPx Source
Current
ENTRIPx Current
Temperature
Coefficient
ENTRIPx Adjustment
Range
Current Limit
Threshold
Zero-Current
Threshold
(Note 6)
To be continued
www.richtek.com
6
RT8223P
Parameter
Symbol
Test Conditions
Min
Typ
Max
4.8
5.2
4.75
5.25
4.75
5.25
3.2
3.33
3.46
3.13
3.33
3.5
3.13
3.33
3.5
Unit
VVREG5
VVREG3
IVREG5
100
175
250
mA
IVREG3
100
175
250
mA
VREG5 Switch-over
Threshold to VOUT1
VSW5
4.6
4.75
4.9
4.3
4.4
4.5
VREG3 Switch-over
Threshold to VOUT2
VSW3
2.975
3.125
3.25
2.775
2.875
2.975
--
1.5
VREGx Switch-over
Equivalent Resistance
REF Output Voltage
V
V
RSWx
VREF
No External Load
1.98
2.02
--
10
--
mV
REF in Regulation
--
--
Rising Edge
--
4.2
4.45
Falling Edge
3.7
3.9
4.1
SMPSx off
--
2.5
--
82
85
88
--
--
UVLO
VREG5 Under Voltage
Lockout Threshold
VREG3 Under Voltage
Lockout Threshold
Power Good
PGOOD Threshold
V
V
PGOOD Propagation
Delay
PGOOD Leakage Current
--
10
--
--
--
ISINK = 4mA
--
--
0.3
109
112
116
FBx = 2.35V
--
--
49
52
56
Fault Detection
Over Voltage Protection
Trip Threshold
Over Voltage Protection
Propagation Delay
Under Voltage Protection
Trip Threshold
VFB_OVP
VFB_UVP
To be continued
DS8223P-01 June 2011
www.richtek.com
7
RT8223P
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
--
ms
Thermal Shutdown
TSHDN
--
150
--
--
10
--
--
--
0.8
1.8
--
2.3
2.7
--
--
--
--
0.25
0.515
--
4.5
--
--
Rising Edge
--
0.4
0.515
Falling Edge
0.25
0.36
--
VENTRIPx
2.4
--
--
Logic-Low
VIL
--
--
0.4
2.4
3.3
4.2
1.5
--
EN Current
IEN
Logic-High
VIH_ENC
--
--
Logic-Low
VIL_ENC
--
--
0.6
--
--
0.8
1.8
--
2.3
2.7
--
--
VTONSEL , VSKIPSEL = 0V or 5V
--
VENC = 0V or 5V
--
--
40
80
LGATEx On-Resistance
www.richtek.com
8
VIH
VEN
Dead Time
Logic-High
EN Voltage
ENC Threshold
Voltage
--
--
1.5
--
--
1.5
LGATEx Rising
--
30
--
UGATEx Rising
--
40
--
ns
RT8223P
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. JA is measured in natural convection at TA = 25C on a high effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of JC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. PVIN + PVREG5
Note 6. Guaranteed by Design.
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9
RT8223P
Typical Operating Characteristics
VOUT1 Efficiency vs. Load Current
100
90
100
90
DEM Mode
DEM Mode
80
70
Efficiency (%) 1
Efficiency (%) 1
80
Ultrasonic Mode
60
50
PWM Mode
40
30
20
70
Ultrasonic Mode
60
50
PWM Mode
40
30
VIN = 12V
TONSEL = GND, EN = FLOATING,
20
10
0
0.001
0.01
0.1
10
0
0.001
10
90
DEM Mode
80
Efficiency (%) 1
Efficiency (%) 1
10
100
80
70
Ultrasonic Mode
60
50
PWM Mode
40
30
VIN = 20V
20
0.01
70
60
Ultrasonic Mode
50
PWM Mode
40
30
0.1
VIN = 8V
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 5V, VENTRIP2 = 1.5V
10
0
0.001
DEM Mode
20
10
0
0.001
10
0.01
90
90
80
Efficiency (%) 1
DEM Mode
70
Ultrasonic Mode
60
50
PWM Mode
40
30
VIN = 12V
20
0
0.001
0.01
0.1
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10
10
DEM Mode
70
60
Ultrasonic Mode
50
40
PWM Mode
30
VIN = 20V
TONSEL = GND,EN = FLOATING,
VENTRIP1 = 5V, VENTRIP2 = 1.5V
20
10
100
80
0.1
Efficiency (%) 1
0.1
10
10
0
0.001
0.01
0.1
10
RT8223P
VOUT1 Switching Frequency vs. Load Current
PWM Mode
200
220
180
160
140
VIN = 8V
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 1.5V, VENTRIP2 = 5V
120
100
80
60
Ultrasonic Mode
40
20
0.01
0.1
10
PWM Mode
180
160
VIN = 20V
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 1.5V, VENTRIP2 = 5V
100
80
60
40
Ultrasonic Mode
20
0
0.001
DEM Mode
0.01
0.1
10
100
80
60
40
Ultrasonic Mode
DEM Mode
0.01
0.1
10
280
260
PWM Mode
240
220
200
VIN = 8V
180 TONSEL = GND, EN = FLOATING,
160 VENTRIP1 = 5V, VENTRIP2 = 1.5V
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
0.1
10
280
PWM Mode
260
240
220
200
VIN = 12V
180
TONSEL = GND, EN = FLOATING,
160
VENTRIP1 = 5V, VENTRIP2 = 1.5V
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
0.1
1
280
PWM Mode
260
240
220
200
VIN = 20V
180
TONSEL = GND, EN = FLOATING,
160
VENTRIP1 = 5V, VENTRIP2 = 1.5V
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
0.1
1
120
220
120
140
VIN = 12V
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 1.5V, VENTRIP2 = 5V
140
160
0
0.001
200
180
20
DEM Mode
0
0.001
PWM Mode
200
10
10
www.richtek.com
11
RT8223P
VOUT2 Output Voltage vs. Load Current
3.446
3.440
3.434
Ultrasonic Mode
PWM Mode
3.428
3.422
Ultrasonic Mode
3.416
3.410
PWM Mode
3.404
3.398
3.392
DEM Mode
DEM Mode
3.386
0.01
0.1
3.380
0.001
10
0.01
3.358
10
4.994
4.988
4.982
3.354
5.000
4.976
3.350
3.346
3.342
3.338
3.334
4.970
3.330
0
20
40
60
80
100
10
2.0064
2.0056
2.0048
2.0040
2.0032
2.0024
2.0016
2.0000
10
20
30
40
50
60
70
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12
50
60
70
80
90 100
No Load
10.0
Ultrasonic Mode
1.0
DEM Mode
0.1
0
40
PWM Mode
2.0008
-10
30
2.0072
20
0.1
RT8223P
Shutdown Input Current vs. Input Voltage
No Load,
EN = FLOATING, VENTRIP1 = VENTRIP2 = 5V
241
240
250
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
2.011
2.008
VREG5
(5V/Div)
VREG3
(2V/Div)
2.005
2.002
1.999
1.996
REF
(2V/Div)
1.993
1.990
1.987
EN
(2V/Div)
1.984
-50
-25
25
50
75
100
Time (400s/Div)
125
Temperature (C)
No Load
No Load
VOUT1
(5V/Div)
VOUT2
(2V/Div)
VOUT1
(5V/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
PGOOD
(5V/Div)
ENC
(5V/Div)
Time (1ms/Div)
ENC
(5V/Div)
Time (4ms/Div)
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13
RT8223P
Power On from ENTRIP1
No Load
No Load
VOUT1
(2V/Div)
VOUT1
(2V/Div)
PGOOD
(5V/Div)
PGOOD
(5V/Div)
VIN = 12V, TONSEL = GND,
ENTRIP1
(5V/Div)
ENTRIP1
(5V/Div)
Time (1ms/Div)
Time (2ms/Div)
No Load
No Load
VOUT2
(2V/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
PGOOD
(5V/Div)
VIN = 12V, TONSEL = GND,
ENTRIP2
(5V/Div)
ENTRIP2
(5V/Div)
Time (1ms/Div)
Time (2ms/Div)
VOUT1_AC
(50mV/Div)
VOUT2_AC
(50mV/Div)
Inductor
Current
(5A/Div)
Inductor
Current
(5A/Div)
UGATE1
(20V/Div)
UGATE2
(20V/Div)
VIN = 12V, TONSEL = GND,
LGATE1
(5V/Div)
EN = FLOATING, SKIPSEL = REF, IOUT1 = 0A to 6A
Time (20s/Div)
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14
LGATE2
(5V/Div)
Time (20s/Div)
RT8223P
OVP
UVP
VOUT1
(5V/Div)
VOUT1
(2V/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
UGATE1
(20V/Div)
PGOOD
(5V/Div)
LGATE1
(5V/Div)
Time (4ms/Div)
Time (100s/Div)
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15
RT8223P
Application Information
The RT8223P is a dual, Mach ResponseTM DRVTM dual
ramp valley mode synchronous buck controller. The
controller is designed for low voltage power supplies for
notebook computers. Richtek's Mach Response TM
technology is specifically designed for providing 100ns
instant-on response to load steps while maintaining a
relatively constant operating frequency and inductor
operating point over a wide range of input voltages. The
topology circumvents the poor load-transient timing
problems of fixed-frequency current mode PWMs while
avoiding the problems caused by widely varying switching
frequencies in conventional constant on-time and constant
off-time PWM schemes. The DRV TM mode PWM
modulator is specifically designed to have better noise
immunity for such a dual output application. The
RT8223P includes 5V (VREG5) and 3.3V (VREG3) linear
regulators. VREG5 linear regulator can step down the
battery voltage to supply both internal circuitry and gate
drivers. The synchronous-switch gate drivers are directly
powered from VREG5. When VOUT1 voltage is above
4.75V, an automatic circuit will switch the power of the
device from VREG5 linear regulator to VOUT1.
PWM Operation
The Mach ResponseTM DRVTM mode controller relies on
the output filter capacitor's Effective Series Resistance
(ESR) to act as a current sense resistor, so the output
ripple voltage provides the PWM ramp signal. Refer to the
RT8223P's function block diagram, the synchronous high
side MOSFET will be turned on at the beginning of each
cycle. After the internal one-shot timer expires, the
MOSFET will be turned off. The pulse width of this one
shot is determined by the converter's input voltage and
the output voltage to keep the frequency fairly constant
over the input voltage range. Another one shot sets a
minimum off-time (300ns typ.). The on-time one shot will
be triggered if the error comparator is high, the low side
switch current is below the current limit threshold, and
the minimum off-time one shot has timed out.
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16
RT8223P
Table 1. TONSEL Connection and Switching Frequency
TONSEL
SMPS 1
K-Factor (s)
SMPS 1
Frequency (kHz)
SMPS 2
K-Factor (s)
SMPS 2
Frequency (kHz)
Approximate
K-Factor Error (%)
GND
200
250
10
REF
3.33
300
2.67
375
10
VREG5 or
VREG3
2.5
400
500
10
IL, PEAK
ILOAD (SKIP)
(VIN VOUT )
t ON
2L
TON
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17
RT8223P
Forced CCM Mode (SKIPSEL = REF)
The low noise, Forced CCM mode (SKIPSEL = REF)
disables the zero-crossing comparator, which controls the
low side switch on-time. This causes the low side gatedriver waveform to become the complement of the high
side gate-driver waveform. This in turn causes the inductor
current to reverse at light loads as the PWM loop to
maintain a duty ratio of VOUT/VIN. The benefit of Forced
CCM Mode is to keep the switching frequency fairly
constant, but it comes at a cost. The no load battery
current can be from 10mA to 40mA, depending on the
external MOSFETs.
RT8223P
The average drive current is calculated by the gate charge
at V GS = 5V times the switching frequency. The
instantaneous drive current is supplied by the flying
capacitor between the BOOTx and PHASEx pins. A dead
time to prevent shoot through is internally generated
between high side MOSFET off to the low side MOSFET
on, and the low side MOSFET off to the high side MOSFET
on.
UVLO Protection
PGOOD is an open-drain type output and requires a pullup resistor. PGOOD is actively held low in soft-start,
standby, and shutdown. It is released when both output
voltages are above 91% of the nominal regulation point.
The PGOOD goes low if either output turns off or is 15%
below its nominal regulator point.
BOOTx
RBOOT
UGATEx
PHASEx
RT8223P
ENTRIPx or cycle VIN to reset the UVP fault latch and
restart the controller.
Thermal Protection
The RT8223P features thermal shutdown protection to
prevent overheat damage to the device. Thermal shutdown
occurs when the die temperature exceeds 150C. All
internal circuitry is inactive during thermal shutdown. The
RT8223P triggers thermal shutdown if VREGx is not
supplied from VOUTx, while the input voltage on VIN and
the drawing current from VREGx are too high. Even if
VREGx is supplied from VOUTx, large power dissipation
on automatic switches caused by overloading VREGx,
may also result in thermal shutdown.
Discharge Mode (Soft-Discharge)
When ENTRIPx is low and a transition to standby or
shutdown mode occurs, or the output under voltage fault
latch is set, the output discharge mode will be triggered.
During discharge mode, the output capacitors' residual
charge will be discharged to GND through an internal
switch.
Shutdown Mode
The RT8223P SMPS1, SMPS2, VREG3 and VREG5 have
independent enabling controls. Drive EN, ENTRIP1 and
ENTRIP2 below the precise input falling-edge trip level to
place the RT8223P in its low power shutdown state. The
RT8223P consumes only 20A of input current while in
shutdown. When shutdown mode is activated, the
reference turns off. The accurate 0.4V falling-edge threshold
on the EN pin can be used to detect a specific analog
voltage level as well as to shutdown the device. Once in
shutdown, the 2.4V rising-edge threshold activates,
providing sufficient hysteresis for most applications.
Power Up Sequencing and On/Off Controls (ENC)
ENTRIP1 and ENTRIP2 control the SMPS power up
sequencing. When the RT8223P is in single channel mode,
ENTRIP1 or ENTRIP2 enables the respective output when
ENTRIPx voltage descends below 3V. Furthermore, the
RT8223P can also be in dual channel mode. In this mode,
outputs are enabled when ENC voltage rises above 2V.
MODE
Power UP
Condition
VREGx < UVLO threshold
Comment
Transitions to discharge mode after a VIN POR and after
REF becomes valid. VREG5, VREG3, and REF remain
active.
Normal Operation.
LGATEx is forced high. VREG3, VREG5 and REF active.
Exited by VIN POR or by toggling EN, ENTRIPx, ENC
Both UGATEx and LGATEx are forced low and enter
discharge mode. VREG3, VREG5 and REF are active.
Exited by VIN POR or by toggling EN, ENTRIPx, ENC
During discharge mode, there is one path to discharge the
outputs capacitor residual charge. That is output capacitor
discharge to GND through an internal switch.
VREG3, VREG5 and REF are active.
Shutdown
EN = low
Thermal
Shutdown
TJ > 150C
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20
RT8223P
Table 3. Power Up Sequencing
EN
(V)
ENC
(V)
ENTRIP1
ENTRIP2
REF
Low
Low
Off
Off
Off
Off
Off
Low
On
On
On
Off
Off
Off
Off
On
On
On
Off
Off
>2.4V
=> High
VREG5 VREG3
SMPS1
SMPS2
>2.4V
>2V
=> High
=> High
>2.4V
=> High
>2V
=> High
Off
On
On
On
On
Off
On
>2.4V
=> High
>2V
=> High
On
Off
On
On
On
On
Off
>2.4V
=> High
>2V
=> High
On
On
On
On
On
On
On
R2
VIN
VOUTx
UGATEx
PHASEx
LGATEx
VOUTx
FBx
R1
t ( VIN VOUTx )
L = ON
LIR ILOAD(MAX)
DS8223P-01 June 2011
VOUTx
+ t OFF(MIN) )
VIN
=
V VOUTx
2 COUT VOUTx K IN
tOFF(MIN)
VIN
(ILOAD )2 L (K
VSOAR =
(ILOAD )2 L
2 COUT VOUTx
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RT8223P
Maximum Power Dissipation (W)1
1
VPP = LIR ILOAD(MAX) ESR +
8
C
f
OUT
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Four-Layer PCB
1.8
1.5
1.2
0.9
0.6
0.3
0.0
0
25
50
75
100
125
2.1
RT8223P
Outline Dimension
D2
SEE DETAIL A
L
1
E2
A
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A1
Dimensions In Inches
Symbol
Min
Max
Min
Max
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
0.180
0.300
0.007
0.012
3.950
4.050
0.156
0.159
D2
2.300
2.750
0.091
0.108
3.950
4.050
0.156
0.159
E2
2.300
2.750
0.091
0.108
e
L
0.500
0.350
0.020
0.450
0.014
0.018
Headquarter
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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23