Analog IC Design Lab

16MVD0070

Task 2:
Design of Single stage amplifiers ( CS, CG and CD )
I.

Objective:
To find gain, phase, gain crossover frequency Wgc, Output Voltage swing and phase
margin of the single stage amplifiers,
1. Common source amplifiers with,
a. Resistive load
b. Diode load
c. Source degenerative load
d. Current source load
e. Current source load and Diode pmos load
2. Common Gate amplifier
3. Common Drain amplifier

II.

Design Parameters:
Technology used
Transistor used

gpdk090
nmos1v_hvt, pmos1v_hvt

Analog IC Design Lab

16MVD0070

1. Common Source amplifiers

a. WITH RESISTIVE LOAD:
DESIGN CONSIDERATIONS:
Vdd:1.8V
Vsin:
DC VOLTAGE:

10mv;

AC MAGNITUDE:

10mv;

AC PHASE:

0;

AMPLITUDE:

10mv

FREQUENCY:

1KHz;

NMOS (W/L ) =

(200n/100n);

Rd:

1M Ohms

SCHEMATIC:

Analog IC Design Lab

16MVD0070
Simulation Output

Gain:

15.031dB

Frequency at 3dB: 3.391 GHz

Wgc:

19.95 GHz

PM:

105.9 deg

VOLTAGE SWING:
Vout MAX:

768.45 mV

Vout MIN:

656.437 mV

Vsw =

112.03 mV

Analog IC Design Lab

16MVD0070
b. WITH DIODE CONNECTED LOAD:
DESIGN CONSIDERATIONS:
Vdd:1.8V
Vsin:
DC VOLTAGE:

255mv;

AC MAGNITUDE: 10mv;
AC PHASE:

0;

AMPLITUDE:

10mv

FREQUENCY:

1KHz;

NMOS (W/L ) =

(30u/120n);

PMOS (W/L) =

(200n/100n);

SCHEMATIC:

Analog IC Design Lab

16MVD0070
Simulation Output:

Gain:

15.166 dB

Frequency at 3dB: 2.399 GHz

Wgc:

16.60 GHz

PM:

121.76 deg

VOLTAGE SWING:
Vout MAX:

650.1mV

Vout MIN:

535.6mV

Vsw:

114.5 mV

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16MVD0070
c. WITH SOURCE DEGENERATIVE LOAD:
DESIGN CONSIDERATIONS:
Vdd:1.8V
Vsin:
DC VOLTAGE:

200mV;

AC MAGNITUDE: 10mv;
AC PHASE:

0;

AMPLITUDE:

10mv;

FREQUENCY:

1KHz;

NMOS (W/L ) = (200n/100n);

Rd =

1MOhms;

Rs=

10Ohms;

SCHEMATIC:

Analog IC Design Lab

16MVD0070
Simulation Output:

Gain:

15.031 dB

Wgc:

19.95 GHz

Frequency at 3dB: 16.248 GHz

PM:

105.911 deg

VOLTAGE SWING:
Vout MAX:

769.2 mV

Vout MIN:

656.5 mV

Vsw:

112.7mV

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16MVD0070
d. WITH CURRENT SOURCE LOAD:
DESIGN CONSIDERATIONS:
Vdd:1.8V
Vsin:
DC VOLTAGE:

300mv;

AC MAGNITUDE:

10mv;

AC PHASE:

0;

AMPLITUDE:

10mv;

FREQUENCY:

1KHz;

NMOS (W/L ) = (600n/200n);

PMOS (W/L ) = (200n/100n);

SCHEMATIC:

Analog IC Design Lab

16MVD0070
Simulation Output:

Gain:

15.1507 dB

Wgc:

79.43 GHz

Frequency at 3dB: 3.390 GHz

PM:

104.87 deg

VOLTAGE SWING:
Vout MAX:

1.244 V

Vout MIN:

1.130 V

Vsw:

0.114 V

Analog IC Design Lab

16MVD0070
e. with Current source and diode PMOS load:
DESIGN CONSIDERATIONS:
Vdd:1.8V
Vsin:
DC VOLTAGE:

1.03 V;

AC MAGNITUDE: 10mv;
AC PHASE:

0;

AMPLITUDE:

10mv

FREQUENCY:

1KHz;

NMOS (W/L ) = (30u/100n);

PMOS1 (W/L ) = (600n/1.5u);
PMOS2 (W/L ) = (600n/1.5u);

SCHEMATIC:

10

Analog IC Design Lab

16MVD0070
Simulation Output:

Gain:

13.78dB

Wgc :

100 MHz

Frequency at 3dB: 22.848 MHz

PM :

91.115 deg

VOLTAGE SWING:
Vout MAX: 1.075 V
Vout MIN:

978 mV

Vsw:

97 mV

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Analog IC Design Lab

16MVD0070
2. Common Gate Amplifier
DESIGN CONSIDERATIONS:
Vdd:1V
Vsin:
DC VOLTAGE:

225mv;

AC MAGNITUDE: 10mv;
AC PHASE:

0;

AMPLITUDE:

10mv

FREQUENCY:

1KHz;

NMOS (W/L ) =

(400n/105n);

PMOS (W/L) =

(120n/100n);

Vb1 nmos = 500mV

Vb2 pmos = 650mV

SCHEMATIC:

12

Analog IC Design Lab

16MVD0070
Simulation Output:

Gain:

15.16 dB

Wgc:

10 GHz

Frequency at 3dB: 1.924 GHz

PM:

259.79 deg

VOLTAGE SWING:
Vout MAX:

498.2mV

Vout MIN:

385mV

Vsw:

113.2 mV

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16MVD0070
3. Common Drain Amplifier
DESIGN CONSIDERATIONS:
Vdd:1.8V
Vsin:
DC VOLTAGE:

1.3v;

AC MAGNITUDE

AC PHASE:

0;

AMPLITUDE:

10mv

FREQUENCY:

1KHz;

10mv;

NMOS1 (W/L ) =

(200n/1u);

NMOS2 (W/L ) =

(120n/7u);

Vb= 280m
SCHEMATIC:

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Analog IC Design Lab

16MVD0070
Simulation Output

Gain:

-798.98 mdB

Voltage Gain = 0.9

VOLTAGE SWING:
Vout MAX:

1.31V

Vout MIN:

1.29V

Vsw =

18mV

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Analog IC Design Lab

16MVD0070

Conclusion:
The gain, grain cross over frequency Wgc, phase margin and Output voltage swing has been
calculated. The gain of the different circuits are,
1. Common source amplifier,
A.

With Resistive Load Gain:

15.031dB

B.

With diode load Gain:

15.166 dB

C.

With Source Degenerative Load Gain:

15.031 dB

D.

With Current Source Load Gain:

15.1507 dB

E.

With Current Source Load and diode PMOS Load Gain: 13.78dB

2. Common Gate Amplifier Gain:

15.16 dB

3. Common Drain Amplifier Gain:

-798.98 mdB

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