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MOTOROLA Branca. SEMICONDUCTOR SS APPLICATION NOTE AN1102 Interfacing Power MOSFETs to Logic Devices Propared by Ken Berringer Motorola Dlscree Appiatons POWER MOSFET DRIVE CHARACTERISTICS Power MOSFETE are commonly isd in suteing apts tons ds othe ast swiching speeds and low sa tosses \Whencrvenwhsiioentgaovotege,apower MOSFET wa tumor andnavesverylowen-eastnce tegaavatage'e Inuticent bias the Power MOSFET ful on or excesnve craincret re apted the powe MOSFET wiopeaio thesaveaten nem of regan inter wor, acoaingate Vollage wil support ony ames anount fea curent ‘Moat ‘f the cuant cop of buth goneraton power MOSFET ei 10 vos of gala veo suppor hee mas hmumconinueus raincurant Thsmean that Slog wi ot provide enough votage to dive a standard power MOSFET. ne amily of Lope Love power MOSFETs aro beth can suppor nerated dai carent wih 3 925 vols. Wh he peper consideration, hese owes MOSFET: may be eal mtoraceso most ogi am: Design of the MOSFETS gate dive is dependent on the MOSFET sinuteapoctance fiche stony atetodby 3 tite Thorlo slocingihecoreclevcetortneapoicaion ot ony minimizes comparent cst. but also optimizes fishing patoranee. Ste of Or louse ae determines byte power MOSFETs onresitnos ApSion heh = 3 ‘nctenotancton temperate (7 gate wokape Vs) an Srancurent ip) RDSon)s AI speatieg tp eau © fate rated Sain etn, igo 10 vs. and neon temperatures of 25 and 100°C “The ower MOSFETs tailoses canbe easy calculates In BG erpusedappsion. rat corect test Ron for yours corer and esters operating temperature vi he hap of the manufacturers data shoot curves, Then rl tnsvatuetene to MS score sqvared Ponte ims?FoS\on Youshouldereoseapower MOSFET wins Currant rang Ip) ar votag rating Vg) wo above your worstcaseadconatons Agood weal hurbistoseecta ‘oves wth toe your woret ease RMS dain corer ane Valtage ating 25% above your wor case eran vllage infgnfequencyappizstonsevichng lsees ara often more sgnfeat than sii losses To minnie sweching losses yeu mustdecreasethe swiehngtmes Whona power MOSFET vedinewtehingappleatons, the gatecanatbe Inada as @ simple capacor cue o sizable delacarent turers in Crag. the nto gate apace, bough ony latgeswingsindainto-gatovotago Asaresut. hettalinet {apactancs, Cig vanes great rth power MOSFET = ‘operating range Cag canbe plecemse modeled as alinesr apactorinerder ttn steer approximations ol salcing ‘Aster methodo cleansing esis ious gate care dt rom the manufacturers dts shet though 2 power MOSFET 's uualy aught ol a a vag conoed foven canbe accurtaly modeled ae 3 charge cold ‘ves Ths charge eaaitedar apower MOSFET hanes (ven curent i ralabvely consi oven though ts Sraintogate capsclance (Cys) aves assy wih Sion ga ag, reve ray moma 0% Figure 1. Driving a Power MOSFET with 2 ‘Constant Curent Soures Wena power MOSFET i awen by acurent source asia Fqure ie gst votage wil be rey pecawse tar 35 ‘Sewn inure. The treed regis se tsn onlay {toto etme tog, andencess crarpe me (919) ‘te en of etunon delay () he power MOSFET begins {9 condct ut tha can curant i vry sma During he ‘otagedtopste ast ze. The esse swichng rise te ‘Wao © acaly measued as etme takes tr he dan “otegetocrop tom a0st lohrotishghee aun hiscsiad ‘otage ie what usualy measur, The te corespancs 0 ‘he me tat Vag romains nthe patea region of gure 2. 3 vom 2 ves g 2 G af ot 8 ME) Figure 2. Gate-to-Soures Voltage versus Time fora ‘Curent Souree Turning On a Power MOSFET ® MOTOROLA @ Dung ne excess charge ie (20g) Ron connues io ‘ocreae. The excess charge mut ba removed ding he {une aiay, oung he gallo an unnecessary iho ‘ge wil cra th tal oo. Unie Dpolar arsisors. poner MOSFET are majority camer doves Wihaut manor injecbo, power MOSFET an be lured of usta ea a Day at ued on. For ‘cereal pte crv caren, net time wil qua al be. The {hi of wavelom lor onsarigae cute wa be a miro Imago of Figure 2, Note at thet of ay coos rt caval {on dolyitnstoas coreseonds thet on xeass charge one ‘Since te gale Curent Fize 2 constant and equa to ‘hacargeper unttme, ehorrialaxieantelabolame ‘reharge, Gate carpe datas sualy measuresusinga mA orant sures which mean tw provide 1 nC (vana CCalount) of etarge np, Mantacuers asta sheets usu: ‘ly inctde agate charge char Vs ve Gp wth Og noted inaCasinFipures Nisinporan toratetnathevalel Vos Curingrae tne asocalesthepateauvotge increases wih ipandtnertore so doestheturnon delay Also, te armourtot Charge needed fo ene ary wth he 3 UPD ‘tage This usalyetcate onthe pte charge char oy ‘Tite ine forthe exeseschrge rein labeled wth he Coresponana Vos, “a determine te ching tines using a core source fo caie.a Power MOSFET, tnd be charge raged foreach ‘eponusng he gate charge cha gute and tense the Siete equation: oy'G o Frstindinechargerequredxinge:umendelayrogion Cony bydrang tine down hom feet ct posto ‘hehororal ans of Figure 3s she gst charga fhe Fatesor ested Ip your ea an curents tres ha thoratedeurentyouray mor accuracyy Ine scaling Cony Now calculate theturor delay usngeuaton | Next finda gate crargerequedtor ise renee ortho gate ‘Sage chat as the anes beeen the st stacton pet land to inersecion of he plete wih the ie fr Your ‘ipectes Vs A lyped! val = sometimes Isto a “Thi value maybe Used to calle bo ro ana fal ines Nestineinersceton pnt alyaurmaxmon Veg anathe Incormgnag avg. rh. ean a) Ton he charge require os tno lay Cg) (ght on excess erage). sulract Qa) 258 Ore fom joa A maximum oa ga0 erage Gyan) feo ‘iba to tacate wort case daagn nowover nis NUE oretnes inl susan gor ban "nen ving power MOSFET with avotage source witha ares resitance(Theven sowea), the canon ar 3 Ie mare complex Durhghe te atalimes gg el thei corsant snc alte gatcrent Use to sarge tho file to-aan capactar By Ohms tw. igi heave so anstant andthe pte charge car can be sedth Equation ‘ota ie and fal tines zg tam on he vole across the series rascanca eta eleva source votage (sual the supp otage) minus he gue to soure pata tage Vee. During tun of re veaye across to resistor isthe psoas vltage minus te ofecve ork vellage (sual found, Re anda! tas wil retort be dite Using ths infrmaton with Equation 1, we can cbtain equa tonater ie and tne Oy _Oy3 Reon) e Ts ~ VSOuRCE-YosP 0 _ ga Renorr} es Te ~ Vasp-Veink Veg s ne Power MOSFET gato source iteausot age. Veoure =the gate svers aecve source votage, Vani iste gete creer setecte sokotage and Rg he ‘gate dvers eflecve esstance (ouput resistance) During {nat Vink ay be near Zora ls or even a negalve ane. beige ‘es GATE 1 souREE OLAS ELIS) Figure 3. Gate Charge Chart forthe MTP30SSE During th un on and turn a aya curant not corsa and gate charge ata cannot be ved a ctrmine ‘Switching speeds. Te sores resstance arth gate capac. {ance fom a simple AC nett: however. he capac ‘res great over th operating range. To ina te Smeg times you mut tern the capaetanee or each re.0n lromacapactancecharika Pures Dung theturnondelay ‘pg treats maximum valve, Vos ie nest 200, an he Inputeapectance slo Find the value! Cvs nne cana. {ance eve fr your masimum vaio of ps. and se hs ‘apactance Pot Ain Figure 4 focaeuate eu on dla. "Youean use Equation «10 approximate teturon clay ie vsounce “470m = Remon Castano] ;YSOURCE_] mons) [reset] ving he um ctl Vos wilt and Gs ihave a largervale. Fra ne vac oCggcorespandngio minum ‘oS and maxinum Vg, Por on he capatance char Tn se Egution Sts appmaotun of ay ime ouancisne| ® os Vmax) he al gate voage prior ot of usualy the Supt otogo). Roo the elective sores esstance uringtamoft and Vara testactne skolage. WVseis at ground hon the Vit wil erp ou of Eauation 5 5m Fo 2 a 5 ae Togawetosomce’ spp ountoatnce ‘etnecwary “hate rat Figure 4. Capscitance Ghat for he MTPODSSE Notethatthe gate charge tat andcapuctance cuves are ‘elated The slope ofthe neta gle charge hate invote fer nare-Caaunb. Farad ot eapactane saa 0 2 Clout per ot Neodombsec « CsveiFarea-oeasec) From his equation, yu fn at Farad = eeulombvot ‘Thettoe, th creel othe ope i tha np capes tance in nano-erads (1000 pF). However, you sould use bo chars. The gate charge char most Ut when he Inputcapactance vats andthe gale carom scortart (20 natal ies) The capactare curves mostustu when he input capactane fe costan’ sn the gate cent vores (say tes DIRECT INTERFACE TO STANDARD POWER UOSFETS ‘Standat powos MOSFET can bo irfaced recy wih standard CMOS devs suchas he M4000 farsiy. This tomy uses complementary and ® channel FETs for he ‘ouput tage, Athouph standard outputs eae at 11098 andbute ouput aerated at 45m stration certs or ‘Short ereutcordbos are ran higher While a CNOS gale Staulnetbe shor ccteat long prods oe, maybe toy operatdn he saturate regen wnen swiching roe apace loads A /A049U6 inverter utlor can pay e930 mA ar snk 120" using a 12 vee Supa he Figure 5. Standard HOS interlace Ckreut cuput cent nat nd the CMOS g's ott wil act Ihe acurentsource. ine outputcurortctintedte lesion the sturatoncurent the CMOS gates op wil athe 2 vollage source wih a ft output resistance. The MC 4000 ere famiy wiloparata tm at 8 vals Th common 126 "Svol Vg suppy wl re Power MOSFET: ney "Toe WHOLQUB an be eoeneced ded 10 standard ‘power MOSFET suena he MTPGOSSE arn Figure The InTP20Sse is aruged 2am, 60 vot power MOSFET thats ‘very popular in tho musty The gat dv carers atk ‘tea apaesrascorandinereoretegae ve cent ‘equal th 14040 ouput atraton cues et a0"120 ‘mA Using he gato charge dala wah Equaon me can po Geshe alowing seeing mee ‘eon = 20:90 mA=67 00 ncia0mA 139 nese OFF) =6NC20 mA » $0 rte ugh 40.120 mA = a9 ne66 The swing tines were mescied ung tha ere a Fgute The actual scope waveloms a shown in Fie 6 tthe measure stg tenes ae shown in Tabla Table 1. Switching Tes for Standard CMOS Devices Diving on WTPSOSSE Amps One gate usod unless noted Wee, | Ro | ten) | eae | tomy | an Drier [et | gay | 8) | too) | in| “Tho calelates values were fay accurate fo fst order spproximatons contin that he sped ate igh enough ‘hat oreutparestes ean alec polomance. The satraion nts he 4089 vary rom deve odevien aed wih the ‘Supp voltage Yop an junc erpeature Dring recy tronelogelc wirovdenoqulkestnseandtames but ‘hese mee wl vary area By acnga estortweon he CMOS butlers ouput ant the gate of he power MOSFET in gue wo can conta Suiting tenes by lena gate cve uens,Howevr sh (Geasng the gate asi also inreasos the power MOS- FETs suscoptbiy to nis and accideril av un on. A ‘apischangein he power MOSFET rain otage wi cauee ‘otage appear onthe gate whieh maybe suicentoten Figure 6. Scope Wavetoms fr n MCT4089 ‘riving an MTPSOSSE “olind ne avcng es sing a gate eit, vo Equa tons 2 and ton se and fa nes. Than use Equa 4 angi ind he goa ies. He Peon) eal to gate Testor plo the CMOS butors ouput reasaree A The aperosmate ouput estrce of th 049 is 2001 fo tumenands0storumet Let owe eau VOD andVsnk ‘qua zero Smtahng mes for sevragate reso arom ‘anaes Tal he UB inthe NC AO4BUB cts or "un outer Ti ‘dona gate in Figure Sis used to ensure tho power MOS: FET worst vento Voy The mputvatage wl ety ‘ct#0600 sa -butorod on sven ancora teinptn Foc S dang re voles gor a fgets neal sae potechon Soda, Votage in axcesso ‘he sup volage, Yoo. apptal tthe ouput ofa CMOS "The 74.526 was designed to intertace to 18 volt logic and oS st Vine ve, weSba Rela Sevamet svete Seuneg ear SeerSgne eras Table 2. Switehing Times for he 781825 ‘Driving an P0053 Voc | Ra | Re | ton | tae | tan | Man 7 [.o i500 | 200 | 050 | 240 | v5 rs ar ee be fee ats Figure 7. Low Power SchotthyInertace Cieut Figure 8. Scope Wavtorms fora 74.526 Driving on ATPS0SS6 ots, Vp 12 Volts, Rp = 1.8K02 pctenates terctereen ert Soon meena are ieee cero seen alert pedir eet ed Sree ameersora meres eat foc See hes ore com hamecrocey ‘30 mA. The 110.2 resctor limits the pullup transistors sink Faure TO showshow ointrtace He. LS, and FAST logcto protectonorouty. Thisisnaceesaryiodrethe egedevices MOSFET diver with a device trom the same logic lary When comctng an HC (any CMOS) dei too Doa ‘Cannes ie dass shoud be used or ESD proecon familes ang @ Logic Level Power MOSFET using the fete in Figure 10. The measved seeing tines ar Table 3. Suiting Times for Logie Devices Driving Logic Love MTPSOSSEL p= 6 Amps unless noted: One gate used unless noted avin [oy | 85" [955 [SSP [85 [commen rac] [so [os [a a 0 (owas cua soe Sn na (LS TT ouput stage Figure 9, Logie Ouput Stages Avacotnexlnvertercan be onto rect atop Leva Power MOSFET The gwachnbnscaT be cated fhosane ny ae te CMOS verte The HED ean saan 8 mA wh a vor sy. "The Hay has a operatng soy range a 219 Ani deveealonethe Loge eve Poet MOSFET gla {buansomv aloo. Howes the Vpg sialon Svarete acing bec ara Reser encase ara aly 10% ratetonin Yoo teas tt) wt rereae be ‘etme sboto ar ake ony 5% Ron ‘rate tom 1001008 mo depecng oF Re an currentan clon temperature. How vonage operation a Teal possbly you should choose th Lage Level Power MOSFET ara heat o hand tis wort case canton Esamiethe cuvostr"On gen Characters AOSion) Versus Ip” ar"Rosion versus Temperature” ine ma Facer’ datasheet. You may need to use devce wih © {aren rang much roe at your expocedtaad cure 6 Stan the desired Fipsjen) under low supp condone anuiacures ae now deviopeg 4 wo tage evel power MOSFETs wan Asien fated at voto. Tose devas may De easiy menacediohe age devces snd operated downs {ots Howover tho lower echt votage mes them more susepibie ons ar wcreaseseaage ouerts “Tho 74804 in Figur 10 musi Mave a up restr fo 5 ols. Aminumullup resto o 30.0 guarantee ne Iegedovces ouput votage VoL 0S ose. Ourrg um on gatecvecurericsuppuedbytepupresisranatne 1508 nr pull arson Ousing Tun of the S04 ‘st sib te gfe dive erent and he pulp esitor Curent Alger Ril eat tron tne and derease 1504, neessing th powar MOSFETs eakage curert.The lower esha vtage og evel power MOSFETs makes the Vou rang etal The Breshsvakape ofa power MOSFET docrsses as lomperawe reuse. Teele. the Vou o he ope eves must be lest nan he Wi vel power MOSFETs vesold tage VS a mm ‘xpi uncon lomperatre For ths foacon #0 oe level poner WOSFETE maybe nome wih TTL age ‘Sochog tes can aga be estimated by using the ‘Tovenn equals of the ee cut wth Equations 2 treugh Burg tun on Seay eer supped bythe Darnton puilup aris fb T4USOA, an he extra puluprestar The banaginisinataaton wna Veen) ‘fabou 5 ors The 74US04'sauourcuret then ted by he ternal 10 east. To cals umn dey te Yourray ure Equation $ th Veoureo = VCC T Fp {102)andReten) =p "108 Durr setime rea abe Carers upped by te pulp resi, ence VGgp =U Styanove nevowe/ine (Soe vouroy naratsure Ege Sera Yeowee= Voom oton Rpts ae Dornan he pu awn rans most sink oh na secure andthe resister erent ste te open fect 74826 mPa To cast tm of rosa Vank=VoC-lonipand en ApwitEauatos Sard 5th put down tartare moxmun nk corer ee Tyan aout 90 ma tein 4750 8.2 wae Th rat ive wi vay Sealy wh ‘upp votope while the lima ony varies abouts. The Tele ary tom aout 0% 0 0% fr VCC eae 4:75and 525 vos respecte, This dv to sul votape atecting bot ne pop vessr curt and ho pl-o ar fistor em, Sins the pering supp range US ss tmantnat of loge Poston mi notary a much, mat “the FAST loge fay can source and stk much mora carrntantheL amily. The 7@Fos can source aout SOMA fe sk abou 200 mA ron plo resistor of 202 Wil ouaramee he lope devee's ouput low vekage VOL of MOTOROLA roy (t) Sehoty TTL Figure 10. Logie Level Power MOSFET Intertace Creuits Svs, Alarger Fp wi neeot tum ona and acrease Lumottine.TheswchagtmescantecalaatdasintboS family. The 74F04 ves an nel 350 resistor it he pullup Daringonscuputcurex, nsteadof me 0.0 es for The samo spp volag carsideratons or Stam also ply ote FAST tay. ‘tories gate resistor may based wih any oft cet in pure 100 sow and corr! thing tes Te setehng times forge gate resis (rater han 200 er HC 5K for. and 2Ks for FAST can beostratodusing Reon) hg wth he Equatons 2 tough 5 When swiching oxSe ‘vet inv, he induce kek bac ring en of Imay cause tha dan voage for above tho oad pp Soming down te uno wth gat resistor wit reduce hs ‘volage is vatage sarge eeugh and suet ney = resent t may cetay he Powar MOSFET Ano tm of ‘agged Power MOSFETs canasze cosiseable ney un ‘ortho condone Youmay a wsrrtochooee a are ‘ae orortoeduceElocromagnetInterteence (EMI \Wireneringatamp, youray wat ouseaverylgeresior toumtinrush curent Long tern relay oe lope eee vill aso be mproved by using agate esse and a wrget lap restr. Tho gato resis disptes most the ge ‘ivopowerosces instead Melogcaavic, resucg sess ‘ntheloge ouput doves A tiger pulp restore ho ‘Seog sat on curert tbe pawn Yanai, eteny ‘ecrensing ther power Gaspaton However ng De (atreasir wi ezoinerease power MOSFET sausces Bity to noe an ait o. Lag ates onthe same chp maybe paralled o ncrease ‘settingspeede. Th ubutcurrteapanity wl nen Proportion he numberof gates used. no gars ned th evening times wi ceceaee i popertan fo te romberetgses wea agate esis suseaitmaybe sell ‘creased a proportion the romber of gates o cae Stznrgtines Paralelnglopasaswilnetchonge etal lope package power dsepaton since ta out cert teases an siching tas decease When mary gates ae ‘hos swtsing tines may derase to te pat where ey Blt bythe stay inaucance te aad an he lout Cope gates onde chipsor fom diet aris Should not be paralle because te dfleren propagation ‘olaye may cause exonesve shoot trough cunts whieh ight eamage te lage caves ‘Save gates ot ver om a Sigal cut maybe used 0 crv a Loge Level power MOSFET. However, he ge eu. ‘ens boing ved y he cir may caute age amounts of tals onthe sup a Tha noe may cause da os ‘heotergatesontnosara Ic Lenainghecamertwin sarge (ie resistor and cavtly decoupling the loge deve wl ‘ede tho power sup noe. Ala tha ng lagi eve trust be grounded same po as te sure ol he po MOSFET avod ground shit pabioms caused by he ge Gain cutents I sparate ope and analog grove are ved ‘hoy shoul be connected any! the souce of he power wosrer 2ycosestntontothe power suppy scheme. Tegataot ‘a power MOSFET should rover bet Honing wt vane ‘apptedo he aan. When 1 happens the power MOSFET ‘ay tam on and estoy ta he cuenta. opsat spies ate usetor he load aed te fg Che lope supp shuld bo ponered up est and powered down Tessie nt posse censor wat happens fo te age

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