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TimingDiagram8085MicroprocessorCourse

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TimingDiagramsof8085
Itisoneofthebestwaytounderstandtoprocessofmicroprocessor/controller.Withthehelpoftiming
diagramwecanunderstandtheworkingofanysystem,stepbystepworkingofeachinstructionandits
execution,etc.
Itisthegraphicalrepresentationofprocessinstepswithrespecttotime.Thetimingdiagramrepresents
theclockcycleandduration,delay,contentofaddressbusanddatabus,typeofoperationie.
Read/write/statussignals.

Importanttermsrelatedtotimingdiagrams:
1.Instructioncycle:thistermisdefinedasthenumberofstepsrequiredbythecputocompletethe
entireprocessie.Fetchingandexecutionofoneinstruction.Thefetchandexecutecyclesarecarried
outinsynchronizationwiththeclock.
2.Machinecycle:Itisthetimerequiredbythemicroprocessortocompletetheoperationof
accessingthememorydevicesorI/Odevices.Inmachinecyclevariousoperationslikeopcodefetch,
memoryread,memorywrite,I/Oread,I/Owriteareperformed.
3.Tstate:EachclockcycleiscalledasTstates.

Rulestoidentifynumberofmachinecyclesinaninstruction:
1.Ifanaddressingmodeisdirect,immediateorimplicitthenNo.ofmachinecycles=No.ofbytes.
2.IftheaddressingmodeisindirectthenNo.ofmachinecycles=No.ofbytes+1.Add+1totheNo.of
machinecyclesifitismemoryread/writeoperation.
3.Iftheoperandis8bitor16bitaddressthen,No.ofmachinecycles=No.ofbytes+1.
4.Theserulesareapplicableto80%oftheinstructionsof8085.
TimingDiagram:

Where,Instructioncycle=FetchCycle(FC)+Executecycle(EC).

Tweetsby@z_series

Opcodefetch:
Themicroprocessorrequiresinstructionstoperformanyparticularaction.Inordertoperformthese
actionsmicroprocessorutilizesOpcodewhichisapartofaninstructionwhichprovidesdetail(ie.Which
operationpneedstoperform)tomicroprocessor.

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Fig:Opcodefetchtimingdiagram
Operation:
DuringT1state,microprocessorusesIO/M(bar),S0,S1signalsareusedtoinstructmicroprocessorto
fetchopcode.
ThuswhenIO/M(bar)=0,S0=S1=1,itindicatesopcodefetchoperation.
Duringthisoperation8085transmits16bitaddressandalsousesALEsignalforaddresslatching.
AtT2statemicroprocessorusesreadsignalandmakedatareadyfromthatmemorylocationtoread
opcodefrommemoryandatthesametimeprogramcounterincrementsby1andpointsnextinstructionto
befetched.
InthisstatemicroprocessoralsochecksREADYinputsignal,ifthispinisatlowlogiclevelie.'0'then
microprocessoraddswaitstateimmediatelybetweenT2andT3.
AtT3,microprocessorreadsopcodeandstoreitintoinstructionregistertodecodeitfurther.
DuringT4microprocessorperformsinternaloperationlikedecodingopcodeandprovidingnecessary
actions.
TheopcodeisdecodedtoknowwhetherT5orT6statesarerequired,iftheyarenotrequiredthenp
performsnextoperation.

ReadandwritetimingdiagramformemoryandI/OOperation

MemoryRead:

<>Figure:Memoryreadtimingdiagram

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Operation:
Itisusedtofetchonebytefromthememory.
Itrequires3TStates.
Itcanbeusedtofetchoperandordatafromthememory.

DuringT1,A8A15containshigherbyteofaddress.AtthesametimeALEishigh.ThereforeLowerbyte
ofaddressA0A7isselectedfromAD0AD7.
Sinceitismemoryreadyoperation,IO/M(bar)goeslow.
DuringT2ALEgoeslow,RD(bar)goeslow.AddressisremovedfromAD0AD7anddataD0D7appears
onAD0AD7.
DuringT3,DataremainsonAD0AD7tillRD(bar)isatlowsignal.

MemoryWrite:

Figure:Memorywritetimingdiagram
Operation:
Itisusedtosendonebyteintomemory.
Itrequires3TStates.
DuringT1,ALEishighandcontainsloweraddressA0A7fromAD0AD7.
A8A15containshigherbyteofaddress.
Asitismemoryoperation,IO/M(bar)goeslow.
DuringT2,ALEgoeslow,WR(bar)goeslowandAddressisremovedfromAD0AD7andthendata
appearsonAD0AD7.
DataremainsonAD0AD7tillWR(bar)islow.

IORead:

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Figure:I/Oreadtimingdiagram
Operation:
ItisusedtofetchonebytefromanIOport.
Itrequires3TStates.
DuringT1,TheLowerByteofIOaddressisduplicatedintohigherorderaddressbusA8A15.
ALEishighandAD0AD7containsaddressofIOdevice.
IO/M(bar)goeshighasitisanIOoperation.
DuringT2,ALEgoeslow,RD(bar)goeslowanddataappearsonAD0AD7asinputfromIOdevice.
DuringT3DataremainsonAD0AD7tillRD(bar)islow.

IOWrite:

Figure:I/Owritetimingdiagram
Operation:
ItisusedtowritonebyteintoIOdevice.
Itrequires3TStates.

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TimingDiagram8085MicroprocessorCourse
DuringT1,thelowerbyteofaddressisduplicatedintohigherorderaddressbusA8A15.
ALEishighandA0A7addressisselectedfromAD0AD7.
AsitisanIOoperationIO/M(bar)goeslow.

DuringT2,ALEgoeslow,WR(bar)goeslowanddataappearsonAD0AD7towritedataintoIOdevice.
DuringT3,DataremainsonAD0AD7tillWR(bar)islow.

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