2016

WORKBOOK
Detailed Explanations of

Try Yourself Questions

Electronics Engineering
Electronic Devices and Circuits

Energy Band and Transport

Phenomenon

T1 : Solution

J n = qDn

1016 (2 x)
dn
2
= q Dn
= 64 A/m
L
dx

T2 : Solution
For

n = 700 cm2/Vsec
= nq n = 1017 1.6 1019 700 = 11.2 /cm
=

1
= 0.0893 -cm

Also,

RH =

Hall voltage

VH =

1
1
3
=
19
q n 1.6 10 1017 = 62.5 cm /C

I x Bz RH
10 3 10 5 (62.5)
= 62.5 V
=
t
10 2

T3 : Solution
I x Bz
0.5 103 5 10 2
=
w
3 1021 1.6 1019 4 102
VH = 1.3 V

VH =

T4 : Solution
Given
l
J
V
n
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=
=
=
=

10 m
1 mA/m2
1V
1350 cm2/Vsec

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As we know

J = nq E
1
1 10 3
19
1350
= 1.6 10
4 2
10 10 4
(10 )

= 4.629 1017/cm3
T5 : Solution
Here Ei is not exactly as in the middle of the gap because the density of states NC and NV are different.
NV are different

NC e
e

Eg
2

So Ei is about

E E
C i
kT

EC E i + E g / 2
kT

Eg / 2 kT

NC NV e

*
NV mp
= *
NC mn

(EC + E i ) = kT

= ni

3/4

mp*
3
3 0.56
l n * = 0.0259
= 0.013 eV
4
4 1.1
m
n

kT
below the centre of the band gap.
2

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P-N junction diode

T1 : Solution

Dp

D
pn + n np (eqV / kT 1) = Io (eqV /kT 1)
I = qA
Ln
Lp

pn =

ni2 (1.5 1010 )2

=
= 2.25 105 cm3
nn
1015

np =

ni2 (1.5 1010 )2

=
= 2.25 103 cm3
pp
1017

Dp =

kT
= 0.0259 450 = 11.66 cm2/s on the n side
q p

Dn =

kT
= 0.0259 700 = 18.13 cm2/s on the p side
q n

For minority carriers,

Lp =

Dp p = 11.66 10 10 6 = 1.08 102 cm

Ln =

Dn n = 18.13 0.1 10 6 = 1.35 103 cm

Dp

D
Io = qA
pn + n np
Ln
Lp
18.13
11.66

2.25 105 +
2.25 103
= 1.6 1019 0.0001
0.0108

0.00135

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= 4.370 1015 A
I = Io (e0.5/0.0259 1) 1.058 106 A in forward bias.
I = Io = 4.37 1015 A in reverse bias.
T2 : Solution
Built in voltage, with no. external voltage applied the voltage (V0) across the p-n junction is given by
N N
Vo = V l n A D
n2i

17
16
Vo = 25 mV l n 10 10

0 2
1.5 10

25 29.12 mV
Vo 728 mV
width of the depletion region.

Wdep = xn + xp =

2 0 1
1
+
V = 0.32mm

q N A ND 0

xn
N
1017
= A =
= 10
xp
ND 1016

...(i)

...(ii)

xn = 10 xp
By solving equation (i) and (ii)
xp = 0.03 m and xn = 0.29 m
T3 : Solution
I = I0 + IR

d I 0 d IR
dI
=
+
dT
dT
dT

Given:
1
dI
1 d I0

= 7% / C

= 11%/C and
I dT
I 0 dT

or
and

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1 dI
1 d I
= I0 0
I
I dT
I 0 dT

(Q R is temp independent)

I = I0 + IR = 5 A
I0 = 3.18 A and IR = 1.82 A

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Electronics Engineering Electronic Devices and Circuits

R=

10
= 5.494 M
IR

C=

1
(Vj )1/ 3

T4 : Solution

V
C1
= 2
V1
C2

Linearly graded

1/ 3

C2 = 8.939 pF
Decrease in capacitance = 10 8.939 = 1.06 pF
T5 : Solution
( i))

I1 + I2 = 10 mA = 0.01 A
The current through D1 is
V / V
I1 = I01 e 1 T

0.01 I2 = I01 eV1 / VT

Also

I02 = 10 I 0
1

...(i)
...(ii)

Therefore,
Current through D2 is
I2 = 10 I01 e (V1 V ) / VT

...(iii)

From (i) and (iii)

I2 = 10 (0.01 I 2) e V / VT

I2
V = VT l n 0.01 I 10
(

2)

V = 95.54 mV
(i i)

I2
50 103 = 0.0259 l n
= 10 (10 I2) 6.9 I2 = 0
10 (10 I 2 )

I2 = 5.918 mA

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Bipolar Junction Transistor

T1 : Solution
IB = 7.5 A
IC = 400 A
=

and

IC
= 53.33
IB

1+

53.33
= 0.98
1 + 53.33

T2 : Solution

IE = ICO eVBE / VT 1 = 73.93 mA

IC = IE = 72.4 mA
T3 : Solution
Bipolar junction transistors have two junctions (emmiter base junction (EBJ) and collector base junction
(CBJ)). From this we have four modes of operations as follows:

EBJ
FB
FB
RB
RB

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CBJ
RB
FB
RB
FB

Operational region
Active
Saturation
Cutoff
Inverse active

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Electronics Engineering Electronic Devices and Circuits

The Ebers-Moll model:
This model in valid for both forward and reverse static voltages applied across the transistor
junctions. It should be noted that we have omitted the base-spreading resistance and have neglected
the difference between ICBO and ICO .
The Ebers-Moll model for a p-n-p transistor is shown below:
I IC

IE
E

N IE

(IEO)

VE

P
(ICO)

IN

IC
C

VC

It consists two ideal diodes connected back to back with reverse saturation currents IEO and ICO
and two dependent current-controlled current sources shunting the ideal diodes. For a p-n-p BJT,
ICO and IEO are negative so that ICO and IEO are having (+)ve values.
Now apply KCL to the collector node of given figure above,

V /V
IC = NIE + I = NIE + I0 e c T 1

where,

...(1)

I = Diode current
I0 = ICO and aN = current gain in normal operation

IC = NIE ICO eVc/VT 1

...(2)

Subscript N denotes the transistor used in the normal manner. If we assume inverted mode then new eqn
formed is,

V /V
IE = I IC IEO e e T 1

where,

...(3)

I = inverted common-bare current gain

A physical analysis by using Ebers-Moll model reveals that the parameters aN, aI, ICO and IEO are not
independent, but are related by the condition,
I ICO = N IEO
Since,

IB = (IE + IC)

...(4)
...(5)

If three of 4-parameters (N, I, ICO and IEO) are known then Ebers-Moll equations allow calculations of the
three currents for given values of junction voltages VC and VE also then we determine the mode of operations.

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Field Effect Transistor

T1 : Solution

P = VDS IDS = 36 103

IDS = 6 mA
VDS > VGS VT
So, saturation region
IDS =

n Co x
2

W
2
3
(VGS VT ) = 6 10
L

W
= 0.143
L

T2 : Solution
Given

K
VT
ID
5 104

=
=
=
=

= 104 Am/V2
1V
IDS = 0.5 mA
k(VGS VT)2
104 (VGS 1)2

VDS = VGS = 5 + 1
VDS = 3.24 V
Value of RD =

VDD VDS
10 3.24V
; RD =
IDS
0.5 10 3

RD = 13.52 k

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Electronics Engineering Electronic Devices and Circuits

10

T3 : Solution

VGS = 0 V
Idss =

20 10
= 10 mA
1k

T4 : Solution
For saturation region
Id =

K
K W
(Vds )2
(Vgs VT )2 ; n
2
2 L

gm = Kn

and

...(i)

W
Vds
L

...(ii)

From equation (ii)

W
gm
1 103
=
=
L
2 Kn Vds 50 10 6 Vds
20
W
=
Vds
L

Id =

...(iii)

K n 20
2

Vds
2 Vds

overdrive voltage = Vds = 0.2 V

and

W
= 100
L
VDD

T5 : Solution
Given

K=

1 W
K
2
L

and

ID =

1
W
Kn
(VGS VT )2
2
L

RD
RG

From the above figure

ID = K(VSS RS ID VT)2
I D
I
= (VSS RS ID VT )2 + 2K (VSS RS ID VT ) (Rs ) D
K
K
I
ID
I
I D
2Rs D K D
=
K
K
K
K

ID
1 + 2 K I D Rs
K

)=

SKID =

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RS

VSS

ID
K
I D K
1
=
K I 1 + 2 K I D Rs
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11

T6 : Solution
1.5 1017
N
inv. = 2VT l n A = 2 26 10 3 l n

1.5 1010
ni

((i))

= 2 26 103 7 ln10 = 0.838 V

( ii))

Ci =

i 4 8.854 1012
= 1.77 103 F/m2
=
d
0.02 106

T7 : Solution

Co x =

f =

o SiO2
to x

F/m2 = 3.45 103 F/m2

1016
kT
N
l n A = 0.0259 l n
= 0.348 V
q
ni
1.5 1010

Maximum depletion width occurs when gate potential is 2f , after that depletion width does not change.

Wmax =

Cdmin =

2Si o 2f
= 0.301 10 6 m
qN A
Si o
= 3.47 104 F/m2
Wmax

Cgate = Co x = 3.45 103 F/m2

Cgate max = 345.15 nF/cm2
Cgate min =

Co x Cdmin
= 0.315 103 F/m2 = 31.5 nF/cm2
Co x + Cdmin

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Power Swithcing Device

T1 : Solution
Device

Symbol

Characteristics
I

(i) Diode

Va

pn

Ia
(ii) Thyristor

Ig3 > Ig2 > Ig1 > Ig0

VBO

Va

Ia
(iii) GTO

Va

K
G

Ia
(iv) Triac

MT2

MT1

Va

Va
Ia

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13

T2 : Solution
Requirements for an SCR to be triggered by a gate pulse.
SCR should be forward bias mode.
A positive gate voltage between gate and cathode.
The gate pulse width should be chosen to ensure that anode current rises above the latching current.
T3 : Solution
iA
iL
20

R1

V = 100 V

iR

R2 = 5 R

0.5H

Current through 5 k resistor

iR =

V
100
= 20 mA = 0.02 A
=
R2 5 103

iL =

V
100
1 e R1 Lt =
1 e 20/0.5t
R1
20

Current through inductor

) = 5(1 e

40t )

Anode current
Ia = iR + iL = 0.02 + 5(1 e40t )
Let minimum pulse width is T
To turn on ia latching current

0.02 + 5(1 e40t ) = 50 mA = 0.5

T = 150 sec

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