6.

012 Microelectronic Devices and Circuits Fall 2005

Lecture 191

Lecture 19 Transistor Ampliers (I)

CommonSource Amplifier
November 15, 2005
Contents:
1. Amplier fundamentals
2. Commonsource amplier
3. Commonsource amplier with currentsource supply
Reading assignment:
Howe and Sodini, Ch. 8, 8.18.6
Announcements:
Quiz 2: 11/16, 7:309:30 PM,

open book, must bring calculator; lectures #1018.

Quiz 2 TA Review Session: 11/15, 7:309:30 PM,

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 192

Key questions

What are the key gures of merit of an amplier?

How can one make a voltage amplier with a single
MOSFET and a resistor?
How can this amplier be improved?

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 193

1. Amplier fundamentals
Goal of ampliers: signal amplication.
vOUT
+V

output
signal

vIN

RL

vOUT
-

vIN

-V

input signal

Features of amplier:
Output signal is faithful replica of input signal but
amplied in magnitude.
Active device is at the heart of amplier.
Need linear transfer characteristics for distortion
not to be introduced.

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 194

Signal could be represented by current or voltage

four broad types of ampliers:
RS

vs

voltage
amplifier

is

transconductance
amplifier

RS

transresistance
amplifier

RL

RL

iout

is

+
vout

iout

RS

vs

RL

RS

current
amplifier

RL

+
vout

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 195

More realistic transfer characteristics:

vOUT

output
signal

vIN

input signal

Transfer characteristics linear over limited range of

voltages: amplier saturation.
Amplier saturation limits signal swing.
Signal swing also depends on choice of bias point, Q
(also called quiescent point or operating point).
Other features desired in ampliers:
Low power consumption.
Wide frequency response [will discuss in a few days].
Robust to process and temperature variations.
Inexpensive: must minimize use of unusual compo
nents, must be small (in Si area)

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 196

2. CommonSource Amplier
Consider the following circuit:
V+=VDD

RD

iR

signal source
RS

iD

+
vOUT

vs
VGG

signal
load
RL

V-=VSS

Consider it rst unloaded by RL. How does it work?

VGG, RD and W/L of MOSFET selected to bias tran
sistor in saturation and obtain desired output bias
point (i.e. VOU T = 0).
vGS iD iR vout
Av = vvout
< 0; output out of phase from input, but if
s
amplier well designed, |Av | > 1.
[watch notation: vOU T (t) = VOU T + vout(t)]

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 197

Load line view of amplier:

load line

IR=ID
VDD-VSS

VGG-VSS=VDD-VSS

RD

VGG-VSS

VGG-VSS=VT
0
VSS

VDD

VOUT

Transfer characteristics of amplier:

VOUT
VDD

VSS

VT

VDD-VSS VGG-VSS

Want:
Bias point calculation;
smallsignal gain;
limits to signal swing
frequency response [in a few days]

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 198

Bias point: choice of VGG, W/L, and RD to keep

transistor in saturation and to get proper quiescent VOU T .
Assume MOSFET is in saturation:
ID =

W
nCox (VGG VSS VT )2
2L
VDD VOU T
IR =
RD

If we select VOU T = 0:
W
VDD
2
ID = IR =
nCox (VGG VSS VT ) =
2L
RD
Then:
VGG =

2VDD
+ VSS + VT
W
RD L nCox

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 199

Smallsignal voltage gain: draw smallsignal equiva

lent circuit model:

RD
+

vin

vgs

gmvgs

ro

vout
-

- S

vin

gmvin

ro//RD

vout
-

vout = gm vin(ro//RD )
Then unloaded voltage gain:
Avo =

vout
= gm (ro//RD )
vin

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1910

Signal swing:
VDD

RD
signal source
+

RS

vOUT

vs
VGG

VSS

Upswing: limited by transistor going into cuto:

vout,max = VDD
Downswing: limited by MOSFET entering linear regime:
VDS,sat = VGS VT
or
vout,min VSS = VGG VSS VT
Then:
vout,min = VGG VT

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1911

Eect of input/output loading:

VDD

RD

iR
iL

signal source
iD

RS

+
vOUT

vs
VGG

RL

VSS

Bias point not aected because selected VOU T = 0.

Signal swing:
Upswing limited by resistive divider:
RL
vout,max = VDD
RL + RD
Downswing not aected by loading
Voltage gain:
input loading (RS ): no eect because gate does
not draw current;
output loading (RL ): RL detracts from voltage
gain because it draws current.
|Av | = gm(ro //RD //RL) < gm (ro //RD )

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1912

Generic view of loading eect on smallsignal operation:

Twoport network view of smallsignal equivalent circuit
model of voltage amplier:
Rin is input resistance

Rout is output resistance

Avo is unloaded voltage gain

RS

Rout
+

vs

vin

Rin

input
loading

Avovin

RL

vout
-

unloaded circuit

output
loading

Voltage divider at input:

s
vin = Rin Rinv+R
S

Voltage divider at output:

vin
vout = RL RAoutvo+R
L

Loaded voltage gain:

vout
Rin
RL
Av =
=
Avo
vs
Rin + RS
RL + Rout

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1913

Calculation of input resistance, Rin:

load amplier with RL
apply test voltage (or current) at input, measure test
current (or voltage)
For commonsource amplier:
it
+
+

vt
-

vgs

gmvgs

ro//RD

vt
it = 0 Rin = =
it
No eect of loading at input.

RL

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1914

Calculation of output resistance, Rout :

load amplier at input with RS
apply test voltage (or current) at output, measure
test current (or voltage)
For commonsource amplier:
it
+

RS

vgs

gmvgs

ro//RD

vgs = 0 gm vgs = 0 vt = it(ro //RD )

Rout

vt
= = ro//RD
it

vt

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1915

Twoport network view of commonsource amplier:

RS

Rout
+

vs

vin

input
loading

Rin

Avovin

unloaded circuit

RL

vout
-

output
loading

vout
vs
RL
Rin
RL
=
Avo
= gm(ro //RD )
Rin + RS
RL + Rout
RL + ro //RD

Av =

Or:
Av = gm (ro //RD //RL )

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1916

Design issues of commonsource amplier (unloaded):

Examine bias dependence:
|Avo | = gm(ro //RD ) gm RD
Rewrite |Avo | in the following way:

W
VDD
VDD

|Avo | gmRD = 2 nCox ID

L
ID
ID
Then, to get high |Avo |
:
VDD

ID

Both approaches imply RD =

VDD
ID

Consequences of high RD :
large RD consumes a lot of Si real state
large RD eventually compromises frequency response
Also, it would be nice not to use any resistors at all!

Need better circuit.

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1917

3. Commonsource amplier with currentsource

supply
VDD

iSUP
signal source
iD

RS

signal
load

RL

vOUT

vs
VGG

VSS

Loadline view:
load line

iSUP=ID

VGG-VSS=VDD-VSS

ISUP

VGG-VSS

VGG-VSS=VT
0
VSS

VDD

VOUT

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1918

Current source characterized by high output resistance:

roc.
Then, unloaded voltage gain of commonsource stage:
|Avo | = gm (ro //roc )
signicantly higher than amplier with resistive supply.
Can implement current source supply by means of p
channel MOSFET:
VDD

VB

iSUP

signal source
iD

RS

+
vOUT

vs
VGG

VSS

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1919

Relationship between circuit gures of merit and device

parameters
Remember:

gm = 2

W
nCox ID
L

1
L
ro

nID ID
Then:
Circuit Parameters
Device
|Avo |
Rin Rout
Parameters gm (ro//roc ) ro//roc
ISU P

nCox

adjustments are made to VGG so

none of the other parameters change
CS amp with current supply source is good voltage am
plier (Rin high and |Av | high), but Rout high too
voltage gain degraded if RL ro//roc .

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 1920

Key conclusions
Figures of merit of an amplier:
gain
signal swing
power consumption
frequency response
robustness to process and temperature variations
Commonsource amplier with resistive supply: trade
o between gain and cost and frequency response.
Tradeo resolved by using commonsource amplier
with current source supply.
Twoport network computation of voltage gain, input
resistance and output resistance of amplier.