Freescale Semiconductor, Inc...

MOTOROLA

Freescale Semiconductor, Inc.

HCS12BFAMILYPP
Rev 2.7, 17-Mar-04

SEMICONDUCTOR
TECHNICAL DATA

MC9S12B-Family
PRODUCT BRIEF

16-Bit Microcontroller
Designed for automotive multiplexing applications, members of the MC9S12B-Family of 16 bit Flashbased microcontrollers are fully pin compatible and enable users to choose between different memory
and peripheral options for scalable designs. All MC9S12B-Family members are composed of standard
on-chip peripherals including a 16-bit central processing unit (CPU12), up to 256K bytes of Flash
EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications
interfaces (SCI), serial peripheral interface (SPI), an input capture/output compare timer (TIM), 16channel, 10-bit analog-to-digital converter (ADC), an 8-channel pulse-width modulator (PWM), one
CAN 2.0 A, B software compatible module (MSCAN12) and an Inter-IC Bus. System resource mapping,
clock generation, interrupt control and bus interfacing are managed by the lite integration module (LIM).
The MC9S12B-Family has full 16-bit data paths throughout, however, the external bus can operate in
an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The
inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational
requirements. In addition to the I/O ports available in each module, up to 22 I/O ports are available with
Wake-Up capability from STOP or WAIT mode.

Features
NOTE
Not all features listed here are available in all configurations.
Additional information about D and B family inter-operability is given in:
EB386 HCS12 D-Family Compatibility Considerations and
EB388 Using the HCS12 D_Family as a development platform for the HCS12 B family
16-bit CPU12
Upward compatible with M68HC11 instruction set
Interrupt stacking and programmers model identical to M68HC11
20-bit ALU
Instruction queue
Enhanced indexed addressing
Multiplexed bus
Single chip or expanded
16 address/16 data wide or 16 address/8 data narrow modes
External address space 1MByte for Data and Program space (112 pin package only)
Wake-up interrupt inputs depending on the package option
8-bit port H
4-bit port J
8-bit port P shared with PWM
Memory options
64K, 128K, 256K Byte Flash EEPROM
1K, 2K Byte EEPROM
2K, 4K and 8K Byte RAM

This document contains information on a new product. Specifications and information herein are subject to change without notice.

MOTOROLA 2002

For More Information On This Product,

Go to: www.freescale.com

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Analog-to-Digital Converter
16-channels for 112 Pin Package, 8 channels for 80 Pin package options, 10-bit resolution
External conversion trigger capability
1M bit per second, CAN 2.0 A, B software compatible module
Five receive and three transmit buffers
Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit
Four separate interrupt channels for Rx, Tx, error and wake-up
Low-pass filter wake-up function
Loop-back for self test operation
Input Capture/Output Compare Timer (TIM)
16-bit Counter with 7-bit Prescaler
8 programmable input capture or output compare channels
Simple PWM Mode
Modulo Reset of Timer Counter
16-bit Pulse Accumulator
External Event Counting
Gated Time Accumulation
8 PWM channels with programmable period and duty cycle (7 channels on 80 Pin Packages)
8-bit 8-channel or 16-bit 4-channel
Separate control for each pulse width and duty cycle
Center- or left-aligned outputs
Programmable clock select logic with a wide range of frequencies
Serial interfaces
Two asynchronous serial communications interfaces (SCI)
synchronous serial peripheral interface (SPI)
Inter-IC Bus (IIC)
Compatible with I2C Bus standard
Multi-master operation
Software programmable for one of 256 different serial clock frequencies
SIM (System Integration Module)
CRG (windowed COP watchdog, real time interrupt, clock monitor, clock generation and reset)
MEBI (multiplexed external bus interface)
MMC (memory map and interface)
INT (interrupt control)
BKP (breakpoints)
BDM (background debug mode)
Clock generation
Phase-locked loop clock frequency multiplier
Limp home mode in absence of external clock
Clock Monitor
Low power 0.5 to 16 MHz crystal oscillator reference clock
Operation frequency
32MHz equivalent to 16MHz Bus Speed for single chip
32MHz equivalent to 16MHz Bus Speed in expanded bus modes
Option: 50MHz equivalent to 25Mhz Bus Speed
Internal 5V to 2.5V Regulator
112-Pin or 80-Pin LQFP package
I/O lines with 5V input and drive capability
5VA/D converter inputs
Dual supply - 5V for I/O and A/D, 2.5V logic

MOTOROLA
2

MC9S12B-Family
For More Information On This PRODUCT
Product, BRIEF, Rev 2.7, 17-Mar-04
Go to: www.freescale.com

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Development support
Single-wire background debug mode (BDM)
On-chip hardware breakpoints

Table 1 List of MC9S12B-Family members

Flash

RAM

EEPROM

256K

8K

2K

128K

4K

1K

64K

2K

1K

Package

Device

112LQFP MC9S12B256

CAN

SCI

SPI

IIC

A/D

PWM

TIM

I/O

16ch

8ch

8ch

91

MC9S12B256

8ch

7ch

8ch

59

112LQFP MC9S12B128

80QFP

16ch

8ch

8ch

91

80QFP

MC9S12B128

8ch

7ch

8ch

59

112LQFP

MC9S12B64

16ch

8ch

8ch

91

80QFP

MC9S12B64

8ch

7ch

8ch

59

Pin out explanations:

I/O is the sum of ports capable to act as digital input or output.
For 112 Pin Versions:
Port A = 8, B = 8, E = 6 + 2 input only, H = 8, J = 4, K = 7, M = 8, P = 8, S = 8, T = 8, PAD = 16
input only.
22 inputs provide Interrupt capability (H =8, P= 8, J = 4, IRQ, XIRQ)
For 80 Pin Versions:
Port A = 8, B = 8, E = 6 + 2 input only, J = 2, M = 6, P = 7, S = 4, T = 8, PAD = 8 input only.
11 inputs provide Interrupt capability (P= 7, J = 2, IRQ, XIRQ)
d

MC9S12B-Family
For More Information On This Product,
PRODUCT BRIEF, Rev 2.7, 17-Mar-04
Go to: www.freescale.com

MOTOROLA
3

VRH

ATD

DDRB

PTA

PTB

RXD
TXD
RXD
TXD

SCI0

Internal Logic 2.5V

VDD1,2
VSS1,2

PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0

I/O Driver 5V

KWJ0
KWJ1

VDDX
VSSX

PLL 2.5V
VSSPLL

A/D Converter 5V &

Voltage Regulator Reference
VDDA
VSSA

Voltage Regulator 5V & I/O

VDDR
VSSR

PP0
PP1
PP2
PP3
PP4
PP5
PP6
PP7
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
PM0
PM1
PM2
PM3
PM4
PM5
PM6
PM7

RxCAN
TxCAN

CAN0

IIC

VDDPLL

MISO
MOSI
SCK
SS

SPI0

DDRM

Multiplexed
Narrow Bus

DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0

Multiplexed
Wide Bus

DATA15 ADDR15 PA7

DATA14 ADDR14 PA6
DATA13 ADDR13 PA5
DATA12 ADDR12 PA4
DATA11 ADDR11 PA3
DATA10 ADDR10 PA2
DATA9
ADDR9 PA1
DATA8
ADDR8 PA0

SCI1

AD

PWM
DDRA

PTK

Multiplexed Address/Data Bus

KWP0
KWP1
KWP2
KWP3
KWP4
KWP5
KWP6
KWP7

PTT

PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7

TEST

PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7

PTP

Input Capture
Output Compare
Timer

PK0
PK1
PK2
PK3
PK4
PK5
PK7

SDA
SCL

Pin
Interrupt
Logic

KWJ6
KWJ7
KWH0
KWH1
KWH2
KWH3
KWH4
KWH5
KWH6
KWH7

PTJ

XIRQ
IRQ
System
R/W
Integration
LSTRB
Module
ECLK
(SIM)
MODA
MODB
NOACC/XCLKS

IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7

DDRK

Periodic Interrupt
COP Watchdog
Clock Monitor
Breakpoints

PAD08
PAD09
PAD10
PAD11
PAD12
PAD13
PAD14
PAD15
XADDR14
XADDR15
XADDR16
XADDR17
XADDR18
XADDR19

ECS

PJ0
PJ1
PJ6
PJ7
PH0
PH1

PH2
PTH

PTE

PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7

Clock and
Reset
Generation
Module

DDRT

PLL

PIX0
PIX1
PIX2
PIX3
PIX4
PIX5
ECS

PPAGE

DDRP

XFC
VDDPLL
VSSPLL
EXTAL
XTAL
RESET

CPU12

AN08
AN09
AN10
AN11
AN12
AN13
AN14
AN15

DDRS

Single-wire Background
Debug Module

DDRE

BKGD

Voltage Regulator

PAD0
PAD1
PAD2
PAD3
PAD4
PAD5
PAD6
PAD7

DDRJ

VDDR
VSSR
VREGEN
VDD1,2
VSS1,2

AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7

AD

1K, 2K Byte EEPROM

PTS

2K, 4K, 8K Byte RAM

VRH
VRL
VDDA
VSSA

PTM

VRL
VDDA
VSSA

DDRH

64K, 128K, 256K Byte Flash EEPROM

DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0

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PH3
PH4
PH5
PH6
PH7

Not all functionality shown in this

Block diagram is available in all Versions!

MOTOROLA
4

MC9S12B-Family
For More Information On This PRODUCT
Product, BRIEF, Rev 2.7, 17-Mar-04
Go to: www.freescale.com

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

MC9S12B-Family
112LQFP

84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57

29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56

PWM3/KWP3/PP3
PWM2/KWP2/PP2
PWM1/KWP1/PP1
PWM0/KWP0/PP0
XADDR17/PK3
XADDR16/PK2
XADDR15/PK1
XADDR14/PK0
IOC0/PT0
IOC1/PT1
IOC2/PT2
IOC3/PT3
VDD1
VSS1
IOC4/PT4
IOC5/PT5
IOC6/PT6
IOC7/PT7
XADDR19/PK5
XADDR18/PK4
KWJ1/PJ1
KWJ0/PJ0
MODC/TAGHI/BKGD
ADDR0/DATA0/PB0
ADDR1/DATA1/PB1
ADDR2/DATA2/PB2
ADDR3/DATA3/PB3
ADDR4/DATA4/PB4

112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85

PP4/KWP4/PWM4
PP5/KPW5/PWM5
PP6/KWP6/PWM6
PP7/KWP7/PWM7
PK7/ECS
VDDX
VSSX
PM0/RXCAN0
PM1/TXCAN0
PM2/MISO0
PM3/SS0
PM4/MOSI0
PM5/SCK0
PJ6/KWJ6/SDA
PJ7/KWJ7/SCL
VREGEN
PS7/SS0
PS6/SCK0
PS5/MOSI0
PS4/MISO0
PS3/TxD1
PS2/RxD1
PS1/TxD0
PS0/RxD0
PM6
PM7
VSSA
VRL

Figure 1 Pin assignments 112 QFP for MC9S12B-Family

VRH
VDDA
PAD15/AN15
PAD07/AN07
PAD14/AN14
PAD06/AN06
PAD13/AN13
PAD05/AN05
PAD12/AN12
PAD04/AN04
PAD11/AN11
PAD03/AN03
PAD10/AN10
PAD02/AN02
PAD09/AN09
PAD01/AN01
PAD08/AN08
PAD00/AN00
VSS2
VDD2
PA7/ADDR15/DATA15
PA6/ADDR14/DATA14
PA5/ADDR13/DATA13
PA4/ADDR12/DATA12
PA3/ADDR11/DATA11
PA2/ADDR10/DATA10
PA1/ADDR9/DATA9
PA0/ADDR8/DATA8

ADDR5/DATA5/PB5
ADDR6/DATA6/PB6
ADDR7/DATA7/PB7
KWH7/PH7
KWH6/PH6
KWH5/PH5
KWH4/PH4
XCLKS/NOACC/PE7
MODB/IPIPE1/PE6
MODA/IPIPE0/PE5
ECLK/PE4
VSSR
VDDR
RESET
VDDPLL
XFC
VSSPLL
EXTAL
XTAL
TEST
KWH3/PH3
KWH2/PH2
KWH1/PH1
KWH0/PH0
LSTRB/TAGLO/PE3
R/W/PE2
IRQ/PE1
XIRQ/PE0

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Signals shown in Bold are not available on the 80 Pin Package

MC9S12B-Family
For More Information On This Product,
PRODUCT BRIEF, Rev 2.7, 17-Mar-04
Go to: www.freescale.com

MOTOROLA
5

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

MC9S12B-Family
80 QFP

60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41

VRH
VDDA
PAD07/AN07
PAD06/AN06
PAD05/AN05
PAD04/AN04
PAD03/AN03
PAD02/AN02
PAD01/AN01
PAD00/AN00
VSS2
VDD2
PA7/ADDR15/DATA15
PA6/ADDR14/DATA14
PA5/ADDR13/DATA13
PA4/ADDR12/DATA12
PA3/ADDR11/DATA11
PA2/ADDR10/DATA10
PA1/ADDR9/DATA9
PA0/ADDR8/DATA8

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

PWM3/KWP3/PP3
PWM2/KWP2/PP2
PWM1/KWP1/PP1
PWM0/KWP0/PP0
IOC0/PT0
IOC1/PT1
IOC2/PT2
IOC3/PT3
VDD1
VSS1
IOC4/PT4
IOC5/PT5
IOC6/PT6
IOC7/PT7
MODC/TAGHI/BKGD
ADDR0/DATA0/PB0
ADDR1/DATA1/PB1
ADDR2/DATA2/PB2
ADDR3/DATA3/PB3
ADDR4/DATA4/PB4

80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61

PP4/KWP4/PWM4
PP5/KWP5/PWM5
PP7/KWP7/PWM7
VDDX
VSSX
PM0/RxCAN0
PM1/TxCAN0
PM2/MISO0
PM3/SS0
PM4/MOSI0
PM5/SCK0
PJ6/KWJ6/SDA
PJ7/KWJ7/SCL
VREGEN
PS3/TxD1
PX2/RxD1
PS1/TxD0
PS0/RxD0
VSSA
VRL

Figure 2 Pin Assignments in 80 QFP for MC9S12B-Family

ADDR5/DATA5/PB5
ADDR6/DATA6/PB6
ADDR7/DATA7/PB7
XCLKS/NOACC/PE7
MODB/IPIPE1/PE6
MODA/IPIPE0/PE5
ECLK/PE4
VSSR
VDDR
RESET
VDDPLL
XFC
VSSPLL
EXTAL
XTAL
TEST
LSTRB/TAGLO/PE3
R/W/PE2
IRQ/PE1
XIRQ/PE0

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MOTOROLA
6

MC9S12B-Family
For More Information On This PRODUCT
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Figure 3 MC9S12Bx256 User Configurable Memory Map

$0000

1K Register Space

$0000
$0400
$0800
$1000

$03FF

Mappable to any 2K Boundary

$0800

2K Bytes EEPROM

$0FFF

Mappable to any 2K Boundary

$2000

$2000

8K Bytes RAM

$4000

$3FFF

Mappable to any 8K Boundary

$4000

1K, 2K, 4K or 8K Protected Sector

$7FFF

16K Fixed Flash EEPROM

$8000
$8000

16K Page Window

sixteen * 16K Flash EEPROM Pages

EXT
$BFFF
$C000

$C000

16K Fixed Flash EEPROM

$FFFF

2K, 4K, 8K or 16K Protected Boot Sector

$FF00
$FF00
$FFFF

VECTORS

VECTORS

VECTORS

NORMAL
SINGLE CHIP

EXPANDED

SPECIAL
SINGLE CHIP

$FFFF

BDM
(If Active)

The figure shows a useful map, which is not the map out of reset. After reset the map is:
$0000 - $03FF: Register Space
$0000 - $1FFF: 8K RAM (only 7K visible $0400 - $1FFF)
$0000 - $07FF: 2K EEPROM (not visible)
$2000 - $3FFF: 8K Flash

MC9S12B-Family
For More Information On This Product,
PRODUCT BRIEF, Rev 2.7, 17-Mar-04
Go to: www.freescale.com

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Figure 4 MC9S12Bx128 User Configurable Memory Map

$0000
$0000
$0400
$0800

1K Register Space

$03FF

Mappable to any 2K Boundary

$0800

1K Bytes EEPROM
Repeated twice in the 2K Space

$0FFF

Mappable to any 2K Boundary

$3000

4K Bytes RAM

$3FFF

Mappable to any 4K Boundary

$4000

1K, 2K, 4K or 8K Protected Sector

$1000
$3000
$4000

$7FFF

16K Fixed Flash EEPROM

$8000
$8000

16K Page Window

Eight * 16K Flash EEPROM Pages

EXT
$BFFF
$C000

$C000

16K Fixed Flash EEPROM

$FFFF

2K, 4K, 8K or 16K Protected Boot Sector

$FF00
$FF00
$FFFF

VECTORS

VECTORS

VECTORS

NORMAL
SINGLE CHIP

EXPANDED

SPECIAL
SINGLE CHIP

$FFFF

BDM
(If Active)

The figure shows a useful map, which is not the map out of reset. After reset the map is:
$0000 - $03FF: Register Space
$0000 - $0FFF: 4K RAM (only 3K visible $0400 - $0FFF)
$0000 - $07FF: 1K EEPROM (not visible)
$2000 - $3FFF: 12K Flash

MOTOROLA
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MC9S12B-Family
For More Information On This PRODUCT
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Figure 5 MC9S12Bx64 User Configurable Memory Map

$0000

1K Register Space

$03FF

Mappable to any 2K Boundary

$0800

1K Bytes EEPROM
Repeated twice in the 2K Space

$0FFF

Mappable to any 2K Boundary

$3800

$3800

2K Bytes RAM

$4000

$3FFF

Mappable to any 2K Boundary

$4000

0.5K, 1K, 2K or 4K Protected Sector

$0000
$0400
$0800
$1000

$8000

$7FFF
$8000

16K Fixed Flash EEPROM

16K Page Window
four * 16K Flash EEPROM Pages

EXT

$BFFF
$C000

$C000

16K Fixed Flash EEPROM

$FFFF

2K, 4K, 8K or 16K Protected Boot Sector

$FF00
$FF00
$FFFF

VECTORS

VECTORS

VECTORS

NORMAL
SINGLE CHIP

EXPANDED

SPECIAL
SINGLE CHIP

$FFFF

BDM
(If Active)

The figure shows a useful map, which is not the map out of reset. After reset the map is:
$0000 - $03FF: Register Space
$0800 - $0FFF: 2K RAM
$0400 - $07FF: 1K EEPROM
$2000 - $3FFF: 12K Flash

MC9S12B-Family
For More Information On This Product,
PRODUCT BRIEF, Rev 2.7, 17-Mar-04
Go to: www.freescale.com

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0.20 T L-M N

4X
PIN 1
IDENT

0.20 T L-M N

4X 28 TIPS

112

J1

85

4X

J1

CL

84

VIEW Y
108X

X
X=L, M OR N

VIEW Y
B
L

M
B1

28

AA

V1

57

29

F
D

56

0.13

BASE
METAL

T L-M N

SECTION J1-J1
ROTATED 90 COUNTERCLOCKWISE

A1
S1
A
S

C2
C

VIEW AB

0.050

0.10 T

112X

SEATING
PLANE

NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS.
3. DATUMS L, M AND N TO BE DETERMINED AT
SEATING PLANE, DATUM T.
4. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE, DATUM T.
5. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE
PROTRUSION IS 0.25 PER SIDE. DIMENSIONS
A AND B INCLUDE MOLD MISMATCH.
6. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL NOT CAUSE THE D
DIMENSION TO EXCEED 0.46.

3
T

R2

0.25

R1

GAGE PLANE

(K)

C1

E
(Y)
(Z)
VIEW AB

DIM
A
A1
B
B1
C
C1
C2
D
E
F
G
J
K
P
R1
R2
S
S1
V
V1
Y
Z
AA

1
2
3

MILLIMETERS
MIN
MAX
20.000 BSC
10.000 BSC
20.000 BSC
10.000 BSC
--1.600
0.050
0.150
1.350
1.450
0.270
0.370
0.450
0.750
0.270
0.330
0.650 BSC
0.090
0.170
0.500 REF
0.325 BSC
0.100
0.200
0.100
0.200
22.000 BSC
11.000 BSC
22.000 BSC
11.000 BSC
0.250 REF
1.000 REF
0.090
0.160
8
0
7
3
13
11
11
13

Figure 6 112-pin LQFP Mechanical Dimensions (case no. 987)

MOTOROLA
10

MC9S12B-Family
For More Information On This PRODUCT
Product, BRIEF, Rev 2.7, 17-Mar-04
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L
60

41

61

D
S
M

C A-B

D
0.20

-A-,-B-,-D-

0.20

0.05 D

-B-

H A-B

-A-

40

DETAIL A

DETAIL A

21

80
1

0.20

A
H A-B

20

-DD

0.05 A-B
J

S
0.20

C A-B

DETAIL C

-H-

-C-

DATUM
PLANE

0.20

C A-B

SECTION B-B

VIEW ROTATED 90

0.10

SEATING
PLANE

M
G

U
T
DATUM
PLANE

-H-

K
W

NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE
LEAD WHERE THE LEAD EXITS THE PLASTIC
BODY AT THE BOTTOM OF THE PARTING LINE.
4. DATUMS -A-, -B- AND -D- TO BE
DETERMINED AT DATUM PLANE -H-.
5. DIMENSIONS S AND V TO BE DETERMINED
AT SEATING PLANE -C-.
6. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE
PROTRUSION IS 0.25 PER SIDE. DIMENSIONS
A AND B DO INCLUDE MOLD MISMATCH
AND ARE DETERMINED AT DATUM PLANE -H-.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION. DAMBAR CANNOT
BE LOCATED ON THE LOWER RADIUS OR
THE FOOT.

X
DETAIL C

DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
Q
R
S
T
U
V
W
X

MILLIMETERS
MIN
MAX
13.90
14.10
13.90
14.10
2.15
2.45
0.22
0.38
2.00
2.40
0.22
0.33
0.65 BSC
--0.25
0.13
0.23
0.65
0.95
12.35 REF
5
10
0.13
0.17
0.325 BSC
0
7
0.13
0.30
16.95
17.45
0.13
--0
--16.95
17.45
0.35
0.45
1.6 REF

Figure 7 80-pin QFP Mechanical Dimensions (case no. 841B)

MC9S12B-Family
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