8 Bit Transfer Instructions

8080 Mnemonic
MOV A,A
MOV A,B
MOV A,C
MOV A,D
MOV A,E
MOV A,H
MOV A,L
MOV A,M
LDAX B
LDAX D
word
LDA
----MOV B,A
MOV B,B
MOV B,C
MOV B,D
MOV B,E
MOV B,H
MOV B,L
MOV B,M
----MOV C,A
MOV C,B
MOV C,C
MOV C,D
MOV C,E
MOV C,H
MOV C,L
MOV C,M
----MOV D,A
MOV D,B
MOV D,C
MOV D,D
MOV D,E
MOV D,H
MOV D,L
MOV D,M
----MOV E,A
MOV E,B
MOV E,C
MOV E,D
MOV E,E
MOV E,H
MOV E,L
MOV E,M
---

LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD

Z80 Mnemonic
A,A
A,B
A,C
A,D
A,E
A,H
A,L
A,(HL)
A,(BC)
A,(DE)
A,(word)
A,(IX+index)
A,(IY+index)
B,A
B,B
B,C
B,D
B,E
B,H
B,L
B,(HL)
B,(IX+index)
B,(IY+index)
C,A
C,B
C,C
C,D
C,E
C,H
C,L
C,(HL)
C,(IX+index)
C,(IY+index)
D,A
D,B
D,C
D,D
D,E
D,H
D,L
D,(HL)
D,(IX+index)
D,(IY+index)
E,A
E,B
E,C
E,D
E,E
E,H
E,L
E,(HL)
E,(IX+index)

Machine Code
7F
78
79
7A
7B
7C
7D
7E
0A
1A
3Aword
DD7Eindex
FD7Eindex
47
40
41
42
43
44
45
46
DD46index
FD46index
4F
48
49
4A
4B
4C
4D
4E
DD4Eindex
FD4Eindex
57
50
51
52
53
54
55
56
DD56index
FD56index
5F
58
59
5A
5B
5C
5D
5E
DD5Eindex

Operation
A <- A
A <- B
A <- C
A <- D
A <- E
A <- H
A <- L
A <- (HL)
A <- (BC)
A <- (DE)
A <- (word)
A <- (IX+index)
A <- (IY+index)
B <- A
B <- B
B <- C
B <- D
B <- E
B <- H
B <- L
B <- (HL)
B <- (IX+index)
B <- (IY+index)
C <- A
C <- B
C <- C
C <- D
C <- E
C <- H
C <- L
C <- (HL)
C <- (IX+index)
C <- (IY+index)
D <- A
D <- B
D <- C
D <- D
D <- E
D <- H
D <- L
D <- (HL)
D <- (IX+index)
D <- (IY+index)
E <- A
E <- B
E <- C
E <- D
E <- E
E <- H
E <- L
E <- (HL)
E <- (IX+index)

--MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
----MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
----MOV
MOV
MOV
MOV
MOV
MOV
MOV
--------------------------------MVI
MVI
MVI
MVI
MVI
MVI
MVI
MVI
---

H,A
H,B
H,C
H,D
H,E
H,H
H,L
H,M

L,A
L,B
L,C
L,D
L,E
L,H
L,L
L,M

M,A
M,B
M,C
M,D
M,E
M,H
M,L

A,byte
B,byte
C,byte
D,byte
E,byte
H,byte
L,byte
M,byte

LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD

E,(IY+index)
H,A
H,B
H,C
H,D
H,E
H,H
H,L
H,(HL)
H,(IX+index)
H,(IY+index)
L,A
L,B
L,C
L,D
L,E
L,H
L,L
L,(HL)
L,(IX+index)
L,(IY+index)
(HL),A
(HL),B
(HL),C
(HL),D
(HL),E
(HL),H
(HL),L
(IX+index),A
(IX+index),B
(IX+index),C
(IX+index),D
(IX+index),E
(IX+index),H
(IX+index),L
(IX+index),byte
(IY+index),A
(IY+index),B
(IY+index),C
(IY+index),D
(IY+index),E
(IY+index),H
(IY+index),L
(IY+index),byte
A,byte
B,byte
C,byte
D,byte
E,byte
H,byte
L,byte
(HL),byte
(IX+index),byte

FD5Eindex
67
60
61
62
63
64
65
66
DD66index
FD66index
6F
68
69
6A
6B
6C
6D
6E
DD6Eindex
FD6Eindex
77
70
71
72
73
74
75
DD77index
DD70index
DD71index
DD72index
DD73index
DD74index
DD75index
DD76indexbyte
FD77index
FD70index
FD71index
FD72index
FD73index
FD74index
FD75index
FD76indexbyte
3Ebyte
06byte
0Ebyte
16byte
1Ebyte
26byte
2Ebyte
36byte
DD36index
byte

E <- (IY+index)
H <- A
H <- B
H <- C
H <- D
H <- E
H <- H
H <- L
H <- (HL)
H <- (IX+index)
H <- (IY+index)
L <- A
L <- B
L <- C
L <- D
L <- E
L <- H
L <- L
L <- (HL)
L <- (IX+index)
L <- (IY+index)
(HL) <- A
(HL) <- B
(HL) <- C
(HL) <- D
(HL) <- E
(HL) <- H
(HL) <- L
(IX+index) <- A
(IX+index) <- B
(IX+index) <- C
(IX+index) <- D
(IX+index) <- E
(IX+index) <- H
(IX+index) <- L
(IX+index) <- byte
(IY+index) <- A
(IY+index) <- B
(IY+index) <- C
(IY+index) <- D
(IY+index) <- E
(IY+index) <- H
(IY+index) <- L
(IY+index) <- byte
A <- byte
B <- byte
C <- byte
D <- byte
E <- byte
H <- byte
L <- byte
(HL) <- byte
(IX+index) <- byte

---

LD

(IY+index),byte FD36index

(IY+index) <- byte

byte

STAX
STAX
STA

B
D
word

LD
LD
LD

(BC),A
(DE),A
(word),A

02
12
32word

(BC) <- A
(DE) <- A
(word) <- A

Machine Code
01word
11word
21word
31word
DD21word
FD21word
2Aword
ED4Bword
ED5Bword
ED6Bword
ED7Bword
DD2Aword
FD2Aword
22word
ED43word
ED53word
ED6Bword
DD22word
DD22word
ED73word
F9
DDF9
FDF9

Operation
BC <- word
DE <- word
HL <- word
SP <- word
IX <- word
IY <- word
HL <- (word)
BC <- (word)
DE <- (word)
HL <- (word)
SP <- (word)
IX <- (word)
IY <- (word)
(word) <- HL
(word) <- BC
(word) <- DE
(word) <- HL
(word) <- IX
(word) <- IY
(word) <- SP
SP <- HL
SP <- IX
SP <- IY

Machine Code
EB
E3
DDE3
FDE3
08
D9

Operation
HL <-> DE
H <-> (SP+1); L <-> (SP)
IXh <-> (SP+1); IXl <-> (SP)
IYh <-> (SP+1); IYl <-> (SP)
AF <-> AF'
BC/DE/HL <-> BC'/DE'/HL'

Machine Code
87
80
81
82
83
84
85
86
DD86index
FD86index
C6byte

Operation
A <- A + A
A <- A + B
A <- A + C
A <- A + D
A <- A + E
A <- A + H
A <- A + L
A <- A + (HL)
A <- A + (IX+index)
A <- A + (IY+index)
A <- A + byte

16 Bit Transfer Instructions

8080 Mnemonic
LXI
B,word
LXI
D,word
LXI
H,word
LXI
SP,word
----LHLD word
------------SHLD word
------------SPHL
-----

LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD

Z80 Mnemonic
BC,word
DE,word
HL,word
SP,word
IX,word
IY,word
HL,(word)
BC,(word)
DE,(word)
HL,(word)
SP,(word)
IX,(word)
IY,(word)
(word),HL
(word),BC
(word),DE
(word),HL
(word),IX
(word),IY
(word),SP
SP,HL
SP,IX
SP,IY

Register Exchange Instructions

8080 Mnemonic
XCHG
XTHL
---------

EX
EX
EX
EX
EX
EXX

Z80 Mnemonic
DE,HL
(SP),HL
(SP),IX
(SP),IY
AF,AF'

Add Byte Instructions

8080 Mnemonic
ADD
A
ADD
B
ADD
C
ADD
D
ADD
E
ADD
H
ADD
L
ADD
M
----byte
ADI

Z80 Mnemonic
ADD
A,A
ADD
A,B
ADD
A,C
ADD
A,D
ADD
A,E
ADD
A,H
ADD
A,L
ADD
A,(HL)
ADD
A,(IX+index)
ADD
A,(IY+index)
ADD
A,byte

Add Byte with Carry-In Instructions

8080 Mnemonic
ADC
A
ADC
B
ADC
C
ADC
D
ADC
E
ADC
H
ADC
L
ADC
M
----byte
ACI

Z80 Mnemonic
ADC
A,A
ADC
A,B
ADC
A,C
ADC
A,D
ADC
A,E
ADC
A,H
ADC
A,L
ADC
A,(HL)
ADC
A,(IX+index)
ADC
A,(IY+index)
ADC
A,byte

Machine Code
8F
88
89
8A
8B
8C
8D
8E
DD8Eindex
FD8Eindex
CEbyte

Operation
A <- A + A + Carry
A <- A + B + Carry
A <- A + C + Carry
A <- A + D + Carry
A <- A + E + Carry
A <- A + H + Carry
A <- A + L + Carry
A <- A + (HL) + Carry
A <- A + (IX+index) + Carry
A <- A + (IY+index) + Carry
A <- A + byte + Carry

Machine Code
97
90
91
92
93
94
95
96
DD96index
FD96index
D6byte

Operation
A <- A - A
A <- A - B
A <- A - C
A <- A - D
A <- A - E
A <- A - H
A <- A - L
A <- A - (HL)
A <- A - (IX+index)
A <- A - (IY+index)
A <- A - byte

Subtract Byte Instructions

8080 Mnemonic
SUB
A
SUB
B
SUB
C
SUB
D
SUB
E
SUB
H
SUB
L
SUB
M
----byte
SUI

Z80 Mnemonic
SUB
A
SUB
B
SUB
C
SUB
D
SUB
E
SUB
H
SUB
L
SUB
(HL)
SUB
(IX+index)
SUB
(IY+index)
byte
SUB

Subtract Byte With Borrow-In Instructions

8080 Mnemonic
SBB
A
SBB
B
SBB
C
SBB
D
SBB
E
SBB
H
SBB
L
SBB
M
----byte
SBI

Z80 Mnemonic
SBC
A
SBC
B
SBC
C
SBC
D
SBC
E
SBC
H
SBC
L
SBC
(HL)
SBC
(IX+index)
SBC
(IY+index)
byte
SBC

Machine Code
9F
98
99
9A
9B
9C
9D
9E
DD9Eindex
FD9Eindex
DEbyte

Operation
A <- A - A - Carry
A <- A - B - Carry
A <- A - C - Carry
A <- A - D - Carry
A <- A - E - Carry
A <- A - H - Carry
A <- A - L - Carry
A <- A - (HL) - Carry
A <- A - (IX+index) - Carry
A <- A - (IY+index) - Carry
A <- A - byte - Carry

Machine Code
09
19
29
39
DD09
DD19
DD29
DD39
FD09
FD19
FD29

Operation
HL <- HL + BC
HL <- HL + DE
HL <- HL + HL
HL <- HL + SP
IX <- IX + BC
IX <- IX + DE
IX <- IX + IX
IX <- IX + SP
IY <- IY + BC
IY <- IY + DE
IY <- IY + IY

Double Byte Add Instructions

8080 Mnemonic
DAD
B
DAD
D
DAD
H
DAD
SP
---------------

Z80 Mnemonic
ADD
HL,BC
ADD
HL,DE
ADD
HL,HL
ADD
HL,SP
ADD
IX,BC
ADD
IX,DE
ADD
IX,IX
ADD
IX,SP
ADD
IY,BC
ADD
IY,DE
ADD
IY,IY

---

ADD

IY,SP

FD39

IY <- IY + SP

Double Byte Add With Carry-In Instructions

8080 Mnemonic
---------

ADC
ADC
ADC
ADC

Z80 Mnemonic
HL,BC
HL,DE
HL,HL
HL,SP

Machine Code
ED4A
ED5A
ED6A
ED7A

Operation
HL <- HL + BC + Carry
HL <- HL + DE + Carry
HL <- HL + HL + Carry
HL <- HL + SP + Carry

Double Byte Subtract With Borrow-In Instructions

8080 Mnemonic
---------

Z80 Mnemonic
SBC
HL,BC
SBC
HL,DE
SBC
HL,HL
SBC
HL,SP

Machine Code
ED42
ED52
ED62
ED72

Operation
HL <- HL - BC - Carry
HL <- HL - DE - Carry
HL <- HL - HL - Carry
HL <- HL - SP - Carry

Control Instructions
8080 Mnemonic
DI
EI
--------------NOP
HLT

Z80 Mnemonic
DI
EI
IM
IM
IM
LD
LD
LD
LD
NOP
HLT

0
1
2
A,I
I,A
A,R
R,A

Machine Code
F3
FB
ED46
ED56
ED5E
ED57
ED47
ED5F
ED4F
00
76

Operation
IFF <- 0
IFF <- 1
------A <- Interrupt Page
Interrupt Page <- A
A <- Refresh Register
Refresh Register <- A
No Operation
NOP;PC <- PC-1

Machine Code
3C
04
0C
14
1C
24
2C
34
DD34index
FD34index

Operation
A <- A + 1
B <- B + 1
C <- C + 1
D <- D + 1
E <- E + 1
H <- H + 1
L <- L + 1
(HL) <- (HL) + 1
(IX+index) <- (IX+index) + 1
(IY+index) <- (IY+index) + 1

Machine Code
3D
05
0D
15
1D
25
2D
35
DD35index
FD35index

Operation
A <- A - 1
B <- B - 1
C <- C - 1
D <- D - 1
E <- E - 1
H <- H - 1
L <- L - 1
(HL) <- (HL) - 1
(IX+index) <- (IX+index) - 1
(IY+index) <- (IY+index) - 1

Increment Byte Instructions

8080 Mnemonic
INR
A
INR
B
INR
C
INR
D
INR
E
INR
H
INR
L
INR
M
-----

INC
INC
INC
INC
INC
INC
INC
INC
INC
INC

Z80 Mnemonic
A
B
C
D
E
H
L
(HL)
(IX+index)
(IY+index)

Decrement Byte Instructions

8080 Mnemonic
DCR
A
DCR
B
DCR
C
DCR
D
DCR
E
DCR
H
DCR
L
DCR
M
-----

Z80 Mnemonic
DEC
A
DEC
B
DEC
C
DEC
D
DEC
E
DEC
H
DEC
L
DEC
(HL)
DEC
(IX+index)
DEC
(IY+index)

Increment Register Pair Instructions

8080 Mnemonic
INX
B
INX
D
INX
H
INX
SP
-----

INC
INC
INC
INC
INC
INC

Z80 Mnemonic
BC
DE
HL
SP
IX
IY

Machine Code
03
13
23
33
DD23
FD23

Operation
BC <- BC + 1
DE <- DE + 1
HL <- HL + 1
SP <- SP + 1
IX <- IX + 1
IY <- IY + 1

Machine Code
0B
1B
2B
3B
DD2B
FD2B

Operation
BC <- BC - 1
DE <- DE - 1
HL <- HL - 1
SP <- SP - 1
IX <- IX - 1
IY <- IY - 1

Decrement Register Pair Instructions

8080 Mnemonic
DCX
B
DCX
D
DCX
H
DCX
SP
-----

Z80 Mnemonic
DEC
BC
DEC
DE
DEC
HL
DEC
SP
DEC
IX
DEC
IY

Special Accumulator and Flag Instructions

8080 Mnemonic
DAA
CMA
STC
CMC
---

Z80 Mnemonic
DAA
CPL
SCF
CCF
NEG

Machine Code
27
2F
37
3F
ED44

Operation
--A <- NOT A
CF (Carry Flag) <- 1
CF (Carry Flag) <- NOT CF
A <- 0-A

Rotate Instructions
8080 Mnemonic
RLC
RRC
RAL
RAR
-------------------------------------------------

Z80 Mnemonic
RLCA
RRCA
RLA
RRA
RLD
RRD
RLC
A
RLC
B
RLC
C
RLC
D
RLC
E
RLC
H
RLC
L
RLC
(HL)
RLC
(IX+index)
RLC
(IY+index)
RL
A
RL
B
RL
C
RL
D
RL
E
RL
H
RL
L
RL
(HL)
RL
(IX+index)
RL
(IY+index)
RRC
A
RRC
B

Machine Code
07
0F
17
1F
ED6F
ED67
CB07
CB00
CB01
CB02
CB03
CB04
CB05
CB06
DDCBindex06
FDCBindex06
CB17
CB10
CB11
CB12
CB13
CB14
CB15
CB16
DDCBindex16
FDCBindex16
CB0F
CB08

Operation
---------------------------------------------------------

-------------------------------------

RRC
RRC
RRC
RRC
RRC
RRC
RRC
RRC
RL
RL
RL
RL
RL
RL
RL
RL
RL
RL

C
D
E
H
L
(HL)
(IX+index)
(IY+index)
A
B
C
D
E
H
L
(HL)
(IX+index)
(IY+index)

CB09
CB0A
CB0B
CB0C
CB0D
CB0E
DDCBindex0E
FDCBindex0E
CB1F
CB18
CB19
CB1A
CB1B
CB1C
CB1D
CB1E
DDCBindex1E
FDCBindex1E

-------------------------------------

Machine Code
A7
A0
A1
A2
A3
A4
A5
A6
DDA6index
FDA6index
E6byte
AF
A8
A9
AA
AB
AC
AD
AE
DDAEindex
FDAEindex
EEbyte
B7
B0
B1
B2
B3
B4
B5
B6
DDB6index
FDB6index
F6byte

Operation
A <- A AND A
A <- A AND B
A <- A AND C
A <- A AND D
A <- A AND E
A <- A AND H
A <- A AND L
A <- A AND (HL)
A <- A AND (IX+index)
A <- A AND (IY+index)
A <- A AND byte
A <- A XOR A
A <- A XOR B
A <- A XOR C
A <- A XOR D
A <- A XOR E
A <- A XOR H
A <- A XOR L
A <- A XOR (HL)
A <- A XOR (IX+index)
A <- A XOR (IY+index)
A <- A XOR byte
A <- A OR A
A <- A OR B
A <- A OR C
A <- A OR D
A <- A OR E
A <- A OR H
A <- A OR L
A <- A OR (HL)
A <- A OR (IX+index)
A <- A OR (IY+index)
A <- A OR byte

Logical Byte Instructions

8080 Mnemonic
ANA
A
ANA
B
ANA
C
ANA
D
ANA
E
ANA
H
ANA
L
ANA
M
----byte
ANI
XRA
A
XRA
B
XRA
C
XRA
D
XRA
E
XRA
H
XRA
L
XRA
M
----byte
XRI
ORA
A
ORA
B
ORA
C
ORA
D
ORA
E
ORA
H
ORA
L
ORA
M
----byte
ORI

Z80 Mnemonic
AND
A
AND
B
AND
C
AND
D
AND
E
AND
H
AND
L
AND
(HL)
AND
(IX+index)
AND
(IY+index)
byte
AND
XOR
A
XOR
B
XOR
C
XOR
D
XOR
E
XOR
H
XOR
L
XOR
(HL)
XOR
(IX+index)
XOR
(IY+index)
byte
XOR
OR
A
OR
B
OR
C
OR
D
OR
E
OR
H
OR
L
OR
(HL)
OR
(IX+index)
OR
(IY+index)
byte
OR

CMP
CMP
CMP
CMP
CMP
CMP
CMP
CMP
----CPI
---

A
B
C
D
E
H
L
M

byte

CP
CP
CP
CP
CP
CP
CP
CP
CP
CP
CP
CPI

A
B
C
D
E
H
L
(HL)
(IX+index)
(IY+index)
byte

BF
B8
B9
BA
BB
BC
BD
BE
DDBEindex
FDBEindex
FEbyte
EDA1

---

CPIR

EDB1

---

CPD

EDA9

---

CPDR

EDB9

A-A
A-B
A-C
A-D
A-E
A-H
A-L
A - (HL)
A - (IX+index)
A - (IY+index)
A - byte
A - (HL);HL <- HL+1;BC <BC-1
A - (HL);HL <- HL+1;BC <BC-1
A - (HL);HL <- HL-1;BC <BC-1
A - (HL);HL <- HL-1;BC <BC-1

Branch Control/Program Counter Load Instructions

8080 Mnemonic
JMP
address
JNZ
address
JZ
address
JNC
address
JC
address
JPO
address
JPE
address
JP
address
JM
address
PCHL
-----------------

Z80 Mnemonic
JP
address
JP
NZ,address
JP
Z,address
JP
NC,address
JP
C,address
JP
PO,address
JP
PE,address
JP
P,address
JP
M,address
JP
(HL)
JP
(IX)
JP
(IY)
index
JR
JR
NZ,index
JR
Z,index
JR
NC,index
JR
C,index
DJNZ index

Machine Code
C3address
C2address
CAaddress
D2address
DAaddress
E2address
EAaddress
F2address
FAaddress
E9
DDE9
FDE9
18index
20index
28index
30index
38index
10index

CALL

address

CALL

address

CDaddress

CNZ
CZ
CNC
CC
CPO
CPE
CP
CM
RET

address
address
address
address
address
address
address
address

CALL
CALL
CALL
CALL
CALL
CALL
CALL
CALL
RET

NZ,address
Z,address
NC,address
C,address
PO,address
PE,address
P,address
M,address

C4address
CCaddress
D4address
DCaddress
E4address
ECaddress
F4address
FCaddress
C9

RET
RET

NZ
Z

C0
C8

RNZ
RZ

Operation
PC <- address
If NZ, PC <- address
If Z, PC <- address
If NC, PC <- address
If C, PC <- address
If PO, PC <- address
If PE, PC <- address
If P, PC <- address
If M, PC <- address
PC <- HL
PC <- IX
PC <- IY
PC <- PC + index
If NZ, PC <- PC + index
If Z, PC <- PC + index
If NC, PC <- PC + index
If C, PC <- PC + index
B <- B - 1; while B > 0, PC <PC + index
(SP-1) <- PCh;(SP-2) <- PCl;
SP <- SP - 2;PC <- address
If NZ, CALL address
If Z, CALL address
If NC, CALL address
If C, CALL address
If PO, CALL address
If PE, CALL address
If P, CALL address
If M, CALL address
PCl <- (SP);PCh <- (SP+1); SP
<- (SP+2)
If NZ, RET
If Z, RET

RNC
RC
RPO
RPE
RP
RM
----RST
RST
RST
RST
RST
RST
RST
RST

0
1
2
3
4
5
6
7

RET
RET
RET
RET
RET
RET
RETI
RETN
RST
RST
RST
RST
RST
RST
RST
RST

NC
C
PO
PE
P
M

0
8
10H
18H
20H
28H
30H
38H

D0
D8
E0
E8
F0
F8
ED4D
ED45
C7
CF
D7
DF
E7
EF
F7
FF

If NC, RET
If C, RET
If PO, RET
If PE, RET
If P, RET
If M, RET
Return from Interrupt
IFF1 <- IFF2;RETI
CALL 0
CALL 8
CALL 10H
CALL 18H
CALL 20H
CALL 28H
CALL 30H
CALL 38H
Operation
(SP-2) <- C; (SP-1) <- B; SP
<- SP - 2
(SP-2) <- E; (SP-1) <- D; SP
<- SP - 2
(SP-2) <- L; (SP-1) <- H; SP
<- SP - 2
(SP-2) <- Flags; (SP-1) <- A;
SP <- SP - 2
(SP-2) <- IXl; (SP-1) <- IXh;
SP <- SP - 2
(SP-2) <- IYl; (SP-1) <- IYh;
SP <- SP - 2
B <- (SP+1); C <- (SP); SP <SP + 2
D <- (SP+1); E <- (SP); SP <SP + 2
H <- (SP+1); L <- (SP); SP <SP + 2
A <- (SP+1); Flags <- (SP); SP
<- SP + 2
IXh <- (SP+1); IXl <- (SP); SP
<- (SP+2)
IYh <- (SP+1); IYl <- (SP); SP
<= (SP+2)

Stack Operation Instructions

8080 Mnemonic
PUSH B

Z80 Mnemonic
PUSH BC

Machine Code
C5

PUSH

PUSH

DE

D5

PUSH

PUSH

HL

E5

PUSH

PSW

PUSH

AF

F5

---

PUSH

IX

DDE5

---

PUSH

IY

FDE5

POP

POP

BC

C1

POP

POP

DE

D1

POP

POP

HL

E1

POP

PSW

POP

AF

F1

---

POP

IX

DDE1

---

POP

IY

FDE1

Input/Output Instructions
8080 Mnemonic
byte
IN
-----------------

IN
IN
IN
IN
IN
IN
IN
IN
INI

Z80 Mnemonic
A,(byte)
A,(C)
B,(C)
C,(C)
D,(C)
E,(C)
H,(C)
L,(C)

Machine Code
DBbyte
ED78
ED40
ED48
ED50
ED58
ED60
ED68
EDA2

Operation
A <- [byte]
A <- [C]
B <- [C]
C <- [C]
D <- [C]
E <- [C]
H <- [C]
L <- [C]
(HL) <- [C];B <- B-1;HL <HL+1

---

INIR

EDB2

---

IND

EDAA

---

INDR

EDBA

OUT
-----------------

byte

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTI

(byte),A
(C),A
(C),B
(C),C
(C),D
(C),E
(C),H
(C),L

D320
ED79
ED41
ED49
ED51
ED59
ED61
ED69
EDA3

---

OTIR

EDB3

---

OUTD

EDAB

---

OTDR

EDBB

(HL) <- [C];B <- B-1;HL <HL+1; Repeat while B>0

(HL) <- [C];B <- B-1;HL <HL-1
(HL) <- [C];B <- B-1;HL <HL-1; Repeat while B>0
[byte] <- A
[C] <- A
[C] <- B
[C] <- C
[C] <- D
[C] <- E
[C] <- H
[C] <- L
[C] <- (HL);B <- B-1;HL <HL+1
[C] <- (HL);B <- B-1;HL <HL+1; Repeat while B>0
[C] <- (HL);B <- B-1;HL <HL-1
[C] <- (HL);B <- B-1;HL <HL-1; Repeat while B>0

Data Transfer Instructions (Z80 Only)

8080 Mnemonic
---

Z80 Mnemonic
LDI

Machine Code
EDA0

---

LDIR

EDB0

---

LDD

EDA8

---

LDDR

EDB8

Operation
(DE) <- (HL);HL <- HL+1;
DE <- DE+1; BC <- BC-1
(DE) <- (HL);HL <- HL+1;
DE <- DE+1; BC <- BC-1;
repeat while BC<>-1
(DE) <- (HL);HL <- HL-1; DE
<- DE-1; BC <- BC-1
(DE) <- (HL);HL <- HL-1; DE
<- DE-1; BC <- BC-1; repeat
while BC<>-1

Bit Manipulation Instructions (Z80 Only)

8080 Mnemonic
-------------------------------------

BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT

Z80 Mnemonic
0,A
0,B
0,C
0,D
0,E
0,H
0,L
0,(HL)
0,(IX+index)
0,(IY+index)
1,A
1,B
1,C
1,D
1,E
1,H
1,L
1,(HL)

Machine Code
CB47
CB40
CB41
CB42
CB43
CB44
CB45
CB46
DDCBindex46
FDCBindex46
CB4F
CB48
CB49
CB4A
CB4B
CB4C
CB4D
CB4E

Operation
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 0
Z flag <- NOT Bit 1
Z flag <- NOT Bit 1
Z flag <- NOT Bit 1
Z flag <- NOT Bit 1
Z flag <- NOT Bit 1
Z flag <- NOT Bit 1
Z flag <- NOT Bit 1
Z flag <- NOT Bit 1

-------------------------------------------------------------------------------------------------------------

BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT

1,(IX+index)
1,(IY+index)
2,A
2,B
2,C
2,D
2,E
2,H
2,L
2,(HL)
2,(IX+index)
2,(IY+index)
3,A
3,B
3,C
3,D
3,E
3,H
3,L
3,(HL)
3,(IX+index)
3,(IY+index)
4,A
4,B
4,C
4,D
4,E
4,H
4,L
4,(HL)
4,(IX+index)
4,(IY+index)
5,A
5,B
5,C
5,D
5,E
5,H
5,L
5,(HL)
5,(IX+index)
5,(IY+index)
6,A
6,B
6,C
6,D
6,E
6,H
6,L
6,(HL)
6,(IX+index)
6,(IY+index)
7,A
7,B

DDCBindex4E
FDCBindex4E
CB57
CB50
CB51
CB52
CB53
CB54
CB55
CB56
DDCBindex56
FDCBindex56
CB5F
CB58
CB59
CB5A
CB5B
CB5C
CB5D
CB5E
DDCBindex5E
FDCBindex5E
CB67
CB60
CB61
CB62
CB63
CB64
CB65
CB66
DDCBindex66
FDCBindex66
CB6F
CB68
CB69
CB6A
CB6B
CB6C
CB6D
CB6E
DDCBindex6E
FDCBindex6E
CB77
CB70
CB71
CB72
CB73
CB74
CB75
CB76
DDCBindex76
FDCBindex76
CB7F
CB78

Z flag <- NOT Bit 1

Z flag <- NOT Bit 1
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 2
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 3
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 4
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 5
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 6
Z flag <- NOT Bit 7
Z flag <- NOT Bit 7

-------------------------------------------------------------------------------------------------------------

BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES

7,C
7,D
7,E
7,H
7,L
7,(HL)
7,(IX+index)
7,(IY+index)
0,A
0,B
0,C
0,D
0,E
0,H
0,L
0,(HL)
0,(IX+index)
0,(IY+index)
1,A
1,B
1,C
1,D
1,E
1,H
1,L
1,(HL)
1,(IX+index)
1,(IY+index)
2,A
2,B
2,C
2,D
2,E
2,H
2,L
2,(HL)
2,(IX+index)
2,(IY+index)
3,A
3,B
3,C
3,D
3,E
3,H
3,L
3,(HL)
3,(IX+index)
3,(IY+index)
4,A
4,B
4,C
4,D
4,E
4,H

CB79
CB7A
CB7B
CB7C
CB7D
CB7E
DDCBindex7E
FDCBindex7E
CB87
CB80
CB81
CB82
CB83
CB84
CB85
CB86
DDCBindex86
FDCBindex86
CB8F
CB88
CB89
CB8A
CB8B
CB8C
CB8D
CB8E
DDCBindex8E
FDCBindex8E
CB97
CB90
CB91
CB92
CB93
CB94
CB95
CB96
DDCBindex96
FDCBindex96
CB9F
CB98
CB99
CB9A
CB9B
CB9C
CB9D
CB9E
DDCBindex9E
FDCBindex9E
CBA7
CBA0
CBA1
CBA2
CBA3
CBA4

Z flag <- NOT Bit 7

Z flag <- NOT Bit 7
Z flag <- NOT Bit 7
Z flag <- NOT Bit 7
Z flag <- NOT Bit 7
Z flag <- NOT Bit 7
Z flag <- NOT Bit 7
Z flag <- NOT Bit 7
Bit 0 <- 0
Bit 0 <- 0
Bit 0 <- 0
Bit 0 <- 0
Bit 0 <- 0
Bit 0 <- 0
Bit 0 <- 0
Bit 0 <- 0
Bit 0 <- 0
Bit 0 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 1 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 2 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 3 <- 0
Bit 4 <- 0
Bit 4 <- 0
Bit 4 <- 0
Bit 4 <- 0
Bit 4 <- 0
Bit 4 <- 0

-------------------------------------------------------------------------------------------------------------

RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET

4,L
4,(HL)
4,(IX+index)
4,(IY+index)
5,A
5,B
5,C
5,D
5,E
5,H
5,L
5,(HL)
5,(IX+index)
5,(IY+index)
6,A
6,B
6,C
6,D
6,E
6,H
6,L
6,(HL)
6,(IX+index)
6,(IY+index)
7,A
7,B
7,C
7,D
7,E
7,H
7,L
7,(HL)
7,(IX+index)
7,(IY+index)
0,A
0,B
0,C
0,D
0,E
0,H
0,L
0,(HL)
0,(IX+index)
0,(IY+index)
1,A
1,B
1,C
1,D
1,E
1,H
1,L
1,(HL)
1,(IX+index)
1,(IY+index)

CBA5
CBA6
DDCBindexA6
FDCBindexA6
CBAF
CBA8
CBA9
CBAA
CBAB
CBAC
CBAD
CBAE
DDCBindexAE
FDCBindexAE
CBB7
CBB0
CBB1
CBB2
CBB3
CBB4
CBB5
CBB6
DDCBindexB6
FDCBindexB6
CBBF
CBB8
CBB9
CBBA
CBBB
CBBC
CBBD
CBBE
DDCBindexBE
FDCBindexBE
CBC7
CBC0
CBC1
CBC2
CBC3
CBC4
CBC5
CBC6
DDCBindexC6
FDCBindexC6
CBCF
CBC8
CBC9
CBCA
CBCB
CBCC
CBCD
CBCE
DDCBindexCE
FDCBindexCE

Bit 4 <- 0
Bit 4 <- 0
Bit 4 <- 0
Bit 4 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 5 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 6 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 7 <- 0
Bit 0 <- 1
Bit 0 <- 1
Bit 0 <- 1
Bit 0 <- 1
Bit 0 <- 1
Bit 0 <- 1
Bit 0 <- 1
Bit 0 <- 1
Bit 0 <- 1
Bit 0 <- 1
Bit 1 <- 1
Bit 1 <- 1
Bit 1 <- 1
Bit 1 <- 1
Bit 1 <- 1
Bit 1 <- 1
Bit 1 <- 1
Bit 1 <- 1
Bit 1 <- 1
Bit 1 <- 1

-------------------------------------------------------------------------------------------------------------

SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET

2,A
2,B
2,C
2,D
2,E
2,H
2,L
2,(HL)
2,(IX+index)
2,(IY+index)
3,A
3,B
3,C
3,D
3,E
3,H
3,L
3,(HL)
3,(IX+index)
3,(IY+index)
4,A
4,B
4,C
4,D
4,E
4,H
4,L
4,(HL)
4,(IX+index)
4,(IY+index)
5,A
5,B
5,C
5,D
5,E
5,H
5,L
5,(HL)
5,(IX+index)
5,(IY+index)
6,A
6,B
6,C
6,D
6,E
6,H
6,L
6,(HL)
6,(IX+index)
6,(IY+index)
7,A
7,B
7,C
7,D

CBD7
CBD0
CBD1
CBD2
CBD3
CBD4
CBD5
CBD6
DDCBindexD6
FDCBindexD6
CBDF
CBD8
CBD9
CBDA
CBDB
CBDC
CBDD
CBDE
DDCBindexDE
FDCBindexDE
CBE7
CBE0
CBE1
CBE2
CBE3
CBE4
CBE5
CBE6
DDCBindexE6
FDCBindexE6
CBEF
CBE8
CBE9
CBEA
CBEB
CBEC
CBED
CBEE
DDCBindexEE
FDCBindexEE
CBF7
CBF0
CBF1
CBF2
CBF3
CBF4
CBF5
CBF6
DDCBindexF6
FDCBindexF6
CBFF
CBF8
CBF9
CBFA

Bit 2 <- 1
Bit 2 <- 1
Bit 2 <- 1
Bit 2 <- 1
Bit 2 <- 1
Bit 2 <- 1
Bit 2 <- 1
Bit 2 <- 1
Bit 2 <- 1
Bit 2 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 3 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 4 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 5 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 6 <- 1
Bit 7 <- 1
Bit 7 <- 1
Bit 7 <- 1
Bit 7 <- 1

-------------

SET
SET
SET
SET
SET
SET

7,E
7,H
7,L
7,(HL)
7,(IX+index)
7,(IY+index)

CBFB
CBFC
CBFD
CBFE
DDCBindexFE
FDCBindexFE

Bit 7 <- 1
Bit 7 <- 1
Bit 7 <- 1
Bit 7 <- 1
Bit 7 <- 1
Bit 7 <- 1

Machine Code
CB27
CB20
CB21
CB22
CB23
CB24
CB25
CB26
DDCBindex26
FDCBindex26
CB2F
CB28
CB29
CB2A
CB2B
CB2C
CB2D
CB2E
DDCBindex2E
FDCBindex2E
CB3F
CB38
CB39
CB3A
CB3B
CB3C
CB3D
CB3E
DDCBindex3E
FDCBindex3E

-------------------------------------------------------------

Bit Shift Instructions (Z80 Only)

8080 Mnemonic
-------------------------------------------------------------

SLA
SLA
SLA
SLA
SLA
SLA
SLA
SLA
SLA
SLA
SRA
SRA
SRA
SRA
SRA
SRA
SRA
SRA
SRA
SRA
SRL
SRL
SRL
SRL
SRL
SRL
SRL
SRL
SRL
SRL

Z80 Mnemonic
A
B
C
D
E
H
L
(HL)
(IX+index)
(IY+index)
A
B
C
D
E
H
L
(HL)
(IX+index)
(IY+index)
A
B
C
D
E
H
L
(HL)
(IX+index)
(IY+index)

Operation