Vous êtes sur la page 1sur 40

Wireless Communication and RF System Design

Using MATLAB and Simulink

Giorgia Zucchelli Technical Marketing RF & Mixed-Signal

2013 The MathWorks, Inc.


1

Outline of Todays Presentation

Introduction to RF system-level simulation of wireless transceivers


MathWorks tools for RF top-down design
802.15.4 design example
Conclusions
RF
Analog
Baseband

Digital Baseband

Model and Simulate Wireless Systems

System-level simulation including RF

Digital
baseband

Digital to
Analog
Converter

Transmitter (TX)

RF

RF

Analog to
Digital
Converter

Digital
baseband

Receiver (RX)
3

Model and Simulate Wireless Systems

System-level simulation including RF


RF = high frequency analog signals
RF causes imperfections that cannot be neglected

Digital
baseband

Digital to
Analog
Converter

Transmitter (TX)

RF

RF

Analog to
Digital
Converter

Digital
baseband

Receiver (RX)
4

Why Do We Need RF System Simulators?


Radio Frequency
Signals

Small simulation timestep

Long Simulation Runs

~10psec

~5GHz

Deal with RF complexity with:


Models at high levels of abstraction
Solvers that use larger time-step
5

Simulink and SimRF

System-level simulation including RF


Architectural design of RF transceivers
Tradeoff simulation time and modeling fidelity

Simulation speed

Trade Off Simulation Speed and Modeling Fidelity


Equivalent Baseband

Circuit Envelope

True Pass-Band

Modeling fidelity
7

Trade Off Simulation Speed and Modeling Fidelity


Equivalent Baseband

Spectrum

Signal
bandwidth

Carrier

Circuit Envelope

freq

Spectrum
DC

Carrier 1

Carrier 2

freq

True Pass-Band
Spectrum

Simulation speed

How do your signals look like?

freq

Modeling fidelity
8

SimRF Libraries:
Circuit Envelope

Equivalent Baseband

Design of a Wireless Receiver

802.15.4 Air interface @2.4GHz

250 kbps
2 Mchps
O-QPSK modulation
sine pulse shaping

Robustness to -20dBm UMTS interference


-100dBm sensitivity @0.00625%BER
Ultra low cost / power

Digital
baseband

DAC

Transmitter (TX)

RF

RF

ADC

Receiver (RX)

Digital
baseband

10

Wireless Receivers Architectures


Super Heterodyne

High performance
Low power
Great sensitivity
High RF complexity / cost
Discrete filters for image
rejection and channel selection
Multiple LOs

Interference

Desired Signal

11

Wireless Receivers Architectures

Interference

Low IF

Desired Signal

Moderate performance
Moderate power
Good sensitivity
Moderate RF complexity
Integrated filters for image
rejection

12

Wireless Receivers Architectures

Interference

Desired Signal

Direct Conversion

Moderate performance
Moderate power
Good sensitivity
Moderate RF complexity
No image rejection
Noise mitigation
Quality of matching
13

Typical Direct Conversion Receiver Design


high speed SD data
converters

broadband direct
conversion receiver

CIC filters and downsamplers

Analog Baseband

ADC
Analog
Filter

VGA

Decimation
Filter

Digital
Baseband

Analog PLL

90

LNA

Decimation
Filter

ADC
Analog
Filter

VGA

Analog Baseband

reconfigurable analog
filters

analog phase locked


loop

baseband DSP

14

Top-Down Design of the RF Receiver

Model the overall communication chain


Refine the receiver model with a top-down approach
Verify the specifications at each step
Trade off model fidelity and simulation speed

15

Demo

16

Demo: Design of a ZigBee Receiver

Executable specification of the system


Architecture exploration and refinement of the RF front-end

17

ZigBee Specifications

802.15.4 Air Interface for 2.4 GHz ISM Band

250 kbps
2 Mchps
O-QPSK modulation
sine pulse shaping

Robustness to -20 dBm UMTS interference in IMT-2000 band spanning


2500 MHz to 2690 MHz
-100 dBm sensitivity @ 0.00625% BER
Ultra low cost

18

Step 1: How Much Noise Can Be Tolerated?

Direct sequence spread spectrum (DSSS)


Determine minimum allowable SNR to meet specifications

19

Step 2: Overall RF Receiver Performance

Determine Receiver Gain / Noise Figure


ADC dynamic range

20

Step 3: RF Receiver Noise and Power Budget

Refine the model of the RF Receiver and determine the link budget

21

Step 4: Design the RF Architecture

Specify the architecture of the Receiver: Direct Conversion

22

Step 5: Add RF Impairments

Explore the causes and effects of DC offset

23

Modeling RF Front Ends with SimRF

Model the entire system including RF


Leverage MATLAB and Simulink

Two libraries supporting two simulation approaches


Equivalent Baseband for all digital simulations of 2-port single carrier cascaded
systems
Circuit Envelope for multi-carrier simulation of arbitrary topologies

Trade off simulation speed and modeling fidelity

24

More Technical Details

25

Equivalent Baseband RF Models


Rapid Single-Carrier Simulation of RF Cascades

Link budget analysis for super heterodyne transceivers


In-band odd-order spectral regrowth and mismatches

26

Equivalent Baseband Library


Discrete-Time Frame-Based RF Simulation

Frequency defined (linear) elements


S-parameters, Lumped components, Transmission lines
Equivalent baseband (FIR) descriptions taking into account input / output mismatches

Nonlinear elements
Amplifiers, Mixers
Static odd-order characteristics

27

From Pass-Band to Equivalent Baseband

Pass-band
transfer function

fc

MHz GHz
0

Bandwidth = 1/Ts

Baseband-complex equivalent transfer


function

frequency
-0.5/Ts

+0.5/Ts

Complex
Equivalent
Baseband
Baseband equivalent
time-domain
impulse response

Number of sub bands (freq. resolution)


equals length of impulse response
0

time
28

Circuit Envelope RF Models


Multi-carrier Simulation of Arbitrary RF Networks

Interferers and spurs analysis at system-level


Arbitrary networks

29

Circuit Envelope Library


A Transient Simulation Superimposed to Harmonic Balance

Frequency defined (linear) elements


Lumped components, Transmission lines
S-parameters: frequency domain models for flat characteristics
S-parameters: rational fitting for broadband components

Nonlinear elements
Amplifiers, Mixers
Static even and odd order characteristics

Author your own model using Simscape

30

Multi-Carrier Envelope Simulation


carriers

Complex envelope of
modulated input signals

fc1

MHz GHz

fc2
frequency

Circuit-envelope
simulation
MHz GHz

fc1

fc2-fc1

fc2+fc1

fc2

frequency

Circuit
Envelope
Complex envelope response
around the selected carrier
MHz GHz
0

fc2+fc1

harmonic tones
signal envelope
frequency
31

Circuit Envelope 1/2

Based on multiple Harmonic Balance analysis


The coefficients of the harmonic tones are time-varying

Vin Re{V (t )e

jcarrier t

}
N

Vout Re{ Vk (t )e

j carrier k t

t1

fcarrier1

fcarrier2

k 0

t2
fcarrier1

fcarrier2
t3

fcarrier1

fcarrier2
32

Circuit Envelope 2/2

Transient simulation to calculate the time-varying envelopes of the signal


around the harmonic tones
f1

t1

t1

fcarrier

t3

fcarrier

f3

Time
simulation

HB

fcarrier

t2

f2

t2

t3

f1 f2 f3

33

SimRF and Simscape

34

Modeling of the IF Chain for Image Rejection

Model the RF chain with SimRF and IF chain the electrical domain

35

Using Simscape Together with SimRF

Early exploration of the receiver architecture


Intuitive analog model of the IF chain
Refine complex architectures:
Differential
Biasing networks

Build your own models using the Simscape language


Models compatible with SimRF Circuit Envelope

36

Behavioral Modeling of Analog Electronics

Simscape: Acausal, implicit, differential algebraic equations


Very similar to VerilogA
VerilogA
module Amplifier(in_port, out_port);

Simscape
component Amplifier

analog begin
inout in_port, out_port;

I(in_int)
<+ cin*1e-9
*ddt(V(in_int));
electrical
in_port,
out_port;
I(in_int) <+ V(in_port)/rin*(1-s11)/(1+s11);
I(in_int) <+ -a2*s12/(sqrt(rin)*(1+s11));
end

equations
nodes
in

in_port = foundation.electrical.electrical; %
Iin
==
cin * Vin.der + ...
in:left
Vin/rin*(1-s11)/(1+s11)
+ ...
out_port
= foundation.electrical.electrical;
%
-a2*s12/(sqrt(rin)*(1+s11));
out:right
end
37

Conclusions

38

Modeling RF Systems with MathWorks

Combine digital baseband, analog and RF


Integrate your design and find errors early

Progressively refine your design with a top-down methodology


The verification effort will be limited

Trade off accuracy and execution speed by choosing the desired abstraction
level
You dont have to become a modeling guru

39

Next Steps

For more information please contact me: giorgia.zucchelli@mathworks.com

For an evaluation or trial please contact your account manager

Thank you for your interest

40

Vous aimerez peut-être aussi