PII:

Solid-State Electronics Vol. 42, No. 12, pp. 21192130, 1998

# 1998 Published by Elsevier Science Ltd. All rights reserved
Printed in Great Britain
0038-1101/98 $ - see front matter
S0038-1101(98)00245-7

MEGAWATT SOLID-STATE ELECTRONICS

E. R. BROWN
DARPA Electronics Technology Oce, 3701 N. Fairfax Drive, Arlington, VA 22203, U.S.A.
(Received 7 June 1998; accepted 20 June 1998)
AbstractThis paper reviews some of the key challenges in developing solid-state electronics operating
at power levels from approximately 0.1 to beyond 1 MW. Applications exist in this range of power for
military and commercial applications alike. The technology of great interest is wide-band-gap
semiconductors, particularly SiC, which is well known for its superior electrical strength and thermal
conductivity compared to the traditional power semiconductor, Si. These properties can be utilized to
have signicant benets at both the device and systems level. # 1998 Published by Elsevier Science
Ltd. All rights reserved

1. INTRODUCTION

Power electronics is generally dened as that branch

of electrical engineering concerned with controlling
or modifying the ow of electrical energy between
sources and their loads. The electrical energy can
span a wide range of voltages and currents, and
have many dierent dynamic characteristics, including d.c., pulsed d.c., continuous-wave a.c., and
burst a.c. Associated with power electronics are
four basic component types: (1) switches, (2) rectiers, (3) reactive elements (i.e., capacitors and
inductors), and (4) transformers. All four components are steadily being improved by advancements in solid-state technology, the rst two being
impacted mostly by semiconductors. These advancements are impacting many application areas across
a wide range of power. Some of the largest areas
are represented graphically in the applications map
of Fig. 1. In the low-power sector of the map, approximately less than 10 kW, there are widespread
applications in switching power supplies, automotive electronics, solid-state bias circuits for lighting
and heating, and small motor drives. In the midpower sector, between roughly 10 kW and 1 MW,
there is a growing market of solid-state drives for
multi-horsepower induction motors and other
machines. In the high-power sector above roughly
1 MW, there are solid-state drives for heavy motors,
and switches and rectiers for pulse power systems
and the Utilities.
The majority of the commercial market for power
electronics presently resides in the low- and midpower sectors. In the low-power sector, computers,
fax machines, printers, and other forms of consumer
electronics continue to proliferate at a rapid rate,
making the switching power supplies inside them
commodity items. Recent indications are that consumer electronics now accounts for approximately
10% of the electric load in the United States, and

this number is growing. In the mid-power sector,

factory automation continues to grow in popularity
in the manufacturing arena, creating a high demand
for ``smart'' power ICs and modules[1]. Among
these are solid-state motor drives and controllers
whose demand is based on the fact that approximately 5060% of the electric energy in the United
States is consumed by motors. This may seem surprising until one realizes the pervasiveness and high
duty cycle of these machines, particularly a.c.-induction motors, for heating, ventilation, and air conditioning (HVAC). In contrast to the lower two, the
high-power or megawatt sector is much smaller and
is driven by niche applications such as solid-state
motor drives for heavy traction motors.
The main objective of this paper is to examine
the megawatt sector from a technical perspective,
starting with an overview of where the incumbent
silicon power electronics is and where it is likely to
go. This will be followed by a discussion of the
wide-band-gap semiconductors as a promising baseline technology for this sector. The key argument is
that wide-band-gap materials can yield solid-state
device benets or system operational benets that
silicon-based or electromechanical power electronics
cannot realize. Among the device benets are high
enough blocking voltages in diodes and transistors
to avoid series stacking and the associated packaging diculties at high voltage levels. Among the
systems benets are a much higher switching frequency in pulse-width-modulated (PWM) rectiers
and inverters, which should lead to a substantial reduction in the volume occupied by passive circuit
components.
2. SILICON POWER ELECTRONICS

For the past several years the growth in power

electronics at the middle and lower power sectors of

2119

2120

E. R. Brown

Fig. 1. Applications Map for Solid-State Power Electronics (adapted from Ref.[1]).

Fig. 1 has been widespread, reecting what some

have called a ``second electronic revolution''. This
growth has been largely driven by silicon power
electronics because of the levels of integration that
silicon technology provides. For example, below
100 V, it is has become straightforward to monolithically integrate large-area MOSFETs with MOS
control and sensing electronics. This eliminates
much of the touch labor and packaging expense
that have tended to dominate cost in power electronics products and it promotes economy-of-scale
since the majority of manufacturing steps are carried out by machines whose output can be increased
to meet demand with a relatively small increase in
operating cost.
Between approximately 100 V and 1 kV, silicon
power electronics has had great impact because of
rapid advances in the insulated-gate bipolar transistor (IGBT) and modular packaging. The IGBT
combines the current density and low loss of the
bipolar transistor with the speed and high input
impedance of the MOSFET. This allows the IGBT
to be readily interconnected with control circuitry
in low-cost (e.g., plastic) modules, which has been a
successful approach in driving small machines for
factory automation. In cases where the load current
is high, current scaling is readily accomplished by
connecting many devices in parallel. This technique
is facilitated by the high output impedance of
IGBTs, which makes it unlikely that one device in a
parallel array will attract the current intended for
its neighbors.
At voltages above 1 kV, silicon has made an
impact through remarkable advances in the electri-

cal performance of both IGBTs and gate-turn-o

(GTO) thyristors. Figure 2(a) shows the advance in
power handling capacity of IGBT switches between
1983 and 1998, and Fig. 2(b) shows improvements
in GTO thyristors over the past decade. Initially,
the power handling of IGBTs increased at a rate of
roughly 20  /5 years[2]. Around 1988, the rate of
growth diminished to approximately 6  /5 years,
leading to the recent demonstration of a 2500 V,
1000 A device by Toshiba[3]. Not to be surpassed,
the GTO thyristors have been following a trend of
approximately 4  /5 years, recently achieving a
maximum power handling of 36 MW at
Mitsubishi[4]. In both cases, the improvements have
occurred through current scaling. More and more
IGBTs have been connected in parallel to create
large modules, and single GTO thyristors have been
manufactured up to 150 mm in diameter, leveraging
the advances in substrate and fabrication technology made possible by the silicon digital industry.
3. MOTIVATION FOR RESEARCH IN THE MEGAWATT
SECTOR

In contrast to the lower-power sectors, the megawatt sector has not been so lucrative in spite of
large potential applications (e.g., switching and control for the Utilities). One reason is that these applications tend to be at a voltage or current level that
precludes IC or modular approaches found in the
lower sectors. Hence, the components usually contain discrete parts that require touch-labor in manufacture, causing packaging to dominate the cost and
often the reliability of the components. As a conse-

Megawatt solid-state electronics

2121

Fig. 2. (a) shows the advance in power handling capacity of IGBT switches between 1983 and 1998. (b)
shows improvements in GTO thyristors over the past decade.

quence, the economy of scale so important in the

IC approach is not realized, and market penetration
is frustrated. A second reason is limitations in

solid-state performance at the megawatt power

levels. Even today there is just one family of solidstate switches, the thyristors, that can operate well

2122

E. R. Brown

into the megawatt sector, and their performance is

currently limited to about 10 MW. Because they are
latching-type switches, thyristors are more dicult
to turn on and o than the transistor switches used
in the smart ICs and modules of lower power levels,
leading to more complex gating circuits and more
expensive overall packaging.
The sheer magnitude of the low- and mid-power
markets, estimated to be about $10B in 1997 alone,
has induced commercial organizations to conduct
internal research and development (R&D) to
advance power electronics in these sectors. Much of
this activity centers around the silicon-based technologies discussed in Section 2. In contrast, the difculties and risks in the megawatt sector have
discouraged many companies from engaging in
large-scale (R&D). Therefore, government investment can be a driver here, and has recently been initiated at DARPA through the Megawatt SolidState Electronics Program. The key near-term
defense application in this sector is combat hybrid
power systems (CHPS) that incorporate both cw
and pulse power loads at the MW scale. The nearterm commercial interests lie in solid-state drives
for traction motors (e.g., locomotives), and highvoltage high-current switches for the electric
Utilities. For the Utilities applications, DARPA has
coordinated the Megawatt Program with the
Electric Power Research Institute (EPRI).
4. TRENDS IN MEGAWATT POWER ELECTRONICS

In organizing a research program as far-reaching

as Megawatt, it is important to rst recognize that
commercial silicon technology is a moving target,
much as it is in the digital arena. As shown in
Fig. 2, extrapolations predict an IGBT module having a power rating of 107 VA by 2001, and a GTO
thyristor having a power rating of 108 VA by
2002. Note, however, that the improvements made
over the past decade have occurred mostly through
current handling, the IGBT and GTO thyristor having increased approximately 10 and 6 times, respectively. The increase in voltage handling over this
time has been more incremental: 3 and 2.5 times for
the IGBT and GTO, respectively. And there are
good reasons to believe that it will begin to saturate
in the future, in spite of the steady growth in current handling.
The primary limitation to voltage stando in silicon is the small band gap, 1.1 eV, which leads to a
low intrinsic breakdown voltage, BV. This voltage
is approximately 5  105 V/cm in undoped material,
and gets even smaller in doped material. To compensate for this eect, device engineers have made
the active layers very thick so that the voltage
drops over a long region of semiconductor, reducing the associated internal electric elds. In addition, power engineers have long resorted to
stacking packaged devices in series. A good example

of this is the series stacking of thyristors that is

commonly done in the high-voltage inverters of
HVDC stations[5]. But these strategies can only be
taken so far. Series stacking, in particular, is expensive from a packaging standpoint, and requires
rather complicated triggering (often optical) to
maintain voltage-sharing between devices in the
stack. Hence, there is a strong incentive to develop
devices having greater voltage blocking capability
than the contemporary ones, but in the same or
smaller device package. Such devices could be used
in a variety of Utilities switching applications from
distribution levels (tens of kV) to transmission levels
(>100 kV). Many of these applications are aimed
at improving power quality and reliability, and fall
in the category of Flexible AC Transmission
Systems (FACTS) coined by the inventors at
EPRI[6].
Devices with greater blocking capability are also
important because voltage can usually be traded-o
in device design for speed, current density, or other
performance characteristics. Improvements in device
speed meet a variety of system requirements for
more precise and ecient control and processing of
a.c. power wave forms. A good example is PWM
motor drives which generally require a pulse repetition rate at least ten times greater than the motor
rotational frequency to synthesize the desired sinusoidal wave form with acceptable delity.
Improvements in the current density are important
for pulse-power applications, such as arc welding or
electrically assisted munitions. Each pulse typically
entails a very large current magnitude (typically
MA) for a short duration of time (typically milliseconds). The limited volume allowed by many of
these applications (particularly the portable ones)
requires relatively small-area switches and, thus,
very large current density. Current density is more
of an issue than thermal management because the
duty cycle is often low enough for the average dissipated power to be much less than in continuouswave applications at comparable voltage levels.
Space limitations preclude a detailed discussion on
pulse power in this article, so the interested reader
is referred to one of several good articles on the
subject[7].
5. WIDE-BAND-GAP SEMICONDUCTOR TECHNOLOGY

The advantages of higher blocking voltage has

been the prime motivation for developing power
devices made from wide-band-gap (WBG) semiconductors, particularly SiC and GaN. In principle,
these materials oer not only a higher BV, but also
higher thermal conductivity and/or electron saturation velocity than Si. They also have the inherent
ability to operate at much higher junction temperatures because of the low intrinsic carrier concentration associated with the WBG. All of this is well
known and widely documented in the recent litera-

Megawatt solid-state electronics

ture. What is less documented, and an objective of

this paper, is how these material properties transform into device or system benets that silicon or
mechanical power electronics cannot realize.
Of the many conceivable device benets, a key
one from the perspective of the Megawatt Program
is the ability to meet system conditions with one
device when silicon technology requires several. A
good example, examined in the next section, is kVlevel low-loss SiC or GaN rectiers in high-power
PWM motor drives. Here, silicon Schottky diodes
easily meet the low-loss requirement, but cannot
operate near 1 kV because of breakdown that
occurs in the bulk material in the high-eld region
near the metal semiconductor interface. A second
example is single WBG switches used at Utilities
distribution levels (010 kV or more). In this case,
the 60 Hz frequency is low enough for the solidstate switches to be very ecient, but no single silicon device can withstand the high peak operating
voltages.
Of the many possible system benets oered by
WBG technology, the Megawatt Program is focusing on those that substantially reduce the size or
complexity of the circuit in which the WBG device
is mounted. A good example is the reduction in
volume and weight associated with passive devices
(i.e., capacitors and inductors) that results from
operating the switches in some power circuits (e.g.,
PWM inverters) at higher frequencies. A second
example is the potential reduction in the size and
cost of thermal management hardware by operating
the active devices in many power circuits at higher
junction temperatures. Both examples are addressed
in this paper, even before they have been conclusively studied, because they represent indirect benets
that presently may not be under adequate consideration by those assessing the merits of WBG device
technology; and as pointed out in the example on
thermal management, these benets can cascade

2123

through the system, leading to greater overall positive impact than rst anticipated.
5.1. Device benets of WBG technology
5.1.1. Lower-loss diodes. As antiquated as diodes
may seem today, they still play a vital role in power
electronics, particularly in a.c.-to-d.c. rectiers and
d.c.-to-a.c. inverters. The building block of most
inverters is the half-bridge, shown schematically in
Fig. 3. This is commonly used to control a single
phase wave form to a motor drive or other a.c. machine by pulse-width modulation (PWM). PWM is
a wave synthesis technique that generates square
voltage pulses at a xed repetition rate much
greater than that of the wave to be synthesized. To
synthesize a sine wave, for example, the width of a
pulse at any given time is made proportional to
amplitude of the sine wave at that time. If the load
is highly inductive, as in most motors, the current
changes little during the time of a single pulse. So
the voltage pulses are usually generated by voltagedivider action between a transistor and the diode
above or below it.
Referring to Fig. 3, when the upper transistor
switch turns on, the voltage across it drops to near
zero and the entire bus voltage is held o by the
reverse-biased diode below it. A short time later
when the transistor turns o, its impedance rises
higher than the diode impedance, forcing the diode
to near zero bias and then to slightly forward bias
to support the motor current. This turn-o of the
transistor is generally its rate limiting step in the
inverter cycle. The diode remains in the forward
current state until the top transistor turns on again,
at which time the diode must transition from the
fully forward state to the reverse-bias state. This
process, called reverse recovery, is generally the rate
limiting step in the diode switching dynamics.
To see the impact of SiC, one can simulate the
motor drive performance by the following assumptions: (1) the motor current is xed; (2) the current

Fig. 3. Half-bridge circuit schematic showing two IGBT switches and two yback diodes.

2124

E. R. Brown

Fig. 4. Simulated performance of half-bridge motor drive containing Si yback diodes.

through the transistor and diode is piecewise continuous at all times, and (3) the voltage across the
transistor and diode is step-wise discontinuous
during transistor turn-on and diode reverse recovery, and piecewise continuous at all other times[8].
To quantify the performance, we assume further
that the d.c. bus voltage is 400 V, the motor current
is 15 A, the PWM duty cycle is 50%, and the transistor is a Si IGBT having the following device
characteristics: forward voltage drop = 3.0 V, turnon time >0, turn-o time = 0.3 ms, and forward
current density = 100 A cm2.
Although the motor being simulated has modest
power (6 kW) by modern standards, it precludes the
use of Si Schottky diodes because of the 400 V bus
voltage. Therefore, a PIN diode is generally used
at this or any higher voltages. Typical Si PIN
diode
characteristics
are
forward
voltage
drop = 2.0 V, reverse recovery time = 0.5 ms, forward current density = 100 A cm2, and peak
recovery current = 3  forward current. These
characteristics lead to the performance curves
shown in Fig. 4. Note that the static power losses
(at zero frequency) for the transistor and diode are

roughly equal, and are each less than 1% of the

motor power. The dynamic power is, by denition,
that portion of the power loss at a non-zero operating frequency that exceeds the static power. It arises
from the various switching events described above,
each of which dissipates energy, Es, and contributes
to the dynamic power loss by Esfs, where fs is the
switch PWM repetition rate. To avoid audible noise
generation, the repetition rate is typically made in
the ultrasonic region at 20 kHz or higher. Note that
at 20 kHz the transistor loss is 74 W, the PIN
diode loss is 60 W, and the total loss is 2.2% of the
motor power.
The 400 V bus voltage is well within the reverse
BV of a SiC Schottky diode. Recently obtained Si
Schottky diode characteristics are: forward voltage
drop = 1.4 V, reverse recovery time = 0.1 ms, forward current density = 100 A cm2, and peak
recovery current00.4  forward current (non-zero
because of small minority-carrier injection). These
characteristics lead to the performance curves
shown in Fig. 5. Note that the static power loss for
the transistor is now much greater than that of the
diode. In fact, the suppression in the reverse recov-

Fig. 5. Simulated performance of half-bridge motor drive containing SiC yback diodes.

Megawatt solid-state electronics

ery current that SiC provides practically eliminates

the dynamic power loss due to this process. Hence,
the total power loss is reduced by about a factor of
two.
5.1.2. Higher voltage switches. Switches are as
fundamental to power electronics as rectiers, and
have advanced continuously in performance and
convenience since the advent of solid-state power
devices. However, there are large applications in
which single solid-state devices cannot operate eectively or compete with mechanical switches. One
example is switching at the distribution or higher
levels of the electric Utilities (>10 kV). Here the
blocking voltage or current-handling of existing silicon switches is inadequate, requiring that many individual switches be stacked in series or parallel to
meet the operational requirements.
The best silicon switches for the high-voltage
applications are presently the class of vertical bipolar devices, IGBTs between approximately 200
and 2000 V, and gated thyristors up to approximately 10 kV. Like all bipolar devices, they display
strong conductivity modulation along with high
current density and low resistance in the on state.
The thyristors have the additional benet of internal charge regeneration, which means that the
good performance characteristics can be maintained
even with thick active layers in the device. Device
engineers have taken advantage of this fact to produce gated thyristors having blocking voltage up to
approximately 10 kV by making the thickness of
the bottom anode layer of the thyristor (bottom P
layer in an NPNP thyristor) very thick. But this
strategy can only be taken so far because of voltage
breakdown eects. Inevitably the breakdown limit
will be dictated by cross-gap ionization and subsequent avalanching in the internal layers of the
switch. In silicon thyristors, this usually occurs in
the bottom collector layer across which most of the
voltage in the device drops.
To understand the limit imposed by avalanche
breakdown and to see why WBG materials are
promising in this respect, it is useful to apply a
simple model found in many text books and
research articles[9]. This model assumes that the collector layer of the thyristor (or IGBT) is uniformly
doped and forms the low-doped side of an abrupt
pn (or np) homojunction, and that all the voltage
applied to the device, V, drops across this layer
according to the depletion approximation. In this
case, the electric eld prole in the collector is
E = qN(W x)/e, where W = (2eV/qN)1/2 is the depletion width. The maximum electric eld EMAX
occurs in the collector layer right at the homojunction, and avalanche breakdown occurs when this
eld reaches a critical value EC. To further simplify
the analysis, the model usually assumes that the
impact ionization coecients for electrons and holes
are equal, aP=aN=a and that the dependence of
this coecient on electric eld conforms to a simple

2125

power law, a = aEn, where a is a constant. Under

these assumptions, the condition for avalanche
breakdown, fa dx = fa[qN(W x)/e]n dx = 1, can
be reduced to analytic expressions for BV, EC, and
W.
For silicon the power-law approximation for
impact ionization is a 1 1.8  1035E7 where the
units of a and E are 1/cm and V/cm, respectively.
This
yields
BV = 5.3  1013N3/4
and
10 7/8
W = 2.7  10 N . For silicon carbide, the
impact ionization coecients for electrons and
holes are far smaller than their counterparts in silicon. This leads to a power-law approximation,
a 1 1.15  1042E7,
which
yields
BV =
2.9  1015N3/4 and W = 1.8  1011N7/8[10]. In
both cases, the critical eld is calculated from
EC=[2qN(BV)/e]1/2. The breakdown voltage, depletion width, and critical eld for Si and SiC are
plotted in Fig. 6(ac), respectively, as a function of
the doping concentration. For a xed breakdown
voltage and doping concentration, one can think of
the depletion length as the optimum thickness for
the collector layer.
These plots show clearly why SiC is desirable for
high-voltage operation. First, it can achieve a given
breakdown voltage with a more practical doping
concentration over a much shorter depletion length
than in Si. This is indicated by the graphical solution (represented by the dotted loci) in Fig. 6 for a
breakdown voltage of 5 kV. In this case, the optimum doping concentration and depletion lengths
are approximately 3  1013 and 5  1015 cm3, and
510 and 32 microns in Si and SiC, respectively. The
concentration 3  1013 cm3 is quite low, even for
silicon technology, and requires special techniques
(e.g., neutron transmutation) in the doping process
to obtain acceptable uniformity over large silicon
substrates. Higher blocking voltages would entail
even lower doping and greater uniformity: features
that are not leveraged by other areas of silicon technology and challenge absolute limits in semiconductor material growth. In contrast, the 5  1015 cm3
concentration in SiC is more feasible, particularly
when it only needs to be maintained through a
32 micron thick layer.
Of course, there are other factors involved in voltage breakdown not accounted for by this analysis.
One factor is that all good switching devices have
some internal current gain, which adds an additional multiplication factor to the impact ionization and thereby reduces the threshold voltage and
critical eld. Another factor is that large elds
always build up at the edges of power devices by
electrostatic bending, often leading to premature
breakdown. While these eects are important, they
can usually be mitigated by good device design and
edge termination (e.g., beveling). Hence, the model
of an abrupt pn junction serves as a useful benchmark for power semiconductor materials and
devices, particularly the vertical type.

2126

E. R. Brown

Fig. 6. Electrical characteristics of an abrupt P+N or N+P homojunction biased to the threshold of
avalanche breakdown. (a) Breakdown voltage vs doping concentration, (b) depletion length vs doping
concentration, (c) critical electrical eld vs doping concentration.

5.2. System benets of WBG technology

5.2.1. Reduced circuit size through higher frequencies. In principle, the higher breakdown voltage of
WBG devices can be traded-o for speed or current
density, or both. For example, SiC PIN diodes
can be designed with thinner depletion layers that
silicon ones, mitigating the reverse recovery eects
that tend to slow down and add losses to switching.
SiC bipolar switches can be designed with thinner
base regions and shorter collector depletion layers,
reducing the device turn-o time and the input capacitance relative to silicon devices. These improvements in device speed may drive a number of
system benets, one of which is a reduction in
volume and weight associated with passive components.
While digital integrated circuits have managed to
reduce the size and weight of nearly every communications and sensor system in existence today,
power devices have been less eective. One reason
is that many circuits, such as large power supplies,
require discrete capacitors and/or inductors for

energy storage, ltering, and other critical functions

in the circuit, and the limitation on energy storage
in these components tends to make them very large
compared to the semiconductor devices or ICs. For
example, because of fundamental limitations on the
breakdown eld and permittivity of dielectric materials, capacitors are typically limited to volumetric
and mass energy-storage densities of UC11 J/cm3
and 1.5 J/gm, respectively. Values up to approximately 4 J/cm3 have been reported in the research
literature (e.g., using polyvinylidene uoride or
PVDF), but these can only be realized in smallvalued capacitors.
A simple way to decrease the volume of the passive components is to increase the operating frequency, f. Capacitors are often selected to achieve a
reactance, X = 1/oC, that is determined primarily
by the specic circuit topology, and is rather independent of the frequency. Therefore, the capacitance required for a given circuit tends to vary
inversely with frequency. To see the impact of this
on volume and voltage, we approximate the capaci-

Megawatt solid-state electronics

tor as a parallel-plate structure, so that C = eA/

d = eG(Emax/Vmax)2=GUC/(Vmax)2, where e is the
permittivity, A is the plate area, d is the plate separation, G = Ad is the volume, Emax is the maximum
electric eld in the material between the plates,
Vmax is the maximum voltage across the plates, and
UC is the energy density. From this we can write,
G = (Vmax)2/oXUCA(Vmax)2/o, which means that
the volume would diminish either by decreasing
Vmax or by increasing the frequency. In many applications, requirements on the voltage set by the
source or load preclude Vmax from being reduced
substantially. But increasing the frequency is practical provided that there is no substantial increase in
system losses, electromagnetic interference (EMI)
generation, or other deleterious eects.
The rst requirement in achieving higher frequency is switches that operate eciently. To dene

2127

this eciency, we take the loss terms associated

with PWM switching of inductive or capacitive
loads. For large capacitive (inductive) loads, the
current (voltage) is turned on and o very rapidly
while the voltage (current) remains practically constant. Generally, the turn-on time is much shorter
than the turn-o time, tOFF, consistent with the
behavior of most solid-state switches. Hence, there
are two ways the switch dissipates energy: (1) in the
on-state while the switch is supporting current ION
and dropping voltage VON, and (2) during the turno transition (dynamic loss) when the switch is supporting current and dropping voltage over a time of
at least tOFF. To quantify the losses, we assume
50% duty cycle in the on state, and follow the
switching trajectory shown in Fig. 7(a) in which the
voltage rst increases linearly over time tOFF to the
bus voltage VB while the current is xed, and then

Fig. 7. (a) Turn-o trajectory assumed for switching analysis. (b) Blocking voltage vs turn-o time for
three switch types: MOSFETs, IGBTs, and GTO thyristors. (c) Maximum switching frequency vs turno time for same device types as in (b).

2128

E. R. Brown

the current decreases linearly to zero in time tOFF

while the voltage remains xed. Under these conditions, the total power dissipation can be approximated by PD 10.5(IONVON) + (IONVB)(tOFF fS).
The switching loss fraction is found through dividing the power dissipation by the power to the load,
PL=0.5(VBVON)ION. The maximum switching
frequency is found by setting this fraction equal
to a value L and solving for fS to get
fmax=[L(VBVON)/VON1]/2tOFF.
Some representative values of tOFF are plotted in
Fig. 7(b) vs the blocking voltage for three dierent
switching devices, MOSFETs, IGBTs, and GTO
thyristors. Both Si and SiC technologies are represented, the Si values being experimental and the
SiC points being theoretical or projected. For each
device type, the turn-o time is taken for a single
blocking voltage, 200, 2500, and 6000 V for the
MOSFET, IGBT, and GTO, respectively. Under
this condition, SiC provides a much smaller turn-o
time because it can achieve the given blocking voltages with much narrower active layers and lower
associated charge storage. For MOSFETs and
IGBTs, the reduction in turn-o time is approximately ve times.
The reduced tOFF leads to an increase in fmax in
the manner shown in Fig. 7(a) and (b). First, a
blocking voltage is chosen, such as the 1000 V level
in Fig. 7(b). This corresponds to a tOFF of approximately 1.8  108 s in SiC and 7.8  108 s in Si.
Extending the lines down to the graph in Fig. 7(c),
we nd corresponding fmax values of approximately
0.5 MHz in the Si switch and 2.5 MHz in the SiC
switch. The 5 times improvement in speed of the
SiC is promising for applications such as d.c.-tod.c. converters where the input d.c. is inverted to
a.c. by PWM switching, and the a.c. is subsequently
converted back to d.c. through PWM rectication.
The frequency of the a.c. link can be quite high in

this case, provided that the switches are fast enough

to operate well above the a.c. frequency. In this
way the passive components in the circuit, such as
the low-pass lter in the output stage, can be made
quite small in accordance with the GA1/o relationship derived above.
5.2.2. Superior thermal management through
higher junction temperature. The WBGs of SiC and
GaN combined with their refractory nature gives
these materials the inherent capability to operate at
higher temperatures than silicon or other traditional
semiconductors at approximately the same level of
electrical performance (i.e., eciency, speed, etc.) as
at room temperature. The increase in free carrier
concentration by cross-gap thermal generation
ultimately establishes the upper limit on device temperature. As experimental proof of the high-temperature capability, junction eld-eect transistors
(JFETs) and diodes have been operated up to
6008C[11]. Both devices were unpackaged and subjected to ambient conditions.
To understand the impact of higher junction temperature on device and system performance, we
start with the traditional package shown in Fig. 8
in which the device is soldered to a case and the
case is bonded to a heat sink. For the present purposes, the sink will be considered to transport heat
to the ambient environment by either conduction
(e.g., to a metal chassis or directly to the air
through ns) or convection (e.g., forced air through
the sink). The package has four reference temperatures, at the semiconductor device junction, TJ, at
the device-case interface, TC, the case-sink interface,
TS, and in the ambient environment, TA. The
regions in between the interfaces are ascribed with
thermal resistances, yJC, yCS, and ySA, respectively.
In this model, the junction temperature is related to
the ambient temperature through the relation,

Fig. 8. Cross-sectional view of typical power-electronic packaging scheme.

Megawatt solid-state electronics

2129

Fig. 9. Results of packaging analysis plotted as heat-sink area vs device junction temperature parametrized by dierent values of sink-to-ambient heat ux capacity. The package is modeled as in Fig. 8,
with a junction area of 0.15 cm2, a junction-to-case thermal resistance of yJC11.48C/W and a case to
substrate thermal resistance of yCS10.18C/W.

yJA

TJ TA
yJC yCS ySA
P0

where P0 is the thermal power generated by the

device and yJA is the total thermal resistance.
As an example, let us take the 15 A, 400 V Si
IGBT device discussed in the inverter analysis
above and assume that the operating frequency is
low enough that it dissipates a static power of
25 W, consistent with the low-frequency limit of the
IGBT losses in Fig. 4. The maximum junction temperature of the device is assumed to be 1508C, consistent with widespread data on Si IGBTs. This will
be compared to a notional SiC device having the
same power characteristics, but a maximum junction temperature of 4008C. Both devices are
assumed to have an active area of 0.15 cm2, consistent with the moderate current density of 100 A/cm2,
and are soldered to TO-220 cases. The TO-220
cases are attached to a aluminum heat sink with
thermal compound. Under these conditions, data
sheets show that yJC 1 1.48C/W and yCS 1 0.18C/
W[12]. The sink-to-ambient thermal resistance, ySA,
depends entirely on the sink area and the heatremoval strategy. In general it can be written
ySA=1/SAS where AS is the sink area and S is the
heat ux capacity. For natural convection S typically falls in the range 310 W/m2/K, and for forced
air it falls in the range 10100 W/m2/K.
Substituting these quantities into Equation (1),
one can calculate the sink area vs the junction temperature rise TJTA, which is plotted in Fig. 9 for
the three boundary values of the sink-to-ambient
heat-ux capacity. The upper two curves dene the
typical range of natural convection, while the lower
two curves dene the typical range of forced-air
convection. All three curves decrease monotonically

with junction temperature, consistent with the fact

that the heat ux through a given package naturally
increases with the temperature dierence between
the source and the sink. The curves illustrate two
important facts about higher operating temperature.
The rst is that the higher temperature will allow
for smaller heat-sink area for the same packaging
technology.
This is illustrated through the two operating
points (i) and (ii) for the Si and SiC device, located
at 150 and 4008C, respectively. Each point is
located on the boundary curve between natural and
forced-air convection. The resulting sink areas are
0.021 and 0.006 m2 for the Si and SiC devices, respectively. For a square geometry, these correspond
to 14.5  14.5 cm and 7.7  7.7 cm, respectively, so
that SiC requires approximately 50% less lateral
dimension in the heat sink.
A second important fact about higher operating
temperature is that it may allow a complete change
in the thermal management approach for a given
packaging area. This is illustrated through the two
operating points (iii) and (iv) in Fig. 9 at 1508C and
4008C, respectively, and both xed in area at
0.011 m2. Notice that point (iii) lies well within the
range of forced-air convection, while point (iv) is
well within the range of natural convection. In
practical terms, this means that the Si device would
require a fan but the SiC device could operate without one. While fans are a universal means of
forced-air convection, they are usually accompanied
by mechanical vibrations, acoustic noise, and environmentally dependent failure mechanisms that can
limit the reliability of the overall power system.
Hence, the higher operating temperature of SiC will
provide a superior thermal management solution
where the system architecture does not allow

2130

E. R. Brown

forced-air convection or where the system environment (e.g., wet conditions) impacts the reliability of
a fan.
6. SUMMARY

The objective of this paper has been to examine

megawatt power electronics with a view towards
WBG semiconductors as an enabling baseline technology. The key rationale was that WBG materials,
particularly SiC, can provide solid-state device or
system benets that the incumbent silicon-based
electronics cannot realize. Among the device benets are a much higher blocking voltage for single
diode or transistor operation, and lower-loss diodes
for half-bridge motor-drive circuits. Among the
systems benets are a reduction in the volume of
passive components in power circuits through operation of the switches at much higher frequencies
than possible with Si. Another system benet is the
simplication of the thermal management system
through operation of the semiconductor active junctions at much higher temperatures than in Si.
Through these benets, it is projected that WBG
technology will have a major impact in the powerelectronics applications sectors, where the merit of
new technology is ultimately determined.

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