Microprocessor File

1
LIST OF EXPERIMENT
S.NO.
EXPERIMENTS
1.
2.
EXCEL ET- 8085AD1 8 bits Microprocessor Kit Description

Basic Commands of EXCEL ET- 8085AD1 8 bits Microprocessor
3.
4.
5.
Kit
Architecture or Functional Block Diagram of 8085
Instruction Set of 8085 Microprocessor
Program to add and subtract two 8 bits Hexadecimal numbers using
6.
7.
8.
8085 P
Program to add two 16 bits Hexadecimal numbers using 8085 P .
Write an ALP for addition of N 8 Bit numbers using 8085 P .
Program to separate one byte hexadecimal number into two nibbles
9.
and Combine two nibbles to form a byte using 8085 P.

Write a program to multiply two 8 bit numbers using shift and add
10.
method.
Write A program to arrange an array of n numbers in
11.
12.
13.
ascending/descending order.
Write an assembly language program to convert BCD to BINARY
Write an assembly language program to convert BINARY TO BCD
Write an ALP for addition and subtraction of two BCD numbers
15.
using 8085 P
Introduction to 8255 (PPI) IC
Write an ALP to interface the steppe motor with 8085 P
and control its movement
16.
17.
Write an ALP to interface a traffic light system using 8255 IC

Write an ALP to display 0-9 and 9-0 on seven segment display using
14.
8255 IC.
1. ABOUT EXCEL ET- 8085AD1 MICROPROCESSOR KIT
BRIEF INTRODUCTION
ET- 8085AD1 is Microprocessor training cum development kit designed around 8085 processor which
is still most popular in India. 8085 is a very versatile processor and it is easy for the students to
understand its architecture and assembly language programming. In India 8085 processor is still
considered the first step for the students to understand the Microprocessor Technology.
ET- 8085AD1 has been designed to provide ease in interaction with the microprocessor and
various peripheral chips. The processor communication with the outside world through 101
key keyboard and Liquid Crystal Displays. The system can also interact with the user through
CRT terminal or PC/XT/AT computer I/F. The system provides 16K / 32K bytes of EPROM
having the monitor program and 8K bytes of RAM areas. The system provides on board
Battery back up (optional) for the RAM Area. The total onboard memory can be expanded to
64K bytes through additional two memory mapping addresses.
The system has 24 I/O through 8255 PPI expandable to 48 I/O lines. It has three 16 bit Timer/Counter
using 8253. An interface for CRT terminal PC/XT/AT is provided through serial interface.
An optional Real Time Clock Interface is also provided on the board for the students to
understand the RTC.
The monitor of ET- 8085AD1 is very powerful and provides various software commands like
INSERT, DELETE, BLOCK MOVE, RELOCATE, STRING, FILL, MEMORY COMPARE etc.
These commands are very useful for software development around 8085.
All addresses, data and necessary control lines are brought out on 50 PIN FRC connector.
The students can use these lines for interfacing the kit to external hardware through the BUS.
1. SYSTEM SPECIFICATION (HARDWARE)
CPU
XTAL FREQUENCY
RAM
EPROM
MEMORY
TIMER
I/O LINES
SERIAL INTERFACE
OTHER INTERFACES
KEYBOARD
DISPLAY
BUS
POWER SUPPLY
REQUIREMENT
8 bit Microprocessor the 8085

6.144 MHz
8K Bytes with provision for expansion

Battery Back up for RAM (Optional)
16K/ 32K bytes of EPROM with the provision for
expansion
Total on board capacity of 64K bytes
Three 16 bit programmable counters using 8253
24 I/O lines using 8255 expandable to 48 I/O lines
RS232 through SID & SOD Lines
Real Time Clock (Optional)
IBM PC/ At compatible Keyboard

16* 2 LCD display (20* 2 LCD is optional)
ALL data address and control signal (TTL)
Available at 50 Pin FRC connector
( Optional)
+5V, 1.5Amp for the kit & Serial I/F

+/- 12V for Interfacing Modules (Optional)
OPERATING TEMP.
0 TO 50 C
2. SYATEM SPECIFICATION (SOFTWARE)

ET- 8085AD1 provides various software commands to achieve the following:
A) KEYBOARD MODE
1. Examine the contents of any memory location.
2. Examine/ Modify the contents of any of the up internal
register. 3. Modify the contents of any of the RAM location.
4. Move a Block of data from one location to another location.
5. Insert one or more instruction's in the user program.
6. Delete one or more instructions from the user program.

7. Relocate program written for some memory area to some other
memory area. 8. Find out a string of data lying at a particular address.
9. Fill a particular memory area with a
constant. 10. Compare two blocks of memory.
11. Insert one or more data bytes in the users program/ data
area. 12. Delete one or more data bytes from the users
program/ data area. 13. Execute a program at full clock speed.
14. Execute program in single step i .e. Instruction by instruction.
15. Assemble a program using Mnemonics of 8085 in RAM. 16.
Disassemble a program from RAM or EPROM Area.
B) SERIAL MODE
Most of the commands mentioned above can also be used in serial mode.
4. INRODUCTION TO HARDWARE
A) GENERAL
The system has got 8085 as Central Processing Unit. The clock frequency for the system is
3.07 MHz and is generated from a crystal of 6.144 MHz.
8085 has got 8 data lines and 16 address lines. The lower 8 address and 8 bit data lines are
multiplexed. Since the lower 8 address bits appear on the bus during the first clock cycle, it
becomes necessary to latch the lower 8 address bits during the first clock cycle so that the 16
bit address remains available in subsequent cycles. This is achieved using a latch 74-LS-273.
B) MEMORY
ET- 8085AD1 provides 8K bytes of RAM using 6264 chip and 16/ 32K bytes EPROM for
monitor using 27128 or 27257. There are two memory spaces on the board of ET- 8085AD1
for expansion. These spaces can be defined any address slot from 4000- DFFF depending
upon the size of memory chip to be used. The memory space MEM2 can be used to define
6264 (8K)/ 62256 (32K) where as MEM3 can be defined to have 2764/128/256 EPROM.
C) I/O DEVICES
ET- 8085AD1 Uses 8255, 8253 peripheral chips. The function of these chips is explained below.
i) 8255 ( PROGRAMMABLE PERIPHERAL INTERFACE )

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8255 is a programmable peripheral interface (PPI) designed to use with 8085 Microprocessor. This
basically act as a general purpose I/O device to interface with peripheral devices since the function
configuration of 8255 is programmed by the system software. It has got three input output ports of 8
lines each ( PORT- A, PORT- B, PORT- C). PORT C can be divided into two ports of 4 lines each
namely PORT C upper and PORT C lower. Any Input Output combination of PORT A, PORT B, PORT
C upper and PORT C lower can be defined using the appropriate software commands.
ii) 8253 ( PROGRAMMABLE INTERVAL TIMER)

This chip is a Programmable Interval Timer/ Counter and can be used for the generation of
accurate time delays under software control. Various other functions that can be implemented
with this chip are Programmable Rate Generator, Event Counter, Binary Rate Multiplier, Real
Time Clock etc. This chip has got three independent 26 bit counter each having a count rate of
2 KHz. The first timer counter ( i .e. Counter 0) is being used for Single Step Operation.
However its connections are also bought at connector space J3. For Single Step Operation
CLK0 signal of counter 0 is getting a clock frequency of 1.535 MHz Counter 1 & Counter 2 are
free for the user. Clock for the CLK1, CLK2 is to be given externally.
iii) REAL TIME CLOCK ( Optional )
An on Board Real Time Clock is available on the board to provide the Real Time Clock. This
chip is a serial chip which communicates with the Processor through 3 lines. The chip can be
programmed for the time setting of Hour, Minute and Second etc.
D) DISPLAY
ET- 8085AD1 provides 16*2 LCD Display. The Display Device has a Microcontroller sitting
inside it. The system can also optional 20*2 LCD Display.
E) BUFFERS
The kit has all the address, data and control lines being buffered and brought on the 50 Pin connector
to allow the user to further expand the system. The various study cards like 8255, 8257, 8253, 8279,
8251, 8259 etc. Available from Excel can be connected to this Bus. Apart from this, the students can
make their own circuits on the general purpose board and hook up these with the kit.
F) BATTERY BACK UP ( Optional)

An optional battery backup can be provided on the Board of the Kit. The user can select the
Battery Back Up for the RAM by a jumper JF9 as explained here. This jumper is available just
above the RAM. Jumper position for Battery Back Up is short 1 & 2.
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2 3
If you do not want Battery Back Up then short 2 & 3.
2. COMMAND DISCRIPTION
1. KEYBOARD DESCRIPTION
ET-8085AD3 uses an IBM PC/AT Compatible Keyboard and 16 * 2 LCD displays to
communicate with the outside world. On Demand a built in ASCII keyboard instead of IBM
keyboard can also be provided. As ET-8085AD1 is switched on, a message "EXCEL" ET8085AD1 is displayed on the 1st line of the display and #READY# is displayed on the 2nd line.
All commands are followed by a set of numeric parameters separated by '','' & '"space"
to work as delimiters
The ET-8085AD1 accepts all data and address in ASCII form.
2. LIST OF COMMANDS
1. M
2. L
3.. R
4. G
5. 1A
6. 1C
7. E
5. S
7. B
8. I
9. D
10. N
11. O
12. F
13. H
14. J
15. K
16. P
Examine/ Modify memory

List a memory block
Examine/Modify register
GO
Assemble
Disassemble
Enter a memory block
Single Step
Block Move
Insert
Delete
Insert Data
Delete Data
Fill
Relocate
Memory Compare
String
Print
COMMAND DISCRIPTION
RESET
This key initializes the Kit and displays "EXCEL ET -8085AD1 on the 1 st line and #Ready# on
the 2nd line of LCD display.
1. EXAMINE/MODIFY MEMORY (M)
Syntax
M(Starring Address <CR>
M command allows the users to examine the contents of any memory location and modify the
contents of a RAM area. On pressing this key, M_ is displayed on the upper left end of the LCD
display. One
can now enter the desired address of any location for changing the contents.Enter the
address and press<CR>, the system shows the present content of the address followed by a
_ . To modify the contents of the address displayed, type the new data and press <CR>.Press
SHIFTKEY and then 4 KEY to exit from the command mode.
EXAMPLE
To change the contents of 2000
location: M2000<CR>
2000 23-11 <CR> 46-22<CR> FF-23 <CR> 32-44 <CR> 12-<CR> SHIFT KEY and then 4
KEY.
Here we changed the contents of 2000 to 2003 whereas the content of 2004 remains as it is. For
seeing the previous address press _ KEY. It will show the previous address. In the example the data
23,46,FF,32,12 are taken only for example sake. The user may not find this data while following this
example.
LOCATION
2000
2001
2002
2003
OLD CONTENT
23
46
FF
32
NEW CONTENT
11
22
33
44
2. LIST A MEMORY BLOCK (L)

Syntax.
L (starting Address), (En Address) "SHIFT" KEY and then "4 KEY
L command allows the user to examine the contents of a block of memory. On pressing this
key,L- is displayed in the upper left end of LCD display. One can now enter the desired
address for examining the coments, Enter the starting address followed by a , ... And then
enter the ending address and then press "SHIFT" Key followed by a "4" Key "which is shown
in below example. This displays the contents of the memory areas on the LCD display. If we
want to see further, press <CR>, to exit from the command mode press <ESC>key.
Example
To examine the data from 2000 location to 2010 enter the following
L2000, 2010 SHIFT KEY and then 4 KEY
2000:
2004:
2008:
200C:
2010
11
23
44
56
EF
AB
DE
FF
45
76
90
5C
D6
0A
4C
88
63
SHIFTKEY and then 4 key
3. EXAMINE I MODIFY RESISTER (R)

Syntax
R (Resister identifier) <CR>"SHIFT' KEY an then "4" KEY.
R Command allows the user to examine/modify any internal register of the CPU. If one wants to
examine the contents of all registers, press key' R', it displays 'R_' on the upper left end of the
display. One can start from resister 'A' and examine all the registers by pressing <CR>.Whereas if
some specific register is to be examined, then the key for that register can be entered directly. The
content of any register can be changed. To exit from this command mode press "SHIFT" KEY and
then "4" KEY. The register identifiers for various CPU resisters are shown below:
Register Identifier
A
B
C
D
E
F
I
H
L
S
P
Registers
Register A
Register B
Register C
Resister D
Resister E
Flag Byte
Interrupt Mask
Register H
Register L
Stack Pointer MSB & LSB
Program counter MSB & LSB
Example
Examine the contents of A and B Register and change the content of C
Resister to 11. RA<CR>
A=55_ <CR>
B=87_<CR>
C=23_11 <CR>
On pressing the R key, R _ is displayed on the LCD display. Enter the resister identifier A,
contents of Register A is displayed. Press <CR> key to see the contents of B register. Press
<CR>, the contents of C register is displayed .Enter 11 and press <CR>.
Now terminate the command by pressing SHIFT KEY and Then 4 KEY.
4. GO COMMAND (G)
G (Startin Address) "SHIFT" KEY and then "4" KEY
G Command allows the user to execute the program in full clock speed. On pressing this key,
the program counter contents are displayed. Enter the starting address 'of the program and
press "SHIFT" KEY and then "4" KEY. The CPU will start executing the program.
Example
Execute the program from 2000 location. G2000 "SHIFT" KEY and then "4" KEY
5. ASSEMBLE (1A)
1 command followed by A allows the user to assemble the program in 8085 mnemonics
Syntax
1A<starting address of RAM where you want to assemble> <CR>
Press 1 key. The system displays a
message A= Assemble Mode
C= disassemble Mode.
Press the A key. The ET-8085AD3 come into the assembler mode and asks for the RAM
address. This should be the starting address of the program where you want to assemble the
program.after entering the starting address, press <CR> key; the kit displays the entered
starting address in the upper line of the display. It is now waiting for Mnemonics entry.
6. DISASSEMBLE (1C)
1 command followed by C allows the user to disassemble the program in 8085 mnemonics
Syntax
1C< starting address>,<end address> <CR>
C command disassembles the program as specified by the starting address and end address. In case one
wants to proceed further, press <CR> key, otherwise <Esc> key will exit from the disassemble mode. In
case of disassemble; the two addresses can also be separated by a " , " instead of a space bar.
7. ENTER A MEMORY BLOCK (E)

Syntax
E (Starting Address) <CR>
E Command allows the user to modify the content of any memory location of a RAM area. On
pressing this key, E_.' is displayed on the upper left end of the display. One can now enter the
desired address of any location for changing the contents. Enter the address and press <CR
> . Press "SHIFT" KEY and then "4" KEY to exit from this command mode.
EXAMPLE
Enter the data AA, BB, CC, DD, and EE in location 2000
0nward E2000 <CR>
2000: AA <CR> BB <CR> CC <CR> DD <CR> EE "SHIFT" KEY and then "4"
KEY The memory contents are shown below:
2000 AA BB CC DD EE
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8. SINGLE INSTRUCTION (S)

Syntax
S (starting Address <CR>
S Command allows the user to execute the program instruction by instruction. On pressing
key 'S', the kit displays 'S -' on the upper left end of the display. If one wants to modify the
address one can do that. After entering the address press <CR>. The content of the entered
address is displayed. On pressing <CR> key, one instruction will be executed and the address
of the next will be displayed with its contents. Each time <CR> key is pressed, one instruction
is executed. To exit from this mode, press "SHIFT" KEY and then 4 KEY.
Example
The following program is to be executed in single step instruction mode:
Address
Op Code
Instruction
2000
21 50 20
LXI H, 2050
2003
3E 45
MVI A, 45
2005
47
MOV B, A
2008
77
MOV M, A
Execute the program as follows:
S2000 <CR>
2000: 21 <CR> 2003:3E <CR> 2005:47 <CR>
If one wants to execute further, press <CR>, otherwise press "SHI.FT" KEY and then "4" KEY.
9. BLOCK MOVE COMMAND (B)
Syntax
B (Starting Address), (Endin Address), (Destination Address) "SHIFT" KE and the "4" KEY
B Command allows user to move the block of data from one memory location to the another memory
location. On pressing this key, . B -' is displayed. Enter the starting address followed by a "," and then
enter the ending address of the block to be moved again followed by a "," and then enter the starting
address where you want to shift your data and press "SHIFT" KEY and then "4" KEY.
Example
Move the block of data laying at 2000 2010 to 2300.
B, 2000, 2010, 2300 "SHIFT" KEY and then "4" KEY
Verify that the program has moved to 2300 using Examine Memory command.
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10. DELETE COMMAND (D)

Syntax
D (Starting Address of the program),(Endin Address of th program),(Startin Address from
where th data to be deleted),(Endin Address til where the dat t b deleted) SHIFT
KEY and then 4 KEY.
D Command allows the user to delete one or more instructions from the user program. In this
command all the memory referenced instruction also get modified accordingly to keep the
logic of the program same .On pressing this command D_ is displayed. Enter the starting
address of the program, press , and then the end of the program. Press , and now enter
the starting address from starting address from where the bytes are to be deleted. Press ","
and then the end address till where the bytes are to be deleted and then press "SHIFT" KEY
and then "4" KEY. When this format is entered 'ET-8085AD3' is displayed.
Example
Enter the Simple Program for hexadecimal additions of two numbers. Delete two bytes of the
program from 2006 to 2007.
D2000, 200B, 2006, 2007 "SHIFT" KEY and then " 4 KEY
Verify that the program from 2006 to 2007 has been deleted by using Examine Memory command
11. INSERT COMMAND (I)

Syntax
I (starting Address),(Endin Address) (Address from where the bytes to be entered), (no. of
bytes), (data) SHIFT KEY and then 4 KEY
I Command allow the user to insert one or more instruction in the users program with
automatics modification of the memory referenced instructions. On pressing this command,
I_ is displayed Enter the Starting address of the program followed by , and then the End
address of the program followed by , . Now enter the no. of bytes to be added followed by
, . Now enter the required data bytes (two bytes should be separated by a , )and press
SHIFT KEY and then 4 KEY after entering the required data .It will show ET-8085 AD3.
EXAMPLE
Enter the two bytes of data deleted in above example
I 2000, 2009, 2006, 2, 2E, 23 SHIFT KEY and then 4 KEY
Verify that the bytes have been inserted in the program Examine Memory Command
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2
DELETE DATA (O)

This command has same function as explained in the DELETE command except that the
relocation of memory referenced instructions is not done.
INSERT DATA (N)
This command has the same function as explained in the INSERT command except that the
relocation of the memory referenced is not done.
12. FILL (F)
Syntax
F (Starting Address of area), (Ending Address of area), (Data to be filled) "SHIFT" KEY and
then "4" KEY
F Command allows the user to fill a memory area with a constant. On pressing this command
'F -' is displayed Enter the Starting address of the memory address from where the user want
to fill and press , .Now the Ending Address of the memory area till where the constant data
should be filled and press " ." Now enter the constant with which the filling should be done i .e.
any data and press "SHIFT" KEY and then "4" KEY
EXAMPLE
Fill the RAM area from 2000 to 2010 with 11
F 2000, 2010, XX-11 SHIFT KEY and then 4 KEY
Verify that the memory area from 20000 to 2010 is filled with constant data 11 by using
Examine Memory command.
13. RELOCATE (H)
Syntax
H (Startin Address), (Ending Address), (Destination Address) SHIFT KEY and then 4 KEY.
H command allows the user to relocate the program from one memory area to another memory
area. The relocate command is somewhat different from Block Move command. This can be said
to be the intelligent mode of Block Move command i .e. if the user wants to execute a program
from a different RAM area, this command will set the program as required. This can be
understood clearly after working with the example given below. On pressing this key H is
displayed. Enter the Starting address followed by , and then end address of the block to be
moved. Press , and then enter the destination followed by "SHIFT KEY and then "4" KEY.
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EXAMPLE
Relocate the program lying from 2000- 200B to 2100. The Program lying in 2000 is given below:
Address
Op Code
Instruction
2000
11 50 20
LXI D, 2050
2003
3E 27
MVI A, 27
2005
21 70 20
LXI H, 2070
2008
77
MOV M, A
2009
C3 03 20
JMP 2003
The above example is executed for RAM area 2000. If the user want to execute this program
from 2100, it is not possible because the loop instruction is lying at 2009. If the instruction
lying in 2009 is changed by JMP 2103 Then the program will become execuable from 2100.
For that user has to use the relocate command. This will change the instruction accordingly.
14. Memory compare (J)
Syntax
J (STARTING Address of the first block), (End address of the first block), (starting Address
of the second block) SHIFT KEY and then 4 KEY.
J command allows the user to compare two block of memory for equality. If they are not equal the
address of the first block at which there is a difference will be displayed. On pressing this
command J _ is displayed. Enter the starting address of the first block and press , followed by
the end address of the first block. Now press , followed by the starting address of the second
block and then press SHIFT KEY and then 4 KEY. This command can be used to verify.
BLOCK MOVE COMMAND
EXAMPLE
Enter the following data using Examine Memory
command: 2000- 00 2001- 11 2002- 22 2003- 33
2004- 44 2005- 55 2006- 66 2007- 77 2008- 88 200999
Now block move this program to 2100 and then verify using the memory compare command
as follows:
J2000, 2009, 2100 SHIFT KEY and then 4 KEY.
If two block are identical. ET-8085AD3 is displayed, if there is any difference it will show the
address where first difference is lying. Press <CR> to see the next address where there is
difference. If there is no other difference, it will shows ET-8085AD3
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1
4
15. STRING (K)

Syntax
K command allows the user to find the address at which a particular data is lying within a
specified program. The word string here means a few bytes of data lying consecutively one after
another. On pressing this command K is displayed. Enter the starting address of the program
followed by , and then the end address of the program. Now press , followed by the starting
address where the first byte of string is lying and then press , followed by the address of the
location at which last byte of string is lying and press SHIFT KEY and then 4 KEY.
16. PRINT (P)

Syntax
P (starting address), (Ending address) SHIFT KEY and then 4 KEY.
P command allows the user to print the content of a block of memory on printer. On pressing this key
p_ is displayed in the upper left end of the display. Enter the starting address of the program followed
by , and then the end address of the program followed by SHIFT KEY and then 4 KEY.
Before pressing the SHIFT KEY and then 4 KEY. Please ensure that the printer is ON.
EXAMPLE
Print the data from memory location 2000 to 2010
P2000, 2010 SHIFT KEY and then 4 KEY.
2000: 11 22 33 44 55 66 77 88 99 00 AA BB CC DD
EE FF 2010: 10
Note: The data shown in above example is arbitrary. The data printed will be the data lying at
the given address.
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3. ARCHITECHTURE or FUNCTIONAL BLOCK DIAGRAM OF 8085
The functional block diagram or architechture of 8085 Microprocessor is very important as it gives the
complete details about a Microprocessor. Fig. shows the Block diagram of a Microprocessor.
8085 Bus Structure:
Address Bus:
The address bus is a group of 16 lines generally identified as A0 to A15.
The address bus is unidirectional: bits flow in one direction-from the MPU to
peripheral devices.
The MPU uses the address bus to perform the first function: identifying a
peripheral or a memory location.
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Data Bus:
The data bus is a group of eight lines used for data flow.
These lines are bi-directional - data flow in both directions between the MPU and
memory and peripheral devices.
The MPU uses the data bus to perform the second function: transferring binary information.
The eight data lines enable the MPU to manipulate 8-bit data ranging from 00 to FF
(28 = 256 numbers).
The largest number that can appear on the data bus is 11111111.
Control Bus:
The control bus carries synchronization signals and providing timing signals.
The MPU generates specific control signals for every operation it performs. These
signals are used to identify a device type with which the MPU wants to communicate.
Registers of 8085:
The 8085 have six general-purpose registers to store 8-bit data during program execution.
These registers are identified as B, C, D, E, H, and L .
They can be combined as register pairs-BC, DE, and HL-to perform some 16-bit operations.
Accumulator (A):
The accumulator is an 8-bit register that is part of the arithmetic/logic unit (ALU).
This register is used to store 8-bit data and to perform arithmetic and logical operations.
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The result of an operation is stored in the accumulator.
Flags:
The ALU includes five flip-flops that are set or reset according to the result of an operation.
The microprocessor uses the flags for testing the data conditions.
They are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags.
The most commonly used flags are Sign, Zero, and Carry.
The bit position for the flags in flag register is,
1. Sign Flag (S):

After execution of any arithmetic and logical operation, if D7 of the result is 1, the sign
flag is set. Otherwise it is reset.
D7 is reserved for indicating the sign; the remaining is the magnitude of number.
If D7 is 1, the number will be viewed as negative number. If D7 is 0, the number will be
viewed as positive number.
2. Zero Flag (z):
If the result of arithmetic and logical operation is zero, then zero flag is set otherwise it is reset.
3. Auxiliary Carry Flag (AC):
If D3 generates any carry when doing any arithmetic and logical operation, this
flag is set. Otherwise it is reset.
4. Parity Flag (P):
If the result of arithmetic and logical operation contains even number of 1's then this flag
will be set and if it is odd number of 1's it will be reset.
5. Carry Flag (CY):
If any arithmetic and logical operation result any carry then carry flag is set otherwise it is reset.
Arithmetic and Logic Unit (ALU):
It is used to perform the arithmetic operations like addition, subtraction, multiplication,

division, increment and decrement and logical operations like AND, OR and EX-OR.
It receives the data from accumulator and registers.
According to the result it set or reset the flags.
Program Counter (PC):
17
This 16-bit register sequencing the execution of instructions.

It is a memory pointer. Memory locations have 16-bit addresses, and that is why this
is a 16-bit register.
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The function of the program counter is to point to the memory address of the next
instruction to be executed.
When an opcode is being fetched, the program counter is incremented by one to
point to the next memory location.
Stack Pointer (SP):
The stack pointer is also a 16-bit register used as a memory pointer.

It points to a memory location in R/W memory, called the stack.
The beginning of the stack is defined by loading a 16-bit address in the stack pointer (register).
Temporary Register:
It is used to hold the data during the arithmetic and logical operations.
Instruction Register:
When an instruction is fetched from the memory, it is loaded in the instruction register.
Instruction Decoder:
It gets the instruction from the instruction register and decodes the instruction. It
identifies the instruction to be performed.
Serial I/O Control:
It has two control signals named SID and SOD for serial data transmission.
Timing and Control unit:
It has three control signals ALE, RD (Active low) and WR (Active low) and three status
signals IO/M (Active low), S0 and S1.
ALE is used for provide control signal to synchronize the components of
microprocessor and timing for instruction to perform the operation.
RD (Active low) and WR (Active low) are used to indicate whether the operation is
reading the data from memory or writing the data into memory respectively.
IO/M(Active low) is used to indicate whether the operation is belongs to the
memory or peripherals.
If,
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Interrupt Control Unit:
19
It receives hardware interrupt signals and sends an acknowledgement for receiving

the interrupt signal.
20
4. Instruction Set of 8085 Microprocessor

DATA TRANSFER INSTRUCTIONS
Opcode Operand
MOV
MVI
LDA
LDAX
Rd, Rs
M, Rs
Rd, M
Explanation of
Description
Instructio This instruction copies the

n
contents of the source register
into the destination register; the
contents of the source register
Copy from are not altered. If one of the
source(Rs) to operands is a memory location,
destination(Rd)its location is specified by the
contents of the HL registers.
Example: MOV B, C or MOV B,
M
The 8-bit data is stored in the

destination register or memory. If the
Rd, data Move immediate
operand is a memory location, its
M, data
8-bit
location is specified by the contents of
the HL registers.
Example: MVI B, 57H or MVI

M, 57H
The contents of a memory
16-bit
location, specified by a 16-bit
address Load accumulator
address in the operand, are
copied to the accumulator. The
contents of the source are not
altered.
Example: LDA 2034H
The
contents
of the designated
B/D Reg. Load accumulator
pair
indirect register pair point to a memory
location. This instruction copies the
contents of that memory location
into the accumulator.
The contents of either the register
pair or the memory location are not
altered.
Example: LDAX B
LXI
LHLD
Reg. pair, Load register pair

16-bit
immediate
data
16-bit
address
Load H and L
registers direct
The instruction loads 16-bit data in

the register pair designated in the
operand.
the memory location pointed out by the

16-bit address into register L and
copies the contents of the next
E xample: LXI H, 2034H or LXI memory location into register H. The
contents of source memory locations
H,
are not altered.
XYZ
The instruction copies the contents of
Example: LHLD 2040H
20
none
16bit
STA
16-bit address
addr
ess
XTHL
Store accumulator indirect
none
STAX Reg.
pair
Store H and L registers direct
SHLD
bit
address
16Exchange H and L
with D and E
XCHG
Copy H and L registers to the stack

pointer
none
Exchange H and L
SPHL
with top of stack
21
The
conte
nts of
the
accum
ulator
are
copied
into
the
memo
ry
locatio
n
specifi
ed by
the
opera
nd.
This is
a 3byte
instruc
tion,
the
secon
d byte
specifi
es the
loworder
addre
ss and
the
third
byte
specifi
es the
highorder
addre
ss.
Exam
ple:
STA
21
Th
e
con
ten
ts
of
the
acc
um
ulat
or
are
cop
ied
into
the
me
mo
ry
loc
atio
n
spe
cifi
ed
by
the
con
ten
ts
of
the
op
era
nd
(re
gist
er
pai
r).
Th
e
con
ten
4350 ts of the accumulator are not

altered.
H
Example: STAX B
The contents of register L are
stored into the memory location
specified by the 16-bit address in
the operand and the contents of
H register are stored into the
next memory location by
incrementing the operand. The
contents of registers HL are not
altered. This is a 3-byte
instruction, the second byte
specifies the low-order address
and the third byte specifies the
high-order address.
Example: SHLD 2470H

The contents of register H are
exchanged with the contents of
register D, and the contents of
register L are exchanged with the
contents of register E.
Example: XCHG
The instruction loads the
contents of the H and L
registers into
the stack pointer register, the
contents of the H register
provide the high-order
address and the contents of
the L register provide the
low-order address. The
contents of the H
and L registers are not altered.
Example: SPHL
The contents of the L
register are exchanged with
the stack location pointed
out by the contents of the
stack pointer register. The
contents of the H register
are exchanged with the next
stack location (SP+1);
however, the contents of the
stack pointer register are
not altered.
22
Example: XTHL
PUSH
POP
The contents of the register pair

designated in the operand are
copied onto the stack in the
Reg. pair Push register pair
following sequence. The stack
onto stack
pointer register is decremented
and the contents of the
highorder register (B, D, H, A)
are copied into that location. The
stack pointer register is
decremented again and the
contents of the low-order
register (C, E, L, flags) are
copied to that location.
Reg. pair Pop off stack to Example: PUSH B or PUSH A

The contents of the memory
register pair
location pointed out by the
stack pointer register are
copied to the low-order register
(C, E, L, status flags) of the
operand. The stack pointer is
incremented by 1 and the
contents of that memory
location are copied to the highorder register (B, D, H, A) of
the operand. The stack pointer
register is again incremented
by 1.
8-bit port
OUT
addres
s
8-bit port
IN
addres
s
Output data
from
accumulator to
a port with 8-bit
address
Input data to
accumulator
from a port
with 8-bit
address
Example: POP H or POP A

The contents of the accumulator
are copied into the I/O port
specified by the operand.
Example: OUT F8H
The contents of the input port
designated in the operand are
read and loaded into the
accumulator.
Example: IN 8CH
22
23
ARITHMETIC INSTRUCTIONS
Explanation
of
Opcode
Operand
Instructio
n
R
ADD
Add register
or memory,
to
accumulat
or
R
ADC
ADI
data
Add register
to
accumulat
or
with
carry
8-bit
Add
immediate to
accumulator
ACI 8-bit
data
Reg.
pair, LXI 16bit
data
Add
immediate to
accumulator
with carry
Load
DAD
pair
Reg.
register pair
immediate
Add
register pair to H and L registers
D
e
s
c
r
i
p
ti
o
n
The contents
of the operand
(register or
memory) are
added to the
contents of the
accumulator
and the result
is stored in the
accumulator. If
the operand is
a memory
location, its
location is
specified by
the contents of
the HL
registers. All
flags are
modified to
reflect the
result of
the
addition.
Exam
ple:
ADD
B or
ADD
M
The
contents of
the operand
(register or
memory)
and M the
Carry flag
are added to
the contents
of the
accumulator
and the
result is
stored in the
accumulator.
If the
operand is a
memory
location, its
location is
specified by
the contents
of the HL
registers. All flags are modified to

reflect the result of the addition.
Example: ADC B or ADC M
The 8-bit data (operand) is
added to the contents of the
accumulator and the result is
stored in the accumulator. All
flags are modified to reflect the
result of the addition.
Example: ADI 45H
The 8-bit data (operand) and the
Carry flag are added to the
contents of the accumulator and
the result is stored in the
accumulator. All flags are
modified to reflect the result of the
addition.
Example: ACI 45H
The instruction loads 16-bit data in
the register pair designated in the
operand. E xample: LXI H, 2034H
or LXI H, XYZ
The 16-bit contents of the specified
register pair are added to the
contents of the HL register and the
sum is stored in the HL register.
The contents of the source register
pair are not altered. If the result is
larger than 16 bits, the CY flag is
set. No other flags are affected.
Example: DAD H
23
R
SUB
R
INR
SUI
8-bit
data
R
SBB
SBI
8-bit data
24 ubtracted from the
T
h
Subtract register e
or memory from
c
accumulator
o
n
t
e
n
t
s
Subtract
o
source and f
borrow from t
accumulator h
e
o
p
e
Subtract
r
immediate from
a
accumulator
n
d
Subtract
immediate from
accumulator
with borrow
(
r
e
g
i
s
t
Increment
e
register
or
r
memory by 1 o
r
m
e
m
o
r
y
)
a
r
e
s
contents of the
accumulator, and the result
is stored in the
accumulator. If the operand
is a memory location, its
location is specified by the
contents of the HL
registers. All flags are
modified to reflect the
result of the subtraction.
Example: SUB B or SUB M
The contents of the
operand (register or
memory ) and M the
Borrow flag are subtracted
from the contents of the
accumulator and the result
is placed in the
accumulator. If the
operand is a memory
location, its location is
specified by the contents
of the HL registers. All
flags are modified to reflect
the result of the
subtraction.
Example: SBB B or SBB M
The 8-bit data (operand) is
subtracted from the
contents of the accumulator
and the result is stored in
the accumulator. All flags
are modified to reflect the
result of the subtraction.
Example: SUI 45H
The contents of register H are
exchanged with the contents
of register D, and the contents
of register L are exchanged
with the contents of register
E.
Example: XCHG
The contents of the
designated register or
memory) are incremented
by 1 and the result is stored
in the same place. If the
oper
and
is a
me
location, its location is

specified by the contents of
the HL registers.
Example: INR B or INR M
The contents of the designated
Increme register pair are incremented by 1
nt INX R register pair by
and the result is stored in the
1
same place.
Example: INX H
Decrem The contents of the designated
ent
register or memory are M
DCR
m
o
r
y
register or
memory
by 1
decremented by 1 and the result is

stored in the same place. If the
operand is a memory location, its
location is specified by the contents of
the HL
24
25
registers.
Example: DCR B or DCR M
The contents of the
De
designated register pair are
crement DCX R register
decremented by 1 and the
pair by
result is stored in the same
1
place.
Example: DCX H
The contents of the
accumulator are changed
from a binary value to two 4bit binary coded decimal
(BCD) digits. This is the only
instruction that uses the
auxiliary flag to perform the
Decimalbinary
adjustto BCD conversion,
DAA
none
and the conversion
accumulator
procedure is described
below. S, Z, AC, P, CY flags
are altered to reflect the
results of the operation.
If the value of the low-order
4-bits in the accumulator is
greater than 9 or if AC flag
is set, the instruction adds
6 to the low-order four bits.
If the value of the highorder 4-bits in the
accumulator is greater
than 9 or if the Carry flag
is set, the instruction adds
6 to the high-
25
order four bits.

Example: DAA
26
BRANCHING INSTRUCTIONS
Explanati
on of
Opcode
Operand
Description
The program
sequence is
transferred to the
memory location
16-bit
Jump
specified by the 16JMP
bit address given in
address unconditionally
the operand.
Example: JMP
2034H or
JMP XYZ
Flag
Opcode Description Status
Jump on
CY =
JC
Carry
1
Jump on no CY =
JNC
Carry
0
Jump on
The program
JP
S=0
sequence is
positive
transferred to the
Jump on
JM
S = 116-bit
Jump memory location
minus
specified by the 16address conditionally
Jump on
bit address given in
JZ
Z=1
zero
the operand based
Instruction
JNZ
JPE
JPO
Flag
Opcode Description Status
Call on
CY =
CC
Carry
1
Call on no CY =
CNC Carry
0
Call on
CP
S=0
positive
Call on
CM
S=1
minus
26
on the specified flag

of the PSW as
described below.
Jump on no Z = 0
zero
Jump on
parity even P = 1
Jump on
P=0
parity odd
Example: JZ
2034H or
JZ XYZ
16-bit
address
The program sequence is

transferred to the
memory location
specified by the 16-bit
address given in the
Unconditional operand. Before the
subroutine call transfer, the address of
the next instruction after
CALL (the contents of
the program counter) is
pushed onto the stack.
Example: CALL 2034H
27
CZ
CNZ
CPE
CPO
Call on zero Z = 1
Call on no
Z=0
zero
Call on
parity even P = 1
Call on
parity odd P = 0
RET
Opcode Description
RC
RNC
RP
RM
RZ
RNZ
RPE
RPO
Return on
Carry
Return on
no Carry
Return on
positive
Return on
minus
Return on
zero
Return on
no zero
Return on
parity even
Return on
parity odd
PCHL
none
Status
CY =
1
CY =
0
S=0
S=1
none
Z=1
Z=0
P=1
P=0
or CALL
XYZ

transferred from the
subroutine to the calling
program. The two bytes
Return from from the top of the stack
subroutine are copied into the
unconditionally program counter,and
program execution
begins at the new
address.
Example: RET

transferred from the
subroutine to the calling
program based on the
specified flag of the PSW
Return from as described below. The
subroutine two bytes from the top of
conditionally the stack are copied into
the program counter, and
program execution
begins at the new
address.
Example: RZ
none
27
Load program The contents of registers

counter with H and L are copied into
HL contents the program counter. The
contents of H are placed
28
as the high-order byte

and the contents of L
as the low-order byte.
Example: PCHL
The RST instruction is
equivalent to a 1-byte
call instruction to one of
eight memory locations
depending upon the
number. The instructions
are generally used in
conjunction with
interrupts and inserted
using external hardware.
However these can be
used as software
instructions in a program
to transfer program
execution to one of the
eight locations. The
addresses are:
RST
0-7
Restart
Instruction Restart
Address
RST 0
0000H
RST1
0008H
RST 2
0010H
RST 3
0018H
RST 4
0020H
RST 5
0028H
RST 6
0030H
RST 7
0038H
The 8085 has four
additional interrupts and
these interrupts generate
RST instructions
internally and thus do not
require any external
hardware. These
instructions and their
Restart addresses are:
Restart
Interrupt Address
TRAP 0024H
28
29
RST 5.5 002CH

RST 6.5 0034H
RST 7.5 003CH
29
30
LOGICAL INSTRUCTIONS
Explanation of
Opcode Operand
R
CMP
Description
Instruction
Compare register or memory with

accumulator
Compare immediate with

accumulator
8bi
t
CPI
d
at
a
R
ANA
Logical AND register or memory

with accumulator
Logical
AND
accumulator
immediate
with
M
Exclusive OR register or memory
with accumulator
8-bit
ANI
d
at
a
R
XRA
The
contents of
the
operand
(register or
memory)
are M
compared
with the
contents of
the
accumulat
or. Both
contents
are
preserved
. The
result of
the
compariso
n is shown
by setting
the flags of
the PSW
as follows:
if
(A)
<
(re
g/m
em
):
car
ry
flag
is
set
if
(A)
=
(re
g/
me
m):
zer
o
fla
g is
set
remain unchanged. The result of the

comparison is shown by setting the
flags of the PSW as follows:
if (A) < data: carry flag
is set if (A) = data:
zero flag is set
if (A) > data: carry and zero flags

are reset
Example: CPI 89H
The contents of the accumulator are
logically ANDed with M the contents
if (A) >
of the operand (register or memory),
(reg/mem) and the result is placed in the
: carry
accumulator. If the operand is a
and zero
memory location, its address is
flags are
specified by the contents of HL
reset
registers. S, Z, P are modified to
Exa reflect the result of the operation. CY
mple is reset. AC is set.
:
Example: ANA B or ANA
CMP
M
B or
CMP The contents of the
accumulator are logically
M
ANDed with the
The
8-bit data (operand) and the
second
result is placed in the
byte (8-bit
accumulator. S, Z, P are
data)
is
modified to reflect the result of
compared
the
with
the
operation. CY is reset. AC is set.
contents of
Example: ANI 86H
the
accumulat
or.
The
values
being
compared
The contents of the accumulator are

Exclusive ORed with M the contents of
the operand (register or memory), and
the result is placed in the accumulator.
If the operand is a memory location, its
address is specified
30
ORI
X
RI
O
R
A
RLC
RRC
ne
R
AL
8bit
Exclusive
OR
accumulator
immediate
with
da
ta
Logical OR register or memory with
accumulator
R
M
8-
Logical OR immediate with

accumulator
Rotate accumulator left
bit
da
ta
no
ne
no
ne
no
Rotate accumulator right
Rotate accumulator left through

carry
31
b
y
t
h
e
c
o
n
t
e
n
t
s
o
f
H
L
r
e
g
i
s
t
e
r
s
.
S
,
Z
,
P
a
r
e
m
o
d
i
f
i
e
d
t
o
r
e
f
l
e
c
t
A
C
a
r
e
r
e
s
e
t
.
Exa
mpl
e:
XR
AB
or
XR
AM
t
h
e
r
e
s
u
l
t
o
f
t
h
e
o
p
e
r
a
t
i
o
n
.
C
Y
a
n
d
are Exclusive ORed with

the 8-bit data (operand)
and the result is placed in
the accumulator. S, Z, P
are modified to reflect the
result of the operation. CY
and AC are reset.
Example: XRI 86H
T
h
e
c
o
n
t
e
n
t
s
o
f
The contents of the

ORed with M the contents of
the operand (register or
memory), and the result is
placed in the accumulator. If
the operand is a memory
location, its address is
specified by the contents of HL
registers. S, Z, P are modified
to reflect the result of the
operation. CY and AC are
reset.
Example: ORA B or ORA M

The contents of the
ORed with the 8-bit data
(operand) and the result is
placed in the accumulator. S,
Z, P are modified to reflect the
result of the operation. CY and
AC are reset.
Example: ORI 86H

Each
binary
bit
of
the
accumulator is rotated left by
one position. Bit D7 is placed in
the position of D0 as well as in
the Carry flag.
t
h
e
CY is modified according to
bit D7. S, Z, P, AC are not
affected.
Example: RLC
a
c
c
u
m
u
l
a
t
o
r
Each
binary
bit
of
the
accumulator is rotated right by
one position. Bit D0 is placed in
the position of D7 as well as in
the Carry flag.
CY is modified according to
bit D0. S, Z, P, AC are not
affected.
Example: RRC
Each binary bit of the
accumulator is rotated left by
o
n
e
i
t
i
o
n
p
o
s
h
r
o
u
g
h
t
he Carry flag. Bit D7 is placed

in the Carry flag, and the Carry
flag is placed in the least
significant position D0. CY is
modified according to bit D7.
S, Z, P, AC are not affected.
Example: RAL
31
32
RAR
none
CMA
none
CMC
none
STC
none
Each binary bit of the

accumulator is rotated right by
Rotate
one position through the
accumulator
Carry flag. Bit D0 is placed in
right through
the Carry flag, and the Carry
carry
flag is placed in the most
significant position D7. CY is
modified according to bit D0.
Complement
S, Z, P, AC are not affected.
accumulator
Example: RAR
The contents of the

Complement
accumulator are
carry
complemented. No
flags are affected.
Set Carry
Example: CMA
The Carry flag is
complemented. No other
flags are affected.
Example: CMC
Set Carry
Example: STC
32
33
CONTROL INSTRUCTIONS
SIM
Opcode
Operand
NOP
none
HLT
none
DI
none
EI
none
RIM
none
none
necessary to reenable the interrupts (except TRAP).

Example: EI
of
Descrip
This is a multipurpose instruction used to read the
tion
status of interrupts 7.5, 6.5, 5.5 and read serial data
Instruction
input bit. The instruction loads eight bits in the
No operation isaccumulator
performed. The
with
instruction
the following
is fetched
interpretations.
No
Example:
RIM
is executed.
operation and decoded. However no operation
Read
Halt and Theinterrupt
CPU finishes executing the current instruction
masany further execution. An interrupt or reset
enter wait and halts
is necessary to exit from the halt state.
state
Explanation
Disable
interrupts
Enable
interrupts
33
The interrupt enable flip-flop is reset and all the

interrupts except the TRAP are disabled. No flags are
affected.
This is a multipurpose instruction
and used
to is set and all interrupts
The interrupt enable
flip-flop
are enabled.implement
No flagsthe
are
affected.
a system
8085
interruptsAfter
7.5, 6.5,
5.5, and
Set interrupt
serial data output. The
instruction
interprets
reset or the acknowledgement
of
an
interrupt,
the
the accumulator
mask
interrupt enable flipflop is reset, thus disabling the
contents as follows.
interrupts. This instruction is
Example: SIM
34
Experiment No. 5 (a)

Aim: To perform (i) addition and (ii) subtraction of two 8 bit numbers using 8085
microprocessor and get the result in hexadecimal.
Apparatu Used: ET- 8085AD1, Qwerty Keyboard
Program:
MEMORY
ADDRESS
LABEL
MNEMONICS
MNEMONICS
COMMENTS
(in
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
START
LXI
H, 3000
Get address of 1st no. in HL
pair
Move 1st no. in accumulator
2003
MOV
A, M
2004
INX
HL points the address 3001H
2005
MOV
B, M
Move 2nd no. in register B
2006
ADD
Add the 2nd no.
2007
INX
HL points 3002H
2008
MOV
M, A
Store result in 3002H
2009
RST
Interrupt
200A
OBSERVATION:
INPUT DATA:
END
END
Terminate
3000 05H
3001 05H
OUTPUT DATA:
3002 0AH
RESULT: Thus the program to add two 8 Bit numbers was executed.
34
35
Experiment No. 5 (b)

Aim: To perform (i) addition and (ii subtraction of two 8 bit numbers using 8085
microprocessor and get the result in hexadecimal.
Apparatu Used: ET- 8085AD1 8 bits Microprocessor kit, Qwerty
Keyboard Program:
MEMORY
ADDRESS
LABEL
MNEMONICS
MNEMONICS
COMMENTS
(in
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
START
LXI
H, 3000
Get address of 1st no. in HL
pair
st
Move 1 no. in accumulator
2003
MOV
A, M
2004
INX
HL points the address 3001H
2005
MOV
B, M
Move 2nd no. in register B
2006
SUB
Subtract the 2nd no.
2007
INX
HL points 3002H
2008
MOV
M, A
2009
RST
Interrupt
200A
OBSERVATION:
INPUT DATA:
END
END
3000 0AH
3001 03H
OUTPUT DATA:
3002 07H
RESULT: Thus the program to subtract two 8 Bit numbers executed.
35
Terminate
36
Experiment No. 6
Aim: To perform addition of two 16 bit numbers using 8085
microprocessor. Apparatu Used: 8085AD1 8 bits Microprocessor kit,
Qwerty Keyboard Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2003
XCHG
2004
LHLD
3002
2007
MVI
C, 00
2009
DAD
Load HL pair with 1st

operand from 3000H
Exchange HL pair with
DE pair
Load HL pair with 2nd
operand from 3002h
Initialize addition register
C with 00 to store carry
after 16 bit addition
Add DE pair with HL pair
200A
JNC
200E
If no carry, Move to 200E
200D
INR
If Carry, Increment C
200E
SHLD
3004
2011
MOV
A,C
2012
STA
3006
Store the result at address

3004H
Move carry to
accumulator
Store carry at 3006
200B
RST
Interrupt
2000
200C
OBSERVATION:
INPUT DATA:
START
END
LHLD
3000
END
3000 16 H
3001 5A H
3002 9A H
3003 7C H
OUTPUT DATA:
3004 B0 H
3005 76 H
3006 01 H
RESULT: Thus the program to add two 16 Bit numbers was executed.
36
Terminate
37
Experiment No. 7
Aim: Write an assembly language program for addition of N 8 Bit
numbers. Apparatu Used: 8085AD1 8 bits Microprocessor kit,
Qwerty Keyboard Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
COMMENTS
LXI
H, 3000
2003
MOV
B, M
Load HL pair with 1st

operand from 3000H
Move Count to B
2004
XRA
Clear Accumulator
INX
2006
ADD
Increment Memory
Pointer to store N
numbers
Add M with Accumulator
2007
DCR
Decrement Count
JNZ
2005
STA
3050
Jump to location 2005

until count=0
Store Result at 3050
Interrupt
2000
2005
2008
START
Loop Start
Loop End
200B
200B
200C
OBSERVATION
INPUT DATA:
END
3000 4 H
3001 3 H
3002 4 H
3003 1 H
3004 2 H
OUTPUT DATA:
3050 A H
RESULT: Thus the program to add N 8 - Bit numbers was executed.
37
Terminate
38
Experiment No. 8(i)

Aim: Write an assembly language program to
(i) Separate a byte into two nibbles and
(ii) Combine two nibbles to form a byte
Apparatu Used: 8085AD1 8 bits Microprocessor kit, Qwerty Keyboard
Program:
OBSERVATION:
INPUT DATA:
OUTPUT DATA:
200C
RRC
200D
RRC
200E
STA
200E
200F
END
3001
Store result at 3001H
Interrupt
Terminate
2200H 2A H
3000 0A H
3001 02 H
RESULT: Thus the program to separate a byte into two nibbles was executed.
38
39
Experiment No. 8(ii)

Aim: Write an assembly language program to
(i) Separate a byte into two nibbles and
(ii) Combine two nibbles to form a byte
Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
2003
START
LXI
MOV
H, 3000
A, M
Get 1ST number

Move number to register
B
Left shift content of Acc.
Increment memory
pointer
Logically ORed with acc.
2004
RLC
2005
RLC
2006
RLC
2007
RLC
2008
INX
2009
ORA
200A
STA
3050
Store result at 3050H
200E
RST
Interrupt
200F
OBSERVATION:
INPUT DATA:
END
END
Terminate
3000H 0A H
3001 H 02 H
OUTPUT DATA:
3050 2A H
RESULT: Thus the program to combine two nibbles to form a byte was executed.
39
40
Experiment No. 9
Aim: Write a program to multiply two 8 bit numbers using shift and add
method. Apparatu Used: 8085AD1 8 bits Microprocessor kit, Qwerty
Keyboard Program:
MEMORY
ADDRESS
MNEMONICS
MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
START
2003
2004
LHLD
3000
XCHG
MOV
A, D
2005
MVI
D, 00H
2007
LXI
H, 0000H
200A
MVI
B, 08H
Set up register B to count

eight rotation
Check if multiplier bit is 1
If not, skip adding
multiplicand
If multiplier is 1, add
multiplicand to HL &
place partial result in HL
Place multiplicand in HL
200C
MLTPLY
Place contents of 3000 in L

register & contents of 3001
in H register
Place multiplier in D and
multiplicand in E
Transfer multiplier to
accumulator
Clear D to use in DAD
instruction
Clear HL
NXTBIT
RAR
200D
JNC
NOADD
2010
DAD
2011
NOADD
XCHG
2012
DAD
And shift left
2013
XCHG
DCR
2015
JNZ
NXTBIT
Retrieve shifted
multiplicand
One operation is complete,
decrement counter
Go back to next bit
2014
2018
SHLD
3500
201E
RST
201F
INPUT DATA:
OUTPUT DATA:
END
END
Store the product in

locations 3500H & 3501H
Interrupt
Terminate
3000H 06H, 3001H 08 H

3500 H 30 H, 3501 H 00 H
RESULT: Thus the program to arrange N numbers of arrays in ascending order has
been performed.
40
41
Experiment No. 10(i)

Aim: Write a program to arrange an array of n numbers in ascending/descending
order. Apparatu Used: 8085AD1 8 bits Microprocessor kit, Qwerty Keyboard
Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
START
LXI
H, 2500
Address for count
MOV
C, M
Count for number of

passes in register C
LXI
H, 2500
2007
MOV
D, M
2008
INX
2009
MOV
A, M
INX
1st number in
Accumulator
Address of next number
200B
MOV
B, M
Next number in register B
200C
CMP
200D
JNC
AHEAD
Compare next number

with previous number
If previous number is >
next number, go to
AHEAD
2010
DCX
2011
MOV
M, A
2012
MOV
A, B
2013
JMP
GO
DCX
MOV
M, B
INX
2019
DCR
201A
JNZ
LOOP
2003
2004
200A
2016
BACK
LOOP
AHEAD
2017
2018
GO
Count for number of

comparisons in register D
Place smaller of the two

compared number in
memory
Place greater of the two
numbers in accumulator

compared number in
memory
Decrease the count for
comparisons
41
42
201D
MOV
M, A
201E
DCR
201F
JNZ
BACK
2022
RST
2023
INPUT DATA:
END
END
Place the greatest number

after a pass in the memory
passes
Interrupt
Terminate
2500H Count (04H)

2501 H 60H
2502 H 40 H
2503 H 50 H
2504 H 15 H
2505h -- 25H
OUTPUT DATA:
2501 H 15H
2502 H 25 H
2503 H 40 H
2504 H 50 H
2505h -- 60H
RESULT: Thus the program to arrange N numbers of arrays in ascending order has
been performed.
42
43

(a) Aim: Write a program to arrange an array of n numbers in ascending/descending
order. Apparatu Used: 8085AD1 8 bits Microprocessor kit, Qwerty Keyboard
Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
START
LXI
H, 2500
Address for count
MOV
C, M
Count for number of

passes in register C
LXI
H, 2500
2007
MOV
D, M
2008
INX
2009
MOV
A, M
INX
1st number in
Accumulator
Address of next number
200B
MOV
B, M
Next number in register B
200C
CMP
200D
JC
AHEAD
Compare next number

with previous number
If previous number is >
next number, go to
AHEAD
2010
DCX
2011
MOV
M, A
2012
MOV
A, B
2013
JMP
GO
DCX
MOV
M, B
INX
2019
DCR
201A
JNZ
LOOP
2003
2004
200A
2016
BACK
LOOP
AHEAD
2017
2018
GO
Count for number of

comparisons in register D

compared number in
memory
Place greater of the two
numbers in accumulator

compared number in
memory
comparisons
43
44
201D
MOV
M, A
201E
DCR
201F
JNZ
BACK
2022
RST
2023
INPUT DATA:
END
END
Place the greatest number

after a pass in the memory
passes
Interrupt
Terminate
2500H Count (04H)

2501 H 60H
2502 H 40 H
2503 H 50 H
2504 H 15 H
2505h -- 25H
OUTPUT DATA:
2501 H 60H
2502 H 50 H
2503 H 40 H
2504 H 25 H
2505h -- 15H
RESULT: Thus the program to arrange N numbers of arrays in descending order has
been performed.
44
45
Experiment No. 11
Aim: Write an assembly language program to convert BCD to BINARY
Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
LXI
H, 3000
2003
MOV
A, M
2004
MOV
B, A
2005
ANI
0FH
2007
MOV
C, A
Point HL index to the

3000H memory location
where BCD number is
stored
Get BCD number in
Accumulator
Save BCD number in
register B
Mask most significant four
bits
Save unpacked BCD1 in C
2008
MOV
A, B
Get BCD again
200A
ANI
FOH
Mask least significant four

bits
200B
RRC
200C
RRC
200D
RRC
200E
RRC
200F
MOV
D, A
Save BCD2 in D
2010
XRA
Clear accumulator
2012
MVI
E, 0AH
Set E as multiplier of 10
ADD
Add 10 until (D)= 0
2014
DCR
Reduce BCD2 by one
2017
JNZ
SUM
2018
ADD
Is multiplication
complete?
If not, go back and add
agin
Add BCD1
200E
STA
2013
45
START
SUM
Convert most significant

four bits into unpacked
BCD2
3500
46
RST
200E
END
END
Interrupt
Terminate
INPUT DATA:
3000H 72 H
OUTPUT DATA:
3500 H 48 H
RESULT: Thus the program to convert a BCD number to Binary Number executed.
46
47
Experiment No. 12
Aim: Write an assembly language program to convert BINARY TO BCD
Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
LXI
SP, 2200
Initialize stack pointer
2003
LXI
H, 3000
2004
MOV
A, M
Point HL index where

binary number is stored
Transfer byte
2007
LXI
H, 3500
2009
MVI
B, 64H
Point HL index to output

buffer memory
Load 100 in register B
200C
CALL
BINBCD
Call conversion
200E
MVI
B, 0AH
Load 100 in register B
2011
CALL
BINBCD
2012
MOV
M, A
Store BCD1
2013
RST
Interrupt
2014
START
END
END
Terminate
SUBROUTINE
2500
BINBCD
MVI
M, FFH
Load buffer with (0-1)
2502
NXTBUF
INR
2503
SUB
2504
JNC
NXTBUF
2507
ADD
2508
INX
Clear buffer & increment

for each subtraction
Subtract power of 10 from
binary number
Is number > power of 10?
If yes, add 1 to buffer
memory
If no, add power of 10 to
get back remainder
Go to next buffer location
2509
RET
Return to main program
END
Terminate
250A
47
END
48
INPUT DATA:
OUTPUT DATA:
3000H 48 H
3500 H 00 H
3501 H 07 H
3502 H 02 H
RESULT: Thus the program to convert a Binary Number to BCD Number executed.
48
49
Experiment No. 13(i)

Aim: Write an assembly language program for
(i) BCD addition
(ii) BCD subtraction
Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
MVI
A, 20H
2002
MVI
B, 15H
2004
ADD
2005
DAA
2006
STA
3000
2009
RST
Interrupt
200A
INPUT DATA:
OUTPUT DATA:
49
START
END
2001 H 20 H
2002 H 15 H
3000 H 35 H
END
Move immediate 20h data

in accumulator
in register B
Add content of register B
with accumulator content
Decimal adjustment
Terminate
50

Aim: Write an assembly language program for
(i) BCD addition
(ii) BCD subtraction
Program:
MEMORY
ADDRESS
MNEMONICS MNEMONICS
COMMENTS
(in
LABEL
(OPERATOR)
(OPERAND)
Hexadecimal)
2000
MVI
B, 20H
2002
MVI
C, 15H
2004
MVI
A, 99H
2006
SUB
2007
INR
2008
ADD
2009
DAA
200A
STA
3000
200D
RST
Interrupt
200E
INPUT DATA:
OUTPUT DATA:
50
START
END
2001 H 20 H
2002 H 15 H
3000 H 05 H
END

in register B
in register C
Place 99 in accumulator
99's complement of 2nd
number
100's complement of 2nd
number
Add 1st number and 100's
complement of 2nd
number
Decimal adjustment
Terminate
5
1
14. Intel 8255
The Intel 8255 (or i8255) Programmable Peripheral Interface chip is a peripheral chip
originally developed for the Intel 8085 microprocessor, and as such is a member of a large
array of such chips, known as the MCS-85 Family. This chip was later also used with the Intel
8086 and its descendants. It was later made (cloned) by many other manufacturers. It is
made in DIP 40 and PLCC 44 pins encapsulated versions.
This chip is used to give the CPU access to programmable parallel I/O, and is similar to other such
chips like the Motorola 6520 PIA (Peripheral Interface Adapter) the MOS Technology 6522 (Versatile
Interface Adapter) and the MOS Technology CIA (Complex Interface Adapter) all developed for the
6502 family. Other such chips are the 2655 Programmable Peripheral Interface from the Signetics
2650 family of microprocessors, the 6820 PIO (Peripheral Input/Output) from the Motorola 6800 family,
the Western Design Center WDC 65C21, an enhanced 6520, and many others.
The 8255 is widely used not only in many microcomputer/microcontroller systems especially Z
-80 based, home computers such as SV-328 and all MSX, but also in the system board of the
best known original IBM-PC, PC/XT, PC/jr, etc. and clones, along with numerous homebuilt
computer computers such as the N8VEM.
51
5
2
However, most often the functionality the 8255 offered is now not implemented with the 8255 chip
itself anymore, but is embedded in a larger VLSI chip as a sub function. The 8255 chip itself is still
made, and is sometimes used together with a micro controller to expand its I/O capabilities.
Functional block of 8255

The 8255 has 24 input/output pins in all. These are divided into three 8-bit ports. Port A and
port B can be used as 8-bit input/output ports. Port C can be used as an 8-bit input/output port
or as two 4-bit input/output ports or to produce handshake signals for ports A and B.
The three ports are further grouped as follows:
1. Group A consisting of port A and upper part of port C.
2. Group B consisting of port B and lower part of port C.
Eight data lines (D0 - D7) are available (with an 8-bit data buffer) to read/write data into the
ports or control register under the status of the " RD" (pin 5) and WR" (pin 36), which are
active low signals for read and write operations respectively. The address lines A1 and A0
allow to successively access any one of the ports or the control register as listed below:
A1 A0 Function
0 0
port A
0 1
port B
1 0
port C
control
1 1
register
The control signal "' CS " (pin 6) is used to enable the 8255 chip. It is an active low signal, i.e., when
CS = '0' , the 8255 is enabled. The RESET input (pin 35) is connected to a system (like 8085, 8086,
etc. ) reset line so that when the system is reset, all the ports are initialized as input lines. This is done
to prevent 8255 and/or any peripheral connected to it, from being destroyed due to mismatch of ports.
This is explained as follows. Suppose an input device is connected to 8255 at port A. If from the
previous operation, port A is initialized as an output port and if 8255 is not reset before using the
current configuration, then there is a possibility of damage of either the input device connected or 8255
or both since both 8255 and the device connected will be sending out data.
The control register or the control logic or the command word register is an 8-bit register used
to select the modes of operation and input/output designation of the ports.
Operational modes of 8255

There are two main operational modes of
8255: 1. Input/output mode
2. Bit set/reset mode
1. Input/output mode
There are three types of the input/output mode which are as
follows: Mode 0
In this mode, the ports can be used for simple input/output operations without handshaking. If
both port A and B are initialized in mode 0, the two halves of port C can be either used together as
an additional 8-bit port, or they can be used as individual 4-bit ports. Since the two halves of port
C are independent, they may be used such that one-half is initialized as an input port while the
other half is initialized as an output port. The input/output features in mode 0 are as follows:
1. O/p are latched.
52
5
3
2. I/p are buffered not latched.

3. Port do not have handshake or interrupt
capability. Mode 1
When we wish to use port A or port B for handshake (strobed) input or output operation, we
initialise that port in mode 1 (port A and port B can be initilalised to operate in different modes,
i .e., for e .g., port A can operate in mode 0 and port B in mode 1). Some of the pins of port C
function as handshake lines.
For port B in this mode (irrespective of whether is acting as an input port or output port), PC0,
PC1 and PC2 pins function as handshake lines.
If port A is initialized as mode 1 input port, then, PC3, PC4 and PC5 function as handshake
signals. Pins PC6 and PC7 are available for use as input/output lines.
The mode 1 which supports handshaking has following features:
1. Two ports i .e. port A and B can be use as 8-bit i/o port.
2. Each port uses three lines of port c as handshake signal and remaining two signals can
be function as i/o port.
3. Interrupt logic is supported.
4. Input and Output data are
latched. Mode 2
Only group A can be initialised in this mode. Port A can be used for bidirectional handshake data
transfer. This means that data can be input or output on the same eight lines (PA0 - PA7). Pins PC3 PC7 are used as handshake lines for port A. The remaining pins of port C (PC0 - PC2) can be used as
input/output lines if group B is initialized in mode 0. In this mode, the 8255 may be used to extend the
system bus to a slave microprocessor or to transfer data bytes to and from a floppy disk controller.
Control word format

Input/output mode format
The figure shows the control word format in the input/output mode. This mode is
selected by making D7 = '1' .
D0, D1, D3, D4 are for lower port C, port B, upper port C and port A respectively. When
D0 or D1 or D3 or D4 are "SET", the corresponding ports act as input ports. For e .g., if D0 =
D4 = '1', then lower port C and port A act as input ports. If these bits are "RESET", then the
corresponding ports act as output ports. For e .g., if D1 = D3 = '0', then port B and upper port
C act as output ports.
D2 is used for mode selection for group B (Port B and Lower Port C). When D2 = '0',
mode 0 is selected and when D2 = '1', mode 1 is selected.
D5, D6 are used for mode selection for group A (Upper Port C and Port A). The format
is as follows:
mod
D6 D5 e
0 0 0
0 1 1
1 x 2
Example: If port B and upper port C have to be initialised as input ports and lower port C and
port A as ouput ports (all in mode 0), what is the control word?
1. Since it is an input/ouput mode, D7 = '1'.
2. Mode selection bits, D2, D5, D6 are all '0' for mode 0 operation.
53
5
4
3. Port B should operate as input port, hence, D1 = '1'.

4. Upper port C should also be an input port, hence, D3 =
'1'. 5. Port A has to operate output port, hence, D4 = '0'.
6. Lower port C should also operate as output port, hence, D0 = '0'.
Applying the corresponding values to the format in input/output mode, we get the control word as "8A
(hex)"
2. Bit set/reset (BSR) mode
In this mode only port B can be used (as an output port). Each line of port C (PC0 - PC7) can be
set/reset by suitably loading the command word register.no effect occurs in input-output mode. The
individual bits of port c can be set or reset by sending the signal OUT instruction to the control register.
Control word format

BSR mode format
The figure shows the control word format in BSR mode. This mode is selected by making
D7='0'.
D0 is used for bit set/reset. When D0= '1', the port C bit selected (selection of a port C
bit is shown in the next point) is SET, when D0 = '0', the port C bit is RESET.
D1, D2, D3 are used to select a particular port C bit whose value may be altered using
D0 bit as mentioned above. The selection of the port C bits are done as follows:
Bit/pin of port C
D3 D2 D1
selected
0 0
0
PC0
0 0
1
PC1
0 1
0
PC2
0 1
1
PC3
1 0
0
PC4
1 0
1
PC5
1 1
0
PC6
1 1
1
PC7
D4, D5, D6 are not used.
54
55
Experiment No. 15
Aim: Write an ALP to interface the stepper motor with 8085 P and control its
movement Apparatu Used: 8085AD1 8 bits Microprocessor kit, Qwerty Keyboard,
stepper motor interfacing kit and power supply.
Circui Diagram:
PA0
PA3
PA1
PA2
Por Addresse :
Port/ Control Word Register
A
B
C
Control Word Register
Program:
MEMORY
ADDRESS
(in
Hexadecimal)
Port Addresses/ Control Word Register

Address
00
01
02
03
MNEMONICS
(OPERAND)
COMMENTS
LABEL
MNEMONICS
(OPERATOR)
START
LXI
SP, 3000H
Initialize ports of 8255
2003
MVI
A, 80H
Get Control word for 8255
2005
OUT
03
MVI
A, 03
Initialize winding A & B
OUT
00
Out to Port A
200B
CALL
SUBROUTINE
200E
MVI
A, 06
Initialize winding B & C
2010
OUT
00
Out to Port A
2013
CALL
SUBROUTINE
2000
2007
2009
LOOP
55
56
2015
MVI
A, 0C
2017
OUT
00
Out to Port A
CALL
SUBROUTINE
MVI
A, 09
OUT
00
Out to Port A
2020
CALL
SUBROUTINE
2023
JMP
LOOP
2024
RST
201A
END
201B
201D
NXTBUF
2025
END
END
Terminate
DELAY SUBROUTINE
2500
SUBROUTINE
LXI
D, 1111H
2503
CALL
03A6
2504
RET
Return to main program
END
Terminate
END
ADDRESS
2007
200E
2015
201B
56
FORWARD MOTION
03H
06H
0CH
09H
Count= 1111H
REVERSE MOTION
09H
0CH
06H
03H
57
Experiment No. 16
Aim: Write an ALP to interface a traffic light system using 8255 IC
Apparatu Used: 8085AD1 8 bits Microprocessor kit, Qwerty Keyboard, Traffic Light
interfacing kit and power supply.
PA2
G
Circui Diagram:
PA1
Y
PA0
N
PC6
PC5
PC4
PC0
PC1
Y
PC2
G
S
PA4
R
PA5
Y
PA6
G
Por Addresse :

Addres
s
00
01
02
03
A
B
C
Program:
MEMORY
ADDRESS
(in
Hexadecimal)
MNEMONICS
(OPERATOR)
MNEMONICS
(OPERAND)
COMMENTS
LABEL
START
LXI
SP, 3000H
2003
MVI
A, 80H
Get Control word for 8255
2005
OUT
03
MVI
A, 11
For Red Light
2000
2007
LOOP
57
58
2008
OUT
00
Red on North & South
200A
MVI
A, 44
For Green Light
200C
OUT
02
Green on East & West
201E
CALL
DELAY
2011
MVI
A, 22
For Yellow Light
2013
OUT
00
Yellow on North & South
2015
OUT
02
Yellow on East & West
2017
CALL
DELAY
201A
MVI
A, 11
For Red Light
201C
OUT
02
Red on East & West
201E
MVI
A, 44
For Green Light
2020
OUT
00
Green on North & South
2022
CALL
DELAY
2025
MVI
A, 22
For Yellow Light
2027
OUT
00
Yellow on North & South
2029
OUT
02
Yellow on East & West
202B
CALL
DELAY
202E
JMP
LOOP
2030
RST
2031
END
END
Interrupt
Terminate
DELAY SUBROUTINE
2500
58
MVI
B, 20
Count = 20, in register B
2502
GO3
MVI
C, FF
Count = FF, in register C
2504
GO2
MVI
D, FF
Count = FF, in register D
2506
GO1
DCR
Decrement register D
2507
JNZ
GO1
Till zero
250A
DCR
Decrement register C
250B
JNZ
GO2
Till zero
250E
DCR
Decrement register B
59
250F
JNZ
2512
RET
Interrupt
END
Terminate
2513
59
END
G03
Till zero
60
Experiment No. 17
Aim: Write an ALP to display 0-9 and 9-0 on seven segment display using 8255 IC .
Apparatu Used: 8085AD1 8 bits Microprocessor kit, Qwerty Keyboard, 7 Segment
Display and power supply.
Circui Diagram:
Por Addresse :

Address
00
01
02
03
A
B
C
Program:
MEMORY
ADDRESS
(in
Hexadecimal)
MNEMONICS
(OPERAND)
COMMENTS
LABEL
MNEMONICS
(OPERATOR)
START
LXI
SP, 3000H
Stack Initialize
2003
MVI
A, 80H
Get control word
2005
OUT
03
Initialize ports
LXI
H, 3500H
Get Count
MOV
E, M
Count in register E
INX
200C
MOV
A, M
Get next number
201E
OUT
01
Output at Port B
2000
2007
ABOVE
2008
200A
LOOP
60
61
2011
CALL
DELAY
2013
DCR
Decrement count
2015
JNZ
LOOP
201A
JMP
ABOVE
Go to LOOP to get next

number
Go to ABOVE to re-start
201E
RST
Interrupt
201F
END
END
Terminate
DELAY SUBROUTINE
2500
B, 20
2502
GO3
MVI
C, FF
2504
GO2
MVI
D, FF
2506
GO1
DCR
2507
JNZ
GO1
Till zero
250A
DCR
250B
JNZ
GO2
Till zero
250E
DCR
250F
JNZ
G03
Till zero
2512
RET
Interrupt
END
Terminate
2513
61
MVI
END
62
Experiment No. 18
Aim: Write an ALP to interface a seven segment display using 8255 IC with microprocessor and
make an up and down counter .

Apparatu Used: 8085AD1 8 bits Microprocessor kit, Qwerty Keyboard, 7 Segment
Display and power supply.
Circui Diagram:
Por Addresse :

Address
00
01
02
03
A
B
C
Seven Segment He Table
Character
g
0
1
2
3
4
5
6
7
8
9
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
0
0
0
0
1
1
1
0
1
1
1
0
1
0
0
0
1
0
1
0
1
0
1
1
0
1
1
0
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
a
1
0
1
1
0
1
1
1
1
1
62
Hexadecimal
Code
3F
06
5B
4F
66
6D
7D
07
7F
6F
63
Program:
MEMORY
ADDRESS
(in
Hexadecimal)
MNEMONICS
(OPERAND)
COMMENTS
LABEL
MNEMONICS
(OPERATOR)
START
LXI
SP, 3000H
Stack Initialize
2003
MVI
A, 80H
Get control word
2005
OUT
03
Initialize ports
2005
LXI
H, 2500H
2007
LXI
D, 2509H
200A
MVI
B, 10
Memory address for

starting number
Memory address for last
number
Load count
MOV
A, M
1st number in accumulator
201E
OUT
01
Output at Port B
2013
XCHG
2015
MOV
A, M
201A
OUT
00
Exchange HL pair data

with DE pair
Last number in
accumulator
Output at Port A
201E
XCHG
201A
INX
Exchange HL pair data

with DE pair
Increment in HL pair
201E
DCX
Decrement in DE pair
201A
PUSH
201E
CALL
SUBROUTINE
201A
POP
201E
DCR
201A
JNZ
LOOP
201E
RST
2000
200C
201F
LOOP
END
END
Decrement count
Interrupt
Terminate
DELAY SUBROUTINE
2500
2502
GO3
MVI
B, 20
MVI
C, FF
63
64
2504
GO2
MVI
D, FF
2506
DCR
2507
JNZ
GO1
Till zero
250A
DCR
250B
JNZ
GO2
Till zero
250E
DCR
250F
JNZ
G03
Till zero
2512
RET
Interrupt
END
Terminate
2513
64
GO1
END
6
5
19. VIVA BASED QUESTIONS

1.What are the various registers in 8085?
Ans: - Accumulator register, Temporary register, Instruction register, Stack Pointer, Program
Counter are the various registers in 8085 .
2.In 8085 name the 16 bit registers?
Ans:- Stack pointer and Program counter all have 16 bits.
3.What are the various flags used in 8085?
Ans:- Sign flag, Zero flag, Auxillary flag, Parity flag, Carry flag.
4.What is Stack Pointer?
Ans:- Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the
address of the top of the stack.
5.What is Program counter?
Ans:- Program counter holds the address of either the first byte of the next instruction to be
fetched for execution or the address of the next byte of a multi byte instruction, which has not
been completely fetched. In both the cases it gets incremented automatically one by one as the
instruction bytes get fetched. Also Program register keeps the address of the next instruction.
6.Which Stack is used in 8085?
Ans:- LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored
information can be retrieved first.
7.What happens when HLT instruction is executed in processor?
Ans:- The Micro Processor enters into Halt-State and the buses are tri-stated.
8.What is meant by a bus?
Ans:- A bus is a group of conducting lines that carriers data, address, & control signals.
9.What is Tri-state logic?
Ans:- Three Logic Levels are used and they are High, Low, High impedance state. The high
and low are normal logic levels & high impedance state is electrical open circuit conditions.
Tri-state logic has a third line called enable line.
10.Give an example of one address microprocessor?
Ans:- 8085 is a one address microprocessor.
11.In what way interrupts are classified in 8085?

Ans:- In 8085 the interrupts are classified as Hardware and Software interrupts.
12.What are Hardware interrupts?
Ans:- TRAP, RST7.5, RST6.5, RST5.5, INTR.
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13.What are Software interrupts?

Ans:- RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.
14.Which interrupt has the highest priority?
Ans:- TRAP has the highest priority.
15.Name 5 different addressing modes?

Ans:- Immediate, Direct, Register, Register indirect, Implied addressing modes.
16.How many interrupts are there in 8085?
Ans:- There are 12 interrupts in 8085.
17.What is clock frequency for 8085?

Ans:- 3 MHz is the maximum clock frequency for 8085.
18.What is the RST for the TRAP?
Ans:- RST 4.5 is called as TRAP.
19.In 8085 which is called as High order / Low order Register?

Ans:- Flag is called as Low order register & Accumulator is called as High order Register.
20.What are input & output devices?
Ans:- Keyboards, Floppy disk are the examples of input devices. Printer, LED / LCD display,
CRT Monitor are the examples of output devices.
21.Can an RC circuit be used as clock source for 8085?
Ans:- Yes, it can be used, if an accurate clock frequency is not required. Also, the component
cost is low compared to LC or Crystal.
22.Why crystal is a preferred clock source?
Ans:- Because of high stability, large Q (Quality Factor) & the frequency that doesn t drift with
aging. Crystal is used as a clock source most of the times.
23.Which interrupt is not level-sensitive in 8085?
Ans:- RST 7.5 is a raising edge-triggering interrupt.
24.What does Quality factor mean?

Ans:- The Quality factor is also defined, as Q. So it is a number, which reflects the lossness of
a circuit. Higher the Q, the lower are the losses.
25.What are level-triggering interrupt?
Ans:- RST 6.5 & RST 5.5 are level-triggering interrupts.
26.What is meant by Maskable interrupts?
Ans:- An interrupt that can be turned off by the programmer is known as Maskable interrupt.
27.What is Non-Maskable interrupts?
Ans:- An interrupt which can be never be turned off (ie.disabled) is known as Non-Maskable interrupt.
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67
28.Which interrupts are generally used for critical events?

Ans:- Non-Maskable interrupts are used in critical events. Such as Power failure, Emergency,
Shut off etc.,
29.Give examples for Maskable interrupts?
Ans:- RST 7.5, RST6.5, RST5.5 are Maskable interrupts
30.Give example for Non-Maskable interrupts?
Ans:- Trap is known as Non-Maskable interrupts, which is used in emergency condition.
1. What is Microprocessor? Give the power supply & clock frequency of 8085?
Ans:A microprocessor is a multipurpose, programmable logic device that reads binary
instructions from a storage device called memory accepts binary data as input and processes
data according to those instructions and provides result as output. The power supply of 8085
is +5V and clock frequency in 3MHz.
2. List few applications of microprocessorbased system. Ans: It is used:
i . For measurements, display and control of current, voltage, temperature,
pressure, etc. ii . For traffic control and industrial tool control.
Iii. For speed control of machines.
3. What are the functions of an accumulator?
Ans:The accumulator is the register associated with the ALU operations and sometimes I/O
operations. It is an integral part of ALU. It holds one of data to be processed by ALU. It also
temporarily stores the result of the operation performed by the ALU.
4. List
the
16
bit
registers
of
8085
microprocessor. Ans:Stack pointer (SP) and

Program counter (PC).
5. List the allowed register pairs of 8085.

Ans:
B-C register pair
D-E register pair
H-L register pair
11. List out the five categories of the 8085 instructions. Give examples of the
instructions for each group.
Ans:
Data transfer group MOV, MVI, LXI.
Arithmetic group ADD, SUB, INR.
Logical group ANA, XRA, CMP.
Branch group JMP, JNZ, CALL.
Stack I/O and Machine control group PUSH, POP, IN, HLT.
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12. Explain the difference between a JMP instruction and CALL instruction.
Ans: A JMP instruction permanently changes the program counter. A CALL instruction leaves
information on the stack so that the original program execution sequence can be resumed.
13. Explain the purpose of the I/O instructions IN and OUT.
Ans: The IN instruction is used to move data from an I/O port into the accumulator. The OUT
instruction is used to move data from the accumulator to an I/O port. The IN & OUT instructions
are used only on microprocessor, which use a separate address space for interfacing.
14. What is the difference between the shift and rotate instructions?
Ans: A rotate instruction is a closed loop instruction. That is, the data moved out at one end is put
back in at the other end. The shift instruction loses the data that is moved out of the last bit locations.
15. How many address lines in a 4096 x 8

EPROM CHIP? Ans: 12 address lines.
16. What are the Control signals used for DMA
operation? Ans:-HOLD & HLDA.
17. What is meant by Wait State?
Ans:-This state is used by slow peripheral devices. The peripheral devices can transfer the
data to or from the microprocessor by using READY input line. The microprocessor remains in
wait state as long as READY line is low. During the wait state, the contents of the address,
address/data and control buses are held constant.
18. List the four instructions which control the interrupt structure of the 8085
microprocessor. Ans:DI ( Disable Interrupts )
EI ( Enable Interrupts )
RIM ( Read Interrupt Masks )
SIM ( Set Interrupt Masks )
19. What is meant by polling?

Ans:-Polling or device polling is a process which identifies the device that has interrupted the
microprocessor.
20. What is meant by interrupt?
Ans:-Interrupt is an external signal that causes a microprocessor to jump to a specific subroutine.
21. Explain priority interrupts of 8085.
Ans:-The 8085 microprocessor has five interrupt inputs. They are TRAP, RST 7.5, RST 6.5, RST 5.5,
and INTR. These interrupts have a fixed priority of interrupt service. If two or more interrupts go high at
the same time, the 8085 will service them on priority basis. The TRAP has the highest priority followed
by RST 7.5, RST 6.5, RST 5.5. The priority of interrupts in 8085 is shown in the table.
TRAP
RST 7.5
RST 6.5
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1
2
3
6
9
RST 5.5
INTR
31. How many machine cycles does 8085 have, mention

them Ans:The 8085 have seven machine cycles. They are
Opcode fetch
Memory read
Memory write
I/O read
I/O write
Interrupt acknowledge
Bus idle
32. Explain the signals HOLD, READY and SID

Ans:HOLD indicates that a peripheral such as DMA controller is requesting the use of address bus,
data bus and control bus. READY is used to delay the microprocessor read or write cycles until a slow
responding peripheral is ready to send or accept data.SID is used to accept serial data bit by bit
33. Mention the categories of instruction and give two examples for each category.
Ans:The instructions of 8085 can be categorized into the following five categories
Data transfer Instructions -MOV Rd,Rs STA 16-bit
-ADD R DCR M
Arithmetic Instructions
Logical
Instructions
-XRI
8-bit RAR
-JNZ CALL 16-bit

Branching Instructions
Machine control Instructions -HLT NOP
34. Explain LDA, STA and DAA instructions

Ans:LDA copies the data byte into accumulator from the memory location specified by the 16-bit
address. STA copies the data byte from the accumulator in the memory location specified by 16bit address. DAA changes the contents of the accumulator from binary to 4-bit BCD digits.
35. Explain the different instruction formats with examples
Ans:The instruction set is grouped into the following formats
One byte instruction -MOV C,A
Two byte instruction -MVI A,39H
Three byte instruction -JMP 2345H
36. What is the use of addressing modes, mention the different types
Ans:The various formats of specifying the operands are called addressing modes, it is used
to access the operands or data. The different types are as follows
Immediate addressing
Register addressing
Direct addressing
Indirect addressing
Implicit addressing
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37. What is the use of bi-directional buffers?

Ans:It is used to increase the driving capacity of the data bus. The data bus of a microcomputer
system is bi-directional, so it requires a buffer that allows the data to flow in both directions.
38. Give the register organization of
8085 Ans:
W(8)
Z(8)
B(8)
C(8)
D(8)
E(8)
H(8)
L(8)
Stack Pointer
Program
Counter
Temp.
Reg
Temp.
Reg
Register
Register
Register
Register
Register
Register
(16)
(16)
39. Define stack and explain stack related instructions

Ans:The stack is a group of memory locations in the R/W memory that is used for the
temporary storage of binary information during the execution of the program. The stack
related instructions are PUSH & POP
40. Why do we use XRA A instruction
Ans:The XRA A instruction is used to clear the contents of the Accumulator and store the value 00H.
41. Compare CALL and PUSH

instructions Ans:
CALL
PUSH
1.When CALL is executed the microprocessor 1.PUSH The programmer uses the instruction
automatically stores the 16-bit address of the to save the contents of the register pair on
the stack 2. When PUSH is executed the
instruction next to CALL on the stack.
2.When CALL is executed the stack pointer is stack pointer is decremented by two
decremented by two
42. What is Microcontroller and Microcomputer
Ans:Microcontroller is a device that includes microprocessor; memory and I/O signal lines on
a single chip, fabricated using VLSI technology. Microcomputer is a computer that is designed
using microprocessor as its CPU. It includes microprocessor, memory and I/O.
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43. Define Flags

Ans: The flags are used to reflect the data conditions in the accumulator. The 8085 flags are S-Sign
flag, Z -Zero flag, AC-Auxiliary carry flag, P-Parity flag, CYCarry flag, D7 D6 D5 D4 D3 D2 D1 D0
44. How does the microprocessor differentiate between data and instruction?
Ans:When the first m/c code of an instruction is fetched and decoded in the instruction
register, the microprocessor recognizes the number of bytes required to fetch the entire
instruction. For example MVI A, Data, the second byte is always considered as data. If the
data byte is omitted by mistake whatever is in that memory location will be considered as data
& the byte after the data will be treated as the next instruction.
45. Compare RET and POP
Ans:
RET
POP
1.RET
transfers
the1.POP transfers the contents of
contents of the top two the top two locations of the
locations of the stack to the stack to the specified register
PC
pair
2.When RET is executed2. When POP is executed the SP
the SP is incremented byis incremented by two
two
3.No conditional
POP
3.Has
8 conditionalinstructions
RETURN instructions
46. What is assembler?

Ans:The assembler translates the assembly language program text which is given as input to
the assembler to their binary equivalents known as object code. The time required to translate
the assembly code to object code is called access time. The assembler checks for syntax
errors & displays them before giving the object code.
47. What is loader?
Ans:The loader copies the program into the computer s main memory at load time and
begins the program execution at execution time.
48. What is linker?
Ans:A linker is a program used to join together several object files into one large object file. For large
programs it is more efficient to divide the large program modules into smaller modules. Each module is
individually written, tested & debugged. When all the modules work they are linked together to form
a large functioning program.

49. What is interrupt service routine?
Ans:Interrupt means to break the sequence of operation. While the CPU is executing a program an
interrupt breaks the normal sequence of execution of instructions & diverts its execution to some other
program. This program to which the control is transferred is called the interrupt service routine.
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50.What are the various programmed data transfer

methods? Ans: i) Synchronous data transfer
ii) Asynchronous data transfer
iii) Interrupt driven data transfer
56. What are the signals used in input control signal & output
control signal? Ans: Input control signal
STB (Strobe input)
IBF (Input buffer full)
INTR(Interrupt request)
Output control signal
OBF (Output buffer full)
ACK (Acknowledge input)
INTR(Interrupt request)
57. What are the features used mode 2 in

8255? Ans:The single 8-bit port in-group A
is available.
1. The 8-bit port is bi-directional and additionally a 5-bit control port is available.
2. Three I/O lines are available at port C, viz PC2-PC0.
3. Inputs and outputs are both latched.
4. The 5-bit control port C (PC3=PC7) is used for generating/accepting handshake signals for
the 8-bit data transfer on port A.
58. What are the modes of operations used in 8253?
Ans:Each of the three counters of 8253 can be operated in one of the following six modes of
operation. 1. Mode 0 (Interrupt on terminal count)
2. Mode 1 (Programmable monoshot)
3. Mode 2 (Rate generator)
4. Mode 3 (Square wave generator)
5. Mode 4 (Software triggered strobe)
6. Mode 5 (Hardware triggered strobe)
59. What are the different types of write operations used in
8253? Ans:There are two types of write operations in 8253
(1) Writing a control word register
(2) Writing a count value into a count register
The control word register accepts data from the data buffer and initializes the counters, as
required. The control word register contents are used for
(a) Initializing the operating modes (mode 0-mode4)
(b) Selection of counters (counter 0- counter 2)
(c) Choosing binary /BCD counters
(d) Loading of the counter registers.
The mode control register is a write only register and the CPU cannot read its contents.
60. Give the different types of command words used in
8259a? Ans:The command words of 8259A are classified
in two groups 1. Initialization command words (ICWs)
2. Operation command words (OCWs)
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61. Give the operating

modes of 8259a? Ans:
(a) Fully Nested Mode
(b) End of Interrupt (EOI)
(c) Automatic Rotation
(d) Automatic EOI Mode
(e) Specific Rotation
(f) Special Mask Mode
(g) Edge and level Triggered Mode
(h) Reading 8259 Status
(i) Poll command
(j) Special Fully Nested Mode
(k) Buffered mode
(l) Cascade mode
62. Define scan counter?
Ans: The scan counter has two modes to scan the key matrix and refresh the display. In the
encoded mode, the counter provides binary count that is to be externally decoded to provide
the scan lines for keyboard and display. In the decoded scan mode, the counter internally
decodes the least significant 2 bits and provides a decoded 1 out of 4 scan on SL0-SL3.The
keyboard and display both are in the same mode at a time.
63. What is the output modes used in 8279?
Ans: 8279 provides two output modes for selecting the display options.
1.Display Scan
In this mode, 8279 provides 8 or 16 character-multiplexed displays those can be organized as
dual 4-bit or single 8-bit display units.
2.Display Entry
8279 allows options for data entry on the displays. The display data is entered for display from
the right side or from the left side.
64. What are the modes used in keyboard
modes? Ans: 1. Scanned Keyboard mode
with 2 Key Lockout. 2. Scanned Keyboard with
N-key Rollover.
3. Scanned Keyboard special Error Mode.

4. Sensor Matrix Mode.
65. What are the modes used in display
modes? Ans:1. Left Entry mode
In the left entry mode, the data is entered from the left side of the display unit.
2. Right Entry Mode.
In the right entry mode, the first entry to be displayed is entered on the rightmost display.
66. What is the use of modem control unit in 8251?
Ans: The modem control unit handles the modem handshake signals to coordinate the
communication between the modem and the USART.
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4
67. Give the register organization of 8257?

Ans: The 8257 perform the DMA operation over four independent DMA channels. Each of the
four channels of 8257 has a pair of two 16-bit registers. DMA address register and terminal
count register. Also, there are two common registers for all the channels; namely, mode set
registers and status register. Thus there are a total of ten registers. The CPU selects one of
these ten registers using address lines A0- A3.
68. What is the function of DMA address register?
Ans: Each DMA channel has one DMA address register. The function of this register is to store the
address of the starting memory location, which will be accessed by the DMA channel. Thus the
starting address of the memory block that will be accessed by the device is first loaded in the DMA
address register of the channel. Naturally, the device that wants to transfer data over a DMA channel,
will access the block of memory with the starting address stored in the DMA Address Register.
69. What is the use of terminal count register?

Ans: Each of the four DMA channels of 8257 has one terminal count register. This 16-bit
register is used for ascertaining that the data transfer through a DMA channel ceases or stops
after the required number of DMA cycles.
70. What is the function of mode set register in 8257?
Ans: The mode set register is used for programming the 8257 as per the requirements of the
system. The function of the mode set register is to enable the DMA channels individually and
also to set the various modes of operation.
71. What is interfacing?
Ans: An interface is a shared boundary between the devices which involves sharing information.
Interfacing is the process of making two different systems communicate with each other.
72. List the operation modes
of 8255 Ans: a) I.O Mode
i . Mode 0-Simple Input/Output.
ii . Mode 1-Strobed Input/Output (Handshake
mode) iii. Mode 2-Strobed bidirectional mode
b) Bit Set/Reset Mode.
73. What is a control word?
Ans: It is a word stored in a register (control register) used to control the operation of a
program digital device.
74. What is the purpose of control word written to control register in 8255?
Ans: The control words written to control register specify an I/O function for each I.O port.
The bit D7 of the control word determines either the I/O function of the BSR function.
75.What is the size of ports in

8255? Ans:
Port-A : 8-bits
Port-B : 8-bits
Port-CU : 4-bits
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Port-CL : 4-bits
76. Distinguish between the memories mapped I/O

peripheral I/O? Ans:
Memory Mapped I/O
16-bit device address
Peripheral MappedI/O
8-bit device address
Data transfer between any Data is transfer only between

general-purpose registeraccumulator and I.O port
and I/O port.
The memory map (64K)The I/O map is independent of the
is shared between I/Omemory map; 256 input device and
device
and
system256 output device can be connected
memory.
More
hardware
isLess hardware is required to decode
required to decode 16-bit 8-bit address
address
Arithmetic
or
logicArithmetic or logical operation
operation can be directly cannot be directly performed with
performed with I/O data I/O data
77. What is memory mapping?
Ans: The assignment of memory addresses to various registers in a memory chip is called as
memory mapping.
78. What is I/O mapping?
Ans:The assignment of addresses to various I/O devices in the memory chip is called as I/O mapping.
79. What is an USART?

Ans:USART stands for universal synchronous/Asynchronous Receiver/Transmitter. It is a
programmable communication interface that can communicate by using either synchronous or
asynchronous serial data.
80.What is the use of 8251 chip?
Ans:8251 chip is mainly used as the asynchronous serial interface between the processor
and the external equipment.
81. What is 8279?
Ans:The 8279 is a programmable Keyboard/Display interface.
82. List the major components of the keyboard/Display
interface. a . Keyboard section
b . Scan section
c . Display section
d. CPU interface section

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83. What is Key bouncing?

Ans: Mechanical switches are used as keys in most of the keyboards. When a key is pressed
the contact bounce back and forth and settle down only after a small time delay (about 20ms).
Even though a key is actuated once, it will appear to have been actuated several times. This
problem is called Key Bouncing.
84.Define HRQ?
Ans: The hold request output requests the access of the system bus. In non- cascaded 8257 systems, this
is connected with HOLD pin of CPU. In cascade mode, this pin of a slave is connected with a DRQ input
line of the master 8257, while that of the master is connected with HOLD input of the CPU.
85. What is the use of stepper motor?

Ans:A stepper motor is a device used to obtain an accurate position control of rotating shafts.
A stepper motor employs rotation of its shaft in terms of steps, rather than continuous rotation
as in case of AC or DC motor.
86. What is TXD?
Ans: TXD- Transmitter Data Output This output pin carries serial stream of the transmitted
data bits along with other information like start bit, stop bits and priority bit.
87. What is RXD?
Ans: RXD- Receive Data Input This input pin of 8251A receives a composite stream of the
data to be received by 8251A.
88. What is meant by key bouncing?
Ans:Microprocessor must wait until the key reach to a steady state; this is known as Key bounce.
89. What is swapping?
The procedure of fetching the chosen program segments or data from the secondary storage
into the physical memory is called swapping .
90. Write the function of crossbar switch?
Ans: The crossbar switch provides the inter connection paths between the memory module
and the processor. Each node of the crossbar represents a bus switch. All these nodes may
be controlled by one of these processors or by a separate one altogether.
91. What is a data amplifier?
Ans: Transceivers are the bi-directional buffers are some times they are called as data
amplifiers. They are required to separate the valid data from the time multiplexed address
data signal. They are controlled by 2 signals i .e DEN & DT/R.
92. What is status flag bit?
Ans: The flag register reflects the results of logical and arithmetic instructions. The flag
register digits D0, D2, D4, D6, D7 and D11 are modified according to the result of the
execution of logical and arithmetic instruction. These are called as status flag bits.
93. What is a control flag?
76
7
7
Ans: The bits D8 and D9 namely, trap flag (TF) and interrupt flag (IF) bits, are used for
controlling machine operation and thus they are called control flags.
94. What is instruction pipelining?
Ans: Major function of the bus unit is to fetch instruction bytes from the memory. In fact, the
instructions are fetched in advance and stored in a queue to enable faster execution of the
instructions. This concept is known as instruction pipelining.
95. Compare Microprocessor and Microcontroller.
Ans:
Microprocessor
Microcontroller
Microprocessor contains
Microcontroller contains the
ALU,general purpose
circuitry
registers,stack pointer,
of microprocessor and in addition
program counter, clock it
timing
has built- in ROM, RAM, I/O
circuit and interrupt circuit. devices, timers and counters.
It has many instructions to It has one or two instructions to
move data between memory move
and CPU.
data between memory and CPU.
It has one or two bit handling It has many bit handling
instructions.
instructions.
Access times for memory and Less access times for
built-in
I/O
memory
devices are more.
and I/O devices.
Microcontroller based system
Microprocessor based system requires
less hardware reducing PCB size
requires more hardware.
and
increasing the reliability.
77

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1

EXCEL ET- 8085AD1 8 bits Microprocessor Kit Description

and Combine two nibbles to form a byte using 8085 P.

Write an ALP to interface a traffic light system using 8255 IC

1. ABOUT EXCEL ET- 8085AD1 MICROPROCESSOR KIT

8 bit Microprocessor the 8085

8K Bytes with provision for expansion

IBM PC/ At compatible Keyboard

+5V, 1.5Amp for the kit & Serial I/F

2. SYATEM SPECIFICATION (SOFTWARE)

6. Delete one or more instructions from the user program.

i) 8255 ( PROGRAMMABLE PERIPHERAL INTERFACE )

ii) 8253 ( PROGRAMMABLE INTERVAL TIMER)

F) BATTERY BACK UP ( Optional)

If you do not want Battery Back Up then short 2 & 3.

The ET-8085AD1 accepts all data and address in ASCII form.

Examine/ Modify memory

2. LIST A MEMORY BLOCK (L)

3. EXAMINE I MODIFY RESISTER (R)

7. ENTER A MEMORY BLOCK (E)

8. SINGLE INSTRUCTION (S)

10. DELETE COMMAND (D)

11. INSERT COMMAND (I)

DELETE DATA (O)

15. STRING (K)

16. PRINT (P)

3. ARCHITECHTURE or FUNCTIONAL BLOCK DIAGRAM OF 8085

8085 Bus Structure:

The result of an operation is stored in the accumulator.

The bit position for the flags in flag register is,

1. Sign Flag (S):

It is used to perform the arithmetic operations like addition, subtraction, multiplication,

This 16-bit register sequencing the execution of instructions.

Stack Pointer (SP):

The stack pointer is also a 16-bit register used as a memory pointer.

Interrupt Control Unit:

It receives hardware interrupt signals and sends an acknowledgement for receiving

4. Instruction Set of 8085 Microprocessor

Instructio This instruction copies the

The 8-bit data is stored in the

Example: MVI B, 57H or MVI

Reg. pair, Load register pair

The instruction loads 16-bit data in

the memory location pointed out by the

The instruction copies the contents of

Example: LHLD 2040H

Store accumulator indirect

Store H and L registers direct

Copy H and L registers to the stack

with top of stack

4350 ts of the accumulator are not

Example: SHLD 2470H

The contents of the register pair

Reg. pair Pop off stack to Example: PUSH B or PUSH A

Example: POP H or POP A

register pair to H and L registers

registers. All flags are modified to

24 ubtracted from the

location, its location is

decremented by 1 and the result is

order four bits.

on the specified flag

The program sequence is

The program sequence is