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1. Introduction
Quality assurance in product design and development is extremely important, and it leads to an effective overall cost
reduction with reduced time delays for rework and process inspection and low rejection rates for re-manufacturing
(Chan, Ip, and Zhang 2012). Semiconductor wafer manufacturing processes are very complex, with several hundred
processes and considerable time required to complete the fabrication of a chip (Yang, Liu, and Lin 2007). Thus,
effective management practices are needed to enhance wafer yield (Liu, Lin, and Liu 2008). A semiconductor enterprise
has multi-site fabs and basically follows a make-to-order production model. The allocation of capacity for manufacturing
different types of products is important for the competitiveness and future development of the enterprise (Kang 2011).
Tsai, Tong, and Wang (2008) regarded the wafer yield as the key indicator to measure the production capability in
integrated circuit processes and noted that the defects on wafers and the clustering of these defects are the key factors
determining the wafer yield. Chien, Lin, and Cheng (2007) indicated the insufciency of previous research on the
promotion of wafer yield. Previous studies have simply focused on promoting the productivity of wafer manufacturing
processes, particularly in terms of equipment maintenance and manmachine dispatch. By using FMEA to discuss
potential failures in the wafer manufacturing processes, this study aimed to nd the key failure factors in the yield of
the processes. FMEA is a very important safety and reliability analysis tool, which has been widely used in many areas
and industries (Hadi-Vencheh, Hejazi, and Eslaminasab 2013). It is primarily used to discover the potential failure mode,
discuss the effects of failure on the system, provide appropriate evaluations, make necessary modications and utilise
countermeasures according to the failure of the system reliability (Sharma, Dinesh Kumar, and Kumar 2008). FMEA is
often applied to product design, production improvement and security analyses. However, some researchers claim that
FMEA depends too much on the previous experience and knowledge of engineers when collecting data and selecting
parameters, and thus, it can only be applied to solve certain problems, has too many restrictions and is not able to
correspond with real conditions. Many researchers have highlighted the difculty of using FMEA in actual operations
and have stated that the analyses cannot be used to effectively promote wafer yield. Those problems could result in a
failure of the research results to correspond to the real situation (Franceschini and Galetto 2001; Hsu 2001; Tong, Wang,
and Chen 2005).
*Corresponding author. Email: tmyeh@mail.dyu.edu.tw
2013 Taylor & Francis
540
The objective of this study is to determine the key factors in the failures in semiconductor wafer manufacturing
processes based on the priority of the failure risk, in order to enhance the product yield by making process
modications. By getting rid of the traditional RPN values, we propose an innovative RPN computation that uses fuzzy
theory, which reduces the uncertainties related to testers judgments and preferences, in order to enhance the accuracy
of the RPN values. Furthermore, having transformed the quantied value in the quality control testing to the occurrence
in failure mode, the process capability (Cpk) of the occurrence in actual processes is applied to the judgment so that the
potential failures in actual processes can be precisely analysed. Finally, the products of the values are sorted, and the
key failure factors in the wafer production processes can thus be accurately determined.
2. Literature review
2.1 Brief introduction of semiconductor wafer manufacturing processes
Wafer manufacturing processes are complicated, dynamic processes that require various resources related to manpower,
capital, production and technology, and are affected by industry characteristics, government policies and the status of
national economic development (Kuo and Sheu 2006).
The production processes in the semiconductor IC industry can be divided into two stages. The front-end consists of
the design and production of wafers, while the back-end refers to packaging and testing, with all of the processes shown
in Figure 1. Further details of the front-end wafer production and back-end packing and testing are introduced below.
Front-end wafer manufacturing. Semiconductor IC wafer manufacturing processes are considered to be complex and
involve several hundred steps, including oxidation, diffusion, photolithography, etching, chemical vapour deposition,
and metal sputtering to stack the layers of circuits on wafers. Any failure at any stage of the processes could result in
signicant losses.
Back-end packaging and testing. The packaging and testing carried out on wafers and chips take place under different
management conditions from those that apply to the front-end processes. The major difference involves the short cycle
period in the back-end processes. Moreover, the units of measurement and the identication parameters are changed
from lots to particle numbers and from wafers to grains. The processes can be further classied as the three operations
of wafer probing, IC packaging and nal testing.
2.2 Failure mode and effect analysis
FMEA, as an analysis of system reliability, is often applied to uncover potential errors in a products design and
processes, evaluate the effects of system breakdowns and then undertake various improvement strategies (Chuang
2007). The application of FMEA makes it possible to quantify how dangerous a failure mode is and also provides
541
ranks for the risk priorities of failure modes and a list of corrective actions to remove them (Franceschini and Galetto
2001). Chiozza and Ponzetti (2009) stated that with the use of FMEA, any weaknesses in the design or processes can
be discovered in the early stages of development, and the subsequent early modication of failure elements can reduce
both the development costs and the risk of failure in the market. Rezaie et al. (2008) noted that FMEA has become the
major method to test system security and reliability by evaluating potential failures and nding the key parameters to
prevent these potential failures before mass-production. Gilchrist (1993) and many other researchers also highlighted the
wide application of FMEA, including its use in the outer space, aviation, national defence, machinery, electronics,
shipbuilding, industrial products, consumer goods, and medical and insurance industries. Greenall, Walsh, and Wichman
(2007) proposed that FMEA should be applied to nuclear power plants, aerospace technology, chemical plants and other
areas, in which failures can lead to serious disasters. FMEA analyses have been used to enhance the R&D, design,
production, testing and maintenance of innovative products.
2.2.1 Functions and applications of FMEA
FMEA is commonly applied to the product development and design stages in addition to the manufacturing processes.
It is regarded as an auxiliary tool for systematic design, and it is utilised before design and production to discuss the
causal relationship of failure. One of the key issues for business process control is the identication of measurable
process attributes. For manufacturing processes, these are typically physical parameters of the process or physical
attributes of the manufactured product (Zakarian, Wickett, and Siradeghyan 2006). In a structural system programme,
FMEA is considered to be a systematic activity to discover and discuss the potential failure factors in products so that
necessary measures can be applied to promoting the product quality and reliability. Sharma, Dinesh Kumar, and Kumar
(2008) regarded FMEA as an analysis to distinguish the errors in the product design or processes in order to nd the
potential factors and propose appropriate solutions to enhance the system security and the product reliability. Boldrin
et al. (2009) indicated that FMEA aimed to discover the possible failure in a design, to discuss the effects of this failure
on the system and to apply improvement measures to the system. They believed that the implementation of FMEA
tended to transform the operation characteristics of the system into denite operating conditions in the analysis processes
so as to ensure that the nal products or services are as expected and are satisfactory. Braaksma et al. (2012) stated that
the probability of failure and an estimate of the total costs can be used to determine maintenance routines. The
procedure facilitates continuous improvement as the size of the data set increases. FMEA is suitable for nding the
potential failure in the product design and processes and could be used for an in-depth discussion of the damage from a
failure in the system. Chuang and Chuang (2009) indicated that FMEA would precede risk evaluations and provide
appropriate assessments, in conjunction with the evaluations. It could then be used to propose appropriate precautionary
measures and amendments aiming at various potential failures in the system. Lin and Chung (2008) mentioned that
conrmed failures and identied factors would precisely reect the failure in products and services, which would allow
managers to promptly propose strategies to reduce risks and costs, as well as shorten the development period.
2.2.2 Evaluation of risk priority number (RPN)
Several studies have indicated that FMEA evaluations are based on calculations of the risk priority number (RPN) and
require denite values for improvement, with the improvements then carried out in failure mode (Cassanelli et al. 2006;
Chang 2009; Chuang 2007). Because the calculation of RPN is both simple and widely used in various industries, the
failure mode is divided into severity, occurrence and detection, as shown in Table 1. The product of these three
indicators (S, O and D) is the RPN. Risk factors and their relative importance weights are evaluated in a linguistic
manner rather than by using precise numerical values. This makes the assessment easier to carry out (Hadi-Vencheh,
Hejazi, and Eslaminasab 2013). The values of the various risk factors should be between 1 and 10; the RPN values of
the failures are then sequenced, using numbers between 1 and 1000. Aiming at failures with a higher risk index,
modications should be proposed to reduce the failure risk.
Table 1. Failure indicators.
Failure indicator
Description
Severity (S)
Occurrence (O)
Detection (D)
542
543
544
100
99.49
98.99
98.48
97.97
97.47
96.96
96.45
95.95
95.44
1.67
1.56
1.45
1.34
1.23
1.11
1
0.89
0.78
0.67
4. Empirical verication
This section aims to effectively nd potential failures in the semiconductor wafer manufacturing processes with the use
of expert questionnaires, re-calculate the collected data using fuzzy analysis and provide the appropriate RPN values for
various potential failures. Finally, the RPN calculation is compared with other calculations.
4.1 Questionnaire design for FMEA
There are hundreds of semiconductor processes, and the previous research, which only discussed a small number of
these, was not able to effectively examine the issue of potential failures. After reviewing the literature on semiconductor
production yields and discussions with quality control personnel, this study instead aimed to nd the key failure processes and their related factors. Yeh (2011) proposed the following basic techniques for wafer manufacturing processes:
purication, heat treatment, grinding, lm formation, photolithography, etching and planarization. Because heat treatment
can be combined with other processes, the remaining six processes were listed as the deployment items of FMEA.
Experts on the various relevant processes were asked to identify the potential failure modes, analyse the possible effects
of failures according to their previous experience and discuss the related factors. The potential failure modes in wafer
manufacturing processes are shown in Table 3.
With regard to the items used in an FMEA system, experts on the relevant processes were asked to identify the
potential failure modes, evaluate the possible effects according to their previous experiences and further discuss the
related failure factors. The FMEA questionnaire contained two parts, one to nd the failure modes and the other to nd
the factors related to these and evaluate the possibility and detection of failures.
Having identied the potential failure modes in semiconductor wafer manufacturing processes, the core team then
evaluated the severity, occurrence and detection, in order to nd the effects of the failure modes and the related factors,
and further calculate the product of S, O and D. Moreover, the risk factors were re-sequenced using simple sort and
SO-factor calculations to become the basis of the RPN comparisons.
4.2 Sequence of RPN in traditional FMEA
In order to effectively nd the priority sequence of failures, the RPN calculations proposed by AIAG were used in this
work. Both the previous research and current industrial practice depend on the professional experience and knowledge
of the core team to evaluate the severity, occurrence and detection. The values thus obtained were then multiplied, and
the RPN results were sequenced. The item with the highest score was then the most important one for improvement
efforts.
In recent years, several studies have drawn attention to the weaknesses of RPN in traditional failure mode
approaches, with the main one being a lack of objectivity. To deal with this, numerous other approaches have been
proposed. For instance, Hassan et al. (2008) proposed the use of quality function deployment to analyse the failure
factors, in which experts evaluate the selected factors to determine their sequence, and to classify the failure factors into
A, B and C groups. Chang (2009) examined the different weights of risk factors and substituted the average weighted
values for RPN calculations to nd the actual conditions. In this study, the RPN values for semiconductor wafer
manufacturing processes were evaluated by the core team and then used with the new FMEA proposed by AIAG
(2008). The calculations were performed as shown below.
545
Effects of failure
Failure factors
Plasma (cleaning
processes)
A: Part of chemical
materials and particles
Grinding
Mask
development
F: Over-grinding, resulting
in thin lm and wafer
electric failure
G: Insufcient grinding,
resulting in residual
organic solvent and the
wafer being too thick
H: Unclear circuit design
I: Critical dimensions are
too high after
development
Etching
Diffusion (ion
implantation)
N: Inaccurate implantation
of mixtures causing
uneven distribution
(1) The two-factor sort method only considers the severity (S) and occurrence (O). The SO index is the product of
the severity and occurrence rankings. That is, RPN = S O
(2) In the simple sorting method, the SOD index is used. SOD is the non-arithmetic combination of the severity (S),
occurrence (O) and detection (D) rankings, where the value of S is used for the hundreds digit, that for O is used
for the tens digit and that for D is used for the units digit.
4.3 Sequence of RPN in fuzzy FMEA
A memory wafer manufacturer was chosen as the research subject, and the major processes included purication, lm,
grinding, etching, mask lithography and diffusion. This study examined the potential factors in failures, and experts on
the processes and quality control were asked to complete the related questionnaire. The basic information about the
experts included their experience in industries related to wafer manufacturing processes and their current department and
job title. The largest groups of respondents had three to ve years of experience, at 37.04% of the sample; 62.96%
546
worked in the manufacturing department, and most (66.67%) were engineers. The data collected in the questionnaires
were then used in the RPN analyses.
The respondents evaluated the severity (S) and detection (D). Finally, fuzzy theory was applied to calculate the data.
The chip production of the wafer manufacturer studied in this work is xed at an average monthly production of 60,000
wafers. According to the monthly failure occurrence, the company evaluates the number of failures based on the
occurrence in the failure mode. Because the yield of the semiconductor wafer processes is stricter than that seen with
other products, tiny errors are likely to cause huge losses. For clear occurrence levels in the failure mode, the production
yield was set between 95.45% and 100%. That is, when 455 failures appeared in 10,000 wafers, the occurrence was
ranked at level 10, and when the number of failures reached 50, the occurrence was ranked at level 2.
4.4 Analysis and discussion of RPN in FMEA
Previous RPN calculations of S O D were not able to determine the priority, because of similar or the same values.
In addition, having the core team evaluates the failure factors lacks objectivity, and whether there are no actual numbers
for comparisons, the results are of little use in practical applications.
In order to precisely nd the key failure modes, the fuzzy FMEA approach used in this work required experts to ll
in the questionnaires, applied linguistic ambiguity to nd the failure evaluation and then transformed the failures in
processes into occurrence values in failure modes to eliminate the objectivity problem. The results of empirical
verications showed that the introduction of fuzzy theory made RPN more meaningful. In contrast to the traditional
RPN calculations and the approach presented in the fourth edition of FMEA, the RPN values obtained in this work
could clearly distinguish the effects of various failures.
Four calculations were applied to nd the RPN values in semiconductor wafer manufacturing processes, as listed in
Table 4, which also gives the RPN sequence and the priority for improvements. The proposed linguistic variables
enabled the experts to evaluate the severity and detection and introduce quantied numbers into the RPN formula. The
results of the verication show that this approach can effectively identify the failure factors in semiconductor wafer
manufacturing processes and clearly sequence the priorities.
Table 4 shows that scratches on the surface of wafers might be caused by erosion of the organic solvent. Both
the analyses of the core team and the experts put the RPN for this factor in the top three, showing that it is very
important in semiconductor processes. To make the best use of limited resources, greater effort should be made to
prevent this failure so as to reduce the probability of wafer yield failure.
The sequence of process improvements obtained using the RPN calculations was very different from the results
obtained with the failure mode, including those related to thin coating, unclear circuit design, critical dimensions after
the development was too high, over-implanting mixtures and insufcient plantation of mixtures. The conclusions of this
analysis are as follows:
(1) The traditional RPN, simple sort and two-factor sort evaluated by the core team produced the same numbers for
the failure modes. Thus, the sequence was unclear.
(2) The sequence produced by simple sort was directly determined by the severity.
(3) The RPN in the two-factor sort was only determined by the severity and occurrence, without detection, and thus,
it may not be appropriate for practical applications.
4.5 Comparing FMEA improvement efciency with engineering experiment analysis
Based on the new method for RPN analyses, the priority sequence thus produced was further examined with regard to
its effectiveness. In this case, various failure factors in failure modes were selected for the engineering experiment
analysis. Because wafer manufacturing processes require signicant time and expense, some non-production experimental wafers were used in the experiment. The top four RPN numbers were selected as the engineering experiment subjects
to verify the priority sequence of the failure modes in wafer manufacturing processes. Focusing on the erosion of
organic solvent in purication and the unstable bias power in etching, both the process and quality control engineers
studied the failure factors and proposed modications to reduce the failures in the processes.
To examine whether the proposed actions were able to effectively enhance the yield of the wafer processes, the short
loop approach was carried out for the above two processes, and the improved wafers were then further examined with
regard to their critical dimensions (CD) using a scanning electron microscope. The results are given in Table 5.
The results showed that the priority sequence calculated by replacing the severity and detection with linguistic
variables and evaluating the occurrence using quantied values can effectively increase the production yield by 4.6%.
547
Failure
effect
Failure
factor
Traditional
RPN
Plasma
A
B
A1
B1
Deposit
C1
D1
Grinding
E
F
E1
F1
Grinding
G1
Development
H1
Development
I1
Etching
J1
Diffusion
K
L
K1
L1
Diffusion
M1
N1
A11
B11
B12
C11
C12
D11
D12
E11
F11
F12
G11
G12
H11
H12
I11
I12
I13
I14
J11
J12
K11
L11
L12
L13
M11
M12
M13
N11
45 (8)
84 (1)
42 (9)
72 (3)
36 (11)
72 (3)
48 (7)
72 (3)
45 (8)
40 (10)
80 (2)
40 (10)
60 (4)
54 (5)
30 (12)
30 (12)
40 (10)
60 (4)
72 (3)
48 (7)
48 (7)
72 (3)
48 (7)
72 (3)
60 (4)
80 (2)
50 (6)
60 (4)
Deployment
Two-factor sort
RPN
15
28
14
18
12
18
12
24
15
20
10
15
12
18
10
15
20
20
18
12
12
24
24
18
20
20
10
12
(5)
(1)
(6)
(4)
(7)
(4)
(7)
(2)
(5)
(3)
(8)
(5)
(7)
(4)
(8)
(5)
(3)
(3)
(4)
(7)
(7)
(2)
(2)
(4)
(3)
(3)
(8)
(7)
Simple sort
RPN
Fuzzy RPN
533 (13)
743 (1)
723 (2)
634 (5)
623 (9)
634 (5)
624 (8)
634 (3)
533 (13)
542 (12)
544 (10)
542 (12)
625 (7)
633 (6)
523 (16)
532 (14)
542 (12)
543 (11)
634 (5)
624 (8)
434 (17)
643 (3)
642 (4)
634 (5)
543 (11)
544 (10)
525 (15)
625 (7)
82.80 (23)
168.38 (3)
113.84 (14)
162.24 (4)
155.74 (5)
109.01 (18)
93.56 (22)
135.92 (8)
183.42 (2)
136.1 (7)
114.83 (13)
78.28 (26)
48.04 (28)
59.24 (27)
120.86 (11)
129.22 (9)
111.11 (15)
81.78 (24)
229.72 (1)
144.75 (6)
123.5 (10)
110.26 (16)
109.24 (17)
117.95 (12)
107.11 (19)
80.82 (25)
104.27 (20)
100.3 (21)
Before improvement
Subject
Failure processes
Improved device
Failure factor
Improvement
Number of wafers
Wafer yield
D14-AA RTO
Nil
Nil
Nil
Nil
25
83.3%
For example, with a monthly production of 60,000 wafers, an additional 2.76 million particles would be produced. If
wafer manufacturers could implement these improvement measures, their production yields would be enhanced. In
addition, with more effective application of their limited resources, costs could be reduced and market competitiveness
could be improved.
548
5. Conclusions
This study discussed the potential failure modes in semiconductor wafer manufacturing processes. With the introduction
of fuzzy theory and quantied values, the research results were more comprehensive, and the key failure factors could
be effectively distinguished. Having transformed the quantied values into the occurrences in the failure modes, the
actual occurrences in the processes could be determined. In this case, the objectivity problem in the traditional FMEA
calculations could be solved. By sequencing the products of the three risk factors, the failure factors in the processes
could be effectively distinguished. The evaluations found by the expert questionnaires could help obtain useful
information that was not observed by the core team. While depending too much on the experience of engineers might
make an evaluation subjective, this can be avoided by using expert questionnaires. Moreover, with appropriate research
analyses and engineering experiments, the introduction of quantied values can enhance the effectiveness of the results.
FMEA has been developed for several decades, and past research on quality control and practical applications has
utilised traditional RPN calculations, which produced a sequence that gave the priorities for improvement measures.
However, traditional RPN calculations are not objective and qualied values are not used, which means the validity of
the results is questionable. Subsequent studies could refer to the RPN calculations proposed in this study and undertake
research in other industries.
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