Académique Documents
Professionnel Documents
Culture Documents
Evaluation Guide
This document is for information and instruction purposes. Mentor Graphics reserves the right to make changes in specifications and other
information contained in this publication without prior notice, and the reader should, in all cases, consult Mentor Graphics to determine whether
any changes have been made.
The terms and conditions governing the sale and licensing of Mentor Graphics products are set forth in written agreements between Mentor
Graphics and its customers. No representation or other affirmation of fact contained in this publication shall be deemed to be a warranty or give
rise to any liability of Mentor Graphics whatsoever.
MENTOR GRAPHICS MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THIS MATERIAL INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
MENTOR GRAPHICS SHALL NOT BE LIABLE FOR ANY INCIDENTAL, INDIRECT, SPECIAL, OR CONSEQUENTIAL DAMAGES
WHATSOEVER (INCLUDING BUT NOT LIMITED TO LOST PROFITS) ARISING OUT OF OR RELATED TO THIS PUBLICATION OR THE
INFORMATION CONTAINED IN IT, EVEN IF MENTOR GRAPHICS CORPORATION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
DAMAGES.
U.S. GOVERNMENT LICENSE RIGHTS: The software and documentation were developed entirely at private expense and are commercial
computer software and commercial computer software documentation within the meaning of the applicable acquisition regulations. Accordingly,
pursuant to FAR 48 CFR 12.212 and DFARS 48 CFR 227.7202, use, duplication and disclosure by or for the U.S. Government or a U.S.
Government subcontractor is subject solely to the terms and conditions set forth in the license agreement provided with the software, except for
provisions which are contrary to applicable mandatory federal laws.
2014-2015 Mentor Graphics Corporation
All Rights Reserved
Contractor/manufacturer is:
Mentor Graphics Corporation
8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Telephone: 503.685.7000 Toll-Free Telephone: 800.592.2210
Website: www.mentor.com SupportNet: supportnet.mentor.com/
Send Feedback on Documentation: supportnet.mentor.com/doc_feedback_form
TRADEMARKS: The trademarks, logos and service marks (Marks) used herein are the property of Mentor Graphics Corporation or other
third parties. No one is permitted to use these Marks without the prior written consent of Mentor Graphics or the owner of the Mark, as
applicable. The use herein of a thirdparty Mark is not an attempt to indicate Mentor Graphics as a source of a product, but is intended
to indicate a product from, or associated with, a particular third party. A current list of Mentor Graphics trademarks may be viewed at:
www.mentor.com/trademarks.
End-User License Agreement: You can print a copy of the End-User License Agreement from: www.mentor.com/eula
Contents
Introduction to Xpedition
Introduction......................................................................................................................... 8
About This Evaluation.......................................................................................................... 9
Design Process Overview................................................................................................... 10
The Xpedition Design Flow................................................................................................ 11
Xpedition Highlights.......................................................................................................... 12
13
Contents
135
Simulation with
HyperLynx BoardSim & HyperLynx Thermal
265
277
297
Contents
Appendix
List of Figures
Contents
Contents
Introduction to
Xpedition
In this section:
Introduction
Installation and Setup
Design Process Overview
The Xpedition Design Flow
Xpedition Feature Highlights
Introduction
Xpedition is by far the most productive and complete PCB design suite that
allows individual engineers and small workgroups to design highly complex PCBs
while at the same time offering an affordable cost of ownership. Skeptical? We
invite you to take a closer look using this evaluation guide and see for yourself.
Xpedition is for the individual PCB engineer who does it all, operating
independently or in small teams. Until now, your choice of design tool has been
a frustrating compromise. High-end enterprise solutions that handle design
complexity come with too much unnecessary overhead and the associated
challenges of ease of use and cost of ownership. While desktop solutions are
easier to use and have lower cost, they sacrifice productivity as design complexity
increases. Xpedition delivers the best of both worlds - powerful technology
from Mentor Graphics Xpedition Enterprise combined with a focus on ease of
adoption, ease of learning, ease of use, and affordability. Xpedition provides
a tightly integrated design flow with everything you need to get the job done.
Hierarchical schematic and table based design creation with intelligent
parts selection
Unified constraints definition and management across the flow
Component information and library management
Easy design reuse
Analog/mixed signal SPICE simulation Performing Design Analysis
(pre-layout)
Pre- and post-layout signal integrity analysis based on our leading-edge
HyperLynx technology
Board level thermal analysis
Best-in-class, PCB layout featuring:
A single layout environment
Introduction
While Xpedition is a complete suite for complex PCB design, you still
have the flexibility of adding specialized advanced capabilities from the
HyperLynx family of products, advanced packaging, FPGA co-design, and 3D
design and modeling.
Xpedition is a key part of Mentor Graphics scalable PCB design
solutions. If you are a PADS user in need of higher performance design,
Xpedition offers a simple upgrade path that allows you to leverage your
prior experience of the PADS flow and tools. When your design needs
evolve towards enterprise capabilities such as distributed libraries, design
management, and concurrent engineering, you can seamlessly
transition to Xpedition Enterprise.
We hope youll agree with Xpedition, the days of compromise are
over. Welcome to a new breed of PCB design solution for the next
generation of PCB Engineers.
Introduction to Xpedition
Purpose of This Guide
This Evaluation Guide will introduce you to the major features and
capabilities of the applications and help you to understand how they work
together to unify and simplify your design process. We will walk through
the entire workflow from symbol creation to design capture, rules and
constraints entry, to layout, placement of components, interactive
routing, and design verification to final output. The focus throughout is on
using the entire Xpedition flow, with special attention paid not only to those
areas where the applications function similarly, but also to the integration and
transition locations, providing tips on how to get the job done more efficiently.
Working Together
This attention to workflow means that we will also show you how to use
the applications together with real-world design examples. Along the
way, we also introduce you to many of the great new features in each
application, highlighting some of the more interesting techniques with
steps and lots of illustrations. To see which applications and features a
section covers, scan the In this section list at the beginning of each section.
Further Exploration
Finally, remember that this document is an evaluation guide, not a
comprehensive user guide. Your most complete source of detailed
feature information is the Help Menu in each application. In
addition, take time to examine the resource information accessible through
the Getting Started, Help, and News links within each applications Start
Page. There you will find even more information on a variety of Mentor
Graphics resources that will help you get started, get informed, and get
inspired while using Xpedition. We hope this evaluation guide helps you
see some of the exciting design possibilities available to you with Xpedition
Enjoy!
Introduction
There are many operations that a designer must perform to complete a design,
but the process flow can be simplified to a few basic steps shown below:
1. Creating a Design Project
2. Performing Design Capture
Documentation and
Manufacturing Outputs
Partitioning your workflow to align with these steps will help you establish a
structured approach to organizing your design tasks. It will also provide you with
a number of checkpoints for reviewing your design data.
Create a
Design Project
Schematic Capture
with Simulation
10 Introduction
Personal Library
Part Creation
Introduction to Xpedition
The Xpedition Design Flow
Introduction
11
Xpedition Highlights
Design Capture
The Xpedition flow delivers productive PCB design capture and definition
functionality using Xpedition xDX Designer. You will have features like: intuitive
project and design navigation, unlimited hierarchical support, informal design
reuse, advanced design properties and rules management, full forward/back
annotation including design constraints, cross probing between the schematic,
layout, routing, and constraints. You will also have access to schematic-to-signalintegrity features. Component management is also included using library
management tools.
12 Introduction
13
Take time to become familiar with the Getting Started, Help, and News
sections. These contain links to additional product documentation
on SupportNet and InfoHub, including this Evaluation Guide and the
Xpedition user manuals.
Select New Project > Xpedition (in xDX Designer) or New PCB (in
Xpedition xPCB Layout) to start a new design.
Use the Recent section to quickly access designs you have worked
on previously.
If you do not wish to see the Start Page, you can toggle it off in
Xpedition xDX Designer by selecting View > Start Page.
In Xpedition xPCB Layout to keep the Start Page from appearing when
the program opens, disable View > Show Start Page at Startup.
Close Xpedition xDX Designer and/or Xpedition xPCB Layout if still
open.
15
Workspace
Properties
Menus
Toolbars
Navigator
Pane
Symbol
Preview
Status Bar
xDX Databook
Search Window
Footprint
Preview
Cut
Paste
Copy
Find/Replace
File
Viewer
Redo
Undo
xPCB
Layout
Package
GRC
Verify
Run Graphical
Rule Checker
Constraint
Manager
Fit All
Zoom
In
xDX
Fit
Restore
PCB
xDX
Selected Zoom Databook Viewer
Zoom
Area
Save
Zoom
Navigator
Output
Selection
Filter
ICT Properties My
Add
Viewer
Parts Properties
Mode
Import
Remote
Development
Database
xDM
FPGA I/O
Library
Optimization
Tools
(Library
Manager)
Export
Remote
xDX
DevelopI/O
ment
Designer Database
Push
Push
ICT
Enable/Disable
Selection Filter
Pop
Route
Mode
17
Toolbars
(Continued)
Net
Bus
Box
Block Multi-Net
Special
Arc
Connection Components
Line
Circle Text
Cut
Nets
Grid
Units
Add
Missing
Ports
Grid
Spacing
Show
Alignment
Markers
Grid
On/Off
Rotate
90
Disconnect
Flip
Mirror
Scale
Stretch
Align
Left
Align
Center
Align
Right
Align
Bottom
Distribute
Vertically
Bring
Send
Forward Backward
Bring to
Front
Backup
Sheet
Send to Reassign
Back
Names
Manage
Sheet
Backups
19
(continued)
Two categories (Symbols and Nets) appear in the dialog box for each
schematic sheet.
Click the [+] again to expand the Symbols and Nets section of the
Navigator tree.
Select any symbol in the list. Xpedition xDX Designer automatically
Cross Probes to that item.
Note: Double-click on any symbol in the Navigator tree and it will zoom to
that symbol in the schematic.
21
Object Tooltips
Xpedition xDX Designer supports tooltips for Components and Nets. The
visible attributes are configurable. Lets take a closer look.
Place your cursor over any net to view the netname tooltip.
Note: This is a very convenient way to get information without having to
zoom in or invoke the Properties dialog to view and identify an object on
the schematic.
Another method for Zooming In and Out is to use the Middle Mouse
Scroll Wheel if you have one.
To Pan within the workspace, click and drag the Middle Mouse Scroll
Wheel.
Press the Home key (Zoom to Full) to restore the view to the entire
active schematic sheet, or use the Fit All icon.
Press F9 , then drag a box around the area you wish to zoom to.
You can also Zoom To an area by pressing the Z key and dragging a
box around the area.
Use the Save Zoom and Restore Zoom icons when you want to be
able to go back to a previous location on the schematic.
23
Sheet Thumbnails
Navigation through a large schematic database is made easier with Sheet
Thumbnails. The small views of your schematic can help you easily find
the sheet you want to work on.
Select View > Thumbnails to open the thumbnails panel showing
the sheet you are current working in.
Double-click the CORPORATE.microprocessor sheet thumbnail
and the sheet opens in a new tab.
To make the workspace area larger, you can Auto-hide the
Thumbnails panel by clicking the thumb tack icon.
Note: You can use Auto-hide on any of the panels within Xpedition xDX
Designer.
To change your zoom location, drag the zoom window within the
Navigation View to a new area of the schematic sheet.
Links
Links are Annotate symbols that allow you to quickly traverse to a
corresponding link symbol on another sheet of the schematic. Connectivity
can also be linked through To/From Off-sheet link symbols.
25
Help System
Notice that several sheets are now open. Each page containing a
reference to C2 has been opened.
In the Output window, select the (component) hyperlink to quickly
jump to the capacitor with reference designator instance value of C2.
27
(continued)
Close all of the schematic pages using the X on the Tab to close each
sheet.
Note: You can use Window > Close All to close all of the sheets currently open
in your schematic.
Enter the net name BSYNC* (make sure to include the * wildcard
character) in the Find and Replace dialog box to search within the
Corporate schematic for all instances where BSYNC is defined.
Click Find All to search the entire schematic.
There are four instances of BSYNC- and four instances of BSYNC+ nets
across three schematic sheets.
Note: When you select a net, the appropriate schematic sheet is opened
and that portion of the net is selected. This functionality allows you to check
connectivity throughout your design very efficiently.
Select File> Close Project when you are finished to close the current
project.
Review Answers
1 The Navigator presents you with a central viewport into your design. All components,
nets, classes, pin pairs and other design elements are available for browsing and
querying from this common window.
2 Tooltips provide a quick and easy way to examine the properties of design objects
(components and nets). Depending on how you have set up the visibility of properties,
you can view information about these objects by simply holding the cursor over the
item for a few seconds.
3 The Xpedition xDX Designer user interface provides multiple ways to perform most
common design tasks. You can zoom in and out using the keyboard keys (F7 and F8),
press F9 and drag a zoom window, press the z key and drag a zoom window, use the
mouse scroll wheel forward and backward to zoom in and out, or use strokes.
4 Though the Navigator gives you the opportunity to browse the major elements of
your design, use the Find command to build complex searches and quickly find very
specific details such as all instances of a specific component value.
29
A project file (.prj) contains pointers to all of the files associated with
Xpedition projects. Some of these files include the Schematic database,
PCB layout database, configuration files, and log files.
The project database is stored in binary format in the /database directory.
This Integrated Common Database structure provides a single data
repository for a project and a framework for dynamic updates. The database,
continuously maintains connectivity, schematic and graphics objects, and
constraint data throughout the flow. This reduces both design time and the
risk of error inherent in creating and passing netlists between tools. When
using Xpedition xDX Designer, you never have to stop and remember to save
your work. Everything you do is always being stored. If you want to return to
a previous state, you can use Undo to remove your edits. Everything you do
between backups will be stored in the Undo queue.
In addition, you can create Backup points to rollback your design. You may
choose File > Backup Sheet at anytime to create a backup of the active sheet.
The Rollback Sheet function in Xpedition xDX Designer allows you to bring the
schematic sheet back to the last Backup version. Upon invoking Xpedition xDX
Designer, the Backup Sheet function is grayed out and the Rollback Sheet list
is empty. When you open a schematic, the Backup Sheet function is enabled.
The Rollback Sheet list is still grayed out until additional changes are performed
on the schematic. When you make changes following a backup then the File >
Rollback Sheet menu becomes active and lists the sheet backup timestamps. You
can use this menu to return the active sheet to the backup state. You can also
use File > Clear Backups to clear out all backups in the database. This is helpful
to compact your project file size. The tool also creates incremental automatic
backups for you using Setup > Settings > Project Backup.
iCDB
xDX Designer
Xpedition
xPCB Layout
Constraint Manager
Open the file default.prj in a text editor of your choice like Notepad.
Edit the KEY CentralLibrary line to the new Central Library path as
shown:
KEY CentralLibrary "C:\Xpedition_Evaluation\Library\
Library.lmc"
Add the KEY DBCFile line to the new Properties File path as shown:
KEY DBCFile "C:\Xpedition_Evaluation\Library\DatabookData\
Sample.dbc"
Review the project template file for other items you may want to
setup for future designs. Do not make any further changes at this time.
Save the file edits and close your text editor.
31
Creating a Project
If it is not already running, start Xpedition xDX Designer.
Select File > Close Project to close any open project.
33
Project Settings
After you create a project, you may need to change the project settings.
Throughout this evaluation, we will ask you to adjust settings using the
Setup > Settings dialog box. You can use this dialog box at any time to
customize your environment to your preferences.
You may need to change the library path for a new design. If you have other
libraries (perhaps used for previous designs) you can easily change the library
path to use them in a new design. You can also point to a path containing a
central library used by multiple users from a single library location.
35
Note: When you add a border in this way, you use a border symbol defined in
Setup > Settings > Project > Borders and Zones.
Right-click and select Change Border. Select csheet.1 from the Borders
partition.
Change the sheet size to a C size using the Drawing Size dropdown list in
the Properties window. Click OK to change border sheet settings.
Click the Fit All icon to Zoom Out and change the view so it centers on
the format.
Review Answers
1 Xpedition xDX Designer stores your design files in the project directory tree under the name of
your project. Project specific settings are saved in the project (.prj) file in your project directory.
2 There are project templates included with Xpedition. They are located at
[Drive]:\MentorGraphics\<release>\SDD_HOME\standard\templates\dxdesigner.
You can also create your own templates and save them in your writable or corporate WDIR
directory.
3 To quickly open a design, browse to the .prj file and double click it. This will launch Xpedition
xDX Designer and open the design file.
4 The changes made in Setup > Settings are stored in multiple system files, some
within the project directory, and some within the writable WDIR directory path. Most of the
changes are saved in the Project (.prj) file or the Xpedition xDX Designer.xml file.
5 Sometimes it is difficult to predict in advance just how much room your design might consume
on a sheet (or sheets). You can start a design with a specific border size. Any time during
the design process you can change the border to a size that more closely fits the design
requirement.
37
Click the Xpedition xDX Databook icon to open the Xpedition xDX
Databook window. The window opens with the default Search window.
Note: Xpedition xDX Databook is linked to the Evaluation Sample.dbc database
as shown in the Configuration information line.
To allow for more screen area, close or Auto Hide the Output message
window, if it is open.
39
Many schematic capture programs require a unique symbol for every part
number. This can be very time consuming and error prone, and may also
require creation of hundreds of extra schematic symbols. With Xpedition xDX
Databook, the same symbol can be used for thousands of parts, and those parts
can be easily located using queries.
41
Select the Query Builder again and click Back twice to remove the
additional query for the Cell Name, then click OK to reset the search to
the previous query.
In the Top Line of the Xpedition xDX Databook search window, in the
Cell Name column, select the = box, and note the functions available.
Choose = from the dropdown list.
Click the box to the right of the = Box in the Cell Name column and
select the CC1206 Cell Name from the dropdown list and press Enter.
Notice the quantity of available parts has been reduced as with the
previous query.
43
Now lets search for a part with a value of 10K, Cell Name of CC1206
and a Cost of less than 0.04 (cents).
Click Query Builder once more, click AND, then click Condition, set the
1st field to Cost, set the 2nd field to <, set the 3rd field to 0.04.
Note: You can use the Alternate Query method if you choose.
Select the Part 103-RES. Notice the entire line is highlighted and both
the symbol and cell can be viewed for the part by selecting the
dropdown list in the Preview window.
Click and drag that symbol onto the schematic and release your mouse
button where you want to place the resistor. You can also drag the
symbol directly from the Symbol Preview window into the schematic
or click Add New Component with All Properties.
Click Xpedition Cell Preview or select View > Other Windows >
Xpedition Cell Preview.
Note: If you dont see this button then you may need to enable the
toolbar in View > Toolbars > Addins.
Select the symbol you placed in the schematic or any part in the
Xpedition xDX Databook search window.
45
While in the Properties window, change the Value property field from
10K to 100K by entering the new value in the Value column.
Note: We made a unique change to a part so the part number no longer matches
the defined power rating. This condition could lead to a very expensive problem
due to the way parts are ordered through a companys purchasing department. Part
numbers that do not match corresponding properties generally lead to overstocks
and delays in schedule. Both are costly to correct and can be avoided if a Xpedition
xDX Databook configuration is in place. Lets look at how Xpedition xDX Databook
can find these inconsistencies and resolve them quickly.
With Xpedition xDX Databook still active and listing available resistors, select
and drag another schematic symbol onto the schematic sheet. There should
now be two new displayed symbols. (Follow the instructions in Step 7 in the
previous topic: Search and Place).
Change the Library: setting from Resistor to Capacitor.
Now assume you need a decoupling capacitor but have not decided on
the decoupling capacitor value to use. Select any available capacitor
listed in the Xpedition xDX Databook pane, then click Add New Component
with only Common Properties to add a generic component to the schematic.
Note: You will receive a Warning that the Component does not have a Part Number.
You will fix this later.
With the new part active on your cursor, move both the cursor and the
symbol over the working area and click to complete the part placement.
Note: If you look at the Properties Editor, you will notice the capacitor has no Value
property, not to mention many other missing properties. pre_rebrand_VLA can run
a complete verification to ensure all parts are compliant with the database.
Verification
Click the Selection Filter icon located on the toolbar. Enable only the
Symbol check box.
Click and drag a selection box or CTRL + Left-click to select the three
symbols we just added via Xpedition xDX Databook.
NOTE: You can also use this button for verifying an entire page if no items are
selected when it is activated. If you needed to run Verification on an entire
design schematic, you would click New Hierarchical Verification Window
button, located directly below the New Live Verification Window button.
47
Verification (Continued)
Fix the problem with the capacitor which is not correctly specified.
Double-click on the Yellow Circle.
A search window opens with the common properties automatically
applied as filters.
Select any part listed in the Xpedition xDX Databook dialog.
Click Annotate Component With All Properties to add the correct part
information.
Notice the circle changes from yellow to green and the Properties
Editor now shows the capacitor as a completely defined symbol/part.
Double-click on the part that contains the last remaining red circle.
Scroll through the window that appears and notice the properties in
red. Notice the Value is in red because it does not match the database.
Scroll over the Value property name, right-click and choose Remove
Condition.
The system searches the database and finds the part that matches the
previously defined conditions. Notice that the verify routine has locked
onto a single part.
The Properties window now shows that the resistor has all the
properties of the part you selected.
49
Review Questions
1 What is the advantage of using Xpedition xDX Databook?
2 Will Xpedition xDX Databook work with my existing component database?
3 How complex can I make my search parameters?
4 Why use Verification in Xpedition xDX Databook?
Review Answers
1 Sorting through a library of a couple of hundred parts might be tedious, but not impossible. Doing
the same for a library (or libraries) of thousands of parts would be extremely time-consuming
and difficult to manage. Fortunately, Xpedition xDX Databook provides the ability to perform very
complex filtering and searches on large databases of components and presents you with a selection
of candidate parts.
2 Xpedition xDX Databook will work with most ODBC-compliant databases allowing you to access
the wealth of purchasing and engineering data that may already exist within your company. This
connectivity also extends the capability to populate the properties of components in your design
directly from the information in your company database(s).
3 Xpedition xDX Databook allows you to build very complex searches so that you can quickly narrow
a search of thousands of components down to a select few for consideration in your design. These
searches are cumulative, so you can start out with a broad range of parameters and then add
additional qualifiers until you have found the desired part.
4 When creating a schematic with a large number of symbols, you may need to edit values and
properties as the design evolves. These changes can sometimes elude updating until later
in the design process. Verification allows you to periodically compare your design database
against your component database to resolve any changes or conflicts.
Note: In the following exercises, you will construct the schematic shown below.
51
Placing Parts
Previously we placed parts in a schematic using the Xpedition xDX Databook
search window. For these next few lessons we will use the CL Symbol view to
place parts. CL View allows you to place generic parts quickly, but you will need
to update the Properties within them using Xpedition xDX Databook Verification
prior to integrating your schematic with PCB layout.
Click Clear Filters and then expand the library partition Sample by
selecting the [+] item.
Find and place 145421 using the same method described in step 4.
Select the Library IC, and find the symbol 74192 using the top line
query method in the Symbol column. Select the Part 511-5V_IC.
Note: There are two cells listed in the Symbol Preview dropdown list: the
Default SO16, and the Alternate DIP16. Clicking each of them shows a
preview of the Cell.
From the dropdown list, select DIP16 and check the Fixed box.
Place the component on the schematic by clicking Add New
Component with All Properties.
Note: The component has been placed to use the Alternate Cell during
PCB layout. Checking the Fixed box tells the designer that the Cell Name
property is fixed for primary placement.
53
Note: Project > Boards > Special Components can contain as many Global Power and
Ground symbols as you need in your designs. It also contains Ports for hierarchical
designs and Off Page Links for cross referencing.
Right-click the 74192 symbol in the Favorites section and click Delete
item to remove it from the section.
Close the My Parts toolbox.
55
Copying Symbols
You are going to need two resistors in this schematic example. Press and
hold the CTRL key, then click to select and drag away from the first resistor.
As you drag your mouse, a copy of the resistor attaches to your cursor and
is ready for placement.
Make sure there is plenty of room next to the capacitor for 2 copies. If not,
move it by selecting the part and dragging to a new location.
Using the previous method (CTRL + Left-click and drag) add two more
capacitors.
Click and draw a selection box around the second GND symbol.
Note: Hold the ALT key while drawing your selection box and only objects
completely within the box will be selected.
Press the CTRL + C keys to create a new copy and place it into the clipboard.
Press the CTRL + V keys and a ghost image of the copied symbol is attached
to your cursor.
Click to place the new GND symbol to the right of the other two.
Note: Right-click to remove the part from your cursor once the new
part is placed.
Using Arrays
57
Rotating Symbols
There are three ways to rotate objects within Xpedition xDX Designer. The
first is to use the Rotate button. The second way uses the F3 button during
placement or move. The third way uses the options from the popup menu.
Lets review a few examples.
Rotate a Symbol
Click one of the resistors to select it. Click Rotate 90 Degrees.
Note: The Rotate 90 Degrees button is located on the Transform toolbar. If the
toolbar is not active, go to View > Toolbars and select Transform.
Click and hold on one of the resistors, then drag the cursor.
Note: The symbol moves with the cursor.
While you move the part, press the F3 key and notice the part rotates.
Release the mouse to place the rotated resistor.
Right-click on one of the capacitors, then select Transform > Rotate
from the popup menu.
Note: The part rotates at the cursor.
Click the Flip icon on the Transform toolbar. This flips the entire symbol
along the X-axis. Click Flip again to return the symbol to normal.
Select the same IC again, this time click the Mirror icon. Notice the
Symbol now mirrors along the Y-axis. Click Mirror again to reset the
symbol to normal.
Place the PWR symbols as shown and note the grid alignment markers
show when the symbols are aligned in both the X and Y axis.
59
Review Answers
1 You can easily mirror a symbol during placement by using the Mirror
icon on the Transform Toolbar, or right-click and select the Mirror
command from the popup menu.
2 Though the Xpedition xDX Designer libraries contain a selection of PWR
and GND symbols, you are free to add any custom symbols to the library
that you require in your design.
3 Many designs contain groups of identical components such as switches,
LEDs or decoupling capacitors. For example, some designers put all of
the decoupling capacitors for a design in a group arrangement on the
last page of the schematic. Using the Array command, you can place
large groupings of these components with a few mouse clicks.
4 Properties do rotate with a symbol. However, you must be careful when
doing this if you want the visible properties to maintain a specific visual
relationship to the component. In some cases, such as discrete
components (capacitors, resistors, diodes), it is preferable to create a
separate symbol for a horizontal orientation and another for the
vertical orientation. This eliminates the need to make any fine tuning
adjustments to the visible properties after you place the symbols.
61
There are several ways to add nets to components. This section demonstrates
several.
Connecting by Abutment
Click Net (or enter n using the keyboard) to enter Add Net mode.
Add a connection to Pin 4 of the IC. Select the pin and drag the
connection to the left. When the net is long enough release the left
mouse button to drop the connection.
Repeat step 7 for pins 5, 9, and 6 on the IC located on the left hand side.
Press ESC or click Select to exit net mode.
To add the connections, frame select the upper pins on the two
capacitors in the order you want them to be connected. Note the
connection ordering numbers. Stay in Multinet connection mode and
proceed to the next exercise.
NOTE: Do not right-click to exit the command.
While still in the Multi-net connection mode, select pin 7 on the left IC.
While pressing the CTRL key, also select pins 12 and 11. Note the
ordering.
Now release the CTRL key and select Pin 2 of the lower left resistor,
then select Pins 1 and 2 of the upper left resistor in the proper order
as shown.
63
Left-click to select the resistors upper pin to connect the net to it.
Release the left mouse button when the Connectivity Advisor shows
the connections, and the capacitor splits the connection and connects.
Create the connections as shown on the schematic using any of the
methods you have learned. Move the components if needed, as you
have been shown in previous lessons. Do not worry about assigning
signal names at this point. You will do that next.
65
Draw the section to cut the nets between the two ICs.
Release the mouse button to complete the net cutting.
Press the ESC key to release the Cut Nets mode.
Click Undo
Naming Nets
Double-click on the Net from pin 13 of the IC symbol on the left side
(bottom of device).
Note: If you have difficulty selecting a net, set the Selection Filter to
enable Net and Bus.
Double-click on the net connection from pin 21, then name this signal
C/BE2.
Click in an open area to release the signal name and the selected
connection.
Now select the signal name again, and drag the signal name to its
desired location.
67
In the Navigator, right-click Rename, then enter the desired name and
click Enter. Rename the net connected to pin 4 to ~CE. Using a ~ will
create an inverted pin name.
Another way to set pin inversion is to use True/False in the Properties
window.
Notice that all pins have net stubs and their names correspond to the
associated pins.
Delete this symbol and its connected net stubs from the schematic.
Note: The properties for this component are displayed in the Property window.
To make a property type visible you can check the box next to the property.
Check the box next to Cell Name. Notice Cell Name is now shown below
the symbol.
To make only the value visible check the box next to DIP16 (fixed) and
uncheck the box next to Cell Name. Now only the value DIP16 (fixed) is
visible.
69
Note: If any new Properties are required in your designs, you must add them in
Xpedition xDX Library Manager first. After making a change, you will have to run
Tools > Update Libraries or exit and re-invoke Xpedition xDX Designer before the
properties are available for assignment.
Select the IC on the left then and you will add some properties.
In the Property window click in the blank cell at the bottom of the list
and select Part Number from the list.
Enter 510_5V_IC for Value and turn off the visibility check boxes
for the Property and Value.
Continue to enter the following property information:
Cell Name = SO24L
Datasheet = C:\Xpedition_Evaluation\Library\Datasheets\
MC145421.PDF
Note: This last step links the part to a datasheet. A link can be made to
any type of document or website. The document can be launched
directly from the schematic.
71
Creating a Bus
Note: You could also enter SymbolTest into the search field above the
results display area and let Xpedition xDX Databook find any matches in the list
of libraries.
73
Select the nets you want to use. In this example, we are going to use
A[15:8] from the Rip Nets dialog to connect to the top symbol.
Use the Add Properties Mode button to invoke the Add Properties
dialog box, and set the following.
Type = Net
Property = Name
Range = Enabled
Prefix = A
Value Dec= 7 and Delta = -1
This names all of the nets and allows you to use the cursor to drag
them to connect up to the bus.
Click on one of the nets to drag them towards the Bus. When the nets
are over the bus, release the left mouse button to connect them.
75
Review Questions
1 Do I need to connect every net at all points?
2 Why add names to nets?
3 Which properties should I make visible in my designs?
4 When would I add properties to parts simultaneously?
5 Why would I use a bus to represent connectivity of multiple connections?
Review Answers
1 As long as the schematic accurately represents the desired connectivity, it is not necessary to connect
every net to all points. Connectivity can be established by naming the nets, and as long as all net stubs are
identically named, connectivity will exist.
2 In addition to establishing connectivity, net names also help identify signals in very complex designs. Some
designers will name their nets with a convention that represents the source and destination of the net (such
as FPGA_A\S3_A_MEM_A_ADDR0). This makes it easy to identify the purpose and connectivity of a net just
by examining the name.
3 Which properties you choose to make visible is primarily a decision based upon the intent of the
document. Most designers choose to have reference designators (Ref Designator) visible along with
component values, tolerances, wattages and component names. This is a very individual decision and each
company may find it necessary to set their own standard. Xpedition xDX Designer allows you to set visibility
of properties down to the individual component level.
4 If your design contains a quantity of identical components, it may save a lot of time if you select the
group of components (either in the workspace or through the Navigator) and then assign/change the
properties for all of the components simultaneously. This helps to promote uniformity and continuity across
the design. Remember to verify the components with Xpedition xDX Databook when you have finished the
design.
5 You can accomplish connectivity by using individual nets to connect each point, or by naming each of
the nets. Showing all of the connections on a schematic can make the schematic difficult to read and add
unnecessary visual clutter. An alternative is to use a bus to represent a group of nets (such as an address or
data bus) that connect to a number of points (or sheets). This allows you to show the connections at the
components but represent the group across the design with a single (wide) net line. The bus is identified
with a label that shows all of the signals represented by the bus (such as ADDR_BUS_0:15).
Entering Constraints
From the Start Page in Xpedition xDX Designer, click Recent, and select
Lesson1,
C:\Xpedition_Evaluation\Lesson1\Lesson1.prj.
Double-click on Corporate to open the first sheet of the schematic.
Select the [+] next to Corporate to see all the schematic sheets.
Double-click on the PCI_Connection sheet to open the schematic
sheet.
To open the Constraint Manager Spreadsheet Editor, select the
Constraint Manager icon from the Main toolbar, then select Constraint
Manager.
Note: All Constraints within the spreadsheet editor are maintained within the
iCDB for both the Xpedition xDX Designer and Xpedition layout tools.
77
Menus
Toolbars
Navigator
Pane
Output
Window
Status Bar
Constraint
Tabs
Spreadsheet Workspace
Copy
Cut
Paste
Undo
Settings
Redo
Cross
Probing
Stackup
Editor
Enable/Disable
Filters
Filter
Levels
Constraint Group
Filters List
Creating Rules and Constraints with Constraint Manager
79
Chained Netline
Order
Show/Hide
Navigator
Sort
Descending
CES
Diagnostics
Insert
Delete
Next
Comment Comment Comment
Edit
Previous
Comment Comment
General
Clearances
Class-to-Class
Auto Assign
Differential
Pair
iCDB Project
Backup
Find in
Manual
Online
Table of Contents
Remove
Differential
Pair
Select the Zoom Area button and generate a zoom box around the
upper left hand corner of the screen.
In the Constraint Manager window, on the Main toolbar, select
the Cross Probe icon. You can also turn on Cross Probing using
Setup > Cross Probing. This allows you to dynamically highlight nets and
pins within the spreadsheet editor, or on the schematic, depending on
where you select the items.
Click the CLK_IN net from within the working area of the schematic.
Note: If you are not able to select the net, you may need to modify your
Selection Filter settings. Click the Selection Filter button.
81
From the Constraint Manager menu, select Filters > Levels > All. The full
hierarchy of the nets becomes available within your design, including:
from-tos, pin pairs, and pins.
Notice that the nets now have a + next to each of them. Click the +
to expand the net BSYNC+ and see all of the pins within the net.
Click the box to the left of the pin P1-1 below the BSYNC+ net and note
in the schematic window that you have cross probed to the pin level
within the net.
83
Click Cancel.
85
Creating Clearances
In this exercise, we will create a High Speed clearance used for Clock
signals. In PCB layout, this rule is often referred to as a 3W rule.
It is used on signals to reduce crosstalk between other signals in a
design. The 3W means 3 times the width of the signal trace, spacing
from center to center. Often, a PCB designer may enter these rules
in the board, but with Constraint Manager we can create them in the
schematic and pass them to the PCB designer.
First, lets look at the Trace & Via Properties for the CLOCKS
In the Navigator, expand Trace & Via properties and click CLOCKS.
Note that the Typical Trace Width is set to 6 for all Clock signals.
Now that we know the trace width, we can build a 3W rule for the
clock signals with a Trace to Trace Spacing of 12.
87
Name the New Net Class CLOCK2 and click the CLOCK2
Net Class.
Right-click on CLOCK2, and select Assign Nets
In the Assign Physical Nets to Net Class dialog box, make
sure the Source Net Class is Default and the Target Net
Class is CLOCK2.
In the Search Bar, enter CLK_IN, then click on the Search
icon.
Click > to move the net CLK_IN to the CLOCK2 Net
Class, then click OK.
Constraint Editor is an embedded constraint editor that you can use directly
within Xpedition xDX Designer or Xpedition xPCB Layout. Constraint Editor
improves your design productivity through context-driven operations that
allow you to view and edit constraint data while editing your design.
In Constraint Editor, change the Net Class for all of the selected nets to
PWR_020_MIL by selecting it from the dropdown list for the net in the
first column. Then right-click on the Netclass row in the first column
and select Apply Value to All Columns.
Using Constraint Editor, find the nets VDDQ3.3V and V2.7 and assign
them to Net Class PWR_020_MIL using Constraint Editor.
Close Constraint Editor.
89
Click Zoom Area and window the area in the upper left hand
corner of the page near the USER I/F CONNECTOR.
Select the signal BSYNC-, then while pressing the CTRL key
select the signal BSYNC+ .
In the Constraint Manager Spreadsheet (which should still be
open), the nets BSYNC- and BSYNC+ are selected.
Create a New Net Class called BSYNC.
While hovering over the BSYNC+ net in Constraint Manager,
right-click and choose Assign Net(s) to Net Class from the
popup menu.
In the Select Net Class dialog box, select BSYNC and then
click OK.
In Constraint Manager, select BSYNC+ and BSYNC-, then
right-click and choose Create Differential Pair from the
popup menu. Notice that the nets are now linked as a Diff
Pair and their Net Class is set to BSYNC.
In the Select Constraint Class dialog box, select the BSYNC constraint class,
then click OK. The Diff Pair is added to the Constraint Class.
Note: You may need to sort Constraint Class/Net column to see the Constraint
Class. You can also select the BSYNC constraint class in the Navigator to filter out
everything except the assigned nets.
Select the BSYNC+, BSYNC- diff pair if it is not still selected, then click
the Netline Order button on the Topology toolbar.
Note: Currently, the Diff Pair is shown as a Custom Topology with No Ordering
in Constraint Manager.
91
Note: You may wish to set your selection filter to only select symbols
during this exercise.
the
93
Enter some text, for example: Place components in the room Analog
Right-click the entered text and change the size to .250 in.
To easily edit the text, double-click it and highlight text to be edited as
needed.
95
Review Questions
1 Why would I want to use rules and constraints?
2 If constraints are added in the schematic, can they be edited during the layout process?
3 When would I want to use a Constraint Class?
4 Can I assign different constraints to individual differential pairs in my design?
Review Answers
1 Rules and constraints help establish structure in the design. Not all signals in a design can be routed together without
introducing interference and/or crosstalk. Rules and constraints allow you to create specific routing conditions for each
signal (or signal type) in the design, each with its own set of spacing and layer assignment rules. The more complex the
design, the more helpful these rules and constraints will be.
2 Constraints created in the schematic within Constraint Manager are passed to the Layout environment. Once the design is in
Layout, changes can be made within Constraint Manager and can be back annotated to the schematic. Constraint Manager
and the iCDB keep the design constraint data synchronized.
3 Sometimes you will want to assign the same constraint (spacing, net length, etc.) to a group of similar nets. Rather than do
this individually, you can group these nets into a Constraint Class. Any constraints assigned to the Constraint Class will be
automatically assigned to all of the nets in that class. This also simplifies the process of making edits or changes.
4 The Constraint Manager Spreadsheet is extremely flexible and allows you to assign rules and constraints to a large variety
of design elements. This includes: groups of nets, individual nets, differential pairs (including at the individual pair level)
and individual pin pairs. The ability to exercise this level of control over the design helps you meet the most demanding
requirements.
Launch Xpedition xDX Variant Manager using View > Other Windows >
Variants.
A new window opens for Xpedition xDX Variant Manager. If it shows No
Project Loaded simply Click on Corporate in the Navigator to open a
schematic sheet.
97
There are three tabs in the Settings dialog box. The General Tab
includes settings for naming unplaced parts as well as report options.
The Unplaced keyword appears in the appropriate cell for parts that you
choose to not be installed during the PCB Assembly process. You can
specify any string as the keyword.
98 Variant Manager
The Output format controls your database query results. The Part
number feedback line allows you to display more information
about a particular part. This will be shown later.
The Query results format controls the results shown for the
Replace function. This determines the columns displayed and the
filter options to help you choose a replacement part.
Note: Because you have associated the Part number attribute to Part
Number, we also want to be sure that it is included in the Query results
format.
99
Creating Variants
Select the Variant Definition Icon.
From the Variant Definition dialog box, create two variants by clicking
on the Create New Variant button twice.
Name the two variants Variant1 and Variant2 respectively.
Note: Click the cell to edit the values.
Defining Variants
Now that you have configured Xpedition xDX Variant Manager and created two
variants, you will define the specific variant parameters.
Unplacing Parts
Be sure the Transmit and Receive mode buttons are both depressed to
enable cross-probing.
Click in the cell under the Variant1 column, next to C9. Xpedition xDX
Variant Manager allows cross probing from the schematic into a variant
and vise-versa.
Click [-] next to the schematic sheet Analog_Switch to compress the view.
Note: If you don't see the Analog_Switch [+] icon, make sure that Flat Design
View is unchecked.
101
In Variant2 you will replace (substitute) parts. Select the cell for C5 in
IO_Port2, then right-click and choose Replace.
A new window appears that lists the possible replacement parts.
Note: The columns come from the settings in a previous lesson. All of
the replacement parts have the same PKG_TYPE as the original part
because we set the VM Match to PKG_TYPE = in our .dbc configuration
as shown in the Appendix at the end of this Evaluation Guide.
The columns in this window not only provide additional information but
they also act as filters. Select one of the column headers and notice you
can either sort (ascending or descending) or filter (on available values)
based upon the part you are looking for.
Replace C5 with the smallest value available for a capacitor, by selecting
the Value column and then sort Ascending, then double-click the first part
available, 12308-CAP.
In the design view, find and select R29 on the PCI_Connection sheet in the
upper right corner of the sheet. When you select the part in the design
view, it will also select in Xpedition xDX Variant Manager.
103
Note: Dont forget that you can also filter on Library if you
know what Library your replacement part is in.
Select File > Close to close all schematic sheets except one so the
Xpedition xDX Variant Manager remains active.
Note: You can also use the [X] on the schematic sheet tab to close any sheet.
To create the variant schematics, select the title header for the
Variant1 column and then click Create Variant/ Function Schematics.
A message appears in the design view informing you that Xpedition xDX
Designer is in Xpedition xDX Variant Manager Mode (All schematics are
read only). Variant name: Variant1 .
Using the navigator, select the BlockReUse sheet and select IO_Port1.
Click Push .
The parts represented in blue are the ones we unplaced in Variant1. In
a previous lesson, we set a particular color (teal) for all unplaced variant
parts.
We also had the option to Markup rather than color unplaced parts which
would have resulted as shown.
Or, we could have configured the Xpedition xDX Variant Manager to delete
unplaced parts as shown.
Click Reset Schematics to Master.
105
Review Answers
1 Many products are built around the concept of a core product design and a number of optional features. Xpedition xDX Designer
supports this type of design through the use of variants. Each variant design can have specific components placed, unplaced
or replaced. Use Xpedition xDX Variant Manager to specify and track separate BOMs.
2 The variant data is also forwarded to Xpedition xPCB Layout so you can create individualized Assembly Drawings for each
design variant.
3 Xpedition xDX Variant Manager allows you to create as many variants of the design as you need.
4 Xpedition xDX Variant Manager supports a wide variety of output formats so that you can deliver the information to
downstream users in a suitable configuration. You can generate output in HTML, text, Excel spreadsheet, CSV files, and BOM
formats so that Engineering, Manufacturing, Purchasing and others can all share the same design data.
107
The list on the left side of the dialog box contains some of the properties
currently in the design. Using the four buttons above the list, you can
add, remove and modify the order of the property columns included
in the output. Each of the properties in the Columns list will become a
separate column in the output file.
Adding A Property
Select the last property in the list, then click New to add a new property
at the end of the list.
Note: To add a property in the middle of the list, click on the list item directly
above the location where you wish to add the new property. You can also use the
Up and Down Arrow buttons to reposition the order of the properties in the list.
Verify that Property is selected for the Type, and for the Property, select
Description from the dropdown list to specify the content of the column.
Enter a Column Width of 50.
Enter 0 for the decimal places.
The new property is now complete.
109
Editing A Property
Double-click the cursor over the Column Label Name C0ST. This allows
you to edit the name.
Change the Column Label Name from C0ST to COST.
You can rename any of the Column Label Names as your reporting
needs change.
Define the desired output type (Text File, HTML or EXCEL) by choosing
Text File from the Output Format dropdown list.
Click Run to generate the report.
111
Review Questions
1 Is a BOM a printed report or a data file?
2 How much detail can be contained in a BOM?
3 Will a BOM show detail for each part or condense the list of identical
parts?
4 Can I save a BOM setup for use in a future design?
Review Answers
1 You can generate a BOM in different formats to suit the needs of the
target audience, including Excel spreadsheets, PDFs, text files, CSV files
and others.
2 A BOM can contain as much or as little detail as you require. During
the setup of the BOM, you are offered a number of options to fully
customize the report.
3 You can configure the BOM to show both. Typically, you show a
condensed listing that has one entry for each different component and
a field that indicates all of the Reference Designators that use that
particular component. Alternately, you can also include a listing that
includes one entry for each component in the design.
4 You can save specific BOM configurations in the Reports dialog box. These
are stored with the Xpedition xDX Designer application configuration and
are available in future design project sessions.
Xpedition xDX Designer LineSim Link enables you to export a net to HyperLynx
LineSim for pre-layout simulation.
From the Xpedition xDX Designer start page, select Open, then browse
and select
C:\Xpedition_Evaluation\LessonFinal\LessonFinal.prj.
Double-click the CORPORATE schematic in the Project Navigator.
Double-click on the memory schematic sheet in the Project Navigator.
Zoom to the upper left IC shown on the memory sheet. Select the IC
U15.
Note: Set the Selection Filter to Symbol if necessary.
HyperLynx LineSim
HyperLynx LineSim will open with the Free-Form
schematic. The DATABUS0 net
is loaded for simulation using
the models assigned in
Xpedition xDX Designer.
In HyperLynx, select
the Edit Stackup icon.
Review the cross
section of the 6
layer board, then
close the Stackup
Editor.
13
16
14
15
115
18
17
19
22
To assign values to the terminators, click the Run Terminator Wizard icon.
Choose 5% from the Apply Tolerance dropdown list.
23
Click Apply Values, then click OK. The value is assigned to the terminators.
24
In the Digital Oscilloscope window, click Erase and rerun the simulation with
RC Termination and the values assigned. You will notice that we cut down the
overshoot by more than double (about 1.25V). We can continue to refine if
necessary.
25
26
Close Digital Oscilloscope and exit HyperLynx LineSim. Click Yes to save
changes, then select File > Close Project.
22
21
23
22
24
117
Review Questions
1 When would I want to use HyperLynx LineSim?
2 How does HyperLynx LineSim know how the signal will perform on the
printed circuit board?
3 How does HyperLynx LineSim fix signals that dont perform as expected?
4 Does HyperLynx LineSim select the actual components for terminators?
Review Answers
1 HyperLynx LineSim lets you model critical signals in your design and
attempts to predict their expected behavior in the final board design.
You can model a signal, use the tool to experiment with corrective
measures, and save the simulations for future results comparisons.
2 HyperLynx LineSim uses industry standard component models to
predict signal behaviors along with sophisticated internal algorithms
and proprietary technologies.
3 HyperLynx LineSim features Wizards that can suggest possible
modifications to your signal chain to correct aberrations and
performance issues. Simply run the Wizard and the system presents you
with suggestions to correct signal integrity issues.
4 HyperLynx LineSim offers suggested values for terminators, not specific
part numbers. You must determine which manufacturers part number
will meet the required specifications for the design.
119
121
123
Close the Measurement Tool and EZwave, then select File > Close Project.
125
Review Questions
1 What models can be used for HyperLynx Analog simulation?
2 Can HyperLynx Analog simulation results be back annotated to the
schematic?
3 Can measurements be performed in EZwave window?
Review Answers
1 Spice models can be used for HyperLynx Analog simulation.
2 Yes, by selecting the Show Back Annotation button, the schematic will
be updated.
3 Yes, in the EZwave window you can measure different parameters of
the wave form. For example, Peak-to-Peak voltage or Frequency.
Database Integration
This lesson will highlight the basic tasks utilized in Packaging, Integration through a
Layout Template, Forward Annotation, and setting up embedded and cross probable
views of the schematic and PCB databases for use in completing the design.
127
and
open
the
Note: If you have not done so, first run an Xpedition xDX Databook Verification
on your design and make sure you have ALL Green Lights.
Review the Xpedition xDX Databook lesson if you need to.
Click Tools > Package to open the Packager setup dialog box. Take a
moment to look over the available settings. We will leave the settings as
shown for this exercise.
Click OK to run the Packager.
Success! Your schematic has been Packaged for integration without
errors. Review the output in the Packager tab in the Output Window, if
you did have errors, you would need to correct them and would then
re-run the Packager.
Note: Successful Packaging is very important to you as a designer. It
means that all of the parts on your schematic match pin for pin and
property for property with the Library. This is a key element
that saves you time with the Correct by Construction methodology in
Xpedition.
From the Start Menu, select Start > All Programs > Xpedition Enterprise
<release> (32 or 64-bit) > Data Management > xDM Library Tools to
open your Library. The Library management environment opens.
129
Now you have an error free and packaged schematic database. You also have
a set of Layout Templates in your Library you can use to create new PCB layout
databases.
All we need to do now is integrate them
Click OK, then click Yes to answer the PCB Directory message.
Click OK to close the Import Layout Template warning.
Note: When Importing a PCB Template into your design project, any
previous layer stackup settings will be overwritten by the imported
template.
Note: Typically you will answer Yes and Project Integration will load
automatically to start Forward Annotation. In this lesson, we will walk you
through the individual steps.
Project Integration
Xpedition has opened the CORPORATE PCB design, and you
will see the template we chose from the Library.
Notice the Traffic Signal lights in the lower right corner of
the Status Bar. The First Amber Light signifies that there are
schematic changes ready to be Forward Annotated to the PCB.
Click Setup > Project Integration...
Click Close.
Review the settings in the Project Integration dialog box so
they are set as shown.
131
Project Integration
(continued)
Prior to running Forward Annotation, you used the Additional Options button
in the Project Integration dialog box to create files for later use. These files
are the Embedded Xpedition xDX Designer and Xpedition xPCB Layout views.
Right-click inside the xDX PCB Viewer window and select Show/Hide
Toolbar to open the xDX PCB Viewer window display controls.
We will learn more about these views and how to use them effectively in your
design process in upcoming lessons.
133
Review Questions
1 Why do I need to package the design?
2 Why use Xpedition xDX Designer to Xpedition and Project Integration?
3 Do I need to create a PCB Layout Template?
Review Answers
1 Packaging your design is an essential step in making sure that all of the
symbols placed in your schematic match the physical component land
patterns within the library. It also checks the logical pin information
between the symbols and the components. It is a key element in
making your design Correct by Construction.
2 When you have finished your schematic, you need to forward annotate
the design to Xpedition xPCB Layout for physical design. Instead of manually
sending files back and forth, Project Integration lets you establish a seamless
bidirectional link between the applications and automatically pass design
data from one application to the other. This simplifies the process and
eliminates any possible problems that might be encountered in a manual
data exchange.
3 Several PCB Layout Templates are included with the installation of
Xpedition xPCB. You can use these for your designs, edit them for your
requirements, or create new ones that are specific to your companys
requirements. In order to integrate your schematics with a PCB layout
database, you must have at least one PCB Layout Template in your
Library.
135
Status Bar
Toolbars
Workspace
137
Toolbars
All of the Toolbars in Xpedition xPCB Layout are Dockable/Undockable in
different locations within the Editor Window. They are fully customizable,
so you can add or remove buttons that you commonly use in your designs.
Add Toolbars by selecting View > Toolbars, and choose the toolbar
you want to add. The example shows the Route toolbar.
You can Order and Dock Toolbars along any edge of the Editor
Window simply by dragging them to a new location.
You can Undock Toolbars by dragging them away from the edge.
Re-Dock them by dragging them back to the edge.
Highlight
Selected
Undo
Find
Redo
Fit
Board
Next
View
Select
Mode
Place
Mode
Push Swap
Parts
Dissolve
Group
Align
Top
Align
Right
Align
Bottom
Net
Explorer
Plow/
Multiplow
Design Properties
Status
Rotate
180
Automatic Rotate
Testpoint
90
Assignment
Draw
Mode
Hug
Manual Hug
Route Reroute Tune
Trace
Sketch Route
Style
Toggle
Place Tentative Use Snap Hover Previous
Snap Snap Keypoint
Snap Point
Place Static
Snap
Remove
Hangars
X-Y
Readout
Swap
Diff Pair
Add Fanout Route Sketch Tune Manual Multiple Auto Gloss Copy Swap
Via
Router
Saw Tune Hug Traces Route
Trace Pins
Display Scheme
Dropdown List
Change
Netline
Manipulation Width
Swap
Gates
Modify Trace
Corners Drops
Plane
Teardrops Assignment
Plane
Classes
Parameters
Xpedition xPCB Layout Environment
139
Toolbars
(continued)
Snap To
Draw Grid
Active
Radius
Add
Add
Polyline Rectangle Properties
Add
eDxD
View
Add
Circle
Print
Preview
Tile
Project
Add 3D Window
View Horizontally Integration
Add
PCB
View
Cascade
Window
Create
Delete
Place
Draw
Copy
Polyline or End Point Tangent
Copy Perpendicular Polygon
Arc
Handle
Flip
Rotate Send
Horizontal
Backward
Copy
Parallel
Join
Dissolve
Polyline or
Polygon
Trim
Extend
Segment
Line
Scale
Merge
Select Object
Handles
Subtract
Gerber
Tile
Window Plot Setup
Vertically
(continued)
Move
Fix
Unfix
Unlock
Copy Rotate 90
to
Clipboard
Change
Layer
Semi-fix
Lock
Angular
Place an
Dimension
Place Dimension
Place
Along a
Stacked Between 2 Linear Ordinate
Dimension
Elements
Linear Element Dimension
Delete
Place
Dimension
Dimension
Params
Inside
Area
Selection
Reset
Selection
Measure
Distance
Center
Mode
Segment
Mode
Measure
Minimum
Distance
Edge
Mode
Centerline
Mode
Cumulative
Mode
Measure
Readout
141
Extended Tooltips
All of the toolbar icons contain tooltips to help you understand the
commands you select. Xpedition xPCB Layout also contains extended tooltip
animation for most of the commands on the toolbars. These animations
provide you with a brief video of how to use the command. Quick-key
commands are also provided within the tooltips.
Select View > Toolbars > Route. This adds the Route toolbar to the
toolbars section of the interface.
Hover over the Plow or Multi-Plow selected nets icon. The normal
tooltip is shown along with the Quick-key command.
Hover over the Plow icon again, but leave your cursor over the icon for
brief time (about 3 seconds). The animation for the command begins
playing and shows additional information about the command usage.
Keyin Commands
Entering ? in the Keyin Command dialog box will open Help for Keyin
commands.
143
Component Explorer
This spreadsheet interface allows you to create Component
Planning Groups, Filter and Mark components. You can
use this with Display Control features to view Netlines for
Marked Components, Nets Between Marked Components,
and Nets From Marked Components functions to show only
the netlines of interest.
Component Explorer helps you navigate to the components
in your layout and reduce the time required to complete
placement.
Net Explorer
This spreadsheet interface provides methods to organize and view nets. You can
create netline Planning Groups to display only the netlines you want to view.
You can also apply Filtering and Marking to netlines, and can use the same
Display Control Marking capabilities used in Component Explorer. Common
features between these two navigation tools means you do not have to learn
different interfaces.
Net Explorer helps you view the nets you need to route and reduces your
overall routing schedule.
Editor Control
In Xpedition xPCB Layout, there are many option
settings that you can use while placing and routing
your layout. These settings are controlled with
Editor Control. You can save groups of settings in
Editor Control as schemes for recalling later in a
design or share with other designs.
Select Setup > Editor Control or click the
Editor Control icon on the Standard
Toolbar.
145
Display Control
Display Control provides access to the commands and options that define the
display view characteristics and selection filtering in your design. Each of the
Display Control tabs shares a common set of elements: color boxes, radio
buttons, item check boxes and group check boxes. These provide an intuitive and
consistent environment.
The Display Control interface is also customizable. You can Hide sections that
you do not use often to increase the screen area for the sections that you
do use. A Favorites section is also available to place items that you use often
during a design to increase productivity. You can save all of these customizations
to a Local, System, or a User Defined location Scheme for use with other
designs.
As with Editor Control, Display Control is a primary navigation tool used during
your design process.
Note: Since Display Control is used often during a design, you may wish to
Auto-Hide it.
In Display Control, click the Scheme dropdown list and choose All Off.
In the Global View & Interactive Selection section of the Edit tab,
expand Board Objects and enable Visibility for all of the objects.
Zoom to the lower left of the board and hover your mouse cursor over
the Board Outline and note that nothing highlights.
In the Global View & Interactive Selection section, enable Selection
for all of the objects.
Repeat step 5 and note the Board Outline now highlights and can be
selected.
The Search Bar appears, and the first instance of the text Net in
Display Control appears highlighted.
Click the Find next button in the Search Bar to find the next instance of
the text Net in Display Control.
Note: You can also use Find previous for your searches.
Once you have found the object you were searching for, click Finish
search.
147
When designing in Xpedition xPCB Layout, you are in Select Mode. This mode
uses the Selection Filters in Display Control to provide intelligent cursor
feedback and context sensitive right mouse button menus based on the
objects you select.
Hover the cursor over the Fiducial. Note the Locked Cursor.
Note: The Status Bar also provides information on the object.
Repeat step 1, but note the Move Cursor showing that this fiducial can
be moved.
Repeat step 2 and click Fix/Lock > Fix. Note the Fixed Cursor.
Selection List
In Xpedition xPCB Layout, selected objects are placed in the Selection List.
You can easily access this list to verify or refine a selection set.
Drag a frame select to define a selection area around the Board Outline,
Fiducial and Mounting Hole as shown. The objects are selected.
Right-click and click Selection > Selection List.
The Selection List shows four objects selected.
You can select any object in the list to: Fit It in the view, Blink It so it
can be easily dectected, Define the Sort Order, or Remove it from the
Selection set.
Close the Selection List.
149
Adding Views
Xpedition xPCB Layout allows you to add view windows to create multiple work
areas that can be set for different graphical settings and areas within a design.
These views are used individually but updated simultaneously.
Select Window > Add PCB View.
Fit the board and select Window > Add 3D View to open the 3D layout
editor window.
Expand the Options section of the 3D tab and review the visualization
options in the 3D editor window. Try toggling on and off a few of the
options to see the changes.
NOTE: The user has complete control of the photo realistic capabilities of the
3D editor window.
151
Drag the Shift + Middle Mouse Button to rotate the design showing
the back of the board.
Drag the CTRL + Middle Mouse Button to tilt the design.
In the 3D tab of Display Control disable Soldermask, and enable
Include Internal Layers in the Options section.
Enable Z-Axis Scaling and apply a value of 10.
Zoom into an area of the board to see the internal layers and vias
structures.
Hint: You may need to rotate and tilt the design more to visualize the
internal structures within the board.
153
Now that you have seen Xpedition 3D Layouts ability to control and view all
of the board elements in your design with a photo realism that looks like the
actual manufactured product, the challenges of designing in the 3D realm
have been removed.
We will explore more of the 3D Layout capabilities in the Placement lesson.
Review Questions
1 Do I need to have all of the Toolbars visible?
2 Can I create my own menus and toolbars?
3 Are my Favorites and Hidden Rows saved with my schemes?
4 Can I view multiple schemes at the same time?
Review Answers
1 Some designers like to have all of the toolbars visible, but this is your
choice. In Xpedition xPCB Layout, all of the commands needed during a
design session are available on the Standard Menu. Additional
commands are also on right mouse button context sensitive menus and
the Action Keys.
2 Using the menu and toolbar Customize menus, you can create menus
and toolbars that contain only the commands you wish to use. These
are saved into your local configuration.
3 Anything you change in Display Control that you save into a scheme is
saved. This includes Favorites, Hidden Rows, and also anything in the
Color by Net, Class, or Group sections.
4 Only one scheme per Editor Window view is allowed, but by using
Multiple PCB view windows, you can use different schemes in each
window, and move easily between the windows as you design.
155
Setup Parameters
General Settings
You need to change the outer layers of the design to Buildup layers. Click the
dropdown list for Laminate 12 and change to Buildup 12. Repeat the steps
for Laminate 5-6 and change it to Buildup 56.
Click the New icon to add a via. A new column appears in the dialog box.
In the new via column, for the Padstack row, click the dropdown list and
select the VC025D010P_UVIA_NSM via padstack. This via padstack is a
Micro Via, typically laser drilled during PCB fabrication.
In the new via column, click in the green box for the Buildup 12 row. This
establishes the via padstack to be used when routing between layers 1 and 2.
Using the previous steps 3 through 5, create a new Micro via that will be used
to route between Buildup layers 5 and 6.
Again, use the previous steps 3 through 5, select the padstack VC060D030P
from the dropdown list to create the Buried via padstack on Laminate layers
2 through 5 that will connect the 2 Micro vias, creating a 141 HDI via
structure.
Click the Sort icon and review the Via Definitions you created. They should
match the figure shown. You may need to click the sort icon a second time
to match the screenshot.
157
Via Clearances
Setup Parameters
Review the figure shown for the Layer Stackup settings you will use
in your board.
You can also change the Layer Name in the Stackup Editor, but the names
must be unique.
Select the text entry field in the Layer Name column for SIGNAL_3
and enter the name change to PLANE_3.
Repeat step 10 for Layer Name SIGNAL_4, and change it to PLANE_4.
Click OK, to close the
Stackup Editor and save
the changes.
The New Layer Names
are reflected in
Display Control.
159
Click in the Vertices 1 X text box, type 0, then press the Tab key.
In the Vertices 1 Y text box, type 0, then press the Tab key. A line now
extends from the 0,0 coordinates to your cursor and the Properties dialog
box is ready to accept more coordinate entries.
Use steps 4 and 5 and starting from the Vertices X text box for
coordinate #2, enter the rest of the coordinates from the table shown.
Your cursor will show the coordinates as they are entered.
When you enter the last coordinate from the table, the polygon will
complete and a warning message will appear. Click OK and your Board
Outline is completed.
NOTE: Check the box in the warning dialog to not display the warning message
again.
You can also use the File > Import DXF or IDF commands to import any
shape coordinate files created on 3rd party mechanical EDA systems.
You can easily edit all shapes, including the Board Outline. In order to edit
shapes, you must first have the proper selection filters enabled. You can also
easily Add Corners, Chamfers and Radii to any shape.
Click Display Control, or click the Display Control Auto Hide tab.
Click the Edit tab, and in the Global View and Interactive Selection
section, expand the Board Objects and make sure they are checked
for Visibility and Selection.
From the menu bar, select View > Toolbars > X-Y Readout.
Zoom into the Board Outline in the area shown, and select the outline.
Select the White Corner Handle at 590,324 and right-click Properties,
change the Vertex Type to Round. The handle box should appear filled.
Select the White Corner Handle at 590,0 and in Properties, change the
Vertex Type to Chamfer.
Select any Red Center Handle and Drag to move the segment. Click
Undo to put the segment back.
Select any Red Center Handle, press the CTRL key and Drag to add a
new Corner Handle. Click Undo to remove the new handle.
Note: You can Select and Drag any Corner Handle to move it.
Using step 4 and 5, change the vertices in the edge connector area as
shown, then Save your board.
161
Before you assign planes, you need to define the settings for generated plane
copper. Plane Classes and Parameters define Thermal definitions, General
clearances, and Hatching options for planes. You can also create Plane Classes
when differences are required between plane structures.
Click New Plane Class, and enter POWER for the Plane Class.
Click the Thermal Definition tab, and choose Buried from the Default
via connections > Tie legs dropdown list.
All vias in your board will be directly connected to the planes.
Click the Clearances/Discard/Negative tab, and select All untied areas from
the Discard plane area options.
This setting allows the planes automation to remove any small or large plane
area that is not directly connected to a pad or via.
Click the Hatch Options tab, and verify that the Width and Distance are 6(th),
and the Metal is 100%.
These settings create a Solid plane with no hatch pattern.
Click OK to save the settings.
163
Planes Setup
Set up planes for your main power rail signals at the beginning of the design so
they can be used as a reference during placement and routing.
Plane generation is dynamic and WYSIWYG. You can have Positive, Negative and
Split-Mixed planes in your board.
Click the dropdown box for Layer Usage on Layers 3 and 4, and choose
Plane.
Click the dropdown box for Plane Data State on Layers 3 and 4, and choose
Dynamic.
Note: There are other states for plane data: Draft and Static, but to use true
WYSIWYG, set your planes to Dynamic.
Click the Assign Nets icon for Layer 3, Add/remove nets from plane
layer.
Find netname GND in the Excluded column and move it to the Included
column. Click OK.
HINT: Select the first entry in the list and type "G" on the keyboard to quickly
locate the GND net.
Click the option button for Layers 3 and 4, Use route border as plane
shape. Since you added a Route Border, for these planes you will not need
to add a separate shape.
Setup and verify your Plane Assignments to the figure shown.
Note: The Plane Class is POWER. The Plane Data State is Inherited for
these two planes. They will adopt the Dynamic state and POWER class.
Once you have defined planes, you must change the Layer Settings to Enable
or Disable layers for routing. You must also set the routable layer pairing and
direction bias.
Click the Editor Control button or the Editor Control Auto Hide tab, and
then click the Route tab in Editor Control.
Repeat step 5 for the Layer 2 row, and choose Layer 5 to pair these
layers.
Note: Layer Pairing defines the complement layer for routing when an automatic
layer change method is used.
165
Placing Origins
Click Fit Board to see the entire board.
Click the Type dropdown, and choose Board, and for the Location enter
X: 295.28 and Y: 190.16.
Click Apply, then click Fit Board to see that the Board Origin has moved.
Note the warning dialog and dismiss it by clicking Yes.
Repeat steps 3 and 4 again, but choose NC Drill as the origin to move,
and for the Location enter X: 0 and Y: 0.
Close Place Origin.
Note: The Fiducial is placed on the Top (Layer 1), which is the active
layer as shown in Display Control by the gray highlight.
Right-click and select Push to switch the active placement layer to the
Bottom of the board.
Place the Bottom Fiducial in the same location as the previous one you
placed on the Top.
Repeat steps 2 through 7 to place 2 more sets of fiducials as shown.
Right-click and select Cancel Place to end placement mode.
167
Click Editor Control > Grids > Other Grids, then enter 25 for the
Drawing grid.
Select Fit Board, then zoom in on the right hand board edge.
Select Draw > Placement Obstruct.
In Properties, choose Top from the Layer dropdown.
Review Questions
1 Why do I want to create a Board Outline and Route Border?
2 Does the Board Outline need to be a single continuous polygon?
3 Can I add cutouts to the board outline?
4 Can additional planes be added to the board at any time?
5 What types of Mounting Holes can I use?
Review Answers
1 The Board Outline acts as the design boundary. Components and
routing can be setup to maintain specific clearances from the Board
Outline and Route Border. The Board Outline is used as a reference
point for offsetting plane edges, and also represents the routing
(milling) path for producing the final board shape extents.
2 The Board outline is constructed as a continuous closed polygon to
maintain the integrity of the design object.
3 Yes, Contours can be used to add Cutouts and Slots to the interior of
the Board Outline to accommodate any mechanical requirements.
4 Planes can be setup at the beginning of the design, but you may add
additional planes during the placement, routing, or any phase of your
design.
5 Mounting Hole types are defined within your Library. They can be Plated
or NonPlated. They can be any shape, including slots. They can also
include Routing and Placement Obstructs as needed.
169
Select Editor Control > Place and verify that Online 2D Placement
DRC is set to Warning.
Select Editor Control > Grids.
Expand the Part Grids section, then enter 25 for the Primary and 5 for
the Secondary grid values.
Note: Components with more than 14 pins will use the Primary Grid.
Click the Constraint Manager toolbar icon, then click the Clearances
within the Navigator.
Click General Clearances, (or select Edit > Clearances > General
Clearances from the Constraint Manager toolbar) and change the
Placement Outline to Placement Outline value to 10.
170 Placement
Review and Scroll through the available column information. Move the
column locations by selecting and dragging them to a new location.
Right-click on any column to choose which columns to display.
Select any component and click Component Preview for a preview of
the Cell.
Based on your selection criteria, Connection Options provides
netlist information in the Connections column about components.
Connection options drive the connection count in the connections
column of the spreadsheet.
Explore the spreadsheet interface, and when you are ready, you can
start placement.
Placement
171
172 Placement
Note: The Navigator shows the CONNECTORS group Placed, (notice the icon next to the name has changed) and
the other groups Unplaced. You may right-click the group name for a status report.
Also, the LOGIC_REUSE group has Unplaced subgroups which will be placed later. The State column provides
information if the components are: Placed, Unplaced, or Dispersed outside of the board outline.
Placement
173
Select U2 and drag it into the board. Zoom into the area if needed.
Using the dropdown list in the Filter pane of the Ref Des column,
choose U*.
Select U3 thru U5, and drag them into the board. Each
component will attach to the cursor and be placed sequentially in the
order selected in Component Explorer (you may need to sort the Ref
Des column to make this task easier).
174 Placement
From the Ref Des column select the components U2 thru U5 that you
just placed.
Right-click and select Add to Active Group to complete the group (you
may also add components directly from the layout view right-click
Selection>Add Selected to Active group).
Note: Making any existing group the Active group will allow you to add more
components to that group.
Placement
175
Click the Fit Selected and Toggle Cross Probe icons in the Component
Explorer toolbar.
Select the ANALOG_SW group in the Navigator and scroll the
spreadsheet to the last column. The Assigned Area (Room) is named
RM-ANALOG for this group.
Note: The Group has been selected and fitted in the editor window
Select the Root level in Navigator and find Ref Des U101.
Scroll right to the Assigned Area column, and choose RMANALOG from
the dropdown list.
176 Placement
Note: U15 and U16 are now highlighted Blue denoting that the
components are now placed in the PCB.
Placement
177
Select U23 in the embedded view, then move the cursor into the
board area. U23 will be attached to the cursor. Place the component as
shown.
178 Placement
Xpedition xPCB Layout has multiple methods in which to edit the component
placement in your board. Context sensitive selection and menus make it easy
to Move, Rotate, Align, Fix and Lock, or Push components to the bottom side
of the board. The editing commands also can be used during placement of
components.
Moving Components
Zoom into the lower left of the board near L1 thru L4.
In the Display Control > Edit tab > Global View and Interactive
Selection, expand Place. Disable the Selection of both the Top and
Bottom Facement Group Outlines.
Select L1, then drag and drop L1 outside the board edge.
Select L2, then CTRL+Click to add L3 and L4. Right-click and click
Move. Move the 3 components outside the board edge, then click
to place them under L1.
Note: You just used two different methods to Move components. You
could have also used the Move Action Key or Place > Move Part from the
Main menu.
All of the Xpedition xPCB Layout editing commands work with any
of these methods. Its your choice how you want to use them.
Rotating Components
Frame select L1L4 by dragging a window over the components.
Right-click and choose Individual Movement > Rotate 90.
Note: You can easily Rotate individual or groups of components to any
angle needed in your board.
Placement
179
Aligning Components
Select L4 and move it to the location shown.
With L4 still selected, CTRL+ Drag Frame select L1L3.
Fixing/Locking Components
180 Placement
Using the placement editing commands from this lesson, place the
group as shown.
Placement
181
To make room for our Circuit Copy, you will delete a few placed components.
These components are not deleted from the database; they are just put back
into Component Explorer as Unplaced.
Select just the resistors placed near P2.
Right-click Delete, the components are Unplaced.
Copying Circuits
Select the IO_Port1 group that you arranged and placed, then
right-click Copy, or press CTRL+C.
Note: The next available duplicate circuit, IO_Port2, is attached to the cursor
for placement.
Place the IO_Port2 group, and watch the next circuit attach to the
cursor.
Place the last two circuits as shown. You can easily Move the groups
by selecting the Group Outline.
Cancel out of the Paste Map dialog box.
That was easy!
Note: Copy Circuit can also be used between two board layouts by Copying
the Circuit, then opening another board with the duplicate or similar circuit;
then Pasting the circuit into the new board.
182 Placement
Placement Optimization
Note: Your library components will need to be created with swapping capability or
alternate cell definitions to use these features.
Swapping Components
Zoom to the area around U15 and U16 on the board.
Select Route > Swap > Pins, and select pin 1 again on U16.
The Pins available to swap with will highlight.
Select the highlighted Pin, then click again to confirm the swap.
This swap caused the netlines to cross, so Undo the pin swap.
Placement
183
Select U15.
Within Component Explorer select the dropdown box in the Cell
column and choose the Alternate Cell, SOIC16 from the dropdown
list in the Cell column.
184 Placement
Placement
185
186 Placement
Placement
187
188 Placement
Right-click the ANALOG_SW planning bubble and select Arrange > All
Levels from the menu. The components are attached to the cursor in
both views for placement. Place the components.
NOTE: As you manipulate parts in either view, the dynamic graphics
are reflected in both views.
Placement
189
Move the capacitor C14 near U12 to create DRC Optimal and Violated
situations.
NOTE: The components will dynamically highlight RED if the spacing is less
than the Minimum requirement, and in YELLOW when less than the Optimal
clearance set.
Finishing Placement
Now its your turn! Finish placing the board using the methods in this lesson.
For hints on placement, the finished placement is shown on the next page.
If you do not want to finish the placement at this time, you can continue to
the next lesson the board will be placed for you.
Note: When you are finished, Save your design and close Xpedition xPCB Layout.
190 Placement
Placement
191
Review Questions
1 Can I place components directly in Xpedition xPCB layout?
2 How do I place components without creating spacing violations?
3 Can I rotate a component while moving it?
4 How would I utilize Group Planning and Placement?
5 When would I use Radial Placement?
Review Answers
1 Although Component Explorer is the most powerful method for grouping and selecting components for
placement, you can disperse components outside the board edge in Xpedition xPCB layout and then use
the placement editing methods to complete your placement. The place and disperse Keyins are listed
in the Help menu.
2 Xpedition xPCB layout supports checking of spacing violations during placement and routing operations.
In Editor Control, on the Place tab you can set Place Online DRC to Prevent mode. Also, you can allow
components to be shoved when a spacing violation occurs.
3 During placement and move operations you have many options that allow you to rotate and push
components. The options can be accomplished using the Toolbars, Menus, Action Keys, Right Mouse
Button Context Sensitive Menus, and modeless Keyin Commands.
4 Many designers partition a design into functional blocks before final placement, which can be done in
the schematic or in the PCB. Rather than placing each component individually directly onto the board,
you can create planning groups of the parts in a particular circuit. You then move them to a clear area in
the workspace for placement arrangement. Once you have the planning group optimally arranged, you
can move the entire planning group to the desired location on the board. As the layout matures, you can
also use the group selection capability to move clusters of components around the design as required.
You can even rotate, push, and freeze groups during move operations.
5 Radial placement is useful when you have components that you want to place on an arc or in a radial
array. An IC test fixture board is a common example of a design requiring radial placement. There are
also many modern products that have formfitting smooth curves in their design that would require you
to place parts in a radial pattern.
192 Placement
Entering Constraints
Creating Rules and Constraints with Constraint Manager in the PCB Layout
193
Look at your Constraint Manager Interface. On the Main toolbar, the Cross
Probe toggle icon should be enabled. If not, enable it. You can also turn on
Cross Probing using Setup > Cross Probing.
In the Xpedition xPCB Layout Editor window, click Display Control and
choose the Routing scheme.
In the layout, select Setup > Cross Probe > Setup and enable the settings
for Select, Highlight, and Fit view in PCB, then click OK.
Select Edit > Find or the Find button and choose the Net Tab.
Enter CLK_IN in the search text box, then click Find net.
Double-click the CLK_IN netline highlighted in the Find dialog box.
Notice the CLK_IN net is Selected, Highlighted, and Fit within the Editor
window, and the net is also highlighted in Constraint Manager.
Note: In Display Control > Graphic Tab > Graphic Options you may need
to expand the Selection & Highlights section and adjust Dim Mode
to better view highlighted objects.
194 Creating Rules and Constraints with Constraint Manager in the PCB Layout
Expand the BSYNC+ net and select the box next to the P1-1 pin within
the net.
Notice that the P1-1 pin is now selected and highlighted in the PCB
Editor window.
In Display Control, choose the Placement scheme.
In Constraint Manager, select the Parts tab, then expand the 101-RES
part type.
Select the box next to R24. R24 is selected and highlighted in the Editor
window.
Constraint Manager can Cross Probe to Constraint Classes, Nets, Pins, and
Parts in Xpedition xPCB Layout as well as in Xpedition xDX Designer.
All at the same time!
Creating Rules and Constraints with Constraint Manager in the PCB Layout
195
Note the Power Net icon on the net names in the Constraint Class/Net
column.
Update the Net Class dropdown list for Net Name PWR to
PWR_020_MIL.
Sort by the Net Class column to easily view the net names in the
PWR_020_MIL Net Class.
196 Creating Rules and Constraints with Constraint Manager in the PCB Layout
Click on the Master Scheme to see the trace and via properties
currently set for the design.
Follow the illustration at the right to update the Trace Widths for
Minimum, Typical, and Expansion, and the Differential Spacing for all
of the Net Classes in the Master scheme.
Click OK when the dialog box appears, or check the box if you do not
want to be warned about further changes being made.
Expand the BSYNC Net Class to see that your updates were
propagated to all layers in the Net Class.
Expand the FPGA scheme and change the values for the Default Net
Class to match the picture.
Click the AMBER indicator to update the Pending CES Changes.
You will now create a Rule Area on your PCB to use this scheme
when routing.
Creating Rules and Constraints with Constraint Manager in the PCB Layout
197
In the Properties dialog box, select the dropdown list for Layer and choose
(All).
In the Properties dialog box, select the dropdown list for Name and choose
the FPGA scheme that you just created in Constraint Manager.
Select View > Toolbars > Draw Create and choose Add Rectangle.
Select a coordinate at the upper left of the FPGA, then drag the
rectangle and select a second coordinate at the lower right of the FPGA.
Close Properties.
This new Rule area reduces all traces that pass through it to 4(th) for All
layers. You can also use Rule Areas to change the required Via within the
area if needed.
Note: You created this Rule Area in the PCB database. Rule Areas can
also be created inside your Cells using the Cell Editor in Xpedition xDM
Librarian.
198 Creating Rules and Constraints with Constraint Manager in the PCB Layout
Note: You may also paint the number across any spreadsheet entry by
selecting the entry box and dragging the small + indicator across the
spreadsheet.
Assigning Clearances
Creating Rules and Constraints with Constraint Manager in the PCB Layout
199
Name the New Net Class FADDR and click on the FADDR Net Class.
Right-click on FADDR, and select Assign Nets.
In the Assign Physical Nets to Net Class dialog box, make sure the
Source Net Class is Default and the Target Net Class is FADDR.
In the Search Bar, search for FADDR* nets, then click on the Search icon.
Click > to move the FADDR* nets to the FADDR Net Class, then click OK.
Warning: Any constraint information you entered into a Net Class will be
deleted also.
Verify that you want to delete the Net Class by clicking Yes.
200 Creating Rules and Constraints with Constraint Manager in the PCB Layout
Creating Rules and Constraints with Constraint Manager in the PCB Layout
201
Click Assign Matches. The Diff Pairs matching the search criteria appear in
the Proposed differential pairs list.
Click Apply to create the differential pairs.
Close the Auto Assign Differential Pairs dialog box.
On the Nets tab, sort the net column so the new Diff Pairs appear at the
top of the listing. Right-click and select Sort > Ascending.
Select the box for the first Diff Pair, then press and hold the Shift key to
select the last of the four Diff Pairs.
Now press the Ctrl key and click the Net Class dropdown list, then choose
DP_ 100_OHM to add all of the diff pairs to the Net Class.
202 Creating Rules and Constraints with Constraint Manager in the PCB Layout
Click the Select constraint group dropdown list and select the Lengths
group.
In the All constraints: section scroll down and select Stub Length Actual
and Stub Length Max.
Click the Move selected right button to move these constraints to the
Constraints assigned to group section.
Click Apply to save the changes, and the Stub Lengths columns will now be
available from within the Lengths group.
Creating Rules and Constraints with Constraint Manager in the PCB Layout
203
In the Assign Nets to Constraint Class dialog box, make sure the Source
Constraint Class is All and the Target Constraint Class is MATCHTRACK.
In the Search Bar, search for ASYNC* nets, then click on the Search icon.
Click > to move the ASYNC* nets to the MATCHTRACK Constraint Class,
then click OK.
204 Creating Rules and Constraints with Constraint Manager in the PCB Layout
In the Length > Match column for nets ASYNC+ and ASYNC-, enter the
text ASYNC.
In the Length > Tolerance column 'Tol(th)' for MATCHTRACK,
ASYNC+ and ASYNC-, enter a value of 200. You will NOT need to re-add
the 200th tolerance as its assumed for the match group ASYNC.
Note: Follow the illustration to set the correct Min Length and Max Length.
Update the Stub Length for the Diff Pairs to a Max of 300.
Note: Normally you would need to change the Group box back to ALL to
view these columns, but since you added these columns through Edit
Constraint Groups, they appear in the Length group.
Creating Rules and Constraints with Constraint Manager in the PCB Layout
205
In Xpedition xPCB Layout, you can easily change the color of individual Netlines,
Net Classes, and Constraint Classes to make them more visible.
Click Fit Board, and in Display Control, select the Routing scheme.
So you can identify the nets to be ordered, select Display Control >
Graphic > Color By Net or Class and enable Constraint Classes.
Click Add and enable the MATCHTRACK Constraint Class, then click OK.
Click on the MATCHTRACK color selector and change it to a color that is
easy for you to see, then click Close.
The MATCHTRACK Constraint Class is highlighted. These are the two nets
you will re-order.
206 Creating Rules and Constraints with Constraint Manager in the PCB Layout
Even though you have highlighted your nets to make them easier to see,
you may want to turn off the visibility of the other netlines that you are not
currently editing. Do this using Net Filter.
Select Editor Control > Route > Dialogs, and enable Net Filter.
Close Net Filter. Be sure that the net filter is enabled as shown in
Step 1.
Creating Rules and Constraints with Constraint Manager in the PCB Layout
207
Select Display Control > Objects > Place and enable Top Facement.
Zoom into the area near P1 and U11.
Select Route > Netline Manipulation. The highlighting changes while
you are in this command.
208 Creating Rules and Constraints with Constraint Manager in the PCB Layout
Review Questions
1 Why would I want to change the rules and constraints entered by the engineer in the schematic?
2 If the schematic and PCB are both open, will Constraint Manager Cross Probe to both at the same
time?
3 When would I want to use a Net Class?
4 Do Diff Pair nets need to be named to a specific naming convention?
Review Answers
1 The rules and constraints you entered during the schematic design are very helpful to a PCB layout
engineer, but often an engineer can over-constrain a design, making the layout impossible to
complete. Constraint Manager allows the PCB layout engineer to adjust the constraints to make the
design easier to manufacture but still maintain the intent of the engineer.
2 Constraint Manager cross probes to Xpedition xDX Designer and Xpedition xPCB Layout
simultaneously if you have the cross probe settings enabled in both applications. Cross Probing is
linked through different dialog boxes and features throughout Xpedition.
3 Use Net Classes to group nets that require the same physical constraints in the board. By grouping them
in a Net Class, if the physical constraints require changing, you can change them for all of the nets within
the class.
4 There are no standard naming conventions for Differential Pairs, but following a few good practices
can make it much easier to assign constraints to them. If you use the suffixes _P and _N or _HI
and _LOW, or something similar, you can take advantage of the Auto Assign Diff Pairs command. This
command allows you to assign multiple differential pairs at one time.
Creating Rules and Constraints with Constraint Manager in the PCB Layout
209
Note: This tab contains the information you entered in Xpediton xDX Designer.
You do not need to be change it for this lesson.
211
Adding a Variant
Select Variant Definition.
From the Variant Definition dialog box, click Create New Variant to add a
third variant to this database.
213
Defining Variants
Now that you have added a new variant, make some modifications to the
current variant parameters and define some new ones.
In the Analog Switch block Variant3 column, select R5 and drag select to
R7.
Right-click Unplaced or click Unplace Selected Cells in the Xpedition xDX
Variant Manager toolbar.
Repeat steps 4 and 5 for the Variant1 column.
215
Sorting Parts
Select the Column Header for the Value column.
From the dropdown Filter list, select Ascending.
Replace C5 with the smallest value capacitor by double-clicking the first
part available, 12308-CAP.
Hint: You may need to choose the Placement display scheme to select the
component.
Sort the Library column by Capacitor and double-click the first capacitor
in the list.
Note: Since the PKG_TYPE property is the same for both the resistor and capacitor,
you are able to replace these parts.
217
Select R2 from the upper right corner of the layout in the Analog Switch
group.
Unplace R2 in Variant3.
Select C9 and Unplace it in Variants 1 and 2.
Move C9 so that it is placed directly on top of R2.
Note: You do not get a placement DRC for the two components because C9 only
exists in Variant3, and R2 does not.
Once you have created the variant view, you will see how Xpedition places the
correct markings on your PCB layout.
219
In Xpedition xDX Variant Manager, select the Variant3 column and then
click Generate PCB Variant View.
In Display Control, select the scheme SILK_TOP.
Notice that the Unplaced components R5 and R6 have no silkscreen, and
the mutually placed C9 has silkscreen, but R2 does not.
In Display Control, select the scheme ASSEMBLY_TOP to see the variant
view for the assembly layer.
Note: After generating a variant view, you can use the view to create printed
documents or fabrication outputs.
221
Review Questions
1 When creating library component land patterns, do I need to add special
graphics in order for variants to display correctly?
2 Does Xpedition xDX Designer see the changes made in the Xpedition xDX
Variant Manager in Xpedition xPCB Layout?
3 Can I generate Gerber outputs from my PCB variants?
Review Answers
1 No, it is not a requirement. Xpedition xDX Variant Manager will automatically
remove silkscreen and assembly graphics from your components when
variant views are generated. If you do add special graphics in your land
patterns, Xpedition xDX Variant Manager will use them in your variant views.
2 Xpedition xDX Designer will see any changes or additions made while you
are working in the layout tools when you run a Back Annotation.
3 Once you have generated a PCB variant view, you can create PDF prints or
Gerber output files from that view.
Click Yes to turn off Online DRC checking. The DRC Off Warning dialog
box remains open until you turn DRC back On.
Close the DRC Off Warning dialog box, then click No for the Batch DRC
message. You will run Batch DRC in an upcoming lesson.
Note: If you do any Placement or Route edits with Interactive DRC Off, you should
always run Batch DRC on your design prior to releasing it to manufacturing.
223
Fit
Selected Mark/Unmark
Toggle
Cross Probe
Toggle
Filter
The Net Explorer interface is similar to Component Explorer that you used for
placement, and contains many of the same features.
Select Route > Net Explorer
Explore the spreadsheet interface, and when you are ready, you can move on
to the next section to prepare for routing.
Select the DATA_BUS* nets, right-click and click Create User Group.
Name the new User Group MemData.
Repeat Steps 1 through 3 to select the ADDR* nets and Create the User
Group MemAddr.
Fit the board, then select the MemAddr User Group. The Memory
Address nets are selected and highlighted in the Editor window.
If you ever need to remove a User Group, select the group then
right-click Dissolve. Do not remove any User Groups at this time.
225
Select Display Control > Objects > Netlines and expand the Netlines for
Marked Comps and Nets section.
Click Mark/Unmark again, and all of the nets in the design are displayed.
Select the MemAddr User Group, then click Mark/Unmark.
Save a Scheme called MemAddr, then Unmark the MemAddr User Group.
Select the scheme you just created and notice that the marking of the
User Group MemAddr has been restored.
Select Display Control > Edit > Favorites section and disable
From Marked Nets.
You can create as many different Net Explorer schemes as you want when
designing your PCB.
Editor Control
Click the Editor Control > Grids tab and expand the Route Grids section.
Ensure that 5 is entered for the Via Grid value.
Note: You will route the design with no Routing grid. This is the optimal setting for
dense designs. In HDI layer buildup designs it may also be beneficial to use a Via
grid of None.
Click the Editor Control > Route tab and expand the Dialogs section.
This section controls the settings for nets and route handling. You have
used some of these settings in previous lessons.
Click Tuning....
Tuning Patterns specifies the patterns used when you Manual Tune nets
with a length constraint requirement.
Close Tuning Patterns.
Click Diff Pairs.
Diff Pairs specifies how Diff Pairs are coupled during routing and editing:
Coplanar (same layer) or Broadside (adjacent layer).
Close Diff Pairs.
Click Pad Entry.
Pad Entry specifies how you would like traces to enter or exit a pad when
you route.
227
Expand the Edit & Route Controls section. This section defines the
Glossing method you use when routing or editing traces and vias.
When you are routing or editing, Xpedition xPCB Layout can help you to visualize
both Clearances and DRCs.
Lets practice plowing a few traces with the settings you have learned so far
Zoom into the Area of U2 through U5.
Click the Display Control > Graphics tab and expand the Graphics
Options section.
Expand the General options and change the color of Active Clearance to
a color of your choice.
Note: To be able to use Active Clearances your system will require an OpenGL
capable video graphics card.
Click the Editor Control > Route tab, and in the Plow section set your
Mouse Up style to Hockey Stick/On Click.
In Editor Control, set your Gloss to Local, or use the F10 Action Key
Toggle Gloss. Local Glossing minimizes the area of the trace that is glossed
Select U5 pin 7 as shown, right-click and choose Mouse Up Plow Style >
Real Trace Delayed, then route the trace as shown. Notice as you route,
the shoving of the previously routed trace is Delayed until you click a new
anchor point.
Continue to add anchor points for the trace. Notice you do not have to
enter as many and the Active Clearance circle displays all of the
spacing clearances per your
design constraints as you
route.
229
Select U5 pin 5 as shown, then right-click and choose Mouse Up Plow Style >
Segment/On Click.
Right-click and click Angle Mode and choose Any, then route the trace
as shown. Notice that each Segment requires an anchor point, and you
can route at Any Angle in this plow mode.
Route U4 pins 7 and 8 using Mouse Drag Plow Styles. These work exactly like
their Mouse Up counterparts, but you use a click and drag method.
The drag method is very helpful when a trace you are routing travels off
screen because these plow styles will auto pan as you route.
Click Editor Control, and in the Common Settings section disable
Interactive Place/Route DRC and answer Yes to the warning.
Using any plow style, route the connection from U4 pin 5 as shown.
Zoom in on the trace and notice the DRC Visualization patterns showing
trace to trace DRCs.
Enable Interactive Place/Route DRC and click No. We will not run Batch
DRC at this time.
Click Yes for the Delete all traces and vias warning.
Interactive Fanout
Click Display Control > Graphic and expand the Color By Net or Class
section.
In the Nets section, click Add, then enable netnames GND, VDD, and
VDDQ3.3V from the list of nets.
Change the Color Fill so that each net has a different color.
Zoom to U5 and select the VDD net pin, then click the action key F3
Plow/Multi.
Use plow to add a fanout via at a location just inside U5 pin 1 as shown.
Double-click to add a via.
Cancel out of the Plow command.
Select the GND net pin on U5, then click the action key F2 Fanout.
The fanout via is added close to the pin and on the via grid you set
previously.
Triple-click the VDD net pin on U4, the entire VDD net will be selected in
the layout.
Click the action key F2 Fanout and all of the selected VDD pins in the
layout will be routed with a fanout vias.
Repeat steps 8 and 9 for the GND net.
231
Click Display Control > Edit, and enable selection of Place in the Global
View and Interactive Selection section.
Zoom to U7 in the upper left section of the layout, then select the U7
reference designator text to select the component.
Select Route > Fanout Patterns.
Click the SOIC/QUAD package tab and set the dropdown box settings as
shown.
Click Fanout Selected and U7 will be routed with fanout vias with the
pattern you selected.
Note: Patterns can be created for SOICs, Quad Flat Packs, BGAs, and Staggered
BGAs.
233
(continued)
Draw the plane shape as shown to include the connections for net
VDDQ3.3V. Close the Properties dialog box when completed.
Note: The net automatically connects to the plane, and the plane shape is also
automatically Split from the existing VDD plane.
Hint: Try copying the Room shape you created for this group in the
Placement lesson to create the new plane shape. In the Setting Up
a New Board Design - Drawing the Route Border Using Copy Shape,
you learned how to copy existing shapes to create additional objects.
Note: The plane shape automatically connects to the GND connections and
clears objects per your assigned Constraint Manager clearances.
235
Lets take a look at a few more Plowing (Routing) and Plow Editing features in
Xpedition xPCB Layout.
In this section you may use the Plow Style of your choice.
Multi-Plow
Cancel Plow.
Re-Routing a Trace
You can easily re-route any trace using the Plow command.
Suspending a Route
If you need to move off screen while routing to change
settings, you can suspend routing for the currently selected
trace.
While re-routing the trace, press the Shift key and trace
routing is Suspended.
237
While you route in Xpedition xPCB Layout the right mouse button menus
can save you time by placing the most common editing features at your
fingertips.
While re-routing the trace, right-click to review the available editing
features.
Hint: Enable the PLANE_4 layer to see the plane shape location.
Click OK.
Zoom to U3 and select the trace segment as shown.
Drag the trace segment towards the inside of the U3 pattern.
Glossing Traces
239
Select one of the vias and click F3 Plow/Multi. Notice that both traces
of the diff pair are attached to the cursor.
Right-click Layers > 2 HS or press 2 to switch to layer SIGNAL_2 for
routing.
Route the traces as shown and zoom to the connection location.
Click F9 Toggle Via to change the diff vias to a horizontal pattern prior
to placing them.
Interactive Tuning
The tuning patterns used during interactive tuning are set in Editor
Control.
Click Editor Control > Route > Dialogs > Tuning.
Review the settings in Tuning Patterns, then click OK.
Click Constraint Manager and expand Constraint Classes , then set
the Group dropdown list to Delays and Lengths.
In Constraint Manager, expand the DIFF1 and DIFF2 diff pairs and
scroll right to the Length columns.
In Constraint Manager, Select Data > Actuals > Update All. Notice
that the diff pair you just completed is shorter than the required
length constraints.
You will now tune the diff pair you routed to add length. To help you
know when the length is within tolerance you can use the Tuning Meter.
Click Display Control > Graphic and expand the Graphics Options
> General section.
Enable the Tuning Meter, if needed.
241
You can adjust the size of the tuning window to fit the traces into an
area.
Right-click and choose Cancel Tuning.
Select both diff pair traces and right-click Selection > Add Partially Selected Nets, then right-click Fix/Lock > Fix to protect the traces from
additional editing.
To verify your length constraints, in Constraint Manager click Data >
Actuals > Update All.
Close Constraint Manager.
Netline Selection
The Sketch Router routes netlines, not entire nets. It automatically selects
the netlines based on proximity to the start and end points of the sketch
path. Or, you can select specific netlines. If you select route objects such as
pins, vias or traces, the Sketch Router attempts to route the net-selected
netlines if no other netlines are selected.
Click Fit Board.
Select View > Message Window to allow you to see Sketch Route status
messages.
Click Route>Net Explorer and Unmark All nets.
In Net Explorer, expand Net Class, then select and Mark Net Class FDATA.
Note: Organize Netlines into groups with one of the numerous methods in Xpedition xPCB
Layout: Net Classes, Constraint Classes, Net Explorer, Net Filter, and Display Control.
This will enable you to easily view and select netlines for routing.
243
When the path is near U12 press 5 to change the path layer to SIGNAL_5.
SKETCH PATHS
If a sketch path exists, starting a new one deletes the previous one.
VIA PATTERNS
There are six different via patterns available for sketch paths. The
color of the via symbol indicates the starting layer.
245
Click Route > Net Explorer and Unmark All nets, then select and Mark
Net Class FADDR.
Start your sketch path on SIGNAL_2 near P2, then click F10 Toggle
Sketch Style to change to an angled path.
Click F11 Toggle Route Style to change to Unpacked.
Switch layers to SIGNAL_5 and finish the sketch path near U12 as
shown. You will use the default Automatic Via Pattern.
Click F9 Sketch Route to start the routing.
Note: In this section you will copy routed traces and vias, but you could copy the entire
placement and routing of a circuit using Copy Circuit.
247
Click the Array tab and adjust the Padstack, Span, Netname and
Placement Control settings as shown.
Click Pick Reference, then click the location at the lower left corner of
the GND plane shape.
Click Apply to place the via pattern within the plane shape.
Close Add Via and Save your layout.
249
Review Questions
1 What is DRC?
2 Will routing with DRC ON keep me from creating routing errors?
3 When would I want to route with DRC OFF?
4 What is the advantage of using Sketch Router?
Review Answers
1 DRC is an acronym for Design Rule Checking. When DRC is ON, it is
constantly monitoring and enforcing your design rules. This is
powerful technology that helps you to maintain the integrity of your design
during placement and routing operations.
2 During Placement there are three modes of operation: Warning,
Prevent with Shove Parts, and Interactive DRC Off. If you attempt to
create placement violation in Prevent mode with DRC On, the system
does not allow you to complete the operation. Similarly, in Warn mode,
the system presents a message warning you of the potential violation
and asks permission to complete the task. While Routing with Interactive
DRC On you cannot create copper to copper errors. This saves you time
by preventing errors you must clean up later.
3 During routing, you may have a rule that specifies a particular clearance
for your traces as they transition across the board. At times when you
near the end of the route, the signal must attach to a high density
component such as a connector or BGA and there may not be enough
room to get the trace to its destination pin without creating a spacing
violation. You can set up a component rule to allow the trace through at
a smaller spacing, or you can turn off DRC temporarily so that you can
complete the traces. The DRC errors created by turning off DRC
will be given a Visualization Pattern are reported during Batch DRC
Verification.
In Xpedition xPCB Layout, from the Start Page, select Open and browse
to and choose:
C:\Xpedition_Evaluation\Lesson6\PCB\CORPORATE.pcb.
Select Setup > Setup Parameters > General tab and review the Test
point settings section.
When you routed the layout, the Via Grid was set to 5. Change the Test
Point Grid setting to 5 to match the via grid setting in Editor Control.
Click OK to update the database settings.
Zoom to U5 and select the via from one of the diff pair traces.
Note: You must select a net item prior to placing a test point.
Select Place > Test Points > Place and place the test point directly on
the via on the bottom side of the layout.
Repeat steps 5 and 6 to add a test point to the other via from the diff pair
traces.
251
Enable Ratio and enter a value of 1 for the Pad and Via pad ratio.
Select the four routed pads on P1 as shown. (Select individually with
<CTRL> key depressed or frame select and then remove the middle pin
from selection).
On the Process dropdown list, choose Selected Padstacks.
In the Teardrops dialog box, click Apply.
Note: No Teardrops were added to traces where clearance violation
would be created.
Review the Trace Teardrops and Multiple Via Teardrops tabs showing
the many types of teardrops that can be created.
Close the Teardrops dialog box.
253
Select ECO > Update Cells and Padstacks, then click Yes to update the
layout.
Note: Running a Forward Annotation using the Update local libraries
with newer Central Library data option performs the same process.
255
Review Questions
1 Do I need to add Test Points to my layout?
2 Should I add Teardrops to every pad in my layout?
3 Why do I need to renumber reference designators?
4 Why should I update my cells and padstacks?
Review Answers
1 Depending on the testing requirements for your layout, you may not
need to add test points. If the board will be mass produced, engineering
will usually require test points so the fabricated and assembled boards
can be tested prior to packaging for customer use.
2 Teardrops on pads in your layout should be discussed with your PCB
fabrication vendors. Dense designs with minimal annular ring on pads,
or fine line technology, may require teardrops on all vias and most pads
in your design.
3 Renumber reference designators to make the components easier for
assemblers and testers to find by creating a sequential pattern. You do
not have to search through hundreds, or even thousands of
components to find a part on the board.
4 If your library components are maintained and edited by someone else,
you may not be aware of changes taking place to library components
that could affect your layout. Updating the cells and padstacks verifies
that you have the most up-to-date library information in your layout.
In Xpedition xPCB Layout, the Online DRC capabilities significantly reduce the
errors you may create during PCB layout. In order to completely verify your
design prior to fabrication, you should always complete a Batch DRC and Review
cycle. Verification of all constraints, connectivity, and high speed
requirements are accomplished using Batch DRC. Status reports and Review
Hazards will help you to easily identify and correct any errors.
Status Reporting
When verifying the completeness of your PCB layout, you should check two
reports: Design Status and Dynamic Plane Status.
In Xpedition xPCB Layout, from the Start Page, select Open and
browse to and choose:
C:\Xpedition_Evaluation\Lesson6\PCB\CORPORATE.pcb.
Select Output > Design Status, or click Design Status.
Review the information in the Design Status report.
Look for the following key information in this report when you are
verifying your layout.
Open Connections should read 0.
Percent Routed should read 100%
Parts not Placed should read 0
Note: There is one part that you did not place earlier. You need to
correct this error when you run Batch DRC during the verification process.
Design Verification
257
Batch DRC
You can set up Batch DRC for any number of checking scenarios, and save each
scenario as a scheme for use on other designs. You can also run Batch DRC on
the full layout or a selected section of a layout using a DRC Window.
Select Analysis > Batch DRC, or click Batch DRC.
Batch DRC is set to use the Final DRC scheme to check
the entire design.
You will be checking for Proximity (Clearance) errors on
all layers of the design according to the constraints you
created in Constraint Manager.
Note that you can add Layer Specific elements and User Layer elements
to the matrix.
Click OK to save your matrix changes.
Click OK to run Batch DRC and see the results. Overwrite the current
scheme if asked. Your results may vary.
Design Verification
259
Note the Graphic options are set to Select, Highlight and Fit view any
selected hazard.
Design Verification
261
Review Answers
1 A PCB layout is a very complex project that requires thousands of
design details to be accomplished to complete a finished product.
Managing these details can be a large task, and it is possible for
unexpected errors to occur. Verification allows you to analyze the
details of your layout and correct errors prior to generating
manufacturing outputs.
2 You should always run checks for the entire design, Connectivity and
Special rules, and all of the Proximity options to check clearances on
all layers. Additionally, you can add checks in Connectivity and Special
rules based on the requirements of your design.
3 While routing in Xpedition xPCB, the system tries to maintain good DFM
rules to reduce trace slivers and acid traps. Batch DRC does provide
checking for some manufacturing errors like Missing Pads, Plane
Islands, and padstacks with Minimum Annular Ring.
4 It is a good idea to review every error listed in Review Hazards before
sending your design to manufacturing. Some designs may require you
to correct every error found in Review Hazards. In some cases, the
errors listed may be considered by engineering as warnings and are
allowed within the design. These errors can be Accepted as intentional
and not required to fix, but logged for future reference.
Design Verification
263
Simulation with
HyperLynx BoardSim
& HyperLynx Thermal
In this section:
Simulation with HyperLynx BoardSim
Thermal Analysis with HyperLynx Thermal
265
HyperLynx BoardSim
From the Xpedition xPCB Layout Start Page, click Open and browse to
and select:
C:\Xpedition_Evaluation\LessonFinal\PCB\CORPORATE.pcb.
Select Analysis > Export to HyperLynx SI/PI/Thermal.
HyperLynx BoardSim opens with your PCB database loaded.
Note: HyperLynx Power Integrity analysis requires additional HyperLynx
licensing.
In Assign Models select U13.M26 pin and change the Buffer settings to
Output.
Repeat steps 6 and 7 for U15.13 and U26.13 and choose mc74lcx125.ibs
from the Libraries list, and then choose MC74LCX125 from the Devices
list, then click OK.
Close Assign Models.
Select Run Interactive simulation and show waveforms.
In the Digital Oscilloscope dialog box, select the Rising edge radio
button. Make sure you have a probe color assigned to pins and click
Start Simulation.
Click two points in the Oscilloscope window on the top and bottom
of the overshoot of the waveform to review the span of the voltage
overshoot.
Note: Receivers have a lot of voltage overshoot (about 1.95V, in LineSim we had
2.1V).
267
You can toggle to see both the pre-layout and post layout simulation
results by checking the Loaded results check box.
Note: Differences between pre- and post-layout simulation results for receiver
propagation delay (Green and Cyan color wave forms) are due to topology and
trace length differences. However, the overshoot is almost the same (1.95V versa
2.10V).
Click Apply Values. This assigns the terminator and its value.
21
Click OK.
21
Termination in place.
Notice that we removed almost all of the Signal Integrity problems related
to overshoot.
22
22
C:\Xpedition_Evaluation\LessonFinal\DATA_BUS0 _terminated.lis
25 Check the Loaded results check box so you can toggle to see both the pre-
25
269
Review Questions
1 When would I want to use HyperLynx BoardSim?
2 Can I compare HyperLynx BoardSim results with those from HyperLynx
LineSim?
3 What do I do with the results?
Review Answers
1 Early in the design process, you can use HyperLynx LineSim to model
the behavior of specific signals and/or specify terminations that might
be required. HyperLynx BoardSim then lets you model the actual
physical trace on the board to see if the physical implementation of the
signal performs as expected against the earlier simulation.
2 HyperLynx BoardSim lets you run simulations on specific signals and also
lets you compare the simulation results with previous simulations created in
HyperLynx LineSim. This capability lets you carefully examine the projected
performance against the actual layout to determine if any tweaking is
required.
3 The results provided by HyperLynx BoardSim help you determine if any
additional components need to be added to the design or if values of
current components need to be adjusted. Any changes can be
incorporated into the design at the schematic level and forwarded to
Layout.
271
Click OK.
In the Edit Master Library dialog box, scroll down and, select the Screw_#6
part then click Edit part.
In the Edit part dialog box, change the parameters for this screw as shown
and click OK.
272
272 HyperLynx Thermal Analysis
In the Edit Master Library dialog box, select Save to disk and click
Close.
Copy the Screw_#6 part from the Master Library to the Working
Library to be used in this design by Selecting Library > Working.
In the Edit Working Library dialog box (in the left-hand window) Master
library: scroll down and select Screw_#6.
Click >> to copy it to Working Library: window.
Click Close.
Select Placement > Screw and the part attaches to your cursor.
273
Repeat step 17 and place the remaining 3 screws at the locations shown.
Save and exit HyperLynx, then save and close Xpedition xPCB Layout.
Review Answers
1 Many designs can be temperature sensitive depending upon their
application. You can use HyperLynx Thermal to create a thermal model
of your design and determine if you will need to add heat sinking
components or adjust your system cooling and air flow specifications to
guarantee proper performance.
2 HyperLynx Thermal uses an extensive library of thermally modeled
components and air velocity statistics to create a sophisticated model
of the thermal behavior of your design. Through careful monitoring
and adjustment of these parameters, you can discover what changes
you need to consider in order to bring your design into an acceptable
window of thermal performance.
3 You can add additional models to HyperLynx Thermal to represent
specific components that you might add to your design to improve
thermal performance. You must give careful attention to the creation
of these models so that the application can properly interpret their
thermal characteristics.
4 Once you identify problem areas and possible solutions, you can
incorporate the necessary changes into your design and rerun
additional simulations to confirm the adjusted behavior of your design.
275
Completing the
Design
In this section:
Adding Drawing Documentation
Generating Manufacturing Outputs
277
Dimensioning Setup
Before you dimension your design, you need to prepare the dimensioning environment.
You must set the layer display or set up display schemes for repeated use. You must
also determine which type of dimensioning method is most appropriate.
In Xpedition xPCB Layout, from the Start Page, select Recent and choose:
C:\Xpedition_Evaluation\Lesson6\PCB\CORPORATE.pcb.
Click Fit Board, then open Display Control and select the FAB_DWG_SH2
display scheme.
Select View > Toolbars > Dimension to add the Dimensioning Toolbar.
On the Dimensioning toolbar, click Dimension Parameters and select the
Local: Default dimension scheme.
Review the settings in the scheme on the General tab of the Dimension
Parameters dialog box.
Note: You create the Dimension Style, Layer, and Font settings here.
Zoom to the lower left area of the board, near the Board Origin.
From the Dimension toolbar, click Place An Ordinate Dimension.
Select the mounting hole, then right-click and select Fix/Lock > Unlock
from the menu.
Right-click the mounting hole and click Properties > Padstack Properties.
Change the X: Location of the mounting hole to 5,500 and click OK.
Note the dimension changes automatically.
Click Undo to move the mounting hole to the original location and Lock it.
279
You can add and edit text in your documentation using WYSIWYG True Type fonts.
You have full control over the size, justification, and rotation. You can even create
Mirrored text if needed for the bottom side of your layout. You can also edit multiple
text items simultaneously to save time.
Adding Text
Zoom to the area around the Film Title Block below the Board Outline.
281
Hint: In most designs, text strings like the Drawing Number can be in multiple places on
multiple pages. So editing them all at the same time can reduce the chance for errors.
Select the Drawing Number text string in the Film Title Block.
Select View > Fit All to see the entire Title Block.
Using CNTL + Select, select the other two text strings on the title block for
the Drawing Number.
Right-click Properties and edit the String with the value 12345-000.
Close Properties and note that all of the text strings you selected are edited.
283
Review Answers
1 You set the tolerances for your dimensions using the Dimension
Parameters dialog box. You can set the decimal Precision, Tolerance Style,
and Plus and Minus tolerance values for your dimensions.
2 The units for your dimensions need not be the same as the design units.
You can dimension in Inch, Thousands, Millimeter, and Micron units. You
also have the capability to dimension in two different units using the
Dual Dimensioning feature.
3 You can add Free Text on any layers within the design, including Trace and
Plane copper layers. Text added on copper layers is subject to all of the
spacing DRC checks used for traces, vias, pads, and planes.
4 You create Drawing Cells using the Cell Editor in xDM Librarian for your
Personal Library. Once created, you can import them into your local design
cache.
285
Click Fit Board, and in Display Control select the scheme SILK_TOP.
In Display Control > Edit tab, enable the (Left Checkbox Top) Fabrication Objects Solder Mask and the (Left Checkbox for Top) Route Objects as shown.
Select Output > Silkscreen Generator, and setup the dialog box as shown.
Process Both sides of the board on All Package Groups using the
Silkscreen Reference Designators and Outlines design layers.
Break silkscreen with Soldermask Pads using a Pad Clearance of 2(th).
Set Graphics Lines and Text widths to 5(th).
Note: If you make changes to your design that require you to update the silkscreen
layers, you will need to re-process the Generated Silkscreen prior to output for
fabrication.
287
Select Output > Gerber. Note the \Output\Gerber project directory. This is
where any files will be saved.
The Loc:GerberMachineFile1.gmf has set the format to use the RS-274X
Data type.
On the Parameters tab, select GeneratedSilkscreenBottom.gdo and Copy it to
create a new Gerber file to process.
It is good practice to check the GerbPlot.txt log in the File Viewer to verify
that there are no Gerber processing errors on any layers.
ODB++
the
Inside
to
Cam
Compare
Click OK and then click Yes to save the ODBSetup and start
the ODB++ output processing.
Click OK to close the warning message.
289
ODB++ Inside creates a temporary copy of the NC Drill and Gerber output
based on your settings in those dialog boxes. Then, it runs a Valor Cam Compare,
which compares the ODB++ output with the temporary NC Drill and Gerber
versions.
When ODB++ Inside launches, the Cam Compare has been completed.
You can select layers to display the compare results. Note the two colors for
the layer: one for the ODB++ data and one for the Gerber data. This allows
you to see the miss-matches in the data.
Note the traffic light columns. Green lights are shown for matching data.
Red lights are shown for data miss-matches.
You can browse and verify the miss-matches using Show Next result.
Explore the different layers using the Pan and Zoom features.
Once you are satisfied with the compare results, click Continue to close
ODB++ Inside.
Save your design.
Enable Assign Current View to create a PDF sheet for the displayed screen
data.
Note: You can also choose the Layers and Board Items that you would like printed from
the Contents tab.
Click OK to print a PDF containing all of the selected sheets on the Sheets
Setup Tab.
When your print is completed you
can click OK to exit the Extended
Print dialog box and review your
PDF.
291
Note: You may change the column Titles and ordering when needed.
Note: You can use CTRL+Select to choose more than one property to add to the
DESCRIPTION column.
Select the Generic AIS report and Identify parts by Part Number, and click OK to
run the report. Click OK to close the results message.
Using any text editor, open the vb_ais.txt file created in your project
\PCB\Output directory. This is a generic format Auto Insertion file that vendors
can use to program Pick and Place Assembly machines. Close the report after
reviewing.
Repeat step 1 and select the Generic ATE report and Identify parts by Part
Number, then click OK to run the report. Click OK to close the results message.
Using any text editor, open the vb_ate.txt file created in your project
\PCB\Output directory. This is a generic format Automated Testing file that
vendors can use to program Bare Board Testing equipment and
create test fixture data for your layout. Close the report after reviewing.
Note: You can also create a Mitron GenCad testing file if your vendor prefers the
GenCad format.
293
http://www.mentor.com/products/pcb-system-design/fabrication-assembly-test/
visecad/visecad-evaluation
Select File > Export > CCZ, and set the Export units to Thousandths.
Click OK to export the data, and click YES to save the settings when asked.
When the Save Scheme dialog box appears, check the option checkbox labelled
Save locally with design and select OK.
Once you have visECAD installed, you can double-click on the files to open them
in the viewer.
The files will be located here:
Schematic will be in the project \PCB\Logic directory Filename.cce.
PCB layout will be in the project \PCB\Output directory Filename.cce.
Note: You can create schemes for different DXF outputs that you can use in future
designs
Export IDF
Select File > Export > IDF.
Click Browse for the Board and Library Output files and name the files
CORPORATE.
Enable Use Board thickness from layer stackup and Export Component
placement outline with height.
Click OK to export the files, and click Yes when asked to save the settings.
Your files will be exported to the project \PCB\Output directory.
Save your layout and Exit Xpedition xPCBLayout.
295
Review Questions
1 How do I output multiple drill files when my layout has blind and buried
vias?
2 What is ODB++?
3 If I use ODB++ Output, do I have to output NC Drill and Gerber?
4 Can I output Variant BOMs?
Review Answers
1 The NC Drill Output automatically handles blind and buried vias. It will output
each via span into a different drill file named per the via span. It will also create
different NC Drill Charts for each via span on separate layers.
2 ODB++ is an object oriented database format developed by the Mentor
Graphics Valor. The format contains all of the information required to
fabricate and assemble your board layout. It is an intelligent format that
provides vendors with much more valuable information that allows them
to quickly verify, test, and create Tools. ODB++ is widely recognized as the
leading format used by PCB fabrication and assembly vendors.
3 No, it is not necessary as the ODB++ files contain all of the required
fabrication information. If you want to use the Cam Compare tool in
Xpedition, you will have to set up your NC Drill and Gerber outputs.
4 Yes, the PCB layout Bill of Materials output will allow you to generate
separate BOMs for as many variants that you have in your design. Each
BOM will be suffixed per your setup.
297
Archiving
DxArchiver
Start Xpedition xDX Designer.
(continued)
The DxArchiver will archive your complete project database, and it will condense
the files that are no longer needed. The Additional Files portion of the dialog box
allows you to select files or entire folders that are not automatically added to the
project archive.
Click Close.
Your archive file Lesson620120120160010.zip is created. Note that the
file is suffixed automatically with a date and time code.
Close your project and Xpedition xDX Designer.
299
New
File
Viewer
Open
Partition
Setup
Units Search
Paths
Parameters Display
Refresh
Library
Services
Visual
IBIS
Editor
Reusable
Part Padstack Blocks
Editor
Editor Editor
Material/
Process
Help
Editor Contents
Cell Symbol
Layout
Property Partition Unreserve Property Parts
Verification Editor Partitions Definition Manager Editor Editor Templates
Editor
Editor
Simulation
Model
Properties
301
The symbol editor allows you to create new symbols very quickly. You can
use a spreadsheet to copy and paste pin information into the symbol or you
can enter the data manually. The editor provides a basic symbol
automatically and allows you to modify the symbol in any way you desire.
Note: If you have difficulty selecting the pin, make sure that the Select Pins
button on the toolbar is selected.
Click in the dropdown list and select the property Pin Number.
Enter a value of 1 in the Value field and the pin number is placed on the
pin.
(continued)
Using the previous steps, add 2 Power pins to the Top of the
symbol as shown. The Pin Names are VDD_1 and VDD_2 and will be
assigned the pin numbers 19 and 20.
Add a Ground pin to the Bottom of the symbol with a Pin Name of
GND and a Pin Number of 10 as shown.
303
Add an array of input and output pins by clicking Add Pin Array.
Use the following settings for the input pin array:
Pin Name = IN
Range 7 to 0
Step = 1
Pin type = IN
Pin location = Left
Pin spacing = 4
Click OK to create the array of pins.
Place on the left side approximately 4 grids down from the CLK pin.
Note: You can use View > Show Port Type to toggle the port type graphical
indicators On and Off.
Add another array for the output pins using the following settings:
Pin Name = OUT
Range 7 to 0
Step = 1
Pin type = OUT
Pin location = Right
Pin spacing = 4
Place the array on the right side of the symbol so that the output pins align
with the input pins as shown.
Select the IN pins (other than CLK) from the Pins window.
Note: The pins highlight in all windows (including the working area).
Set the values as shown below. Make sure Type = Pin Property, Name =
Pin Number, Prefix is Empty, Value = 2, Delta = 1, Suffix is Empty and
Position and Visibility are set to Above Pin and Value.
Click OK. This automatically adds and increments the Pin Numbers. Position
them as shown.
Repeat steps 1 through 4 for the OUT pins. Use Value = 18 as the
starting value and Delta = -1 to decrement the Pin Numbers down to 11.
Position them as shown.
305
Do not forget to move the GND Pin after adjusting the symbol outline.
Select and drag the pin to the new location shown.
Automatically update the bounding box by selecting Symbol > Update Symbol
Outline.
Note: The symbol outline helps with avoidance rules when connecting nets in the
schematic.
Note: The symbol outline may be set to update automatically as you adjust the symbol
shape. If it is and you wish to manually adjust it, you may need to turn off the automatic
adjustment mode first. Do this by selecting File > Preferences > General > Symbol and
disabling Automatic Outline Update.
To complete the graphical modifications you need to move the origin to the
appropriate location.
Select the Origin marker and drag the marker to the lowest left pin on the new
symbol.
Note: Use View > Symbol Outline if you don't see the outline.
In the Properties window, notice that the Symbol Name has been updated to
match the name you used.
The symbol is now complete and ready for use.
307
Entering all of the pins manually on large pin count devices can be tedious and error
prone.By entering all your pins into a spreadsheet, you can quickly and easily import
them into the Symbol Editor for placement on a symbol.
All unplaced pins are marked with an *. You can add pins to the symbol by
selecting them from this list.
Release the mouse button when the pin is in the desired location on the symbol
body.
Notice there is an invert bubble on the pin and a strike over the name. This is an
indication that in the CSV file, the pin was set as inverted. The Pin Label began
with ~ which results in the strike over.
309
You can also add multiple pins simultaneously from the Pins list. Click
on the Pin Type column in the Pins list to sort the pins by type (IN or OUT).
Left-click on the first OUT pin. Hold the Shift key and select all the OUTtype pins.
Drag the highlighted pins (blue area) to a desired destination on the right
side of the symbol body.
Experiment with adding other pins and modifying the symbol graphics.
Notice that as you place pins the * is removed so that its easy to sort
and/or visually scan for unplaced pins.
When you are done, exit Symbol Editor without saving, close xDM Library
Tools and then exit out of your schematic and close xDX Designer.
In Pad parameters, enter 25 for the height and 75 for the width of the pad.
Note the graphic in the Preview window adjusts to display your modifications.
Click New to create your newly defined pad.
The new pad is automatically named Rectangle 75x25.
Repeat steps 1 through 5 and create a Rectangle pad with a height of 29 and
a width of 79. You will use this pad as the Oversize pad for Solder Mask
layers.
311
Assign the Rectangle 75x25 pad to the Bottom mount and Top and
Bottom Solderpaste layers.
Repeat steps 4 and 5 to assign the Oversize Rectangle 79x29 pad to the
Top and Bottom Solder Mask layers of the padstack.
Note: When creating padstacks, you can have different pads for a Top Mounted
land pattern or Bottom Mounted land pattern.
Select File > Save to save your new pads and padstack, then Exit the
Padstack Editor.
You can view and edit the new padstacks by double-clicking them in the
Library Navigator Tree.
313
Select the Pattern Place tab and choose the Pattern type SOIC.
Enable Include Assembly outline and Include Silkscreen outline.
In the Pins section, select Pin 1 then press and hold the Shift key.
Scroll down and select Pin 20, and while still pressing the Shift key,
select Pad Rectangle 75x25 from the Padstack Name dropdown list.
While still pressing the Shift key, choose 90 from the Rotation dropdown
list.
Click Place to create the cell pattern.
Save the cell, but do not exit Cell Editor.
Once you have created your pattern with the wizard, you can make any
modifications necessary to your cell to fulfill your PCB layout requirements.
All of the capabilities available to you in the PCB Editor are also available in
the Cell Editor.
Select the Ref Des placeholder for the Silkscreen layer and move it to a location
that is not beneath the component when placed in a layout.
Make a few modifications on your own
You can add pre-defined Fanouts or Routing.
Add a Ground Slug plane and stitch some vias in it.
Add a predefined Rule Area to your cell. A named Rule Area in your cell is
automatically added to your Constraint Manager Schemes if the cell is used in
your design.
If you made any modifications, Save your cell and Exit the Cell Editor.
315
In the xDM Librarian, select Tools > Part Editor and select the IC
partition. These are all of the Parts in your current library.
Click New to create a new part.
Assign the value Part_YourName for Number, Name, and Label.
In the Component Properties section, set the Type to IC.
Enter a Description for the part.
317
Assigning Gates
In Pin Mapping, click the Logical tab then click New and create
8 swappable slots with 2 pins per swappable slot. Click OK.
On the Logical pins list, select IN0 and OUT0 using the CTRL+Select method.
Click the top box of the Slot #1 column.
Click Paste Down to assign the pins to Slot #1 as shown.
Repeat steps 2 through 4 to assign the remaining
Input/Output pins into
Slots 2 through 8 as shown.
Repeat step 1 and create a new gate with 1 slot and 4 pins.
Assign the remaining pins to the new gate as shown.
Note: Any Slots within the same gate are swappable.
From the Physical pins list, select pin numbers 9 and 11.
Select the top box in the Pin # column for Slot #1.
Click Paste Down to assign the pin numbers to Slot #1 as shown.
Repeat steps 2 through 4 to assign the remaining pin numbers
to the correct Slots as shown. Use the Symbol/Cell Preview as
a reference guide.
Select the remaining 4 pin numbers and assign them to the second gate as
shown.
Click OK.
Note: When you click OK, the Part Editor does a verification of your entire part to make
sure the symbol pins match the physical cell pins. If you cannot save the part you will
need to correct the errors first.
319
321
From the Library Navigator Tree, expand Library.lmc > Parts > IC.
Right-click the first IC listed, 500_5R5V_IC, and click Export EDX.
Click Save to generate the EDX file.
323
In the first column, select On from the dropdown filter to show only the
items to export.
Note: All of the columns can be filtered and sorted as needed for review.
You can deselect any items by disabling the check box in the first column.
Click OK and Close the EDX generation successful message window.
325
Review Questions
1 Is there a right or wrong way to create a symbol?
2 What is the purpose of the symbol origin?
3 Do I need to assign a PKG_TYPE in my Symbol?
4 What are the advantages of creating a symbol from a spreadsheet?
5 Cant I just download a symbol from the component manufacturer?
6 Where do I get the data to input into the Pin Pattern Place wizard?
Review Answers
1 There is no right or wrong way to create a symbol as long as the symbol accurately represents the signals and connectivity of the device. There are formal
design specifications for symbols (such as ANSI/IEEE Standard 91- 1984 Graphic Symbols for Logic Functions), but each company tends to formulate their own
internal standards that meet their design requirements.
2 The symbol origin represents a predictable reference point for anchoring and placing a symbol into the design environment. It is usually placed at the end of
the lowest pin on the lower left of the symbol.
3 There is no need to assign a PKG_TYPE in Xpedition. When you create your part in the Part Editor you will import the Cell that links to the Symbol. The symbol
in Xpedition xDX Designer represents the electrical connectivity of the component. In order to pass the design to Xpedition xPCB Layout for physical design,
each component symbol needs to have a corresponding physical package assignment so that the layout tool can properly represent the physical parts on the
printed circuit board.
4 As the complexity of components increases, it is not uncommon to have symbols with hundreds of pins. Entering the data for each of these pins into the
Symbol Editor can be a very time-consuming and error-prone task. Using a spreadsheet, you can copy and paste signal data from PDF data sheets into a
spreadsheet and then import it directly into the Symbol Editor. This saves time and improves accuracy.
5 Unfortunately, except for the PDF of the datasheet, very few manufacturers offer any symbols that can be directly imported into an EDA application. Due to
the multitude of different components and systems, this would be very difficult for the manufacturers to support. Most designers prefer to create (and check)
their own symbols prior to use.
6 You can create a cell in the wizard by entering the physical dimensions of the recommended land pattern from the manufacturers component data sheet. You
can also use the IPC Land Pattern Calculator to determine the appropriate decal dimensions and then enter that data directly into the wizard.
327
Conclusion
Conclusion
This Evaluation Guide has introduced you to some of the power and flexibility available in Xpedition, but that
is just a beginning. This evaluation has only scratched the surface and presented you with an abbreviated view
into the full spectrum of the design capabilities of the products. If you want to learn more about the many
features and functions of these applications, there is a wealth of knowledge to experience and discover in the
extensive resources that are available.
Additional resources Include:
Tutorials
Concepts Guides
Extensive Help files
User Manuals
The InfoHub
On-line video presentations
Click the icons below for additional resources:
328 Conclusion
Appendix
In this section:
Appendix 1: ODBC Setup
Appendix 2: Configuring Xpedition xDX Databook
Appendix 3: Configuring Xpedition Variant Manager
A-1
Note: The setup steps shown here are for Microsoft Windows 7 OS, 32bit and 64bit
respectively. You may also be required to download the Microsoft Access ODBC
driver from Microsofts website. If you are using a different OS, please refer to the
instructions specific to your OS for ODBC setup.
Select the Sample.MDB file and then click OK to accept the selection.
Click OK in the parent dialog boxes. Your setup is complete.
A-2
Appendix
Appendix 2 - Configure Xpedition xDX Databook
Xpedition xDX Databook allows easy searching and selecting of components. It
ties into your companys purchasing database so that Engineering can make more
intelligent part selections based on lead time, cost, stock availability, and so on.
The Xpedition xDX Databook Configuration file (.dbc) tells Xpedition xDX Databook
which properties to show in the search window, which to load and annotate onto
your schematic when placing symbols, and which to verify when you use Xpedition
xDX Databook Verification.
NOTE: To use Xpedition xDX Databook, you must create an ODBC data source that points
to the database, then Xpedition xDX Databook must be attached to this data source. If
Configuration: None is displayed in the lower section of the Xpedition xDX Databook application window, this indicates that no database is attached.
See Appendix1: ODBC Setup for details on performing the ODBC setup if steps in this
exercise do not work.
A-3
Configuration
A-4
Appendix
Configuration
(continued)
Add Part Number to the Query results. If you fail to do this, you
may see an error message when choosing a replacement part.
Property values are case sensitive. Check your database
configuration for property cases. For example, a configuration
might show the value PART NUMBER rather than Part Number.
If you have a case sensitivity problem then you may see an error
message when replacing a part.
A-5