Pulse-Width Modulated D.c.-D.c. Converters

Pulse-width modulated d.c.d.c.
converters
Y. Fuad, W. L. de Koning and J. W. van der Woude
Faculty of Information Technology and Systems, Delft University of Technology, The Netherlands
E-mail: y.fuad@math.tudelft.nl
Abstract In this paper, we review the theory of pulse-width modulated d.c.d.c. converters for the standard Buck,
Boost, BuckBoost, and Cuk converters. A number of aspects concerning PWM d.c.d.c. converters will be
highlighted. Simulations will be presented in the open- and closed-loop situation. The closed-loop simulations demonstrate that a stable state-space averaged steady-state does not always imply a stable PWM system. In this paper
educational aspects play an important role.
Keywords d.cd.c. converter; linearization; normalization; pulse-width modulation; small-signal analysis
Pulse-width modulated (PWM) d.c.d.c. converters are increasingly applied in

industry. One of the advantages is their high power efficiency. It is well known
that higher power density and faster transient response of PWM converters
can be achieved by increasing the switching frequency. However, it is noted
that as the switching frequency increases, the switching losses and electromagnetic interference (EMI) noises are also increasing. We know that high switching
losses reduce the power-handling capability and serious EMI noises interfere
with the control of PWM converters. These factors are mainly generated during
turn-ON and turn-OFF switching transients. In this paper we will highlight a
uk
number of subjects for the well-known Buck, Boost, BuckBoost, and C
converters.
The idea behind this paper is that investigating the dynamic behavior of
PWM d.c.d.c. converters will help to design a system with a desired performance. This usually comprises the derivation of a small signal model for the
converters and designing a suitable controller for it. The state-space averaging
method is commonly used for establishing the small-signal models. We present
converter models for the standard converters and give a general type of converter model. A normalization method will be applied to all models. With a
normalized model we mean normalized with respect to the pulse frequency
such that the models no longer depend on the pulse frequency. General statespace averaged (SSA) models will be considered and these averaged models
will be applied for the purposes of steady-state analysis. Small-signal analysis
will be highlighted. We also include root locus techniques relating to closedloop situations for all converter models. We describe the peak-to-peak voltage
ripples for all converters and give formulas for current and voltage ripples.
We discuss the difference between the average of the true signals and the
SSA signals. This paper can be of educational value for the beginning reader
who wants to gain a quick understanding of the standard PWM d.c.d.c.
converters. This paper also illustrates that results based on SSA techniques do
not reflect reality, for instance as far as the stability is concerned.
We present simulations with standard parameters for open-loop and closedInternational Journal of Electrical Engineering Education 38/1
Downloaded from ije.sagepub.com at University of British Columbia Library on June 30, 2015
PWM d.c.d.c. converters
55
uk
loop models. The closed-loop simulations, especially for the closed-loop C
converter, demonstrate that controls that are stabilizing according to the
applied averaging techniques, in reality do not have to be stabilizing. We believe
that this aspect, together with the overview of standard PWM d.c.d.c. converters will help the beginning reader to quickly expand his knowledge on
these converters.
Converter models
uk converters. We assume that
We consider Buck, Boost, BuckBoost, and C
the inductor current in each converter flows continuously. This is equivalent
with the property that the (ideal ) diode or the switch is conducting, but not
both. We call this the continuous conduction mode (CCM).
Buck converter circuit
We consider the circuit such as shown in Fig. 1. Assume that the circuit is in
CCM. Let x =i and x =v be the inductor current and the capacitor voltage,
1 L
2
C
respectively. The differential equations describing the Buck converter circuit
are given by
1
E
x (t)= x (t)+s
1
L 2
L
(1)
1
1
x (t)= x (t)
x (t)
2
C 1
RC 2
where x =dx/dt, the derivative of x with respect to t, and s represents the

switch position. When the switch is in the ON-position then s=1, and s=0
represents the switch in the OFF-position. Rewriting (1) in matrix form, we
obtain
A B
A B
0
1
L
x (t)
1
=
1
1
x (t)
2
C
RC
AB
E
x (t)
1
+s L
x (t)
2
0
A B
(2)
Note that the variable s denotes the switch position function, acting as a
control input, and takes only values in the discrete set {0, 1}. The position of
Fig. 1 Buck converter circuit.

International Journal of Electrical Engineering Education 38/1
56
the switch may depend on the time t. In the PWM context, s is a function
which consists of a Heaviside step function.
Let xR2, i.e. [x x ]T, where superior T denotes transpose, and define
1
2
s(t)=h[u(x)saw(t, T )]
(3)
where saw(t, T ) is a unity sawtooth with period T , u() is a continuous function,
and h() is the Heaviside step function given by
h(z)=
1 if z0
0 if z<0
It is obvious that the definition (3) is generally true for any input u(). However,
in application purposes, it is desired to have only one switching position in
every switching period. This means that we must assume that there is no
chattering in the systems.
Letting
A B
0
A =
2
1
C
1
L
,
1
RC
A B
0 0
A =
,
1
0 0
AB
0
h =
,
0
0
AB
E
h = L
1
0
Then, in compact form, eqn (1) can be written as

x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)
0
0
1
1
(4)
Boost converter circuit

We consider the circuit given as in Fig. 2. Assume that the circuit is in CCM.
Let x =i and x =v be the inductor current and the capacitor voltage,
1 L
2
C
respectively. The differential equations describing the Boost converter circuit
are given by
1s
E
x (t)=
x (t)+
1
2
L
L
1s
1
x (t)=
x (t)
x (t)
2
C 1
RC 2
Fig. 2 Boost converter circuit.

(5)
57
Letting
A B A B
1
L
,
1
RC
A =
0
1
C
1
L
A =
1
1
C
AB
E
h = L ,
0
0
AB
0
h =
1
0
then (5) can be written as
x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)

0
0
1
1
(6)
BuckBoost converter circuit

Let x =i and x =v be the inductor current and the capacitor voltage,
1 L
2
C
respectively. The differential equations describing the BuckBoost converter
circuit are given by
E
1s
x (t)+s
x (t)=
2
1
L
L
(7)
1
1s
x (t)
x (t)
x (t)=
1
2
C
RC 2
Letting
A =
0
1
L
B A B
1
1
C
RC
then (7) becomes
A =
1
1
C
1
L
AB
0
h =
,
0
0
x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)

0
0
1
1
AB
E
h = L
1
0
(8)
Cuk converter circuit

Let x =i , x =v , x =i , and x =v be the inductor currents and the
1 L1 2
C1 3 L2
4
C2
uk
capacitor voltages,
respectively. The differential
equations describing the C
Fig. 3 BuckBoost converter circuit.

58
uk converter circuit.
Fig. 4 C
converter circuit are given by

E
1s
x (t)+
x (t)=
2
1
L
L
1
1
s
1s
x (t)+
x (t)
x (t)=
1
2
C
C 3
1
1
1
s
x (t)= x (t) x (t)
3
L 2
L 4
2
2
1
1
x (t)=
x (t)
x (t)
4
C 3
RC 4
2
2
(9)
Letting
M0 1 0
0 Q
L
N
N
1
N1
N
0
0
0 N
NC
A =N 1
N,
0
1 N
N0
0
0
L N
N
2
N
1
1 N
0
P0
C
RC S
2
2
AB
E
L
1
h = 0 ,
0
0
0
M
Q
1
0 0N
N 0
L
1
N
N
1
N 1
0
0N
C
A =N C
N
1
1
1
N
N
1
0 0N
N 0
L
2
N
N
0
0
0 0S
P
AB
0
0
h =
1
0
0
then (9) becomes

x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)
0
0
1
1
uk converter we have xR4, i.e. x=[x
Note that for C
1
(10)
x
2
x4
]T.
59
General form of converter models

From the equations given by (4), (6), (8), and (10), we conclude that the general
system for the converter circuits can be formulated as
x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)
(11)
0
0
1
1
where s(t)=h[u(x)saw(t, T )], with A and A as (nn)-matrices, h and h
0
1
0
1
as (n1)-matrices; u : RnR is a continuous function, and h() is the Heaviside
step function.
In general, the right-hand side of (11) is a nonlinear discontinuous function.
The discontinuity of the system is introduced by the switching in the circuits.
An approximate solution for the system (11) can be obtained from an appropriate integral equation. An approach for solving this integral equation is
discussed in Ref. 6. This approach assumes that there is no chattering in the
systems. It means that there is a finite number of jumps in the right-hand side
of (11) on any finite time interval, and each jump is norm bounded. Therefore
the right-hand side of (11) is Lebesgue integrable for all tt . So that the
0
solution of the integral equation
[ f (x(s))+g(x(s))s(s)] ds
(12)
t0
where f (x())=A x()+h and g(x())=A x()+h , exists and satisfies the
0
0
1
1
system (11) almost everywhere. Since x(t ) is known, the first derivative of (12)
0
with respect to t is obviously system (11). Therefore the solution for the system
(11) can be obtained from (12).
x(t, t , x(t ))=x(t)x(t )+
0
0
0
Normalized models
From the derivation of converter models, we note that the switch plays a very
important role. An important parameter of the switch is the switching period
T , which is the reciprocal of the switching frequency f . In fact the systems
s
behavior mainly depend on the parameters L , C, and f . Theoretically and
s
numerically it will be advantageous to work with a system depending on the
parameters L and C only. This will lead to what is called a time-scaled
normalized system. In this section, we briefly overview the normalization of
the systems by time-scaling.
Buck converter
Recalling eqn (1), we obtain
1
E
x (t)= x (t)+s
1
L 2
L
(13)
1
1
x (t)= x (t)
x (t)
2
C 1
RC 2
Letting t=tT with T = f 1 and replacing the variable t by t, then (4)

s
60
becomes
x(t)=T {[A x(t)+h ]+[A x(t)+h ]s(t)}
0
0
1
1
Define
C=Cf
and
L =L f
s
s
then we have the normalized system
E
1
x (t)= x (t)+s
1
L 2
L
1
1
x (t)
x (t)= x (t)
2
C 1
RC 2
(14)
(15)
(16)
Note that x in (14) and (16) denotes dx/dt, the derivative of x with respect to
t. We will use the argument t to indicate the normalized model. It is clear that
after we normalize the system, we have to replace L and C by L and C,
respectively, in the parameters A , A , h , and h . This conversion will be used
0 1 0
1
throughout this paper to represent the normalized system unless it is mentioned
for another purpose. The normalization procedures used in the Buck converter
uk converters without
will be also applied to the Boost, BuckBoost, and C
giving details for reasons of simplicity.
Boost converter
Letting t=T with T = f 1. Replacing t by t and the parameters L , and C by
s
L , and C, respectively, in (5) then it follows
1s
E
x (t)=
x (t)+
1
L 2
L
1s
1
x (t)=
x (t)
x (t)
2
C 1
RC 2
(17)
and (17) forms the normalized model for the Boost converter, with L and C
defined as in (15).
BuckBoost converter
Letting t=tT with T = f 1. Replacing t by t and the parameters L and C by
s
L and C, respectively, in (7) then we obtain
1s
E
x (t)=
x (t)+s
1
L 2
L
1s
1
x (t)=
x (t)
x (t)
2
C 1
RC 2
(18)
which represents the normalized model for the BuckBoost converter, with L
and C defined as in (15).
61
Cuk converter
Letting t=tT with T = f 1 and define
s
L =L f ,
L =L f ,
C =C f ,
C =C f
(19)
1
1 s
2
2 s
1
1 s
2
2 s
Replacing the variable t by t, and the parameters L , L , C , and C by L ,
1 2 1
2
1
L , C , and C , respectively, in (9) we obtain
2 1
2
1s
E
x (t)=
x (t)+
1
2
L
L
1
1
1s
s
x (t)+
x (t)
x (t)=
2
C 1
C 3
1
1
(20)
s
1
x (t)= x (t) x
3
L 2
L 4
2
2
1
1
x (t)
x (t)
x (t)=
4
C 3
RC 4
2
2
uk converter.
and the system (20) is the normalized model for the C
From the equations (16), (17), (18), and (20), the general form of the
normalized systems may be defined as follows.
x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)
(21)
0
0
1
1
where s(t)=h[u(x)saw(t, 1)], with A , A , h , and h the parameters of some
0 1 0
1
converters. Note that in the matrices A , A , h , and h , which are defined
0 1 0
1
earlier, we replace L and C by L and C, respectively, for the Buck, Boost, and
uk converter we replace L , L , C , and C
BuckBoost converters. For the C
1 2 1
2
by L , L , C , and C , respectively.
1 2 1
2
State-space averaged models
We recall the system (21)
x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)
0
0
1
1
s(t)=h[u(x)saw(t, 1)]
(22)
We know that the system describes switched circuits which depend on a switch
control function. Hence, the state equations for the systems will produce the
two topologies as follows. When the switch is in the ON-position, s(t)=1, we
obtain
x(t)=[A x(t)+h ]+[A x(t)+h ]
0
0
1
1
and when the switch is in the OFF-position, s(t)=0, we have
(23)
x(t)=[A x(t)+h ]
(24)
0
0
Assume u(x)=D, a constant value. Thus the switch turns ON for the time DT
62
and turns OFF for the time (1D)T . Then the state-space average (SSA) of
(23) and (24) may be defined as
(25)
x: (t)=[A x: (t)+h ]+[A x: (t)+h ]D
0
0
1
1
where x: (t) denotes the state-space averaged counterpart of x(t).
In the case that u(x) is not a constant, we define the state-space averaged
model to be (25) where D is replaced by u: u(x: )
x: (t)=[A x: (t)+h ]+[A x: (t)+h ]u:
(26)
0
0
1
1
Note that the solution of (26) only approximates the average of the solution
of (22). The difference may be significant. However, denoting the true average
of x(t) by x:: (t), then lim
x: (t)=lim
x(t), where T is the switching period.
T0 :
T0 :
In words, if the switching frequency becomes infinitely large, the solution of
the actual model and the state-space averaged model approach each other.
Steady-state analysis
One way of analyzing the operation of the converter systems is to examine the
inductor currents and capacitor voltages. This analysis will provide a useful
tool for designing the low-pass filter. In this section we assume that all statespace averaged converter models are in steady state with u: =U=D. From (26)
the steady-state values are, in general, given by
0=[A X+h ]+[A X+h ]D
(27)
0
0
1
1
where X denotes the steady-state value of x: (t). It is obvious that X is a constant
value and we use X=[I V ]T for the Buck, Boost, and BuckBoost conL
C
uk converter.
V ]T for the C
I
V
verters, and X=[I
C2
C1 L2
L1
Buck converter
Inserting A , A , h , h for the Buck converter in (27) and solving for each
0 1 0 1
component of the state X, we conclude that
V =DE
C
DE
I =
L
R
and
(28)
Boost converter
Inserting A , A , h , h for the Boost converter in (27) and solving for each
0 1 0 1
component of the state X, we obtain
E
V =
C 1D
and
E
I =
L R(1D)2
(29)
BuckBoost converter
Inserting A , A , h , h for the BuckBoost converter in (27) and solving for
0 1 0 1
each component of the state X, we conclude
DE
V =
C
1D
and
DE
I =
L R(1D)2
(30)
63
Cuk converter
uk converter in (27) and solving for each
Inserting A , A , h , h for the C
0 1 0 1
component of the state X, we end up with
E
V =
C1 1D
and
DE
V =
C2
1D
D2E
I =
L1 R(1D)2
and
DE
I =
L2
R(1D)
(31)
Small signal analysis

In applications, when we examine a switching scheme, we usually consider two
issues with respect to the state-space averaged model. The first one concerns
the steady-state values, the second one the behavior of small deviations from
the steady-state values, the so-called small-signal behavior. Here the closedloop situation plays an important role. Consider the general state-space averaged model from (26)
x: (t)=[A x: (t)+h ]+[A x: (t)+h ]u:
0
0
1
1
(32)
y: (t)=C
9 x: (t)
where y: R represents the state-space averaged output of the system, C

9 R1n
and A , A , h , and h are the parameters of the converters. Define small
0
1 0
1
deviations from the steady-state values X, Y and U by x, y and u respectively,
i.e.
x =x: X,
y =y: Y,
u =u: U
(33)
Then it is well known that the linearized model is, from (32) and leaving the
time argument for simplicity, given by
x =
[(A x: +h )+(A x: +h )u: ] x

0
0
1
1 X,U
x:
+
[(A x: +h )+(A x: +h )u: ] u

0
0
1
1 X,U
u:
(34)
=(A +A U)x +(A X+h )u

0
1
1
1
=Ax +Bu
y = C
9 x
Assume the feedback situation is
u: =G(V y: )
r
(35)
where G is a non-negative scalar gain and V is a constant reference voltage.

r
After linearizing (35) the linearized closed-loop system can be written as
x =(ABC
9 G )x
(36)
64
In this section we choose U to be 0.5 in steady-state. Then from the previous

section, we can calculate I and V for the four converters. We choose E=1 V,
L
C
f =50 kHz, L =L =L =50 mH, C=C =C =4.4 mF, and R=2 V.
s
1
2
1
2
Furthermore we utilize C
9 =[0 1] for the Buck, Boost, BuckBoost converters,
uk converter. Now x: , u: , A , A , h , h and
and C
9 =[0 0 0 1] for the C
0 1 0 1
thus A, B and C
9 in (36) are known for the different converters.
Buck converter
Recall that U=D=0.5, then the steady-state solution, using (28), is X=
[0.25 0.5]T. From (36), since A +A U=A and A X+h =h , it follows
0
1
0
1
1
1
that
lI(ABC
9 G)=
50
11
l+
25
11
and the characteristic polynomial is

r(l)=l2+
2
(1+G )
5
20
25
l+ (1+G )
11
11
(37)
Apply the RouthHurwitz criterion, see for example Ref. 1, then the stability
of the system requires
1+G>0
Hence, every real non-negative number can be chosen for the value of the gain.
It is obvious that the critical gain associated with the linear small signal model
G is 2 (Fig. 5).
c
Boost converter
From (29) and D=0.5, the steady-state solution is X=[2 2]T. Recall that
U=D, and since A=A +A U and B=A X, then it is easy to determine that
0
1
1
Fig. 5 Root locus for Buck converter, G 0.

65
the characteristic polynomial is

r(l)=l2+
5
25
(14G)l+ (1+4G)
11
11
(38)
Apply the RouthHurwitz criterion, then the stability of the system requires
(14G )>0
and
(1+4G)>0
Hence, the stability of the system is obtained by choosing the gain value
0G<0.25. It is obvious that the critical gain associated with the linear small
signal model G is 0.25 (Fig. 6).
c
BuckBoost converter
From (30) and D=0.5, the steady-state solution is X=[1 1]T. Recall that
U=D and since A=A +A U and B=A X+h , then the characteristic
0
1
1
1
polynomial is
r(l)=l2+
5
25
(1+2G)l+ (14G)
11
11
(39)
(1+2G )>0
and
(14G)>0
c
Cuk converter
From (31) and D=0.5, the steady-state solution is X=[0.5 2 0.5 1]T.
Recall that U=D, and since A=A +A U and B=A X, then the character0
1
1
istic polynomial is
r(l)+l4+
25
5
125
625
l3+ (68G )l2+
(2+4G)l+
(416G )l
11
11
121
121
Fig. 6 Root locus of Boost converter, G0.

66
Fig. 7 Root locus for BuckBoost converter, G0.
to satisfy the following inequalities:
412G>0,
1
1+2G12G2=0 m G >0
3
and
416G>0
c
Ripple analysis
We assume that all circuits are operating in the steady state. Furthermore we
assume that the output voltages are almost constant which coincides with the
situation that x: approximately equals the true average of x only for high
frequency. In this section, we derive the positive peak-to-peak current and
voltage ripple for all converters considered. We only provide a short explanation
for the Buck converter concerning the construction of its waveforms in steady
state. Similar arguments can be applied to obtain the steady-state waveforms
of other converters. More detailed explanations for constructing the waveforms
of the converters can be found in, for example Refs 3 and 8.
uk converter, G0.
Fig. 8 Root locus for C
67
Buck converter
We consider the circuit as given in Fig. 1. During the first subinterval,
0<t<DT , the inductor voltage is given by v (t)=Ev (t) and in the second
L
C
subinterval, DT <t<T , we obtain v (t)=v (t). Assume that the switching
L
C
ripples in v (t) is small, compared to its respective DC component V , then
C
C
it is clear that v (t)#V . Therefore, we use v (t)=EV , when s=1, and
C
C
L
C
v (t)=V , when s=0, to construct the inductor voltage waveform. Since
L
C
v (t)=L [di (t)/dt], the inductor current starts at some initial value i (0).
L
L
L
During the first subinterval, s=1, the inductor current increases with the
constant slope (EV )/L until t=DT . At this point the switch changes from
C
s=1 to s=0. Then the current decreases with the constant slope (V /L ).
C
We assume that the output voltage is almost constant. Then, the capacitor
current waveform i (t) is equal to the inductor current waveform i (t) around
C
L
the average value I =0. We know that i (t)=C[dv (t)/dt]. That gives us the
C
C
C
waveform v (t) around the average value V . When the capacitor current i (t)
C
C
C
is positive, then the capacitor voltage v (t) increases. Hence, between the two
C
zero crossings of the capacitor current waveform, the capacitor voltage changes
between its minimum and maximum extrema. The total change of v is the
C
peak-to-peak output voltage ripple. The waveforms for the Buck converter are
presented in Fig. 9. From the waveforms of the Buck converter in Fig. 9 we
have
V
V
Di = C Dt = C Dt
L
L
L
(40)
Since Dt=(1D)T then

V
Di = C (1D)T
L L
We know V =I R, then it follows
C
L
I (1D)RT
Di = L
L
L
and we conclude
(1D)R
Di
L=
I
Lf
L
s
For the output voltage, consider once again Fig. 9, we obtain
V T 2(1D)
Dv = C
C
8L C
(41)
(42)
then
1D
Dv
C=
V
8L Cf 2
C
s
(43)
68
Fig. 9 Buck converter waveforms. (a) Inductor voltage; (b) inductor current;
(c) capacitor current; (d) capacitor voltage.
Boost converter
We consider the waveforms of the Boost converter as given in Fig. 10. For the
inductor current we obtain
Di =
L
EV
V E
C Dt = C
Dt
L
L
(44)
since V >E, Dt=(1D)T , and E=(1D)V then

C
C
DV
Di = C (1D)T
L
L
We know V =I R(1D), therefore it follows
C
L
I D(1D)2RT
Di = L
L
L
and we conclude that
Di
D(1D)2R
L=
I
Lf
L
s
(45)
Fig. 10
69
Boost converter waveforms. (a) Inductor voltage; (b) inductor current;

For the output voltage, we obtain

V
CDv = C DT
C R
(46)
then
V DT
Dv = C
C
RC
(47)
It implies that
Dv
D
C=
V
RCf
C
s
(48)
BuckBoost converter
We consider the waveforms of the BuckBoost converter as given in Fig. 11.
For the inductor current we obtain
V
Di = C Dt
L
L
(49)
70
Fig. 11 BuckBoost converter waveforms. (a) Inductor voltage; (b) inductor current;
and since Dt=(1D)T then
V
Di = C (1D)T
L
L
We know V =I R(1D), it follows

C
L
I (1D)2RT
Di = L
L
L
(1D)2R
Di
L=
I
Lf
L
s
V DT
Dv = C
C
RC
(50)
(51)
then
Dv
D
C=
|V | RCf
C
s
(52)
71
Cuk converter
uk converter as given in Fig. 12. For the
We consider the waveforms of the C
inductor current we have
E
and
Di = Dt
L1 L
1
since Dt=DT , then
E
Di = DT
L1 L
1
It follows that
and
I R(1D)2T
Di = L1
L1
L D
1
V
Di = C2 Dt
L2
L
2
(53)
V
Di = C2 DT
L2
L
2
and
I R(1D)T
Di = L2
L2
L
2
(54)
(1D)2R
Di
(1D)R
Di
L =
L =
and
I 1
DL f
|I 2|
L f
L1
1 s
L2
2 s
V DT
Dv = C1
C1
RC
1
and
V (1D)T 2
Dv = C2
C2
8L C
2 2
(55)
(56)
(57)
uk converter waveforms. (a) Inductor voltage; (b) inductor current;

Fig. 12 C
72
then
D2
Dv
C1 =
V
RC f
C1
1 s
and
Dv
(1D)
C2 =
|V | 8L C f 2
C2
2 s s
(58)
Simulation of converter models

We simulated the normalized models for the Buck, Boost, BuckBoost, and
uk converters. All simulations are executed with MATLAB, in particular
C
using ODE23 with at least 100 integration steps in every switching period. For
all simulations we used the initial condition x (0)=x (0)=x (0)=x (0)=0,
1
2
3
4
the parameters R=2 V, f =50 kHz, E=1 V, L =50 mH, and C=4.4 mF. We
s
uk converter
utilized the duty ratio D=0.5 and the unity sawtooth. For the C
we used C =C =C and L =L =L .
1
2
1
2
For closed-loop converters, we consider the systems shown as in Figs 14, 15,
16, and 17. Now consider the SSA steady-state situation given as in Fig. 13.
Then we have the following situation. Here P is the SSA steady-state gain from
D to V . Knowing that E=1 V and D=0.5 we may calculate P, from (28) to
C
(31), for the different converters. These P and other SSA steady-state values
are summarized in Table 1. G is chosen such that G<G and |GP|=0.4 in all
c
cases for reasons of comparisons. An important point is that a stable SSA
steady-state does not imply a stable PWM system. That will be illustrated later
uk converter simulation.
in the C
Fig. 13 SSA steady-state describing the parameters G and P.
Fig. 14 Closed-loop Buck converter with G=0.4, unity feedback voltage, and unity
sawtooth.
73
Fig. 15 Closed-loop Boost converter with G=0.1, unity feedback voltage, and unity
sawtooth.
Fig. 16 Closed-loop BuckBoost converter with G=0.2, unity feedback voltage, and
unity sawtooth.
uk converter with G=0.2, unity feedback voltage, and unity

Fig. 17 Closed-loop C
sawtooth.
TABLE 1 SSA steady-state values for standard converter models
Parameter
Buck
Boost
BuckBoost
uk
C
Unity
G
C
G chosen
V
r
V
C1,2
I
L
P 1,2
2
0.4
1.75
0.5
0.25
1
0.25
0.1
7
2
2
4
0.25
0.2
1.5
1
1
2
0.25
0.2
1.5
2, 1
0.5, 0.5
2
V
V
A
74
Simulation for open-loop converter circuits

In our experiments, the normalized model gives a reduction of almost 40% in
computing time compared to the unnormalized model. It means that by eliminating the pulse frequency, f , in every computation step, the normalized model
s
uk converters show a simuprovides numerical advantages. The Buck and C
lation in which the SSA signals approximately equal the average of the true
signals. The Boost and BuckBoost converters produce SSA signals which do
not ideally act as the average of the true signals. It means that the SSA method
does not always produce the true average (Figs 1822). The differences that
occurred are under investigation.
Simulation for closed-loop converter circuits
As in the open-loop simulations, the normalized model gives a reduction of
almost 20% in computation time compared to the unnormalized model. The
Buck converter still produces a simulation in which the SSA signals approximately equal the average of the true signals. However, this is not the case for
uk converters. Besides the fact that SSA signals
the Boost, BuckBoost, and C
uk converter a demonstration
do not fit with the true averages, we have for the C
of the fact that the stable SSA steady-state does not imply a stable PWM
system (Figs 2327).
Conclusions
In this paper we have reviewed and illustrated the theory of PWM d.c.d.c.
converters. We have used state-space averaging and also normalization with
Fig. 18 SSA and true signals of open-loop Buck converter, with D=0.5, L=50 mH,
C=4.4 mF, f =50 kHz, R=2 V, E=1 V. T he SSA signals are denoted by the
s
dashed lines.
75
Fig. 19 SSA and true signals of open-loop Boost converter, with D=0.5, L=50 mH,
C=4.4 mF, f =50 kHz, R=2 V, E=1 V. T he SSA signals are denoted by the dashed
s
lines.
Fig. 20 SSA and true signals of open-loop BuckBoost converter, with D=0.5,
L=50 mH, C=4.4 mF, f =50 kHz, R=2 V, E=1 V. T he SSA signals are denoted by
s
the dashed lines.
76
uk converter for inductor currents, with

Fig. 21 SSA and true signals of open-loop C
D=0.5, L =L =50 mH, C =C =4.4 mF, f =50 kHz, R=2 V, E=1 V. T he SSA
1
2
1
2
s
signals are denoted by the dashed lines.
uk converter for capacitor voltages, with

Fig. 22 SSA and true signals of open-loop C
D=0.5, L =L =50 mH, C =L =4.4 mF, f =50 kHz, R=2 V, E=1 V. T he SSA
1
2
1
2
s
signals are denoted by the dashed lines.
respect to the pulse frequency. This normalization appears to be very advantageous numerically. Root loci determined from the linearized models have been
evaluated. This provides good information for choosing the gain for converter
systems with closed-loop control. The SSA models produce simulations which
may or may not agree with the true averages. The difference between the
77
Fig. 23 SSA and true signals of closed-loop Buck converter, with L=50 mH, C=4.4 mF,
f =50 kHz, R=2 V, E=1 V, G=0.4, and V =1.75. T he SSA signals are denoted
s
ref
by the dashed lines.
Fig. 24 SSA and true signals of closed-loop Boost converter, with L=50 mH,
C=4.4 mF, f =50 kHz, R=2 V, E=1 V, G=0.1, and V =7 V. T he SSA signals are
s
ref
denoted by the dashed lines.
average of the true signals and the SSA signals is under investigation.
Furthermore, it is demonstrated that a stable SSA steady-state does not imply
a stable PWM system. It is believed that this aspect gives an important
educational contribution in the field of PWM d.c.d.c. converters.
78
Fig. 25 SSA and true signals of closed-loop BuckBoost converter, with L=50 mH,
C=4.4 mF, f =50 kHz, R=2 V, E=1 V, G=0.2, and V =1.5 V. T he SSA signals
s
ref
are denoted by the dashed lines.
uk converter for inductor currents, with

Fig. 26 SSA and true signals of closed-loop C
L =L =50 mH, C =C =4.4 mF, f =50 kHz, R=2 V, E=1 V, G=0.2, and
1
2
1
2
s
V =1.5 V. T he SSA signals are denoted by the dashed lines.
ref
79
uk converter for capacitor voltages, with

Fig. 27 SSA and true signals of closed-loop C
L =L =50 mH, C =C =4.4 mF, f =50 kHz, R=2 V, E=1 V, G=0.2, and
1
2
1
2
s
V =1.5 V. T he SSA signals are denoted by the dashed lines.
ref
References
1 P. J. Antsakalis and A. N. Michel, L inear Systems (McGraw-Hill, New York, 1997).
2 V. A. Caliskan, G. V. Verghese and A. M. Stankovic, Multifrequency averaging of dc/dc
converters, IEEE T rans. Power Electronics, 14(1) (1999), 124133.
3 R. W. Erickson, Fundamentals of Power Electronics (Chapman & Hall, London, 1997).
4 D. W. Hart, Introduction to Power Electronics (Prentice-Hall, Englewood Cliffs, 1997).
5 K. C. Wu, Pulse-W idth-Modulated DCDC Converters (Chapman & Hall, London, 1997).
6 B. Lehman and R. M. Bass, Extensions of averaging theory for power electronic systems,
IEEE T rans. Power Electronics, 11(4) (1996), 542553.
7 B. Lehman and R. M. Bass, Switching frequency dependent averaged models for PWM dcdc
converters, IEEE T rans. Power Electronics, 11(1) (1996), 8998.
8 N. Mohan, T. M. Undeland and W. P. Robbins, Power Electronics: Converter, Applications,
and Design, 2nd edn (Wiley, Chichester, 1995).

Pulse-Width Modulated D.c.-D.c. Converters

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Pulse-width modulated d.c.d.c.

Pulse-width modulated (PWM) d.c.d.c. converters are increasingly applied in

PWM d.c.d.c. converters

where x =dx/dt, the derivative of x with respect to t, and s represents the

Fig. 1 Buck converter circuit.

Y. Fuad, W. L. de Koning and J. W. van der Woude

Then, in compact form, eqn (1) can be written as

Boost converter circuit

Fig. 2 Boost converter circuit.

PWM d.c.d.c. converters

then (5) can be written as

x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)

BuckBoost converter circuit

then (7) becomes

x(t)=[A x(t)+h ]+[A x(t)+h ]s(t)

Cuk converter circuit

Fig. 3 BuckBoost converter circuit.

Y. Fuad, W. L. de Koning and J. W. van der Woude

converter circuit are given by

then (9) becomes

International Journal of Electrical Engineering Education 38/1

PWM d.c.d.c. converters

General form of converter models

Letting t=tT with T = f 1 and replacing the variable t by t, then (4)

Y. Fuad, W. L. de Koning and J. W. van der Woude

PWM d.c.d.c. converters

Y. Fuad, W. L. de Koning and J. W. van der Woude

International Journal of Electrical Engineering Education 38/1

PWM d.c.d.c. converters

Small signal analysis

where y: R represents the state-space averaged output of the system, C

[(A x: +h )+(A x: +h )u: ] x

[(A x: +h )+(A x: +h )u: ] u

=(A +A U)x +(A X+h )u

where G is a non-negative scalar gain and V is a constant reference voltage.

Y. Fuad, W. L. de Koning and J. W. van der Woude

In this section we choose U to be 0.5 in steady-state. Then from the previous

and the characteristic polynomial is

Fig. 5 Root locus for Buck converter, G 0.

PWM d.c.d.c. converters

the characteristic polynomial is

Fig. 6 Root locus of Boost converter, G0.

Y. Fuad, W. L. de Koning and J. W. van der Woude

Fig. 7 Root locus for BuckBoost converter, G0.

PWM d.c.d.c. converters

Since Dt=(1D)T then

Y. Fuad, W. L. de Koning and J. W. van der Woude

since V >E, Dt=(1D)T , and E=(1D)V then

PWM d.c.d.c. converters

Boost converter waveforms. (a) Inductor voltage; (b) inductor current;

For the output voltage, we obtain

International Journal of Electrical Engineering Education 38/1

Y. Fuad, W. L. de Koning and J. W. van der Woude

and since Dt=(1D)T then

We know V =I R(1D), it follows

International Journal of Electrical Engineering Education 38/1

PWM d.c.d.c. converters

uk converter waveforms. (a) Inductor voltage; (b) inductor current;

Y. Fuad, W. L. de Koning and J. W. van der Woude

Simulation of converter models

Fig. 13 SSA steady-state describing the parameters G and P.

PWM d.c.d.c. converters

uk converter with G=0.2, unity feedback voltage, and unity