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1. LEARNING OBJECTIVES
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1. PROBLEM STATEMENT
Modify the single cycle MIPS processor by partitioning it into 5 stages. The stages must
perform the operations specified above. After you finish from partitioning the stages, you have to
write a code that will not cause any dependency between the instructions. This is can be done by
inserting NOP instructions (opcode = (0000)2) between every two instructions in the code.
2. DESIGN PROCEDURE
1. Determine the components of every stage by filling Table 2.
#
Instruction
Fetch
Increments
the
PC
Computes
The
addresses
for
the
Data
Memory
Writes
to
the
memory
Fetches
the
instruc5on
Computes
values
to
be
stored
in
the
register
le.
---
---
---
---
---
---
---
3
---
Instruction Decode
Execution
Memory
Write Back
Writes
to
the
registers
le.
Instruction
Fetch
Incrementer
Instruc5ons
Memory
Instruction
Decode
Execution
Memory
Write Back
PC
Table 2. Stages Components.
1. Determine the values, the indices and the fields required in each stage and its source
stage. Fill Table 3.
#
1
2
Instruction
Fetch
Instruction
Decode
Execution
Instruc5on
rd
3
4
5
6
7
8
9
10
11
12
13
14
15
Table 3. Value needed in each stage.
Memory
Write Back
# Instruction
Decode
Execution
Memory
Write Back
1
2
3
4
5
6
7
8
9
10
11
Table 4. Control Signals
3. Modify Figure 1 by adding a flip-flop in every point that separates a stage from another.
4. After finishing adding the pipeline registers, modify the stages so they implement the
required logic correctly.
5. Open Quartus project that includes the single-cycle implementation of the MIPS
processor.
6. Open the single-cycle BDF file and copy all the file content.
7. Create a new BDF file and paste all the single-cycle design there.
8. Open Quartus Mega wizard and create 1-bit, 2-bits, 3-bits, 4-bits, 12-bits and 16-bits
flips-flops. We need in all of these flip-flops an enable signal and a synchronous clear.
9. Use the flip-flops created in step 6 to partition the stages and add the necessary logic.
10. Test your design by creating a code that does not exhibit any dependency between the
instructions and a proper vector waveform file.
3. WHAT TO SUBMIT
1. The Exercise Sheet.
2. The BDF design file.