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Made by:
M. Cakti Abussalam AA (214341063)
Teddy Sukma Apriana (214341070)
2AEC
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D. SCHEMATIC DIAGRAM
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E. TRUTH TABLE
Table 1.1. Table of Control
A
Description
HOLD
DOWN
UP
Table 1.2. Table of LED Condition based from Number that Counted Up
Count
Lamp
0 90
GREEN
91 125
YELLOW
126 250
RED
Information:
LED Condition in Table 1.2 also based from Number that Counted Down.
F. TIMECHART
RED
YELLO
W
GREE
N
0
9
0
9
1
12
5
12
6
25
0
G. EXPLANATION
There are 4 kind of ICs that we used in here
1. IC 74153
A 1-of-4 dual multiplexers, used to decide the mode of the counter. This IC
have 2 Selectors, that we will use it with A and B. We will use only one in this
project.
2.IC74193
A 4-bit Sychronous Up/Down Binary Counters with dual clocks and clear,
to counting and also the main IC. We will use 3 in this project
3. IC4508
A Dual 4-bit Latch, to lock the signal that have been transferred from
counter. Combined with LED and diode, this is the last processing system
before output
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4. Logic Gates
Standards logic gates, to control counters, setting up the signals, and
many mores. In here, we use NAND, NOR, AND, and OR.
This project are divided to some sub projects :
a. Changing counter mode with IC multiplexer
Here we use a dual 1-of-4 multiplexer. Each one of this multiplexer will
control the input of either UP or DOWN. So when using the IC74153, 1Y
will go to UP and 2Y will go to down.
the 74193 have many charateristic, depending on the input of up and
down. The counter will held its present state if UP and DOWN have 1
value. To counting UP, Clock must go to UP and DOWN must has a 1
value. To counting DOWN, Clock must go to DOWN and UP must has a
1 value.
So when A and B is 1, clock, which must go to UP, must be placed in
1x3 (because when the selectors is all 1 the active gate in mux will be
1x3). And VCC +5v (high voltage) must go to 2x3. When A is 0 and B is
1, clock must go to DOWN, therefore it will be placed on the active
gate, 2x2. 1x2 will be inputted with 1 so the UP will have 1 value. For
the hold, we can just leave 1x1 and 2x1 unconncected, because the
output will still be one. The diagram of mux and the first (LSB) counter
will be like this :
b. Upcounting
IC 74193 is 4bit counting; therefore, will repeat counting at 1111, by
default and in upcounting mode. We need to change it so it will reset at 9, or
by binary code, 0101. To achieve it, we make the counter so 10 (0110) will
reset the counter.
Q0 and Q3 will go to NOT gates, and will go to AND 4 input with Q2
and Q1. The result will go to MR, and also go to UP of the next digit counter.
The next counter also get UP from the 0110 from counter before. The
diagram would be like this :
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c. Down Counting
IC 74193 is 4bit counting; therefore, will repeat counting at 0000 and
back to 1111, by default and in downcounting mode. We need to change it so
it will reset at 0 and back at 9, or by binary code, 0101. To achieve it, we
make the counter so Borrow (TCD) will reset the counter.
TCD is borrow, which will be active when 0000 will counting down,
back to 1111. We need to make this borrow make the load 0 (as opposite of
upcounting which is reset). So the borrow must go to a NAND gate with clock,
because the reset must be synchronized with clock. In normal states, load
will be loaded by 1 value. But when TCD and clock is at 1 value, the counter
will resetted to the input binary code (D0 to D3). The next counter also get
their clock DOWN from the NAND of counter before. The diagram would be
like this :
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With diode, we cab see that the program will run like what we have
planned. No problem has found when we move to the next state (see Fig.
below)
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Without diode, the input of one signal will disturb the others, causing IC
wont work like what we have planned.
We can use the exact thing with down counting mode by changing the
signal. For down counting, red will turn on when 250, then the yellow will turn
on when 125, and the green will turn on from 90.
Now we combine all three subprojects into one, blending them to A
counter controlled LED, with the diagram as seen as below.
H. CONCLUSION
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