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GATES
IIT GANDHINAGAR
Harvinder singh
Roll no-: 15510060
M.sc Physics
harvinder.singh@iitgn.ac.in
Abstract-:
In this experiment we verified logic gates OR, AND,
NOT, NAND and NOR using appropriate ICs and designed truthtables.
CONTENTS:
1. INTRODUCTION
2. THEORY
2.1 OR GATE
2.2 AND GATE
2.3 NOT GATE
2.4 NOR GATE
2.5 NAND GATE
3. DATA ANALYSIS
4. CONCLUSION
5. REFERENCE
INTRODUCTION -:
A GATE is a logic circuit that has one
or more inputs but only one output . A signal appears at the
Input A
0
0
1
1
Input B
0
1
0
1
Output Q
0
1
1
1
AND GATE -:
The output signal is high if and only if all
the inputs are high.
Input A
0
0
1
1
Input B
0
1
0
1
Output Q
0
0
0
1
NOT GATE -:
Its a circuit with one input and one
output . The output of a NOT gate is high if input is
low and vice-versa. A not gate is an inverter.
Output
Q
1
0
0
1
NOR GATE -:
The output of a NOR gate is high if and
only if all the inputs are low .
INPUT B
0
0
1
1
0
1
0
1
OUTPUT
Q
1
0
0
0
NAND GATE -:
The output of a NAND gate is high if
only one of the input is high .
Pin diagram -:
OR gate -:
7432 ICs
theInput
B
0
1
0
1
Output
Q
1
1
1
0
AND gate -:
7408 ICs
NOT gate -:
7404 ICs
NOR gate-:
7402 ICs
NAND gate-:
7400 ICs
3.DATA ANALYSIS -:
1. OR gate -:
B
0
1
0
1
OUTPUT
Q
Vout in V
0
0.300
1
4.390
1
4.388
1
4.391
2. AND gate-:
High input voltage = 4.40 V (ON or 1)
Low input voltage = 0 V (OFF or 0)
INPUT
A
0
0
1
1
B
0
1
0
1
OUTPUT
Q
Vout in V
0
.1172
0
.1178
0
.1171
1
3.800
3. NOT gate -:
High input voltage = 4.40 V (ON or 1)
Low input voltage = 0 V (OFF or 0)
INPUT
A
0
1
OUTPUT
Q
Vout in V
1
3.870(ON)
0
0.190(OFF)
4. NAND gate -:
High input voltage = 4.40 V (ON or 1)
Low input voltage = 0 V (OFF or 0)
INPUT
A
0
0
1
1
B
0
1
0
1
OUTPUT
Q
Vout in V
1
4.290
1
4.311
1
4.312
0
0.178
4 CONCLUSION -:
After doing this experiment we got the idea how a
simple network that is logic gates based on Boolean algebra
works. Also speciality of these logic gates is that they have more
than two inputs (NOT gate has only one input) but only one
output. Also by using one particular logic gate we can construct
another logic gate by designing a appropriate Boolean algebra.
Also we have seen that output of one logic gate is given the input
of other gate during there combinationa to get a desire logic
gate.
5 REFERENCE -:
1. GEETA SANON A PHYSICS PRACTICAL BOOK
2. DIAGRAMS FROM WEB