SCR RATINGS

1 Introduction

2 Voltage Ratings of SCR

o

2.0.1 1. Peak Working Forward-blocking Voltage VDWM

2.0.2 2. Peak Repetitive Forward-blocking Voltage VDRM

2.0.3 3. Peak Non-repetitive or Surge Forward-blocking Voltage

VDSM

2.0.4 4. Peak Working Reverse Voltage VRWM

2.0.5 5. Peak Repetitive Reverse Voltage VRRM

2.0.6 6. Peak Non-repetitive or Surge Reverse Voltage VRSM

2.0.7 7. ON-state Voltage VT

2.0.8 8. Gate Triggering Voltage VGT

2.0.9 9. Forward dv/dt Rating

2.0.10 10. Voltage Safety Factor Vf

3 Current Ratings of SCR

o

3.0.1 1. Average ON-state Current Rating ITAV

3.0.2 2. RMS ON-state Current ITRMS

3.0.3 3. Surge Current Rating ITSM

3.0.4 4. I2t Rating

3.0.5 5. di/dt Rating

3.0.6 6. Latching Current IL

3.0.7 7. Holding Current IH

3.0.8 8. Gate Current IG

4 Temperature Rating of SCR

5 Power Ratings of SCR

o

5.0.1 Average Power Dissipation Pav

5.0.2 Gate Power Dissipation PG

6 Turn ON and Turn OFF Time Ratings

SCR RATINGS

1. Introduction
Under all operating conditions, the reliable operation of the SCR can be ensured only if it is
operated such that its ratings are not exceeded. Each thyristor or SCR is manufactured to a
particular current, voltage, power, temperature and switching frequency limits within which
they can operate reliably. These are called ratings, which can be minimum or maximum
values that set limits on the capability of an SCR. Exceeding these limits even for short
durations could considerably leads to malfunction or damage the SCR. Therefore, for the
benefit of users, the manufacturer gives a list of current, voltage, power, temperature ratings,
etc. These ratings are essential for the correct application of SCR in various power electronic
circuits. In practice SCRs with ratings higher than the required working ratings are selected to
allow safety margin.
These ratings can be continuous, non-repetitive or surge and repetitive ratings. Depends on
the unilateral or bilateral devices, continuous ratings are denoted in terms of RMS or average

values. Surge and repetitive ratings are corresponding to peak values of the SCR. So let us
discuss various ratings of SCR in brief. Different voltage and current ratings are assigned
with one or more subscripts for easy identification. The first subscript indicates the state of
the SCR and includes

F- Forward bias

R- Reverse bias

T- ON state

D- Forward blocking state with gate open

The second subscript indicates the operating values and those are

T- Trigger

S- Surge or Non-repetitive value

R- Repetitive value

W- Working value

1. Voltage Ratings of SCR

The voltage capability of the SCR should not be exceeded during the operation even for
short periods. So the SCR is assigned with different voltage ratings, which are the
maximum voltages at which the SCR can function normally without breakdown of
junctions. These are assigned in both blocking states of an SCR and can withstand against
voltage transients. The various voltage ratings of an SCR are given below.

1. Peak Working Forward-blocking Voltage VDWM

It specifies the maximum instantaneous value of forward blocking voltage across the SCR
excluding all surge and repetitive transient voltages. Beyond this value of the voltage the
SCR cannot withstand during its operation. This VDWM is equal to the maximum or
peak value of the supply voltage wave shown in figure.

2. Peak Repetitive Forward-blocking Voltage VDRM

It is the maximum transient voltage that the SCR can block during its the forward
blocking state repeatedly or periodically. This is specified with a specific biasing
resistance between cathode and gate or at a maximum permissible junction temperature
with gate circuit open.
This voltage VDRM is encountered or appeared across the SCR , when the SCR is turned
OFF or commutated or due to diodes in the converter circuit. During the turn OFF
process, an abrupt change in reverse recovery current causes to create a voltage spike ,
which is responsible of VDRM to appear across the SCR.
3. Peak Non-repetitive or Surge Forward-blocking Voltage VDSM
This is the maximum instantaneous value of forward surge voltage across the SCR that is
of non-repetitive. This VDSM is less than the forward break over voltage VBO and this value
is in the range about 130 percent of VDRM.

4. Peak Working Reverse Voltage VRWM

This is the maximum instantaneous value of reverse voltage across the SCR excluding all
surge and repetitive transient voltages. This VRWM is equal to the maximum negative value
of the supply voltage wave shown in figure.
5. Peak Repetitive Reverse Voltage VRRM
It is occurrence of the maximum reverse transient voltage repeatedly or periodically
across the SCR in the reverse direction at permissible maximum junction temperature.
Beyond this rating the SCR may get damaged due to excessive junction temperature. This
voltage is also appeared due to the same reason as of VDRM.
6. Peak Non-repetitive or Surge Reverse Voltage VRSM
It refers to the maximum value of reverse transient voltage across the SCR that is of nonrepetitive. This VRSM is less than the reverse break over voltage VBR and this value is in the
range about 130 percent of VRRM. The surge voltage ratings VDSM and VRSM can be
increased by connecting a diode of equal current rating in series with the SCR.
The above discussed voltage ratings are belonging to the forward and reverse blocking
states with which the SCR is able to withstand with gate open.
7. ON-state Voltage VT
This is the voltage drop between the anode and cathode with specified junction
temperature and ON-state forward current. Generally, this value is in the order of 1 to 1.5
Volts.
8. Gate Triggering Voltage VGT
This is the minimum voltage required by the gate to produce the gate trigger current.
9. Forward dv/dt Rating
This is the maximum rate of rise of anode voltage that will not trigger the SCR without
any gate pulse or signal. If this value is more than the specified value, the SCR may be
switched ON. The SCR in forward blocking mode is analogous to the capacitor with a
dielectric. So , the charging current flows through it when the applied voltage is
increased. If the rate of rise of voltage is more, sufficient charges will flow through the
junctions J2 of the SCR and hence the SCR will be turned ON without any gate signal.
This type of triggering is called as false triggering and in practice it is not employed.
Also, this rating depends on the junction temperature. If the junction temperature is high,
the dv/dt rating of the SCR is lower and vice-versa. With the use of snubber networks
across the SCRs, it is possible to limit the maximum dv/dt applied to the SCR.
10. Voltage Safety Factor Vf
Generally, the operating voltage of the SCR is kept below the VRSM to avoid the damage to
the SCR due to uncertain conditions. Therefore, the voltage safety factor relates the
operating voltage and VRSM and is given as
Vf = VRSM / (RMS value of the input voltage * 2)

2. Current Ratings of SCR

Basically an SCR is a unilateral device and hence average current rating is assigned to it
(while RMS current rating is assigned to bilateral devices). An SCR has low thermal
capacity and short time constant. This means the junction temperature exceeds its rated
value even for short over current. This may lead to damage the SCR. Therefore, current
ratings must be properly selected for long life of SCR , as the junction temperature
depends on the current handled by it. Let us look at various current ratings of an SCR.
1. Average ON-state Current Rating ITAV
This is the maximum repetitive average value of forward current that can flow through
the SCR such that the maximum temperature and RMS current limits are not exceeded.
The forward voltage drop across the SCR is very low when it is in conduction mode. So
the power loss in the thyristor is entirely depends on the forward current I TAV. In case of
phase controlled SCRs, average forward current depends on the firing angle. For the
given average forward current, the RMS value of the current is increased with decrease in
conduction angle. This leads to increase the voltage drop across the SCR which in turn
increases the average power dissipation. Hence the junction temperature rises beyond the
safe limit. In order to limit the maximum junction temperature, the permissible average
forward current has to be lowered with decrease in conduction angle. The manufacturers
usually provide the data sheet that shows the forward average current variation with
respect to the case temperature. As an example the current waveform formed from the
positive half cycle for different conduction angles is shown in below.

2. RMS ON-state Current ITRMS

This is the maximum repetitive RMS current specified at a maximum junction
temperature that can flow through the SCR. For a direct current, both RMS and average
currents are same. However, this rating is important for SCRs subject to low duty
waveforms with peak currents. And also this rating is required to prevent excessive
heating in leads, metallic joints and interfaces of SCR.
3. Surge Current Rating ITSM
It specifies the maximum non-repetitive or surge current that the SCR can withstand for a
limited number of times during its life span. The manufacturers specify the surge rating to
accommodate the abnormal conditions of SCR due to short circuits and faults. If the peak
amplitude and the number of cycles of the surge current are exceeded, the SCR may get
damaged.

4. I2t Rating
This rating is used to determine the thermal energy absorption of the device. This rating is
required in the choice of a fuse or other protective equipments employed for the SCR.
This is the measure of the thermal energy that the SCR can absorb for a short period of
time before clearing the fault by the fuse. It is the time integral of the square of the
maximum instantaneous current. For a reliable protection of SCR by the fuse or other
protective equipment, the I2t rating of the fuse (or any other protective equipment) must
be less than the I2t rating of the SCR.
5. di/dt Rating
It is the maximum allowable rate of rise of anode to cathode current without any damage
or harm to an SCR. If the rate of rise of anode current is very rapid compared to the
spreading velocity of the charge carriers, local hot spots are created due to concentration
of carriers (on account of high current density) in the restricted area of the junctions. This
raises the junction temperature above the safe limit and hence the SCR may be damaged.
Therefore, for all SCRs the maximum allowable di/dt rating specified in order to protect
the SCR. It is specified in amperes/microseconds and typically it lies in the range 50 to
800 ampere/microseconds.
6. Latching Current IL
It is the minimum ON state current required to maintain the SCR in ON state after gate
drive has been removed. After turning ON of the SCR, the anode current must be allowed
to build up such that the latching current is attained before the gate pulse is removed.
Otherwise the SCR will be turned OFF if the gate signal is removed.
7. Holding Current IH
This is the minimum value of the anode current below which SCR stops conducting and
turns OFF. The holding current is associated with turn OFF process and usually it is a
very small value in the range of mill amperes.
8. Gate Current IG
As the gate current is more, earlier will be the turn ON of the SCR and vice-versa.
However, safety limits must be provided for gate by specifying maximum and minimum
gate currents. For controlling the SCR, gate current is applied to the gate terminal. This
gate current is divided into two types; minimum gate current I Gmin and maximum gate
current IGmax. The minimum gate current IGmin is the current required by the gate terminal
to turn ON the SCR where as I Gmax is the maximum current that can be applied safely to
the gate. Between these two limits the conduction angle of the SCR is controlled.

3. Temperature Rating of SCR

The forward and reverse blocking capability of the SCR is determined by junction
temperature Tj. If the maximum junction temperature is exceeded, the SCR will be driven
to conduction state even without any gate signal. This upper limit of Tj is imposed by
considering the temperature dependence on break over voltage, thermal stability and turn
OFF time. And also an upper storage temperature limit Ts is also required to limit thermal
stresses on silicon crystal, lead attachments and encapsulating epoxy. Excess of these two
temperature limits may cause unreliable operation of an SCR. In some cases, upper
storage temperature limit is higher than the operating temperature limit of an SCR.

4. Power Ratings of SCR

The power dissipation in the SCR produces a temperature rise in the junction regions. The
dissipation of power in the SCR includes forward power dissipation; turn ON and OFF
losses and gate power dissipation.
Average Power Dissipation Pav
It is the multiplication of the average anode current and forward voltage drop across the
SCR. This is the major source of junction heating in an SCR for normal duty cycle
operations. The peak power from a given source must not exceed the average power
dissipation rating to maintain the safety of the device. This rating is specified for different
conduction angles as a function of average forward current as shown in figure.

Gate Power Dissipation PG

This rating defines both forward or reverse peak power and the average power applied to
the gate. If these ratings are exceeded, considerable damage occurs to the gate. Therefore,
while calculating the voltage and currents applied, the width of gate pulses has to be
considered (because the peak power is the function of time). For pulse type triggering,
gate losses are negligible whereas gate signals with a high duty cycle, the gate losses
becomes
more
significant.
Other power losses include ON state losses, OFF state losses, forward blocking losses and
reverse blocking losses. Turn ON and OFF losses have to be taken into consideration
while selecting the SCR rating since these constitute a significant portion of the total
losses. And also forward and reverse blocking losses are very small compared to the
conduction losses since a small leakage current and negligible voltage drop in blocking
states.

5. Turn ON and Turn OFF Time Ratings

The turn ON time is the time interval between the instant at which the gate signal is
applied and the instant at which the ON-state current reaches 90 percent of its final value.
Shorter will be the turn ON time if the gate drive is increased. This turn ON time is valid
only for resistive load because the rate of rise of anode current is slow in inductive load.
Therefore, the turn ON time does not indicate the time in which the device stays ON if the
gate signal is removed. And if the load is resistive, turn ON time surely, indicates the time
interval in which the SCR stays ON even the gate is removed.

Turn OFF time is the time interval between the instant at which the anode current goes
zero or negative and the instant positive voltage is reapplied to the SCR. For fast
switching SCRs both turn ON and OFF time values are very low.

V-I Characteristics of SCR

In his article we will draw and explain the V-I characteristics of SCR in detail.
It is the curve between anode-cathode voltage (V) and anode current (I) of an SCR at
constant gate current.
Fig.1 shows the V-I characteristics of a typical SCR .

Fig.1
Important Points About The V-I Characteristics of SCR
Forward Characteristics

When anode is positive w.r.t. cathode, the curve between V and I is called the forward
characteristics.
In fig.1, OABC is the forward characteristics of SCR at IG=0.
If the supply voltage is increased from zero, a point reached (point A) when the SCR
starts conducting.
Under this condition,the voltage across SCR suddenly drops as shown by dotted curve AB
and most of supply voltage appears across the load resistance RL .
If proper gate current is made to flow, SCR can close at much smaller supply voltage.
Reverse Characteristics

When anode is negative w.r.t. cathode, the curve between V and I is known as reverse
characteristics.
The reverse voltage does come across SCR when it is operated with a.c. supply.

If the reverse voltage is gradually increased, at first the anode current remains small (i.e.
leakage current) and at some reverse voltage, avalanche breakdown occurs and the SCR
starts conducting heavily in the reverse direction as shown by the curve DE.
This maximum reverse voltage at which SCR starts conducting heavily is known as
reverse breakdown voltage.
SCR in Normal Operation

In order to operate the SCR in normal operation, the following points are kept in view:
1. The supply voltage is generally much less than breakover voltage.
2. The SCR is turned on by passing appropriate amount of gate current ( a
few mA) and not by breakover voltage.
3. When SCR is operated from a.c. supply, the peak reverse voltage which
comes during negative half-cycle should not exceed the reverse
breakdown voltage.
4. When SCR is to be turned OFF from the ON state, anode current should be
reduced to holding current.
5. If gate current is increased above the required value, the SCR will close at
much reduced supply voltage.
Important Terms In The V-I Characteristics of SCR

The following terms are much used in the study of SCR :

1. Breakover voltage
2. Peak reverse voltage
3. Holding current
4. Forward current rating
5. Circuit fusing rating
1. Breakover Voltage

It is the minimum forward voltage, gate being open, at which SCR starts conducting
heavily i.e. turned on.
Thus, if the breakover voltage of an SCR is 200 V, it means that it can block a forward
voltage (i.e. SCR remains open) as long as the supply voltage is less than 200 V. If the
supply voltage is more than this value, then SCR will be turned on.
In practice, the SCR is operated with supply voltage less than breakover voltage and it is
then turned on by means of a small voltage applied to the gate.
Commercially available SCRs have breakover voltages from about 50 V to 500 V.

2. Peak Reverse Voltage (PRV)

It is the maximum reverse voltage (cathode positive w.r.t. anode) that can be applied to
an SCR without conducting in the reverse direction.
PRV is an important consideration while connecting an SCR in an a.c. circuit. During the
negative half of a.c. supply, reverse voltage is applied across SCR. If PRV is exceeded,
there may be avalanche breakdown and the SCR will be damaged if the external ciruit
does not limit the current.
Commercially available SCRS have PRV ratings upto 2.5 kV.
3. Holding Current

It is the maximum anode current, gate being open, at which SCR is turned OFF from ON
condition.
When SCR is in the conducting state, it can not be turned OFF even if gate voltage is
removed.
The only way to turn off or open the SCR is to reduce the supply voltage to almost zero at
which point the internal transistor comes out of saturation and opens the SCR.
The anode current under this condition is very small (a few mA) and is called holding
current.
Thus, if an SCR has a holding current of 5mA, it means that if anode current is made less
than 5 mA, then SCR will be turned off.
4. Forward Current Rating

It is the maximum anode current that an SCR is capable of passing without destruction.
Every SCR has a safe value of forward current which it can conduct. If the value of
current exceeds this value, the SCR may be destroyed due to intensive heating at the
junction.
For example, if an SCR has a forward current rating of 40 A, it means that the SCR can
safely carry only 40 A. Any attempt to exceed this value will result in the destruction of
the SCR.
Commercially available SCRs have forward current ratings from about 30A to 100A.
5. Circuit Fusing (I2t) Rating

It is the product of square forward surge current and the time of duration of the surge i.e.,
Circuit fusing rating =I2t
The circuit fusing rating indicates the maximum forward surge current capability of SCR.
For example, consider an SCR having circuit fusing rating of 90 A2s. If this rating is
exceeded in the SCR circuit , the device will be destroyed by excessive power dissipation.

Silicon Controlled Rectifier (SCR) | Construction &

Working
Silicon Controlled Rectifier (SCR)
In this article we are going to discuss the construction and working of an silicon
controlled rectifier (SCR) in detail.
The silicon controlled rectifier ( SCR ) is a three terminal semiconductor switching device
which can be used as a controlled switch to perform various functions such as
rectification, inversion and regulation of power flow.
An SCR can handle currents upto several thousand amperes and voltages upto more than
1kV.
The SCR has appeared in the market under different names such as thyristor, thyrode
transistor.
Like the diode, SCR is a unidirectional device,i.e. it will only conduct current in one
direction only, but unlike a diode, the SCR can be made to operate as either an opencircuit switch or as a rectifying diode depending upon how its gate is triggered.
In other words, SCR can operate only in the switching mode and cannot be used for
amplification.
Hence, it is extensively used in switching d.c. and a.c., rectifying a.c. to give controlled
output, converting d.c. into a.c. etc.
Constuctional Details of SCR

When a pn junction is added to a junction transistor, the resulting three pn junctions

device is called a silicon controlled rectifier.
Fig.1(i) shows the construction of an SCR.

Fig.1 (i)
It is clear that it is essentially an ordinary rectifier (pn) and a junction transistor (npn)
combined in one unit to form pnpn device.
Three terminals are taken; one from the outer p-type material called anode A, second
from the outer layer of n-type material called cathode K and the third from the base of
transistor section and is called gate G.

In the normal operating conditions of SCR, anode is held at high positive potential w.r.t.
cathode and gate at small positive potential w.r.t. cathode.
Fig.1 (ii) shows the symbol of SCR.

Fig.1 (ii)
Working of SCR

In a silicon controlled rectifier, load is connected in series with anode.

The anode is always kept at positive potential w.r.t. cathode.
The working of SCR can be studied under the following two heads:
1. When gate is open:

Fig.2 shows the SCR circuit with gate open i.e. no voltage applied to the gate.

Fig.2
Under this condition, junction J2 is reverse biased while junction J1 and J3 are forward
biased.
Hence, the situation in the junctions J1 and J3 is just as in a npn transistor with base open.
Consequently, no current flows through the load RL and the SCR is cut off.
However, if the applied voltage is gradually increased, a stage is reached when the reverse
biased junction J2 breaks down.
The SCR now conducts heavily and is said to be in the ON state.
The applied voltage at which SCR conducts heavily without gate voltage is called
Breakover voltage.
2. When gate is positive w.r.t. cathode

The SCR can be made to conduct heavily at smaller applied voltage by applying a small
positive potential to the gate as shown in fig.3.
Home
SCR
Silicon Controlled Rectifier (SCR) | Construction & Working

Silicon Controlled Rectifier (SCR) | Construction &

Working
Sasmita July 31, 2015 SCR

Silicon Controlled Rectifier (SCR)

In this article we are going to discuss the construction and working of an silicon
controlled rectifier (SCR) in detail.
The silicon controlled rectifier ( SCR ) is a three terminal semiconductor switching device
which can be used as a controlled switch to perform various functions such as
rectification, inversion and regulation of power flow.
An SCR can handle currents upto several thousand amperes and voltages upto more than
1kV.
The SCR has appeared in the market under different names such as thyristor, thyrode
transistor.
Like the diode, SCR is a unidirectional device,i.e. it will only conduct current in one
direction only, but unlike a diode, the SCR can be made to operate as either an opencircuit switch or as a rectifying diode depending upon how its gate is triggered.
In other words, SCR can operate only in the switching mode and cannot be used for
amplification.

Hence, it is extensively used in switching d.c. and a.c., rectifying a.c. to give controlled
output, converting d.c. into a.c. etc.
Constuctional Details of SCR

When a pn junction is added to a junction transistor, the resulting three pn junctions

device is called a silicon controlled rectifier.
Fig.1(i) shows the construction of an SCR.

Fig.1 (i)
It is clear that it is essentially an ordinary rectifier (pn) and a junction transistor (npn)
combined in one unit to form pnpn device.
Three terminals are taken; one from the outer p-type material called anode A, second
from the outer layer of n-type material called cathode K and the third from the base of
transistor section and is called gate G.
In the normal operating conditions of SCR, anode is held at high positive potential w.r.t.
cathode and gate at small positive potential w.r.t. cathode.
Fig.1 (ii) shows the symbol of SCR.

Fig.1 (ii)
Working of SCR

In a silicon controlled rectifier, load is connected in series with anode.

The anode is always kept at positive potential w.r.t. cathode.
The working of SCR can be studied under the following two heads:
1. When gate is open:

Fig.2 shows the SCR circuit with gate open i.e. no voltage applied to the gate.

Fig.2
Under this condition, junction J2 is reverse biased while junction J1 and J3 are forward
biased.
Hence, the situation in the junctions J1 and J3 is just as in a npn transistor with base open.
Consequently, no current flows through the load RL and the SCR is cut off.
However, if the applied voltage is gradually increased, a stage is reached when the reverse
biased junction J2 breaks down.
The SCR now conducts heavily and is said to be in the ON state.
The applied voltage at which SCR conducts heavily without gate voltage is called
Breakover voltage.
2. When gate is positive w.r.t. cathode

The SCR can be made to conduct heavily at smaller applied voltage by applying a small
positive potential to the gate as shown in fig.3.

Fig.3
Now junction J3 is forward biased and junction J2 is reverse biased.
The electrons from n-type material start moving across junction J 3 towards left whereas
holes from p-type towards the right.
Consequently, the electrons from junction J3 are attracted across the junction J2 and gate
current starts flowing .
As soon as the gate current flows, anode current increases.
The increased current in turn makes more electrons available at junction J2.
This process continues and in an extremely small time, junction J 2 breaks down and the
SCR starts conducting heavily.
Once SCR starts conducting, the gate loses all control. Even if gate voltage is removed,
the anode current does not decrease at all.
The only way to stop conduction i.e. to bring the SCR in off condition, is to reduce the
applied voltage to zero.

Conclusion

The following conclusions are drawn from the working of SCR:

1. An SCR has two states i.e. either it does not conduct or it conducts heavily.
There is no state inbetween. Therefore, SCR behaves like a switch.
2. There are two ways to turn on the SCR. The first method is to keep the
gate open and make the supply voltage equal to the breakover voltage.
The second method is to operate SCR with supply voltage less than
breakover voltage and then turn it on by means of a small voltage applied
to the gate.
3. Applying small positive voltage to the gate is the normal way to close an
SCR because the breakover voltage is usually much greater than supply
voltage.
4. To open the SCR e. to make it non-conducting, reduce the supply voltage
to zero.
Equivalent Circuit of SCR

The SCR shown in fig.4 (i) can be visualized as separated into two transistors as shown in
fig.4 (ii).

(i)

(ii)
(iii)

Fig.4
Thus, the equivalent circuit of SCR is composed of pnp transistor and npn transistor
connected as shown in fig 4.(iii).
It is clear that collector of each transistor is coupled to the base of of the other, thereby
making a positive feedback loop.
The working of SCR can be easily explained from its equivalent circuit.
Fig.5 shows the equivalent circuit of SCR with supply voltage V and load resistance RL.

Fig.5
Assume the supply voltage V is less than breakover voltage as is usually the case.
With gate open (i.e. switch S open), there is no base current in transistor TR 2. Therefore,
no current flows in the collector of TR2 and hence that of TR1.
Under such conditions, the SCR is open.
However, if the switch S is closed, a small gate current will flow through the base of TR 2
which means its collector current will increase.
The collector current of TR2 is the base current of TR1. Therefore, collector current of TR1
increases.
But collector current of TR1 is the base current of TR2. This action is accumulative since
an increase of current in one transistor causes an increase of current in the other transistor.
As a result of this action, both transistors are driven into saturation, and hence heavy
current flows through the load RL.
Under such conditions, the SCR closes.

SCR as a switch
In this article we will explain the action of an SCR as a switch in detail.

The SCR has only two states, namely; ON state and OFF state and no state inbetween.
When appropriate gate current is passed, the SCR starts conducting heavily and remains
in this position indefinitelyeven if the gate voltage is removed. This corresponds to the
ON condition.
However, when the anode current is reduced to the holding current, the SCR is turned
OFF.
It is clear that behaviour of SCR is similar to a mechanical switch. As SCR is an
electronic device, therefore, it is more appropriate to call it an electronic switch.
SCR Switching

We have seen that SCR behaves as a switch i.e. it has only two states; ON state and OFF
state. So we will discuss the methods employed to turn on and turn off an SCR.
1.

SCR turn-on methods

In order to turn on the SCR, the gate voltage VG is increased upto a minimum value to
initiate triggering.
This minimum value of gate voltage at which SCR is turned ON is called gate triggering
voltage VGT.
The resulting gate current is called gate triggering current IGT.
Thus to turn on an SCR all that we have to do is to apply positive gate voltage equal
toVGT or pass a gate current equal to IGT.
For most of the SCRs, VGT = 2 to 10 V and IGT = 100 A to 1500 mA.
We will discuss two methods to turn on an SCR.
(i) D.C. gate trigger circuit

Fig..1 shows a typical circuit used for triggering an SCR with a d.c. gate bias.

Fig.1
When the switch is closed, the gate receives sufficient positive voltage (=VGT) to turn the
SCR on.

The resistance R1 connected in the circuit provides noise suppression and improves the
turn-on time.
The turn-on time primarily depends upon the magnitude of the gate current.
The higher the gate-triggered current, the shorter the turn-on time.
(ii) A.C. trigger circuit

An SCR can also be turned on with positive cycle of a.c. gate current. Fig. 2 (ii) shows
such a circuit. During the positive half-cycle of the gate current, at some point =, the
device is turned on as shown in fig..2 (i).

Fig.2(i)
Fig.2(ii)
2.

SCR turn-off methods

The SCR turn-off poses more problem than SCR turn-on.

It is because once the device is ON, the gate loses all control. There are many methods of
SCR turn-off but only two will be discussed.

(i) Anode current interruption

When the anode current is reduced below a minimum value called holding current, the
SCR turns off. The simple way to turn off the SCR is to open the line switch S as shown
in fig.3.

Fig.3
(ii) Forced commutation

The method of discharging a capacitor in parallel with an SCR to turn off the SCR is
called forced commutation.
Fig.4 shows the forced commutation of SCR where capacitor C performs the
commutation.

Fig.4
Assuming the SCRs are switches SCR1 ON and SCR2 OFF, current flows through the
load and C as shown in fig.4.
When SCR2 is triggered ON, C is effectively paralleled across SCR1.

The charge on C is then opposite to SCR1s forward voltage, SCR1 is thus turned OFF
and the current is transferred to R-SCR2 path.

MOSFET
In case of JFET, the gate must be reverse biased for proper operation of the device i.e. it
can only have negative gate operation for n-channel and positive gate operation for pchannel. That means we can only decrease the width of the channel from its zero-bias
size. This type of operation is known as depletion-mode operation. Therefore, a JFET can
only be operated in the depletion mode.
However, there is a field effect transistor that can be operated to enhance the width of the
channel i.e. it can have enhancement-mode operation. Such a FET is called MOSFET.
Types of MOSFETs

There are two basic types of MOSFETs such as:

1. Depletion-type MOSFET or D-MOSFET: The D-MOSFET can be operated in
both depletion mode and the enhancement mode. For this reason it is also
called depletion/enhancement MOSFET.
2. Enhancement-type MOSFET or E-MOSFET: The E-MOSFET can be operated
only in enhancement mode.
D-MOSFET

Fig.1 shows the constructional detail of n-channel D-MOSFET.

Fig.1 (n-Channel D-MOSFET)

The n-channel D-MOSFET is a piece of n-type material with a p-type region called
substrate on the right and an insulated gate on the left as shown in fig.1.
The free electrons flowing from source to drain must pass through the narrow channel
between the gate and the p-type region (i.e. substrate).

The gate construction of D-MOSFET is explained as below:

A thin layer of metal oxide, usually silicon dioxide (SiO2) is deposited over a small
portion of the channel. A metallic gate is deposited over the oxide layer.
As SiO2 is an insulator, therefore, gate is insulated from the channel.
The substrate is connected to the source internally so that a MOSFET has three terminals
such as Source (S), Gate (G) and Drain(D).
Since the gate is insulated from the channel, we can apply either negative or positive
voltage to the gate. Therefore, D-MOSFET can be operated in both depletion-mode and
enhancement-mode.
Symbols for D-MOSFET

There are two types of D-MOSFETs such as :

1. n-channel D-MOSFET
2. p-channel D-MOSFET
n-channel D-MOSFET

Fig.2 (i)shows the various parts of n-channel D-MOSFET.

Fig.2 (i)
The p-type substrate constricts the channel between the source and drain so that only a
small passage remains at the left side.
Electrons flowing from source (when drain is positive w.r.t. source) must pass through
this narrow channel.
The symbol for n-channel D-MOSFET is shown in fig.2 (ii).

Fig.2(ii)
The gate appears like a capacitor plate. Just to the right of the gate is a thick vertical line
representing the channel.
The drain lead comes out of the top of the channel and the source lead connects to the
bottom.
The arrow is on the substrate and points to the n-material, therefore we have nchannel DMOSFET.
The substrate is connected to the source as shown in fig.2 (iii). This gives rise to a three
terminal device.

Fig.2 (iii)
p-channel D-MOSFET

Fig.3 (i) shows the various parts of p-channel D-MOSFET.

Fig.3 (i)
The n-type substrate constricts the channel between the source and drain so that only a
small passage remains at the left side. The conduction takes place by the flow of holes
from source to drain through this narrow channel.
The symbol for p-channel D-MOSFET is shown in fig.3 (ii).

Fig.3(ii)
The source is connected to substrate internally as shown in fig.3 (iii). This results in a
three-terminal device.

Fig.3(iii)
Circuit Operation of D-MOSFET

Fig.4 (i) shows the circuit of n-channel D-MOSFET.

Fig.4 (i)
The gate forms a small capacitor. One plate of this capacitor is the gate and the other plate
is the channel with metal oxide layer as the dielectric.
When gate voltage is changed, the electric field of the capacitor changes which in turn
changes the resistance of the n-channel.
Since the gate is insulated from the channel, we can apply either negative or positive
voltage to the gate.
The negative gate operation is called depletion mode and positive gate operation is called
enhancement mode.
1. Depletion mode:

Fig.5 (i) shows depletion mode operation of n-channel D-MOSFET.

Since gate is negative, it means electrons are on the gate as shown in fig.5 (ii).
These electrons repel the free electrons in the n-channel, leaving a layer of positive ions
in a part of the channel as shown in fig.5 (ii).In other words, the n-channel is depleted of
some of its free electrons.
Therefore, lesser number of free electrons are available for current conduction through
the n-channel. This is same as increasing the channel resistance.
The greater the negative voltage on the gate, the lesser is the current from source to drain.
Thus by changing the negative voltage on the gate, we can vary the resistance of the nchannel and hence the current from source to drain.
As the action with negative gate depends upon depleting the channel of free electrons, the
negative-gate operation is called depletion mode.
2. Enhancement mode:

Fig.6 (i) shows enhancement mode operation of n-channel D-MOSFET.

Fig.6 (i)

Fig.6 (ii)

Again the gate acts like a capacitor. Since the gate is positive, it induces negative charges
in the n-channel as shown in fig.6 (ii).
These negative charges are the free electrons drawn into the channel.
Because these free electrons are added to those already in the channel, the total number of
free electrons in the channel is increased.
Thus a positive gate voltage enhances or increases the conductivity of the channel.
The greater the positive voltage on the gate, greater the conduction from source to drain.
Thus by changing the positive voltage on the gate, we can change the conductivity of the
channel.
Because the action with a positive gate depends upon enhancing the conductivity of the
channel, the positive gate operation is called enhancement mode.
The following points may be noted about D-MOSFET operation:
1. In a D-MOSFET, the source to drain current is controlled by the electric
field of capacitor formed at the gate.
2. The gate of a D-MOSFET acts like a capacitor. For this reason it is possible
to operate D-MOSFET with positive or negative gate voltage.
3. As the gate of D-MOSFET forms a capacitor, therefore, negligible gate
current flows whether positive or negative voltage is applied to the gate.
For this reason, the input impedance of D-MOSFET is very high ranging
from 10,000 M to 10,000,00 M.
4. The extremely small dimensions of oxide layer under the gate terminal
results is a very low capacitance and the D-MOSFET has, therefore, a very
low input capacitance. This characteristics makes the D-MOSFET useful in
high frequency applications.
E-MOSFET

Fig.7 shows the constructional details of n-channel E-MOSFET.

Fig.7
Its gate construction is similar to that of D-MOSFET.
The E-MOSFET has no channel between source and drain. The substrate extends
completely to the SiO2 layer so that no channel exists.
The E-MOSFET requires a proper gate voltage to form a channel , called induced channel
between the source and the drain.
It operates only in the enhancement mode and has no depletion mode.
Only by applying VGS of proper magnitude and polarity, the device starts conducting.
The minimum value of VGS of proper polarity that turns on the E-MOSFET is called
threshold voltage [VGS(th)].
The n-channel device requires positive VGS (VGS(th)) and the p-channel device requires
negative VGS(VGS(th)).
Symbols for E-MOSFET

Fig.8 (i) shows the schematic symbols for n-channel E-MOSFET and Fig.8 (ii) shows the
schematic symbol for p-channel E-MOSFET.

Fig.8 (i)

Fig.8 (ii)

Circuit Operation of E-MOSFET

Fig.9 (i) shows the circuit of n-channel E-MOSFE. The circuit action is as under:

Fig.9 (i)
(i) When VGS= 0V, as shown in fig.9 (i), there is no channel connecting source and drain.
The p-substrate has only a few thermally produced free electrons(minority carriers) so
that drain current is almost zero. For this reason, E-MOSFET is normally OFF when
VGS = 0V.
(ii) When VGS is positive, i.e gate is made positive as shown in fig.9(ii), it attracts free
electrons into the p region. The free electrons combine with the holes next to the SiO2
layer.

Fig.9 (ii)
If VGS is positive enough, all the holes touching the SiO2 layer are filled and free electrons
begin to flow from the source to drain.
The effect is same as creating a thin layer of n-type material i.e. inducing a thin n-layer
adjacent to the SiO2 layer.
Thus the E-MOSFET is turned ON and drain current ID starts flowing from the source to
the drain.
The minimum value of VGS that turns the E-MOSFET ON is called threshold
voltage[VGS(th)].
(iii) When VGS is less than VGS(th), there is no induced channel and the drain current IDis
zero.
When VGS is equal to VGS(th), the E-MOSFET is turned ON and the induced channel
conducts drain current from the source to the drain.
Beyond VGS(th), if the value of VGS is increased,the newly formed channel becomes wider,
causing to ID to increase.
If the value of VGS decreases not less than VGS(th), the channel becomes narrower and
ID will decrease.

Junction Field Effect Transistor (JEFT)

A field effect transistor is a voltage controlled device i.e. the output characteristics of the
device are controlled by input voltage. There are two basic types of field effect
transistors:
1. Junction field effect transistor (JFET)
2. Metal oxide semiconductor field effect transistor (MOSFET)
Junction Field Effect Transistor (JFET)

A JFET is a three terminal semiconductor device in which current conduction is by one

type of carrier i.e. electrons or holes.
The current conduction is controlled by means of an electric field between the gate and
the conducting channel of the device.
The JFET has high input impedance and low noise level.
Construction Details:
A JFET consists of a p-type or n-type silicon bar containing two pn junctions at the sides
as shown in fig.1.

Fig.1(i)

Fig.1 (ii)

The bar forms the conducting channel for the charge carriers.

If the bar is of p-type, it is called p-channel JFET as shown in fig.1(i) and if the bar is of
n-type, it is called n-channel JFET as shown in fig.1(ii).
The two pn junctions forming diodes are connected internally and a common terminal
called gate is taken out.
Other terminals are source and drain taken out from the bar as shown in fig.1.
Thus a JFET has three terminals such as , gate (G), source (S) and drain (D).
JFET Polarities

Fig.2 (i) shows the n-channel JFET polarities and fig.2 (ii) shows the p-channel JFET
polarities.

Fig.2 (i)

Fig.2 (ii)
In each case, the voltage between the gate and source is such that the gate is reverse
biased.

The source and the drain terminals are interchangeable.

The following points may be noted:
1. The input circuit ( i.e. gate to source) of a JFET is reverse biased. This
means that the device has high input impedance.
2. The drain is so biased w.r.t. source that drain current I D flows from the
source to drain.
3. In all JFETs, source current IS is equal to the drain current i.e IS = ID.
Principle and Working of JFET
Principle of JEFT

Fig.3 shows the circuit of n-channel JFET with normal polarities.

The two pn junctions at the sides form two depletion layers.
The current conduction by charge carriers (i.e. electrons) is through the channel between
the two depletion layers and out of the drain.
The width and hence resistance of this channel can be controlled by changing the input
voltage VGS.
The greater the reverse voltage VGS, the wider will be the depletion layer and narrower
will be the conducting channel.
The narrower channel means greater resistance and hence source to drain current
decreases.
Reverse will happen when VGS decreases.
Thus JFET operates on the principle that width and hence resistance of the conducting
channel can be varied by changing the reverse voltage VGS.
In other word, the magnitude of drain current ID can be changed by altering VGS.
Working of JEFT

The working of JFET can be explained as follows:

Case-i:
When a voltage VDS is applied between drain and source terminals and voltage on the gate
is zero as shown in fig.3(i), the two pn junctions at the sides of the bar establish depletion
layers.

Fig.3 (i)
The electrons will flow from source to drain through a channel between the depletion
layers.
The size of the depletion layers determines the width of the channel and hence current
conduction through the bar.
Case-ii:
When a reverse voltage VGS is applied between gate and source terminals, as shown in
fig.3(ii), the width of depletion layer is increased.

Fig.3 (ii)
This reduces the width of conducting channel, thereby increasing the resistance of n-type
bar.
Consequently, the current from source to drain is decreased.
On the other hand, when the reverse bias on the gate is decreased, the width of the
depletion layer also decreases.

This increases the width of the conducting channel and hence source to drain current.
A p-channel JFET operates in the same manner as an n-channel JFET except that channel
current carriers will be the holes instead of electrons and polarities of VGS and
VDS are reversed.
Schematic Symbol of JFET

Fig.4 shows the schematic symbol of JFET.

Fig.4
Difference Between JFET and BJT

The JFET differs from an ordinary BJT in the following ways:

1. In a JFET, there is only one type of carrier,i.e. holes in p-type channel and
electrons in n-type channel. For this reason it is also called unipolar
transistor.However, in an ordinary BJT, both electrons and holes play role
in conduction. Therefore, it is called as bipolar transistor.
2. As the input circuit of a JFET is reverse biased, therefore, it has a high
input impedance. However, the input circuit of a BJT is forward biased and
hence has low input impedance.
3. The primary functional difference between the JFET and BJT is that no
current enters the gate of JFET. However, in typical BJT base current might
be a few A.
4. A BJT uses the current into its base to control a large current between
collector and emitter. Whereas a JFET uses voltage on the gate terminal to
control the current between drain and source.
5. In JFET, there is no junction. Therefore, noise level in JFET is very small.
Advantages of JFET

A JFET is a voltage controlled, constant current device in which variation in input voltage
control the output current. Some of the advantages of JFET are:
1. It has a very high input impedance. This permits high degree of isolation
between the input and output circuits.
2. The operation of a JFET depends upon the bulk material current carriers
that do not cross junctions. Therefore, the inherent noise of tubes and
those of transistors are not present in a JFET.

3. A JFET has a negative temperature co-efficient of resistance. This avoids

the risk of thermal runaway.
4. A JFET has a very high power gain. This eliminates the necessity of using
driver stages.
5. A JFET has a smaller size, longer life and high efficiency

utput Characteristics of JFET

The curve between drain current, ID and drain-source voltage, VDS of a JFET at constant
gate-source voltage, VGS is known as output characteristics of JFET.
Drain Characteristic With Shorted-Gate

Fig.1 (i) shows the circuit diagram for determining the drain characteristic with shortedgate for an n-channel JFET. Fig.1(ii) shows the drain characteristic with shorted-gate.

Fig.1(i)

Fig.1 (ii)

when drain-source voltage VDS is zero, there is no attracting potential at the drain, so no
current flows inspite of the fact that the channel is fully open. So, drain current ID = 0.
For small applied voltage VDS, the n-type bar acts as a simple semiconductor resistor, and
the drain current increases linearly with the increase in VDS, upto the knee point.
This region, to the left of the knee point of the curve is called the channel ohmic region,
as in this region the JFET behaves like an ordinary resistor.
With the increase in drain current ID, the ohmic voltage drop between the source and
channel region reverse-biases the gate junction.
The reverse-biasing of the gate junction is not uniform throughout. The reverse bias is
more at the drain end than at the source end of the channel.
So with the increase in VDS, the conducting portion of the channel begins to constrict
more at the drain end. Eventually a voltage VDS is reached at which the channel is pinched
off.
The drain current ID no longer increases with the increase in VDS. It approaches a constant
saturation value.
The value of voltage VDS at which the channel is pinched off i.e. all the free charges from
the channel get removed, and the drain current ID attains a constant value, is called
the pinch-off voltage Vp.
From point A (knee point) to the point B (pinch-off point) the drain current I D increases
with the increase In voltage VDS following a reverse square law.
The region of the characteristic in which drain current I D remains fairly constant is
called the pinch-off region. It is also sometimes called the saturation region or amplifier
region.
In this region the JFET operates as a constant current device since drain current (or output
current) remains almost constant. It is the normal operating region of the JFET where it is
used as an amplifier.
The drain current in the pinch-off region with VGS = 0 is referred to the drain-source
saturation current, IDSS).
Drain current in the pinch-of region is given by Shockleys equation:

Where ID = Drain current at given VGS

IDSS = Shorted gate drain current

VGS = gate-source Voltage

VGS(off) = gate-source cut off voltage
If drain-source voltage, VDS is continuously increased, a stage comes when the gatechannel junction breaks down. At this point current increases very rapidly. and the JFET
may be destroyed. This happens because the charge carriers making up the saturation
current at the gate channel junction accelerate to a high velocity and produce
an avalanche effect.
Drain Characteristics With External Bias

The circuit diagram for determining the drain characteristics with different values of
external bias is shown in Fig.2(i). and a family of drain characteristics for different values
of gate-source voltage VGS is shown in Fig.2(ii).

Fig.2 (i)

Fig.2 (ii)
It is observed that as the negative gate bias voltage VGS is increased;
(1) The maximum saturation drain current becomes smaller because the conducting
channel now becomes narrower.
(2) Pinch-off voltage is reached at a lower value of drain current ID than when VGS = 0.

When an external bias of, say 1 V is applied between the gate and the source, the gatechannel junctions are reverse-biased even when drain current, ID is zero. Hence
the depletion regions are already penetrating the channel to a certain extent when drainsource voltage, VDS is zero.
Due to this reason, a smaller voltage drop along the channel (i.e. smaller than that for
VGS = 0) will increase the depletion regions to the point where they pinch-off the current.
Consequently, the pinch-off voltage VP is reached at a lower drain current, ID.
(3) Value of drain-source voltage VDS for the avalanche breakdown of the gate junction is
reduced.
It is simply due to the fact that gate-source voltage, VGS keeps adding to the reverse bias at
the junction produced by current flow.
Transfer Characteristic of JFET

The transfer characteristic for a JFET can be determined experimentally, keeping drainsource voltage, VDS constant and determining drain current, ID for various values of gatesource voltage, VGS.
The circuit diagram is shown in fig.3 (i).

Fig.3 (i)
The curve is plotted between gate-source voltage, VGS and drain current, ID, as shown in
fig. 3 (ii).

Fig.3 (ii)