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Facolt`a di Ingegneria
Corso di Dottorato in Dispositivi Elettronici
Tesi di Dottorato
Gustavo Buiatti
Febbraio 2006
Acknowledgements
I wish to thank my Ph.D. thesis advisor, Professor Giovanni Ghione for his advises and comments throughout the whole research activity, and also for his human
support. I also wish to thank Federica Cappelluti for supporting my work with continuous helpful suggestions and discussions, and in the preparation of this Thesis.
Their scientific methodology have been a reference for me and their contributions
improve the quality of the results.
I wish to kindly thank Professor Jose Roberto Camacho, from Federal University of
Uberlandia, Brazil, for his support, ideas and fruitful discussions during my research
period in that institution and even in Italy. Professor Joao Batista Vieira J
unior is
also acknowledged, especially for the support on his Power Electronics Laboratory
in the Federal University of Uberlandia, Brazil.
A final and very special thought goes to my wife, Natalia, and my daughter, Gabriela.
Thank you for your encouragement, patience and constant support during the time
we have been in Italy. Without you I would never finish this work. Ill be always
grateful for your love. To you, I dedicate this thesis.
Table of contents
1 Physics and Basic Equations of Power PiN Diode
1.1 The Ambipolar Diffusion Equation (ADE) . . . . . . . .
1.2 Forward conduction . . . . . . . . . . . . . . . . . . . . .
1.2.1 The stationary forward behavior of the PiN diode
1.2.2 End region recombination effect . . . . . . . . . .
1.2.3 Carrier-carrier scattering . . . . . . . . . . . . . .
1.2.4 Auger recombination . . . . . . . . . . . . . . . .
1.2.5 Lifetime control . . . . . . . . . . . . . . . . . . .
1.3 Forward recovery . . . . . . . . . . . . . . . . . . . . . .
1.4 Reverse recovery . . . . . . . . . . . . . . . . . . . . . .
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TABLE OF CONTENTS
3.5
3.6
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4 Conclusions
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Bibliography
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II
Introduction
Power devices are very important for power electronics systems since the latter are
closely related to these discrete devices performance. Their study, comprehension
and performance improvement is of major importance for the development of efficient
power electronics equipments.
The effort needed for assembling and experimenting a power electronics converter, even taking into account the simplest topology existent, takes to a strong
motivation in the search for tools that in a simple and reliable way can simulate
the operation of the semiconductors involved in the circuit, dependent on the various parameters of the load and control circuit, and that, in such a way, allows the
comparison for different options of control and topology of conversion.
Time to market is an important target for modern, highly competitive industry.
A widely used method to reduce time to market is the use of computer aided design
(CAD) tools which reduce the number of prototypes needed for the implementation
of the final design. The limited use of prototypes results in a reduction of the time
needed to obtain the final product with a consequent saving of design cost.
In the the power electronics field, circuit simulation is the favorite CAD tool. The
simulation of converters, with the inclusion of detailed characteristics of the bipolar
power semiconductors devices, by means of using a personal computer, allows an
accurate understanding of the design and increases the possibility of a working first
prototype close to the final product.
We usually have two different solutions for dealing with this simulation problem.
The first one simulates a very simple circuit where the whole physics of the semiconductor is taken into account, and we focus our attention on the semiconductors
behavior considering this particular simplified situation. In the second option the
whole converter is simulated, but making use of simplified models for the semiconductors involved in the design. Both solutions are usually incompatible in terms of
integration. Therefore, the development of designs in the field of power electronics
can be beneficiated if somehow we can simulate both the macroscopic aspect of the
converter, and the microscopic aspect of the commutations of the semiconductors
involved in the circuit.
Unfortunately, the models available in commercial circuit simulators are not
suited to model the actual behavior of bipolar power semiconductors, which are not
suited either for a study that intends to be physics-based.
1
So, the main goals of this work were to create a mathematical model applicable
for bipolar power semiconductors, that must be physics-based, capable to be implemented in any commercial circuit simulator and to reproduce reliable and accurate
results.
Many power devices have been proposed in the past years but the need of better models is always present since circuit models need to adapt to the demand of
advanced CAD tools and to the increased computation power available.
Another reason for the development of new device models is that they are the
result of the trade-off between contradicting requirements such as low computation
complexity and accuracy. A better trade-off between these requirements is always
desirable and pushes the development of more efficient device models.
In this thesis the results obtained during the study and research period at he
Politecnico di Torino are reported. The attention is focused on the power PiN
diode, a power device as simple as essential in power systems, with emphasis to
the development of compact circuit models of this device, ideally suited for circuit
simulation.
Main characteristic of the model presented in this work are the low computational
power needed and the accurate modeling of static characteristic and of forward and
reverse recovery effects. The model is implemented for simulation and comparison
with experimental data in Pspice simulator. However, the model can be handled by
any other SPICE-based simulator.
The thesis is structured as follows. Chapter 1 is devoted to a general introduction to the physics of power PiN diodes, aimed to highlight the main static and
dynamic effects of the same, and to provide the background underlying the design
and optimization of such devices.
In chapter 2 the main topics on power diode modeling are introduced, and different techniques and models are presented in order to compare the same and clarify
this issue.
Chapter 3 focuses on a novel approach for modeling power PiN diodes. The
complete diode model is described and introduced, followed by its implementation
within the Pspice circuit simulator. Circuit simulations of practical power circuits
are reported, and the model is validated against experimental and simulations using
different diode models.
Finally, in chapter 4 the final conclusions are presented.
Chapter 1
Physics and Basic Equations of
Power PiN Diode
The PiN diode was one of the first semiconductor devices developed for power circuit applications. It is the simplest semiconductor device present in every power
electronics converter, as can be seen by the structure presented in Fig. 1.1. The
PiN diode is basically composed of three regions: the cathode, the epilayer and the
anode. The cathode is a wide highly N doped region; the epilayer is a lightly N
doped region, epitaxially grown over the cathode; the anode is a highly P doped
region placed at the top of the epilayer.
The main difference between signal diodes (low power PN diodes) and power
PiN diodes is this additional sandwiched region, the epilayer, which allows the PiN
diode to block large negative voltages depending on its width and low doping. The
presence of this region also has important effects on the diodes direct characteristic
and dynamic behavior.
Regarding the direct characteristic, the presence of the epilayer (which behaves
as a series resistance) increases on-state voltage drop with respect to signal diodes.
With respect to the dynamic behavior, two important drawbacks are worth pointing out. During forward conduction the epilayer is flooded with charge carriers, holes
and electrons injected from diode end regions (anode and cathode), and the resistance of the epilayer becomes very small, allowing the diode to carry a high current
density with limited voltage drop. If not flooded by the carriers, the epilayer is
highly resistive. So, the resistance of the epilayer depends on the carriers distribution in the same, which in turn depends on the current density through the diode.
This is the so called conductivity modulation, what means that the resistance of
the epilayer is modulated according to its carriers distribution. Thus, when a PiN
diode is switched on with a high di/dt, it takes some time to reach the stationary
flooded state of the epilayer, and the voltage drop at a given current will initially be
higher. This effect results in a voltage overshoot, generally called forward recovery,
increasing dynamic losses. Further, it can be a problem in power circuits since this
3
voltage peak may appear across the switch used as the active element and exceed
its breakdown voltage.
A n o d e
1 9
1 0
1 7
1 0
1 5
1 0
1 3
N
-
C a th o d e
D o p in g [c m
-3
1 0
Figure 1.1.
The second drawback appears when the diode is turned off, because the excess
carriers in the epilayer cannot disappear immediately, but it takes some time for
them to recombine and to be extracted. So, the device is not able to reach the
blocking state if carriers stored in the epilayer have not been extracted. This results
in the presence of a reverse current until the epilayer is free of excess carriers. This
effect is generally called reverse recovery and has unpleasant effects such as increase
of dynamic losses (the current also flows through the switches used in the circuit,
adding to power dissipation and degrading their reliability), electromagnetic interference (EMI), and limitation of maximum working frequency due to the increased
turn-off time.
All the effects mentioned above may be modeled through the basic equations of
the device, obtained by the physics of the same, as follows in the next sections.
1.1
n
kT n
= qn (nE +
)
x
q x
(1.1)
Jp = qp pE qDp
p
kT p
= qp (pE
)
x
q x
(1.2)
J = Jn + Jp
(1.3)
where eq. 1.1 is the expression for the electron current density, eq. 1.2 for the
hole current density, and eq. 1.3 for the total conduction current density. In the
equations above J is the total current density, Jn and Jp are the current densities
of electrons and holes [A/cm2 ], Dn and Dp are the diffusion coefficients of electrons
and holes [cm2 /s], n and p are the mobilities of electrons and holes [cm2 /Vs], n
and p are the electrons and holes densities [cm3 ], E is the electric field [V/cm], q is
the magnitude of electronic charge [C], k is the Boltzmann constant [J/K], and T is
the absolute temperature [K].
The second set of equations is composed by the continuity equations:
1 Jn
n
=
+ (Gn Rn )
t
q x
(1.4)
1 Jp
p
=
+ (Gp Rp )
t
q x
(1.5)
where (Rn Gn ) and (Rp Gp ) are the rate of recombination, also called U. The
statistics of the recombination of electrons and holes in semiconductors via recombination centers, or the rate of recombination U, is given by the Shockley-Read-Hall
equation [1], [3], [4], [5], considering a single level recombination center:
5
np n2i
np0 + pn0 + np
U=
=
p0 (n + n1 ) + n0 (p + p1 )
p0 (n0 + n + n1 ) + n0 (p0 + p + p1 )
(1.6)
EF i ER
ER EC
n1 = NC exp
= ni exp
(1.7)
kT
kT
and
p1 = NV exp
EV ER
kT
= ni exp
EF i ER
kT
(1.8)
q(p n + ND NA )
=
=
dx
s
s
(1.9)
quasi-neutrality condition, since they are much higher than the majority carriers
concentration at thermal equilibrium. Considering a type-N semiconductor under
high injection condition:
n n0 ND and p p0
n2i
ND
n n p p
(1.10)
Taking into account the high injection level condition in the epilayer (eq. 1.10)
and considering that the energy levels of the recombination centers are near the
intrinsic Fermi level EF i , it means that n1 and p1 are of the same order of ni . Even
if the energy levels of the recombination centers are not located that close to the
EF i , their order are much lower than the order of n and p, and eq. 1.6 becomes
[8]:
U=
n2
n
=
n(p0 + n0 )
p0 + n0
(1.11)
where the carrier lifetime is equal for both electrons and holes, and is equal to
the sum of low injection level electron and hole lifetimes. The same is called high
injection level lifetime:
hl = n0 + p0
(1.12)
Always under the assumptions of high injection level and quasi-neutrality in the
epilayer and eliminating the electric field in the current density equations (eq. 1.1
and eq. 1.2):
n
n
Jp + qDp
x =
x
qn n
qp n
Jn qDn
(1.13)
= 2q
Dn Dp
x
(1.14)
With respect to the the continuity equations, eq. 1.4 and eq. 1.5 under the assumptions already mentioned, they respectively become:
1 Jn n
n
=
t
q x
hl
(1.15)
n
1 Jp n
=
t
q x
hl
(1.16)
= 2q
Dn x
Dp x
x2
(1.17)
Finally, eliminating Jn /x and Jp /x respectively from eq. 1.15 and eq. 1.16 and
substituting into eq. 1.17:
n
2 n n
= Da
t
x2
hl
(1.18)
n
Jp |x=xl
Jn |x=xl
(1.21)
=
x x=xl
2qDn
2qDp
Jp |x=xr
n
Jn |x=xr
(1.22)
=
x x=xr
2qDn
2qDp
Da =
where xl is the left border and xr is the right border of the region flooded with free
carriers.
Considering the width of the epilayer equal to W, the borders of the flooded
region are xl = 0 and xr = W if the carriers concentrations are higher than the
doping of the epilayer. During reverse recovery, the carrier concentration on the
borders becomes equal to the doping of the epilayer, and the borders start moving
meaning that xl and xr do not coincide anymore with the physical borders of the
epilayer (diode junctions).
1.2
Forward conduction
In this section PiN diode forward conduction basic equations are presented. Under
steady state conditions, the current flow in the PiN diode can be accounted for by the
8
recombination of electrons and holes in the epilayer, and also by the recombination
of minority carriers injected in the highly doped end regions. It is assumed that the
equations that rule PN junctions are known to the reader.
1.2.1
V
A n o d e
P
+
Figure 1.2.
N
-
C a th o d e
(1.23)
(1.25)
The assumption that end region recombination is negligible means that end regions doping is much higher than epilayer doping, and therefore, the current density
is determined by recombination in the epilayer. So, end regions have unity injection
efficiency, and it may be assumed as a very good approximation that at the borders
of the highly doped regions, P + and N + , the total current conduction is carried out
only by holes and electrons respectively. However, it is useful for analytical purpose
9
n (-d )
A n o d e
-d
n (+ d )
0
C a th o d e
+ d
only, as will be seen in the next subsection for the cases with current densities higher
than 20 A/cm2 [9], where end region recombination cannot be neglected. So, under
the assumptions mentioned above, the following equations are obtained:
Jp |x=xl = Jp |x=d = J
(1.26)
Jn |x=xl = Jn |x=d = 0
(1.27)
Jn |x=xr = Jn |x=+d = J
(1.28)
Jp |x=xr = Jp |x=+d = 0
(1.29)
In order to obtain the boundary conditions needed to solve the ADE, the following equations are obtained substituting eq. 1.26 - 1.29, in eq. 1.21 and eq. 1.22
respectively:
n
J
Jp |x=d
=
(1.30)
=
x x=d
2qDp
2qDp
and
n
Jn |x=+d
J
=
=
x x=+d
2qDn
2qDn
(1.31)
Finally, from eq. 1.25, eq. 1.30 and eq. 1.31, constants C1 and C2 are evaluated
and then substituted in eq. 1.24 leading to the solution, that is the concentration
distribution inside the epilayer in the forward state related to the total current
density through the diode:
x
x
cosh
sinh
Jhl
L
L
a B
a
(1.32)
n(x) =
d
d
2qLa
sinh
cosh
La
La
where
10
B=
(Dn Dp )
(n p )
=
(Dn + Dp )
(n + p )
(1.33)
is a measure for the inequality of the mobilities. If the mobilities are equal, only the
first symmetrical term within the brackets is left in eq. 1.32.
As said before, the total voltage drop VD at the diode is composed of three
components
VD = VP + + VM + VN +
(1.34)
In order to relate current density to voltage drop on the diode, it is needed the
calculation of diode voltage drop components VP + , VN + , and VM as a function of
current density.
Following the mass action law and theory of PN junction, it is possible to relate
on-state voltage drop to carrier concentration in both junctions (junction law):
pn
= exp
pn0
qVP +
kT
p(d)ND
n(d)ND
=
= exp
2
ni
n2i
nn
= exp
nn 0
qVN +
kT
n(+d)
= exp
ND
qVP +
kT
qVN +
kT
(1.35)
(1.36)
n(d)ND
kT
VP + =
ln
(1.37)
q
n2i
kT
n(+d)
VN + =
ln
(1.38)
q
ND
n(+d)n(d)
kT
ln
(1.39)
VP + + VN + =
q
n2i
Calculating n(d) and n(+d) through eq. 1.32 and substituting in eq. 1.39
VP + + VN +
2 2
hl
J
kT
ln
=
n2 (2qLa )2
q
i
tanh
11
d
La
B tanh
La
(1.40)
exp
VD VM
VT
2 2
hl
J
2
ni (2qLa )2
tanh
d
La
B 2 tanh2
La
(1.41)
Rearranging eq. 1.41 the relation between density current and voltage drop on
the diode is given by:
Da
VD
d
exp
(1.42)
J = 2ni q F
d
La
2VT
with
d
La
d
=
tanh
La
d
La
1 B tanh
d
La
12
VM
exp
2VT
(1.43)
In order to evaluate VM , we have to integrate the electric field over the epilayer
Z x=+d
E(x)dx
(1.44)
VM =
x=d
The electric field is found by adding eq. 1.1 and eq. 1.2 to obtain the total current
density, and by resolving for E always under the high level injection condition:
J = qn nE + qDn
n
n
n
+ qp nE qDp
= qnE(n + p ) + qVT (n p ) (1.45)
x
x
x
J
BVT n
(1.46)
qn(n + p )
n x
Finally, considering eq. 1.32 and its derivative, and substituting them into eq. 1.46
and then integrating the same (eq. 1.44), it is found that
E=
VM
d
La
sinh
8b
d
2
2 tanh
s
arctan
= VT
1
(1 + b)2
La
d
2
1 B 2 tanh
La
d
2
2
1 + B tanh
d
La
(1.47)
sinh
+ B ln
d
La
2
2
1 B tanh
La
12
1.2.2
n
Jn |x=0 bJp |x=0
=
(1.48)
x x=0
qDa (b + 1)
n
Jn |x=W bJp |x=W
(1.49)
=
x x=W
qDa (b + 1)
A n o d e
-W
Figure 1.4.
n (0 )
(0 )
n (W )
p
N
(W )
C a th o d e
N
Considering eq. 1.3, eq. 1.48 and eq. 1.49 respectively become:
bJ
Jn |x=0
n
=
+
x x=0 qDa (b + 1)
qDa
J
Jp |x=W
n
=
x x=W
qDa (b + 1)
qDa
13
(1.50)
(1.51)
The current density due to injected carriers in the end regions can be derived
from low level injection theory because minority carrier density is far smaller than
the high doping levels of the end regions.
With respect to the P + N junction, it is assumed that the same is abrupt and
that the P + region is uniformly doped. Considering the low injection level condition
of carriers injected into the anode, and the fact that all the injected electrons have
already recombined in the ohmic contact, since there are no excess electrons in the
ohmic contact, that is there is no voltage drop in the same, it is found through the
continuity equation that in the neutral region [5], [10]:
WP + + x
[nP + (0) nP 0+ ] sinh
L +
nP
nP + (x) nP 0+ =
(1.52)
WP +
sinh
LnP +
where nP + is the density of electrons in the P + region, nP 0+ is the density of electrons
in the P + region at thermal equilibrium, WP + is the width of the P + region, and
LnP + is the minority carrier diffusion length in the P + region. Eq. 1.52 above
represents the expression for the excess electrons injected in the anode.
Considering the fact that the density current of electrons in the anode may be
considered only to the diffusion component, since the electric field is approximately
zero and the electrons concentration is too low in the P + region, meaning that the
electrons drift current is neglected:
nP +
Jn |x=0 = qDnP +
(1.53)
x
where DnP + is the diffusion coefficient of electrons in the anode. Using quasiequilibrium at the P + N junction, the injected carrier concentrations on either
side of the junction are related by:
pP + (0)
n(0)
=
p(0)
nP + (0)
(1.54)
(1.55)
where pP + is the density of holes in the P + region, and pP 0+ is the density of holes in
the P + region at thermal equilibrium. The injected electron concentration is related
to the voltage across the anode junction:
VP +
nP + (0) = nP 0+ exp
(1.56)
VT
Using the two expressions above in eq. 1.54:
14
VP +
VT
n2i
exp
VP +
VT
2
VP +
n(0)
=
exp
VT
ni
Substituting the derivative of eq. 1.52 in eq. 1.53:
VP +
qDnP + nP 0+ exp
qDnP + nP 0+ n(0)2
VT
Jn |x=0 =
WP +
WP +
LnP + tanh
LnP + tanh
n2i
LnP +
LnP +
(1.57)
(1.58)
(1.59)
(1.60)
with
hp =
LnP +
DnP +
WP +
tanh
NA
LnP +
(1.61)
where hp is the emitter recombination coefficient in the P + region [cm4 /s] [10].
Substituting eq. 1.60 in eq. 1.50, the boundary condition for the P + N junction
is now given by
hp n(0)2
n
bJ
+
(1.62)
=
x x=0 qDa (b + 1)
Da
which takes into account the recombination effect of carriers injected into the anode.
With respect to the N N + junction, it is also assumed that the same is abrupt
and that the N + region is uniformly doped. Considering the low injection level
condition of carriers injected into the cathode, and the fact that all the injected holes
have already recombined in the ohmic contact, it is found through the continuity
equation that in the neutral region [5], [10]:
x WN +
[pN + (W ) pN 0+ ] sinh
L +
pN
pN + (x) pN 0+ =
(1.63)
W WN +
sinh
LpN +
where pN + is the density of holes in the N + region, pN 0+ is the density of holes in
the N + region at thermal equilibrium, WN + is the width of the N + region, and LpN +
15
is the minority carrier diffusion length in the N + region. Eq. 1.63 above represents
the expression for the excess holes injected in the cathode.
Considering the fact that the density current of holes in the cathode may be
considered only to the diffusion component, since the electric field is approximately
zero and the holes concentration is too low in the N + region, meaning that the holes
drift current is neglected:
pN +
Jp |x=W = qDpN +
(1.64)
x
where DpN + is the diffusion coefficient of holes in the cathode. Using quasi-equilibrium
at the N N + junction, the injected carrier concentrations on either side of the junction are related by:
pN + (W )
n(W )
=
p(W )
nN + (W )
(1.65)
VN +
2
n(W )p(W ) = ni exp
(1.66)
VT
Using the charge neutrality condition:
2
VN +
n(W )
exp
=
(1.67)
VT
ni
Substituting the derivative of eq. 1.63 in eq. 1.64:
VN +
qDpN + pn0+ exp
qDpN + pN 0+ n(W )2
VT
Jp |x=W =
(1.68)
WN +
WN +
2
LpN + tanh
LpN + tanh
ni
LpN +
LpN +
Finally, considering the mass action law:
Jp |x=W = q hn n(W )2
(1.69)
with
hn =
LpN +
DpN +
WN +
tanh
ND
LpN +
(1.70)
where hn is the emitter recombination coefficient in the N + region [cm4 /s] [10].
Substituting eq. 1.69 in eq. 1.51, the boundary condition for the N N + junction
is now given by
16
n
J
hn n(W )2
=
x x=W
qDa (b + 1)
Da
(1.71)
which takes into account the recombination effect of carriers injected into the cathode.
Band gap narrowing effects are caused by an alteration of the band structure,
that is a variation of the energy band gap of silicon, due to high doping levels [5],
[11]. If band gap narrowing effects are considered, depending on the doping of the
P + and N + regions the intrinsic carrier concentration arises in the same [5], [11]:
Eg
2
2
nie = ni exp
(1.72)
kT
where nie is the intrinsic carrier concentrarion taking into account bandgap narrowing effect, and Eg is the band gap narrowing due to the combined effects of
impurity band formation, band tailing and screening , which is calculated by the
following formula [5]:
s 2
2
3q
q NI
Eg =
(1.73)
16s
s kT
where NI is the doping concentration, in the case of P + region the acceptor concentration NA , and in the case of N + region the donator concentration ND . It is
observed that the energy bandgap reduces with increasing doping concentration,
and intrinsic carrier concentration increases on the other hand. Thus, considering
the bandgap narrowing effects in the highly doped end regions of PiN diodes, it is
found that the emitter recombination coefficients hp and hn are increased by the
factor exp(Eg /kT ), meaning that the efficiency of both emitters is reduced.
Some important conclusions can be made from eq. 1.59 and eq. 1.68, considering
bandgap narrowing effect: PiN diode current conduction is dominated from epilayer
recombination for low current densities, while end region recombination dominates
current flow for high current conditions. In fact, for low current densitis, n(0) and
n(W ) are small, currents 1.59 and 1.68 are negligible, epilayer carrier concentration
increases linearly with current density following equation 1.32, and current increases
exponentially with forward voltage drop. If the ADE is solved numerically with the
boundary conditions taking into account the end region recombination effect, for low
current densities until 20 A/cm2 it is actually found that the carrier concentration
and also the voltage drop in the diode are almost the same for both solutions, with
and without end region recombination, reinforcing the conclusion that the current
density is dominated by recombination in the epilayer. For higher current densities,
currents 1.59 and 1.68 become dominant since they increase with the square of
the carrier concentration and the diode enters in the working region where end
region recombination rules current conduction. The forward voltage drop in this
17
case will increase more rapidly with increasing current density than exp(VD /VT ), as
shown in Fig. 1.5, which was generated with the following physical and geometrical
parameters: W = 50 m, ND = 21014 cm3 , A = 0.04 cm2 , hl = 200 ns, hp = hn =
1.51014 cm4 /s, Dn = 34.84 cm2 /s, Dp = 12.82 cm2 /s, T = 300 K. The difference
between the two curves is due to the fact that in the case in which the end region
recombination is neglected, the voltage drop in the junctions rules the exponential
behavior of the current density (eq. 1.37 - 1.41). In fact, the carriers concentration
increases linearly with the current density and the ohmic voltage drop in the epilayer
does not depend on the current density. It can be explained by the fact that the
resistance in the epilayer is inversely proportional to the carriers concentration,
meaning that:
VM = Repi ID
1
1
ID
ID constant
n
ID
When end region recombination becomes dominant, at higher current densities, the
current increases with the square of carriers concentration. The voltage drop in the
junctions keeps increasing exponentially with the current density (eq. 1.37 - 1.41),
but in this case with lower values, since the carriers concentrations in the junctions
are lower due to the reduced emitters efficiency. It can be observed in Fig. 1.6, which
was generated using the same parameters of Fig. 1.5. However, the voltage drop
in the epilayer is not independent of the conduction current anymore but increases
with the square root of same:
VM = Repi ID
p
1
1
ID ID
ID
n
ID
In this case, the ohmic voltage drop in the epilayer has a significant contribution
to the voltage drop, which for high current densities becomes much greater than the
case with unity emitter efficiency (see Fig. 1.5).
1.2.3
Carrier-carrier scattering
At high current densities, the recombination in the end regions is not the only
phenomenon responsible for the deviation of the forward voltage drop characteristics
from an exponential behavior, as predicted by eq. 1.42. Two additional phenomena
impact the current conduction characteristics, being the carrier-carrier scattering
the first one to be considered here.
Carrier-carrier scattering occurs in the epilayer at high current densities due
to the simultaneous presence of a high concentration of both electrons and holes.
The greater probability of mutual Coulombic scattering causes a reduction in the
mobility and diffusion length for both carriers [12]. The reduction in diffusion length
with increasing current density produces a decrease in the conductivity modulation
in the central portion of the epilayer, which in turn, combined with the reduction
18
1 0
ith E n d R e g io n R e c o m b in a tio n
N o E n d R e g io n R e c o m b in a tio n
1 0
0 .7
Figure 1.5.
0 .7 5
0 .8
0 .8 5
0 .9
F o rw a rd V o lta g e D ro p [V ]
0 .9 5
Effect of end region recombination on the forward conduction characteristics of a PiN diode.
of the mobilities, results in the increase of the epilayer resistivity with consequent
increase of diode voltage drop (see Fig. 1.7, which was generated with the following
physical and geometrical parameters: W = 100 m, ND = 21014 cm3 , A = 0.04
cm2 , hl = 1 s, hp = hn = 51014 cm4 /s, Dn = 34.84 cm2 /s, Dp = 12.82 cm2 /s, T
= 300 K).
1.2.4
Auger recombination
The second phenomenon that also impacts the current conduction characteristics is
the Auger recombination [13].
The Auger recombination process occurs by the transfer of the energy released
by the recombination of an electron-hole pair to a third particle that can be either
an electron or a hole. This process becomes significant in heavily doped P and N
type silicon, such as the end regions of power PiN diodes, and is also an important
effect in determining recombination rates in lightly doped regions operating at high
injection levels during forward conduction, the epilayer of PiN diodes, because of
the high concentration of holes and electrons injected into this region. In the case of
Auger recombination occurring at high injection levels, the Auger lifetime is given
by [5]:
19
ith E n d R e g io n R e c o m b in a tio n
N o E n d R e g io n R e c o m b in a tio n
4 .5
-3
4
3 .5
3
2 .5
2
1 .5
1
0
1 0
1 5
2 0
2 5
D e p th [m m ]
3 0
3 5
4 0
4 5
5 0
auger =
1
CA n2
(1.74)
where n is the excess carrier concentration in the epilayer, and CA is the Auger
recombination coefficient, of the order of 1031 cm6 /s. There are similar expressions
for the end regions, considering the majority carrier concentration.
It can be observed from eq. 1.74 that the Auger recombination lifetime decreases
with the injected carrier concentration in the epilayer, and it begins to affect the
carriers distribution in the same. In addition to the Shockley-Read-Hall recombination described by eq. 1.11, the rate of recombination must include the Auger
recombination process:
n
1
1
n
U=
=
+
n=
+ CA n3
(1.75)
ef f
hl auger
hl
where ef f is the effective carrier lifetime, and 1/ef f = 1/hl + 1/aug . The inclusion
of the Auger recombination term reduces the effective carrier lifetime of holes and
electrons with increasing current density, and so the diffusion length, decreasing the
conductivity modulation in the central portion of the epilayer, that is decreasing the
storage charge in the epilayer, and resulting in the increase of the epilayer resistivity
20
with further increase of diode voltage drop (see Fig. 1.7). Consequently, the ADE
(eq. 1.19) in the steady state condition must be rewritten in the form:
Da
n
2n
=
+ CA n3
2
x
hl
(1.76)
1 0 3
- N o E n d R e g io n
R e c o m b in a tio n
- N o C a rrie r-c a rrie r
S c a tte rin g
-N o A u g e r
R e c o m b in a tio n
- W ith E n
R e c o m b
- W tih C a
S c a tte
-N o A u g e
R e c o m b
1 0 2
- W ith E n d
R e c o m b in
- N o C a rrie r
S c a tte rin
-N o A u g e r
R e c o m b in
1 0 1
0 .7
0 .8
0 .9
R e g io n
a tio n
-c a rrie r
g
- W ith E n d R e g
R e c o m b in a tio
- W tih C a rrie r-c
S c a tte rin g
-W ith A u g e r
R e c o m b in a tio
R e g
in a tio
rrie r-c
rin g
r
in a tio
io n
n
a rrie r
n
io n
n
a rrie r
n
a tio n
1 .1
1 .2
1 .3
1 .4
F o rw a rd V o lta g e D ro p [V ]
1.2.5
Lifetime control
Epilayer lifetime value is one of the most important design parameters for a PiN
diode. Reduction of on state losses or increase of diode speed are achieved through
modifications of carrier lifetime.
21
Commercially available diodes often use lifetime control techniques to reduce carrier lifetime in the whole epilayer. Well known lifetime control techniques are gold
and platinum doping and electron irradiation, which result in lifetime profiles approximately uniform in the considered region. This is due to the fact that the metals
diffuse so rapidly through the silicon that they are normally uniformly distributed
across the epilayer. Likewise, electron bombardment also creates recombination
centers uniformly throughout the device structure. The first mentioned method involves the thermal diffusion of an impurity that exhibits deep levels in the energy
gap of silicon (gold or platinum). The second method is based upon the creation
of lattice damage in the form of vacancies and interstitial atoms by bombardment
of the silicon wafers with high energy particles. Both methods are characterized by
the introduction of recombination centers in silicon, reducing carrier lifetime in the
lightly doped region and providing decrease of turn-off time [11], [14]. A drawback of
these techniques is the increase of on-state voltage drop. Moreover, the introduction
of deep level recombination levels increases leakage current and results in a stronger
influence of the temperature on the diode performance.
Another technique is the local lifetime control, mainly based on proton or helium irradiation [11], [15], [16], which reduces the turn-off time and increases diode
softness with a little worsening of on-state voltage drop. This technique results in
a better trade-off curve than achieved with lifetime killing in the whole epilayer
region. Recent investigations show that the optimal position for the low-lifetime
region is at the beginning of the epilayer on the anode side, while the optimal width
of the low lifetime region depends on the amount of lifetime reduction, while it is
less dependent on the operating current of the device. Diode design using a reduced
lifetime region not placed near the anode junction provides a worse behavior with
respect to lifetime killing in the whole epilayer [17].
During the development of the equations regarding the behavior of PiN diode, it
has been always assumed that the high-injection lifetime in the epilayer is constant
and given by eq. 1.12. This assumption was made in order to simplify the model
and equations. Actually, lifetime depends on the injection-level and also on the
capture cross sections of the recombination centers. Further, when spatially selective
techniques are able to control carrier lifetime locally, the same becomes a function
of the position:
hl = hl (x)
(1.77)
(1.78)
which has no closed form solution. In this case eq. 1.78 must be solved numerically
using appropriate techniques.
22
1.3
Forward recovery
The lightly doped epilayer allows PiN diodes to support large reverse voltages, and
has an important role during commutation between conducting state and blocking
state, and vice-versa. It was shown in section 1.1 that the presence of epilayer
during forward conduction increases on-state voltage drop with respect to signal
diodes, since the epilayer behaves such as a variable series resistance connected
to the diode. This resistance increases with the current density, considering the
phenomena described in the last section, such as end region recombination, and so
the voltage drop on the epilayer. The voltage drop due to the epilayer region is more
or less in the range from 0.1 V to 1 V. Anyway, the presence of the carriers in the
epilayer is the main reason that makes possible to the PiN diodes conducting high
current densities.
F o rw a rd R e c o v e ry
6
5
4
D io d e V o lta g e [V ]
D io d e C u rre n t [1 0 0 A /c m
3
D io d e V o lta g e
2
1
0
T u rn -o n d i/d t
0
1 0 0
2 0 0
Figure 1.8.
T im e [n s ]
3 0 0
4 0 0
5 0 0
For the sake of illustrating what would happen if the epilayer was unmodulated,
the resistance of the epilayer is evaluated without the carriers injected in the same:
Repi =
W
[ cm2 ]
q n ND
(1.79)
where W is the width of the epilayer, and ND is the epilayer doping. In order
to clarify the order of the unmodulated region resistance, let us consider a general
23
diode with an epilayer 50 m wide and with doping ND = 1014 cm3 . One finds that
its resistance is of the order of 101 cm2 , which means that for forward density
currents equal to 100 A/cm2 , the voltage drop in the unmodulated epilayer should
be in the order of 101 V.
This example makes clear that if a PiN diode is forced in the conducting state
with a high di/dt, meaning that the current is increasing in a faster rate than the
rate of carriers being injected into the epilayer, transient voltage drop will be much
greater than steady stage voltage drop. This is due to the fact that during the
first instants, when the epilayer is not modulated, its resistance is very high. This
voltage overshoot due to the fast switch from the blocking state to the conduction
state through the forcing of a direct current, is called forward recovery. The voltage
peak increases with increasing di/dt, and its value depends on how high the current
has risen before conductivity modulation is fully effective.
In Fig. 1.8 an example of PiN diode forward recovery is shown, which the
simulated diode is the same used for generating Fig. 1.5. It can be observed that
diode voltage reaches about 5 V while steady state on-state voltage drop is about
1 V. Fig. 1.9 shows the behavior of excess carriers in the epilayer when the diode
is turned on from zero current. It can be observed that excess carriers are initially
injected into the regions closest to the P + N and N N + junctions. From there,
they diffuse into the center of the epilayer, and its resistance diminishes to its steady
state value.
1 0
1 9
N
+
J
1 0
1 0
1 0
J P |x =
1 5
1 3
J n |x =
x l
J P |x =
x r
t
t1 t2 3
t0
= n o e x c e s s c a rrie rs
B a s e d o p in g p ro file
x = 0
Figure 1.9.
t4
x l
x r
1 7
J n |x =
N
-
x = W
24
1.4
Reverse recovery
2 0
t0
2 0
0
T u rn -o ff d i/d t
0
-2 0
t1
t6
-1 0
t2
-2 0
t3
-4 0
2 0
4 0
6 0
8 0
-6 0
t5
-3 0
-5 0
-4 0
1 0 0
T im e [n s ]
D io d e V o lta g e [V ]
D io d e C u rre n t D e n s ity [ A /c m 2]
1 0
-8 0
-1 0 0
R e v e rs e
R e c o v e ry
d i/d t
t4
1 2 0
1 4 0
1 6 0
-1 2 0
1 8 0
2 0 0
-1 4 0
(a )
1 0
1 9
J
1 0
1 7
N
+
t0
t1
J n |x = x l t 2
1 0
1 5
1 0
1 3
t4
J P |x =
N
-
J n |x =
x l
x r
t3
J P |x =
t5
x r
t6
B a s e d o p in g p ro file
x = 0
x = W
(b )
Figure 1.10. PiN diode reverse recovery: (a) Reverse recovery current waveform,
(b) Dynamics of carrier concentration in the epilayer during reverse recovery
26
S
1
V
L
D U T
L
D U T
Figure 1.11.
profile, after t3 the diode will be unable to support an increase in the current as
determined by the circuit di/dt. However, it must be recognized that the diode
may be able to support an increase in the current if the magnitude of the di/dt is
reduced. At time t3 , the diode starts determining the circuit boundary conditions,
being controlled by the diffusion and recombination processes in the epilayer, and it
is the voltage across the diode, rather than the current, that is determined by the
external circuit [11], [20]. The actual time difference between the voltage becoming
negative and the diode current reaching its peak negative value, that is the duration
of the third phase, depends very much on the circuit conditions as well as on the
diode characteristics. It can also be deduced that the diode current waveform will
become more rounded near its peak negative value, because di/dt through the diode
will first decrease and then change sign, at time t4 , when the charge carrier profile
in the diode is no longer able to support any further increase in the current in the
reverse direction.
During the fourth phase (t4 ,t5 ), after the di/dt has changed its sign, the depletion
regions are advancing from both borders of the epilayer and the resulting reduced
charge profile is just able to support lower currents. The reverse recovery di/dt
during this phase induces an overshoot of the reverse voltage as the energy stored in
the parasitic inductance LDUT , always present in practical circuits, is transferred into
the diode (see Fig. 1.10b). This is undesirable, and parasitic inductances must be
minimized by good circuit designers. This phase lasts until time t5 , when the diode
is blocking the whole applied reverse voltage, and the reverse diode voltage reaches
its peak value. If the turn on of S1 is controlled so that the current rises gradually,
27
initially taking over the L inductor current and then drawing reverse current out of
the diode, as the space charge layer is established in the diode the reverse voltage
settles at the supply voltage with no significant overshoot. We call the attention to
the fact that the reverse diode current adds to the total current carried by S1 and
causes a transient peak, as already mentioned.
The last phase of the recovery starts at time t5 and lasts until the moment in
which the current reaches its saturation value. If there is a residual amount of excess
charge present in the epilayer from this instant time recombination dominates the
excess carrier absorption, resulting in a slow tail in the current waveform (see current
waveform and excess charge during time sample t6 in Fig. 1.10). This last phase
of the recovery is very critical, and some considerations must be done. The first
consideration is with respect to the applied reverse voltage. If the applied reverse
bias voltage is small, the space charge region will extend only slightly inside the
epilayer. As a result, there will still be a lot of excess carriers remaining in the
epilayer. These excess carriers can be removed only through recombination. Hence,
if the applied reverse bias voltage is less than a second one operating in the same
conditions, the recombination dominated regime will be quite prominent causing
a significant tail near the end of the reverse recovery process [20]. This kind of
recovery is the so called soft recovery, and a behavior like this is desirable for power
electronics applications.
The second and more serious consideration regards to the fact that at time
instant t5 , it is possible that the depletion regions can advance through the whole
epilayer and the current that is still through the diode cannot be supported by any
excess charge. This is the classic snappy recovery. Depending on the rate that
excess carriers are extracted from the epilayer, the current goes rapidly to zero
with very high reverse recovery di/dt because a stronger depletion from both sides
happens before the current is ceased, resulting in oscillation. The snappy recovery
is detrimental to the diode, as it increases the chance of its destruction due to the
excessive electric field strength. Furthermore, the large-amplitude high-frequency
oscillations cause excessive amounts of electromagnetic interference (EMI).
When the switching frequency of a power circuit increases, the turn-off di/dt
must be increased. It has been found that this causes an increase in both the peak
reverse recovery current and the ensuing di/dt, which in turn results in less recovery
time. If the reverse recovery di/dt is large, an increase in the breakdown voltage
of all the circuit components becomes essential, since the reverse recovery di/dt
flows through parasitic inductances in the circuit causing the already mentioned
voltage overshoot on the diode. Raising the breakdown voltage capability causes
an increase in the forward voltage drop of power switches, which degrades circuit
efficiency. Consequently, much of the recent work on PiN diodes has been focused
upon improving the reverse recovery characteristics.
However, a trade-off between the switching speed and the forward voltage drop
is essential during PiN design. This trade-off is dependent upon a number of factors
28
such as the epilayer width, the recombination center position in the energy gap, the
distribution of the deep level impurities, and the doping profile. In section 1.2.2 it
was found that end region recombination results in an increase of voltage drop with
respect to eq. 1.42, and it could be assumed that a careful design should reduce
this effect (increasing the emitter efficiency, that is reducing hp and hn ). It would
assure that also under high current conditions, end region recombination is small
with respect to epilayer recombination. This assumption is not correct. Actual
devices tend to increase end region recombination effects, that is, to reduce end
region emitter efficiency (increasing hp and/or hn ), since the increase of end region
recombination results in an improvement of dynamic behavior [11], [18], [19]. This
improvement is due to the fact that the reduced carriers concentration in the epilayer
(see Fig. 1.6) takes to a faster extraction of the carriers during reverse recovery,
considering the same operation conditions, resulting in less reverse current peak
and faster reverse recovery, which is desirable in order to reduce switching power
losses. It can be achieved through techniques like the lifetime control techniques
described in section 1.2.5. From eq. 1.61 and eq. 1.70 it can be observed that in
order to increase hp and hn , that is to reduce the emitters efficiency, there are two
other design techniques: the reduction of end region doping (increase of minority
+
carrier equilibrium concentration p+
N 0 and nP 0 ) [11], [18], [19], and the reduction
of end region thickness (WP + , WN + ). It can be noticed that the reduction of end
region doping is always effective, as the case of the weak anode diode [11], [18], [19],
while the reduction of end region thickness has a relevant effect only if WP + , WN +
are smaller than minority carrier diffusion length (LnP + , LpN + ).
29
Chapter 2
Power PiN Diode Models for
Circuit Simulations
As computer aided simulation (CAD) has become essential for power electronics
circuit development, special compact power PiN diode models must be available in
the circuit simulators used for electronic circuit analysis. In this chapter different
PiN diode models present in literature are introduced and discussed.
The main difficulty in designing models for PiN diodes, and also for other bipolar
power devices, is in the distributed nature of the charge transport in the semiconductor, which is governed by the ambipolar diffusion equation (ADE). Therefore, the
central part of this chapter describes problems and different solutions in treatment
of the ADE.
The different modelling methods are compared as to their compromise between
convenience, accuracy, numerical efficiency and accuracy in implementing physical
effects. Many of the existing PiN diode models are listed, and their main features
are identified and compared.
30
2.1
As the operating frequency of power electronics converters becomes higher, the power
electronics researchers put more attention to the switching losses. An accurate model
of power PiN diodes is very useful for computer aided simulation (CAD), since it is
very helpful for evaluating the loss distributions of power electronics converters and
making design and optimization.
The most fundamental aspects that distinguish among different power diode
models is the model formulation technique and concept employed. The different
models can be classified either as micromodels, or as macromodels. Micromodels
are closely based on the internal device physics and yields good accuracy over a wide
range of operating conditions. Because device physics unavoidably require mathematical equations, micromodels are also known as mathematical models. Macromodels reproduce the external behavior of the device largely by using empirical techniques without considering its geometrical nature and its internal physical processes.
This external behavior is usually modeled by means of simple data-fitting empirical equations, lookup tables, or an electrical subcircuit of common components to
emulate known experimental data [21], [22], [23]. Macromodels are limited in terms
of accuracy and flexibility an they will not be treated here. They are not derived
from the fundamental device equations, and as a consequence they are valid only in
a narrow range of operating conditions, requiring non physical parameters. On the
other hand, micromodels are generally more computationally efficient, more accurate, and more related to the device structure and fabrication process. Micromodels
are classified as numerical models, analytical models, and hybrid models.
Numerical micromodels use the partial differential equation set of the semiconductor physics (eq. 1.1 to eq. 1.9). Since this set of nonlinear partial differential
equations has no closed mathematical solution, they have to be solved numerically
by inserting a geometric mesh and solving the equations step by step by the finiteelement or finite-difference methods. These equations describe the physical phenomena within the semiconductor, consisting of carrier drift and diffusion components,
carrier generation and recombination effects, and the relationship between space
charge and electric field. The solution of the whole system of basic equations is
done without simplifications, and it is commonly used by device simulators [6], [7].
This sort of modeling provides a rigorous picture of the device behavior but, owing to their numerical intensity, convergence properties, and very long CPU times,
they are limited to the analysis of simplified test circuits, where in practice just one
single semiconductor device is present. Although this may suffice during the device
design and technological development stages, such techniques are unable altogether
to cope with the simulation of realistic power circuits and are therefore of little use
in their design, where compact models must be used. From the engineering point
of view, the degree of accuracy that is achieved by an exact numerical model is not
always necessary or even justified, in particular, if the input data, such as the doping
31
profile, is only known with a limited accuracy. In such cases, simplified compact
models may suffice, being obtained through some assumptions and simplifications
in the semiconductor physics as done in chapter 1.
Analytical micromodels rely on a set of mathematical functions to describe the
devices terminal characteristics without resorting to numerical methods. An example is the standard diode model packaged in SPICE. Standard SPICE-type models
were designed for microelectronic devices, and they poorly describe the dynamic
and static behavior of power devices [24]. The standard SPICE models use a simple
charge control method and lack the important physical effects in power devices. The
soft recovery of the power diode cannot be simulated by the SPICE diode model,
leading to erroneous predictions of switching power dissipation. Another drawback
of the SPICE diode model is its inability to simulate the forward recovery, and so,
they are not suitable for power electronics applications [25]. In order to cover the
failures of the SPICE model, some important effects must be considered when dealing with PiN diodes: mainly the conductivity modulation and the charge storage in
the epilayer.
The resistance of the epilayer is variable and its dependence on voltage or current
can be highly nonlinear. In the PiN diode, this low-doped layer is swamped by
electrons and holes when the device is in its on state. The density of the injected
charge carriers can be much higher than the level of the doping concentration, and
the resistivity of the region is significantly reduced. The resistance of a region with
the boundaries xl and xr and the area A is given by:
Z xr
Z xr
dx
dx
Repi =
=
(2.1)
xl qA(n n + p p)
xl qA(n + p )p
where n and p are the densities of electrons and holes, respectively, and n and p
are the mobilities of the charge carriers. The charge carriers are not distributed
homogeneously, and their density depends on position; the mobilities also cannot
be regarded as constants, since it depends on the carrier concentration in the epilayer. During transient operation, the variation of the resistivity does not follow the
changing current instantaneously this effect can influence the switching behavior (e.g., forward recovery of power diodes), and in order to take it into account,
a dynamic description of the charge distribution is necessary. Even if a solution
of the time-dependent charge densities is found, the calculation of the resistance
remains difficult since the integration in eq. 2.1 is not possible without simplifications. However, accurate solutions for the resistance can be achieved through some
simplifications.
The charge carriers, which are stored in the lightly doped region of the PiN
diode during the conduction mode, must be extracted before the device can reach
its blocking state. This effect causes switching delays and switching energy losses.
Standard device models for circuit simulation use a quasi-static description of the
charge carriers, as the diode SPICE model. It means that the charge distribution
32
(2.2)
where p(x,t) is the density of the charge carriers, hl is the high-injection level carrier
lifetime, and Da is the ambipolar diffusion coefficient. This equation is valid in the
case of high-level injection when hole and electron densities are approximately equal.
Unfortunately, an exact analytical solution of the ADE is not possible in the
general case. However, there are different analytical approaches to solve the ADE
as the Laplace transformation method [26], [27], [28], the Asymptotic Waveform
Evaluation method [29], [30], and by using Fourier based-solution [31], [32], [33],
[34]. These approaches will be discussed with more details in section 2.3. Other analytical models are based on the modification of the standard diode model to allow
dynamic diode characteristics to be predicted [35], [36], [37], [38], as the lumpedcharge approach in which the excess carrier distribution profile is discretized into
several critical regions, each containing a lumped charge node to represent dynamic
charge variation [39], [40], [41], [42]. Like numerical modeling, the limits to simulation accuracy are more due to the accuracy of the input parameters rather than due
to the models themselves. The computational overheads of analytical models are far
lower than those of numerical models. In addition, there is a large pool of popular
commercial simulators, such as SPICE and Saber, the solver algorithms of which
have been evolved to solve these types of models most efficiently. Having power
device models in the libraries of these simulators allows the latter to function as
general purpose power electronics circuits CAD tools. Analytical models are, thus,
very appropriate for simulation of power electronic circuits over a large number of
switching cycles.
A third type of micromodel formulation technique is to use a combination of
numerical and analytical models, and they are called the hybrid models. The motivation behind such hybrid model arises from the fact that certain physical phenomena in power devices are very difficult to simulate realistically using only analytical
equations, particularly the charge storage effects in the epilayer. The basic idea of
this method is to use a fast numerical algorithm that solves the semiconductor equations in the epilayer only. Analytical equations are applied to the rest of the device
structure. This procedure has the advantage that a high accuracy of the charge
carrier behavior may be simulated without the long execution time associated with
fully numerical models. The semiconductor equations in the epilayer, that is the
33
ADE, are solved using the finite element method [43], [44], [45] or the finite difference method [46], [47], [48], [49] and will be discussed with more details in section
2.3.
Another approach is the approximate solution, where the model equations are
based on the device physics, but since exact solutions are not possible or restricted
to a few special cases, appropriate mathematical representations are found to approximate the solution. These approaches are purely empirical in many cases, but
it is also possible to show that some functions come close to an exact solution under certain constraints of the boundary conditions. The approximations applied
to the time-dependent charge carrier distribution can be simple geometrical curves
(e.g., straight lines and sine functions), which imitate the shape of the distribution
[50], [51], [52]. The knowledge of how the shape must look like is obtained from
theoretical considerations or numerical calculations (device simulators [6], [7]).
Several papers can be found discussing the different techniques of modeling power
diodes and other power semiconductor devices [53], [54], [55], [56], [57]. In this thesis,
special attention is dedicated to the micromodels based on the solution of the ADE.
34
2.2
2.3
In this section some compact PiN diode models present in literature are introduced
and briefly discussed. First, some analytical models are presented, and then some
hybrid models are described. With the exception of the model presented in [34],
where lifetime is variable in the epilayer, and the one presented in [49], [60], where
the mobilities are dependent of carrier concentration and temperature, the other
compact models analyzed in literature have the following assumptions:
The problem is treated as one-dimensional in the space;
The temperature T is constant;
The P+ N and N N+ junctions are abrupt;
The doping in the base is constant (N or P type);
The lifetime hl and the mobilities in the base are constant and independ of
injection;
The carriers density in the epilayer is much larger than the doping density
(high injection).
35
2.3.1
This approach was applied by Strollo [26], [27], [28], where the epilayer is represented
with a two-port network obtained by solving the ADE with the Laplace transform
method, and by approximating the solution in the s-domain with rational functions.
The model was implemented as a subcircuit in the Pspice simulator, and the first
step is to convert the ADE into the s-domain with respect to time (capital letters
are used to indicate L-transformed quantities):
2 P (x,s)
1
Da
+ s P (x,s)
(2.3)
=
x2
hl
From the general solution of eq. 2.3 and substituting P(0,s) and P(W,s) on it, the
resulting equations can be interpreted as the equations of a two-port network as
shown in Fig. 2.1 in which node voltages correspond to carrier concentration while
input and output currents correspond to the x -derivative of carrier concentration.
The nonlinear boundary conditions of the ADE (eq. 1.62 and eq. 1.71) are represented by two nonlinear current generators, GL and GR , controlled by the current
through the diode, p(0) and p(W).
e le m e n t
p (0 )
L
C
G
L
p 1
Figure 2.1.
p 1
p 2
p (W )
R
Y
p
p 1
p 2
p 1
p 2
G
R
p 2
approximated by using a rational function where the coefficients of the same are
obtained by using the Pade approximation. After some algebraic manipulations,
the approximate representation for the admittance Yp is shown in Fig. 2.1. All the
passive components in the two-port network are dependent of the epilayer width
W, which is kept unchangeable during the simulations. More accurate results can
be obtained by the insertion of more elements like the one in Fig. 2.1 connected in
series [27], in order to obtain the carrier concentration in other parts of the epilayer.
However, it affects the simulation time. Owing to the accuracy of the approximations
used for Zm and Yp it is possible to divide the epilayer in very few subregions.
In order to obtain the complete diode model, after obtaining the equivalent
circuit representing the solution of the ADE, the voltage drops in the junctions
are calculated through eq. 1.37 and eq. 1.38. The ohmic component is evaluated
taking into account carrier-carrier scattering through a series resistance, and by an
average value of carrier concentration for each element of the epilayer, where there
is a factor that must be obtained by curve fitting through the voltage overshoot
forward recovery measurements. In this approach only the voltage drop due to the
space-charge region in the left junction (P+ N junction) is considered, since it is
true that almost all the diode voltage drops in this region. The width of the left
space-charge region is obtained by following the analytical approach proposed in
[50], leading to a complex subcircuit where an ideal switch and other controlled
generators using small look-up tables are present (these generators are used as flags
to indicate the beginning of the reverse-recovery phase and also to clamp to zero
the voltages in the network representing the epilayer), since negative values have no
physical sense. This complex implementation results in convergence problems for
more than one switch simulation. The voltage drop in the space-charge region is
calculated by:
I
qND
VSC =
+
x2SC
(2.4)
2As
2
where xSC is the the width of the left space-charge region and s is the hole saturated
drift velocity.
This model takes into account emitter recombination effect in the end regions,
conductivity modulation, carrier-carrier scattering and the dynamic of the spacecharge voltage build-up through an analytical approach. Input parameters of the
subcircuit are directly obtained from the geometrical and physical parameters of the
device (epilayer doping and width, high injection lifetime in the same, width and
doping of the emitters).
37
2.3.2
This approach was also applied by Strollo [29], [30] and is an extension of the previous
model, since the starting point of the model is to solve the ADE using the Laplace
transform. However, in this approach instead of using the boundary condition in
the N N+ junction (eq. 1.71), the following condition is imposed:
p
(xm ,t) = 0
(2.5)
x
where W/2 < xm < W, and to simplify the modeling, xm is assumed to be a
constant abscissa. This is only an approximation however. Strickly speaking, xm is
a constant only in the idealized condition of equal electron and hole mobility and
equal P+ and N+ emitter efficiency, where xm =W/2 for symmetry [39], [40], [41],
[42]. Anyway, the use of eq. 2.5 results in a big simplification of the model, and
does not significantly affect the accuracy of the overall SPICE model. The boundary
condition in the P+ N junction (eq. 1.62) is kept unchanged, but some additional
variables are introduced in the same. Finally, the solution of the ADE through the
Laplace transform with respect to time with the new boundary conditions leads to
(capital letters are used to indicate L-transformed quantities):
xm
1 La
I1 (s) = Q0 (s)
1 + shl tanh
1 + shl
(2.6)
hl xm
La
Thus, a continued-fraction expression in the s-domain of the carrier distribution
in the epilayer is obtained (following the Asymptotic Waveform Evaluation theory
[61]), and by truncating the following continued-fraction expansion, lumped RC
representations of the epilayer are easily obtained (as seen in Fig. 2.2):
I1 (s)
=
Q0 (s)
1
Z0 +
(2.7)
1
3
+
T0
1
5Z0 +
1
7
+ ...
T0
where:
Z0 =
hl
1 + shl
(2.8)
x2m
(2.9)
Da
where i1 is the component of the total current due to the carrier injection in the
epilayer, and q0 is the amount of excess charge in the left junction.
T0 =
38
i1
q
0
Figure 2.2.
5 t
h l
T
3
1 /5
9 t
h l
T
7
1 /9
h l
1 1
The model was implemented in the Pspice simulator as a subcircuit, and it was
shown that the quasi-static model in SPICE [24] and the lumped-charge model [39],
[40], [41], [42] can be obtained as low-order approximations of the continued-fraction
expansion (first and second order respectively) while more accurate models can be
obtained from higher order approximations of the continued-fraction expansion.
This model takes into account emitter recombination effect in the highly doped
end regions, conductivity modulation in the epilayer, carrier-carrier scattering and
the moving-boundaries effect during reverse recovery. It requires a total of 13 input
parameters, with 8 more coefficients in addition to the standard SPICE diode parameters. All the parameters must be extracted by fitting DC measurements (most
of the parameters), and from the forward and reverse recovery results. It is done
through a stochastic global optimization algorithm in an automatic fashion [62],
[63]. However, the implementation of latter seems to be very complex and not that
clear. The model shows good convergence properties and fast simulation times, and
seems to apply to PiN diode at all conditions.
39
2.3.3
In this model, introduced the first time by Leturcq [31] and then extended by Bryant
[34] in order to include variable lifetime in the epilayer, the ADE is solved through
the Fourier based-solution. Many other authors adopted this kind of solution for
solving the ADE, including temperature dependence in their models [64], [65], [66].
Again the solution can be implemented by an electrical analogy. The original work
developed by Leturcq [31], where the high-level lifetime of carriers is considered
constant in the whole epilayer, is treated here.
It was shown in [67] that a discrete cosine Fourier transform of p(x,t):
k(x xl )
p(x,t) = V0 (t) +
Vk (t) cos
xr xl
k=1
(2.10)
allows the ADE (eq. 2.2) to be converted into an infinite system of first order linear
differential equations for the series coefficients V0 . . . Vk :
"
#
V0
V0
p
p
(x2 x1 )
+
= Da
I0
(2.11)
t
hl
x xr
x xl
with:
I0 =
X
n=1
(xr xl )
2
Vn
xl
xr
(1)n
t
t
(2.12)
"
Vk
1
Da k 2 2
p
p
Ik (2.13)
+ Vk
+
= Da (1)k
2
t
hl (xr xl )
x xr
x xl
with:
X
Vk (xl xr )
n2 Vn
x1
k+n x2
Ik =
+
(1)
4
t
n2 k 2 t
t
n=1, n6=k
(2.14)
V
0
(t)
V
R
C
I
V
1
(t)
o d d
Figure 2.3.
E V E N L IN E
a d d (e v e n )
(t)
R
C
R
C
R
C
(t)
e v e n
O D D L IN E
a d d (o d d )
I
1
xr xl
Ck =
2
2
1
for k 6= 0,
Rk =
k 2 2 Da
xr xl 1
+
hl (xr xl )2
(2.16)
The I0 . . . Ik sources, as given by eq. 2.12 and eq. 2.14, account for the boundary
shifts (in case of fixed boundaries, Ik 0).
These RC lines are driven by current sources Ieven and Iodd which are defined by
the boundary conditions (eq. 1.21 and eq. 1.22).
"
Ieven = Da
#
p
p
x xr
x xl
41
(2.17)
"
Iodd = Da
#
p
p
+
x xr
x xl
1
p
In |xl
Ip |xl
=
x xl
2qA
Dn
Dp
1
p
In |xr
Ip |xr
=
x xr
2qA
Dn
Dp
(2.18)
(2.19)
(2.20)
When the boundaries of the excess charge start moving, the following condition
must be added:
p(xl ,t) 0
and/or
p(xr ,t) 0
(2.21)
So, the calculation of the carriers distribution in the epilayer is explicit when the
ends of the carrier storage region are fixed (xl =0 and xr =W). At reverse recovery
the boundaries become mobile as cleared out zones appear on. In this case, the
boundary abscissa values xl and xr must be controlled so as to maintain p(xl ,t)
and/or p(xr ,t) 0 in the calculation. This is obtained by simple circuits of the type
shown in Fig. 2.6, the ideal diodes D enabling the continuity of the representation to
be maintained between the fixed and mobile boundary cases. However, the resistors
Rxl and Rxr must be adjusted in order to acquire the latter conditions, meaning
that they are additional heuristic parameters in the model, added to the physical
and geometrical parameters of the diode. It was also found that these resistors are
also related to the value of the leakage current of the diode when reverse biased.
The number of cells to be retained in the RC lines must be such that the k-th
time-constant is much smaller than the characteristic times involved in the current
and voltage waveforms. The truncate error can be greatly reduced by terminating
the lines by additional series resistances corresponding to the cumulated resistance
values of the missing cells, as shown in Fig. 2.3.
Figure 2.4.
Circuits to calculate the position of the left and right borders in the
epilayer.
In this model, the displacement current is taken into account. This current adds
to the carrier current components due to the variations of the space-charge regions
42
during reverse recovery. This component is added to the components due to the
recombination in the highly doped end regions (In1 and Ip2 ), and they are involved
in the calculation of the diffusion currents Ip1 and In2 . It is done by way of analogy,
in that of the space-charge width xSC , according to the subcircuits of Fig. 2.5,
always using ideal diodes D, combined with the subcircuit of Fig. 2.4.
I
I
Figure 2.5.
n 1
I
d is
sc
I
p 2
p 1
n 2
x
l
W -x
r
A drawback of the models based in this approach is that all the elements of the
RC nets are dependent on the width of the flooded region with excess charge carriers.
So, due to the moving boundaries effect, the capacitors and resistors in the RC nets
are all non linear elements, that depend on the width of the mentioned region.
This fact takes to convergence problems, and higher number of elements needed
for implementing the RC net elements. For implementing a variable capacitor in
a circuital way in some SPICE versions as IsSPice, as an example, four elements
are needed since these versions do not support the derivative command DDT as is
the case of the Pspice version, and the higher number of elements impacts on the
computation time and in the convergence properties of the simulation.
This model takes into account emitter recombination effect in the end regions,
conductivity modulation, carrier-carrier scattering and the moving boundaries effect. Input parameters of the subcircuit, when implemented as a SPICE subcircuit,
are directly obtained from the geometrical and physical parameters of the device
(epilayer doping and width, high injection lifetime in the same, width and doping
of the emitters) and the heuristic parameters already mentioned.
43
2.3.4
e le m e n t
R
1
R
n
n + 1
G
L
p 1
Figure 2.6.
p 1
p 2
p 2
p 1
p 1
p 2
p 2
The departure point of the model is a variational formulation of the ADE (eq.
2.2) subjected to the boundary conditions (eq. 2.19 and eq. 2.20), namely:
#
2
Z
Z "
p(x,t) p(x,t)
1 p(x,t)
p(x,t)2
dV +
=
+
dV
2
t
2Da hl
Da
t
V
V
Z
where f (t) is the left boundary condition (eq. 2.19), and g(t) is the right boundary
condition (eq. 2.20). The minimization of the functional above (eq. 2.22) is equivalent to the solution of the ADE (eq. 2.2) and its boundary conditions (eq. 2.19 and
eq. 2.20).
Assuming that the solution of the unknown function, p(x,t), is approached by a
sum of elementar functions, the finite elements, of the form [68], [69]:
44
(2.23)
(2.24)
and after substitution in eq. 2.22 and its minimization ( = 0) we get the following
matrix equation:
p(t)
[M ]
+ [K][p(t)] + [F (t)] = [0]
(2.25)
t
where
[G(x)] =
e=n
X
[Ge (x)]
(2.26)
e=1
[M (x)] =
e=n
X
[Me (x)]
(2.27)
e=1
F (t) =
e=n
X
[Fe (x)]
(2.28)
e=1
(e)
Sl
(2.29)
(2.30)
(2.31)
Sr
and
N1e (x)
Nke (x)
[B] =
...
x
x
[N ] = [N1e (x) . . . Nke (x)]
(2.32)
(2.33)
This system of ODEs can now be coupled with differential equations for the
rest of the circuit and conveniently solved with any of the methods for this kind
of equations [70], [71]. So, the obtained system of ODEs can be interpreted as a
combination of RC nets and current sources that can be solved with the aid of a
general circuit simulator as SPICE based simulators.
45
Once the type of elements is chosen, N and B are defined, the integrals in
2.29, 2.30 and 2.31 can be solved, and the RC net constructed. It is used for
implementation a simplex approach for the elements, so we will have two nodes for
each element and, in local coordinates:
s
s
[N (s)] = 1
(2.34)
xe
xe
"
[p(t)] =
pe (t)
#
(2.35)
pe+1 (t)
So
1
[B] =
xe
1
xe
(2.36)
2
1
1
xe
x
[B]T [B] = e 2
2
1
1
xe
xe
(2.37)
2
s
s2
s
1
xe
xe x2e
T
[N (s)] [N (s)] =
2
s2
s
s
xe x2e
xe
(2.38)
the integrals:
Ae xe
Me =
6Da
Ae
Ge =
xe
"
1 1
1 1
"
2 1
#
(2.39)
1 2
Ae xe
+
6Da hl
"
2 1
1 2
#
(2.40)
(2.41)
where xe is the width of each element within the epilayer, and Ae is the element
area.
46
The obtained matrices for each element are equivalent to the highlighted element
circuit in Fig. 2.6, and the whole epilayer is represented by the series connection
of n single elements. The voltages at the nodes, V1 (t), Vn+1 (t), are equivalent to
the concentration, p(x,t), along the epilayer. The number of nodes is that of the
elements plus one. The first node and the last node will have, accordingly with eq.
2.31, an additional current source whose values are, respectively, GL = f (t)A1 and
GR = g(t)An+1 . the values of the other components needed for the implementation
of the model are, according to Fig. 2.6:
Rp1 = Rp2 =
Rs =
2Da hl
Ae xe
6Da hl xe
Ae [6Da hl x2e ]
Cp1 = Cp2 =
Ae xe
2Da
(2.42)
(2.43)
(2.44)
Ae xe
(2.45)
2Da
Again, we can note that the values of the elementar components of the RC net are
all variable ones during recovery because the width of the epilayer, and so of the
elements, varies in time.
This model takes into account emitter recombination effect in the end regions,
conductivity modulation and moving boundaries effect. This work was originally
implemented by the authors in the IsSpice software. It is assumed in this model
that during the reverse recovery all voltage drops in the left space region. The
same scheme used by Leturq [31] for calculating the borders of the epilayer due to
the moving boundaries effect is used in this model. As in the case of the previous
model, the implementation of the whole model takes to the need of many nonlinear
elements, as the case of the implementation of the variable capacitor, resulting
in a large number of components and increased simulation times and convergence
problems. We have implemented this model in the Pspice simulator as well, and the
results were not encouraging since there were lots of convergence problems during
the simulation of very simple test circuits. Input parameters of the subcircuit, when
implemented in circuital way in SPICE based simulators, are directly obtained from
the geometrical and physical parameters of the device (epilayer doping and width,
high injection lifetime, width and doping of the emitters) and the heuristic parameter
mentioned in the previous model, but in this case regarding only the circuit used
for calculating the left border.
Cs = =
47
2.3.5
The most accurate solutions of the ADE, regarding compact diode models, are
obtained through numerical solutions of the same [54], which are based on the
discretization of the considered region into a finite number of mesh points. Two
methods can be distinguished. The first one was applied in the previous hybrid
model, and is known as the Finite Element Method (FEM). The second one is the
Finite Difference Method (FDM), which has been applied most often. If the FDM
is used, the derivatives in the ADE and in the boundary conditions are expressed
by differences which may have the form:
x i
2x
x2 i
x2
where index i indicates the mesh-point number. Eq. 2.46 is an example of forward
difference for the derivative in the space. However, there are other ways of representing it, and also the backward and central differences. These differences can be
obtained through Taylor series, and are different depending on the truncated term
considered in the series [70], [72]. Time is also discretized:
p
pj+1 pj
(2.48)
=
t j
t
and an algebraic equation system results.
Several authors have adopted the FDM for solving the ADE. The Finite Difference Method was first developed into a power diode model by Berz [46]. In this
work, the so called Enthalpy Method is used for solving the problem of the moving
boundaries. When the region flooded with excess carriers detaches from the diode
junctions, the boundary conditions should be modified in order to account for the
moving boundaries effect as the space charge regions build up from both junctions.
This problem is solved by introducing an auxiliary variable u which has the following
properties:
u(x)=p(x)-kJ R (where k is a constant parameter and JR is the reverse recovery
current density) within the carriers storage region;
2u
= 0 outside the carriers storage region.
x2
The carrier concentration p outside the storage region is forced to zero. By using
this approach it is possible to maintain the same boundary conditions for the whole
48
reverse recovery transient and directly obtain the position of the space charge moving
boundaries. The mesh in which the epilayer is discretized is kept unchanged.
Most of the models using the FDM are implemented in the form of subroutines,
such as when the SABER simulator is used [48], [49]. In these models, since the
boundary conditions of the ADE are calculated from terminal current densities, the
circuit simulator delivers current to the model and receives voltage from the model.
This is the concept of hybrid models, consisting of the numerical and analytical part.
Thus, the model appears to the simulator as a current controlled voltage source.
In models using the finite difference method, local effects such as carrier-carrier
scattering and Auger recombination can be easily included, as is the case of the
model proposed by Vogler [49], [60]. Thereby, temperature dependent algebraic
expressions for scattering and recombination processes replace widely employed parameters such as high injection lifetime, mean carrier concentration and average
mobility. In addition, the algorithm of these models can easily be understood and
modified, while the simple simulator equations take to no convergence problems and
to an accurate solution of the ADE.
Another FDM based model is the model proposed by Goebel [48], [73], in which
conductivity modulation and the field dependence of carriers mobilities are included,
while emitter recombination effects are not included. The latter was then included
in [74].
The only model similar to the FDM based models implemented in a circuital way
was proposed by Profumo [47]. In this work, implemented in the Pspice simulator,
Analog Behavioral Modeling (ABMs) blocks were used for implementing the model.
The model was implemented in the same way done by Berz [46], considering a fixed
mesh of the one-dimensional epilayer as explained above.
In all FDM based models, the input parameters are directly obtained from the
geometrical and physical parameters of the device. In particular, the model presented by Profumo [47] takes into account only the space charge region in the left
junction, while the other models consider the space charge region in both junctions.
The lumped-charge approach in [39], [40], [41], [42], looks similar to the method
of finite differences. It can be regarded as a simplification to the greatest possible
extent with a minimal number of nodes. But in a lumped model, the average charge
densities of the sections instead of the densities at the nodes are inserted into the
equations.
In the following, a novel Finite Difference based model of PiN diodes is presented.
49
Chapter 3
Finite Difference Based Power PiN
Diodes Modeling and Validation
A physics-based model for PiN power diodes is developed and implemented as a
SPICE subcircuit. The starting point of the model is an equivalent circuit representation of the epilayer, obtained by solving the Ambipolar Diffusion Equation (ADE)
with the Finite Difference Method.
The proposed model takes into account emitter recombination in the highly
doped end regions, conductivity modulation in the epilayer, carrier-carrier scattering
and the moving boundaries effect during reverse recovery, showing good convergence
properties and fast simulation times. Comparisons between the results of the SPICE
model and both numerical device simulations and experimental results are presented,
in order to validate the proposed model.
50
3.1 Nomenclature
3.1
A
b
Da
Dn
Dp
hp
hn
ID
Idep
In
Inl
Inr
Ip
Ipl
Ipr
Jn
Jp
k
0
n
p
ND
ni
p(x,t)
p0
q
Repi
T
hl
VD
Vjl
Vjr
Vlef t
Vres
Vright
vs
VT
Nomenclature
x
xl
xr
W
3.2
Introduction
In power converter systems, the role of switching is dedicated to the power semiconductors. In the early design stages, these devices are often considered as binary
on-off switches, allowing vary fast computation of the circuit [75]. However, as the
current trend is towards reducing power converter size and increasing switching frequencies, the binary on-off representation of semiconductor devices has to be revised.
This very simple device representation cannot take into account for the non ideal
behaviors of the semiconductor device, especially during switching transients.
One approach is to employ a physically-based model to represent the device.
This method is based on describing and solving numerically the basic drift-diffusion
semiconductor equations, using the finite element or the finite difference method
for example [6], [7]. In this way, device behavior can be modelled very precisely
in two or even three dimensions. Unfortunately a very precise physical model with
high numerical complexity involves a very long computational time, making this
approach more suited to individual device design and optimization, since its use is
computationally prohibitive at system level modelling.
A physical compact modelling approach as the ones presented in the last chapter
lies between these two extremes, and it seems to represent the ideal solution for power
semiconductor device representation within circuit simulators. This physic approach
is based on certain mathematical simplifications of the fundamental semiconductor
charge transport equations, resulting in the Ambipolar Diffusion Equation (ADE).
The model presented in this chapter exploits the Finite Difference Method (FDM)
for the discretization of the lightly doped base region, the epilayer, in a finite number of mesh points (nodes). This is the numerical contribution of this hybrid model.
An electrical analogy with the set of ordinary differential equations obtained by the
space-discretization of the ADE in the base region provides the equivalent circuit
model for the carriers concentration in the epilayer. The carriers concentration is
then related to the diode voltage by the junction and ohmic relationships under
forward bias, and the Poisson equation under reverse bias operation, which are the
analytical contributions of this hybrid model. This results in an easy-to-implement
diode model as a SPICE subcircuit, which takes into account the emitter recombination effects in the highly doped end regions, carrier-carrier scattering, conductivity
modulation, and the dynamic of the space-charge voltage build-up (moving boundaries effect during reverse recovery). It is worth to outline that the FDM approach
to the ADE solution yields the time-varying free carrier distributions in the epilayer,
thus allowing for a better comprehension of the device dynamic behavior. The model
52
can be implemented in any commercially available circuit simulator allowing for non
linear elements, especially those based on SPICE. In this work, the commercially
available circuit simulator Pspice was used [58], and the model was implemented
as a Pspice subcircuit. This simulator was chosen since it is the standard reference
circuit simulator in the world [76]. The subcircuit is much simpler than some other
proposed subcircuit models described in the last chapter, resulting in faster simulation and improved convergence properties. Parameters for the model are all related
to the physical and geometrical properties of the device.
Pspice model simulations are compared with experimental results and simulations using another compact diode model present in literature, and either with
experimental characterizations or with SILVACO mixed-mode module simulations
[7] of a commercial PiN power diode [19]. A good agreement is obtained, with much
smaller computation times of Pspice simulations than SILVACO ones. Finally, simulation examples of practical Switched-Mode Power Supplies (SMPS) are provided,
in order to demonstrate the model effectiveness, speed and convergence properties.
3.3
3.3.1
Model description
Fundamental Equations
I
D
A n o d e
N
+
x = 0
Figure 3.1.
N
-
x = W
C a th o d e
Let us consider a device with a base width W, extending from the P+ -N junction
(x = xl = 0) to the N -N+ junction (x = xr = W ), see Fig. 3.1. Under high
injection, the carrier distribution is governed by the ADE [9]:
2p
p
p
= Da 2
(3.1)
t
x
hl
where Da = 2Dn Dp /(Dn + Dp ) is the ambipolar diffusion coefficient and hl is the
high-level lifetime. The boundary conditions for eq. 3.1 at x = xl and x = xr can
be written as:
1
p
In (x = xl ) Ip (x = xl )
(xl ,t) =
(3.2)
x
2qA
Dn
Dp
p
1
In (x = xr ) Ip (x = xr )
(xr ,t) =
(3.3)
x
2qA
Dn
Dp
53
In eq. 3.2 and eq. 3.3, In is the electron current, Ip is the hole current, A the
device area, q the electronic charge, Dn and Dp are the diffusion coefficients for
electrons and holes respectively.
During evaluation of the equations above, the following equations must also be taken
into account:
ID = In + Ip + Idep
(3.4)
In (x = xl ) = q hp A p2(x=xl )
(3.5)
Ip (x = xr ) = q hn A p2(x=xr )
(3.6)
xl
(3.7)
t
where ID is the total diode current, Idep is an additional current component during
reverse recovery, due to the charge variations in the space-charge region (this component charges and discharges the anode-base depletion capacitor), hp and hn account
for emitter recombination effects, and xl and xr are the left and right borders of the
region flooded with excess carriers.
Idep = q ND A
3.3.2
In this model, Finite Difference substitutions in eq. 3.1 are done only with respect
to space, meaning that the time derivative in eq. 3.1 is kept unchanged. In [48],
[49], the time derivative is also discretized, forward and backward differences are
applied in the first and last nodes respectively, while central differences are applied
for the other internal nodes of the discretized region. It results in a set of algebraic
equations, with n + 1 equations and n + 1 variables.
Instead of using also backward and forward differences as in [48], [49], this model
only uses central differences. Thus, for the n elements in which the base region is
divided, we have n + 1 nodes, and for the ith node we have [72]:
pi+1 pi1
p
=
(3.8)
x i
2x
2
x i
x2
Note that using only central differences, we have n + 3 nodes instead of the n + 1
nodes resulting when using central, forward and backward differences. However, by
using central differences in the boundary conditions as well, we obtain an explicit
expression for the nodes 0 and n + 2. Consequently, we come back to a set of
54
p
pi+1 2pi + pi1
pi
= Da
t i
x2
hl
(3.10)
For the 1st and n + 1th node we have the following boundary conditions at x = xl
and x = xr :
p2 p0
p
1
In (x = xl ) Ip (x = xl )
=
=
x i=1
2x
2qA
Dn
Dp
(3.11)
pn+2 pn
1
In (x = xr ) Ip (x = xr )
p
=
=
x i=n+1
2x
2qA
Dn
Dp
(3.12)
p
qAhp p21 ID Idep qAhp p21
1
p2 p0
=
=
x i=1
2x
2qA
Dn
Dp
=
x i=n+1
2x
2qA
Dn
Dp
(3.13)
(3.14)
Substituting p0 from (3.13) and pn+2 from (3.14) into the expressions equivalent
to the 1st and n + 1th nodes in (3.10), and rearranging the first and the last (n + 1th )
rows of the system of ODEs, dividing them by 2, we finally get a symmetric system
as follows
p
[M ]
+ [K][p] + [F ] = 0
t
(3.15)
where the n + 1 x n + 1 symmetric matrices [M] and [K], and the n + 1 x 1 vector
[F], are given as
0.5 0 0 0
0 1 0 0
(3.16)
M = ... ... ... ... ...
0 0 1 0
0 0 0 0.5
55
Da
1
Da
2
x2 + 2
x
hl
2Da
1
Da
+
2
2
x
x
hl
..
..
K=
.
.
0
0
0
0
F =
Da
2qAx
...
..
.
..
.
1
2Da
+
2
x
hl
Da
2
x
..
.
0
Da
2qAx
..
Da
2
Da
1
+
x2 2hl
Dn
Dp
0
(3.17)
2
qAhn pn+1
Dp
(3.18)
V
[C]
+ [G][V ] + [I] = 0
(3.19)
t
which in turn corresponds to the circuit in Fig. 3.2, the node voltages Vi (t) being
equivalent to the concentration p(xi ,t) along the base. The number of nodes is the
number of elements plus one. The first and last node (n + 1th node) will have,
according to (3.19), additional current sources whose values are respectively
Da
ID Idep qAhp V12 qAhp V12
(3.20)
I1 =
2qAx
Dp
Dn
and
In+1
Da
=
2qAx
2
2
qAhn Vn+1
ID Idep qAhn Vn+1
Dn
Dp
56
(3.21)
n o d e
1
G
1
Figure 3.2.
n o d e
1 2
G
2
n o d e
G
2
G
n
n n + 1
n o d e
n + 1
n + 1
n + 1
n + 1
Regarding the other components of the RC net representing the epilayer, we have
the following relationships. The series resistors between two adjacent nodes i and
i+1 have all the same value,
Ri, i+1 =
x2
Da
(3.22)
During reverse recovery, moving boundary effect is taken into account by allowing
an adaptive definition of the space-charge region width, which in turn changes the
width-dependent series resistances in the RC network modeling the base region
above. The other components, the shunt components of the RC net, they are all
constant and have well defined values dependent upon the physical characteristics
of the diode, as follows:
C1 = Cn+1 = 0.5
for i = 1, n+1,
R1 = Rn+1 = 2hl
Ci = 1
for i 6= 1, n+1,
Ri = hl
(3.23)
(3.24)
With respect to other hybrid models [43], [44], [45], the proposed approach offers
a significant reduction of circuit complexity in terms of number of components as well
as of the single component complexity. It results in an easy and fast implementation
of the model. The accuracy of the model will depend on the number of elements
used.
3.4
In order to obtain the complete hybrid diode model, other sub-models, the analytical
part of the model, must be coupled to the solution of the ADE. These sub-models
are derived from the junction and ohmic relationships under forward bias, and the
Poisson equation under reverse bias operation.
57
The complete compact model for the PiN diode is shown in Fig. 3.3, and includes
the internal voltages and currents. The total voltage across the diode is the sum of
various components as shown in Fig. 3.3:
VD = Vjl + Vlef t + Vres + Vjr + Vright = Vanode Vcathode
(3.25)
The voltages Vjl and Vlef t represent the junction and depletion voltage drops
across the P + N junction. Similarly, Vjr and Vright account for the N N + junction.
In addition, there is the ohmic voltage drop Vres across the flooded region with
excess carriers (carrier storage region), where conductivity modulation takes place
whenever the excess carriers are present. The total diode current consists of both
hole and electrons components within the carrier storage region, and the depletion
capacitance current Idep also contributes to the total diode current. The currents Ipl ,
Inl , Ipr , Inr represent the individual hole and electron currents entering and leaving
the carrier storage region at the anode and cathode junctions within the base region.
Thus, the diode equivalent circuit appears as a current-controlled voltage source.
B a s e re g io n (E p ila y e r)
I
D
A n o d e
V
+
jl
p l
p
l
n l
x
le ft
x
re s
I
Figure 3.3.
3.4.1
p r
n r
r ig h t
jr
I
D
C a th o d e
d e p
PiN diode model: all voltages and currents incorporated into model
are shown.
The voltage drops in the junctions are calculated through the equations obtained
by the junction law under forward bias, as demonstrated in chapter 1. The voltage
drop in the left and right junctions are calculated from p1 and pn+1 , and in the
equivalent RC network from V1 and Vn+1 , according to:
V1 ND
p1 ND
= VT ln
(3.26)
Vjl = VT ln
n2i
n2i
58
and
Vjr = VT ln
pn+1
ND
= VT ln
Vn+1
ND
(3.27)
where ND is the base doping concentration [cm3 ], ni is the intrinsic carrier concentration [cm3 ], and VT is the equivalent thermal voltage [V].
We call the attention that these equations are valid while there are excess carriers
in the physical junctions of the diode, being zero otherwise. During the implementation of these equations, special care must be taken in order to avoid using negative
values of the carriers concentration in the same, since during the reverse recovery,
the carrier concentrations in the first and last nodes will assume very small values,
in order to approximate their values to zero.
3.4.2
The voltage drop on the conductivity modulated based region is given by the sum
of an ohmic component, due to the drift current, and of a Dember component, due
to the diffusion current. The latter arises from unequal electron and hole mobilities
[9] and will be neglected in the following, since it is typically much smaller than the
ohmic voltage drop Vres . The ohmic voltage drop across the carrier storage region
is found by integrating the electric field E responsible for driving the drift currents
in this region:
Z x=xr
Vres =
Edx
(3.28)
x=xl
where E is found from the total hole and electron drift current in the plasma:
ID = In + Ip = qA(n (p + ND ) + p p)E
Thus, from eq. 3.28 and 3.29, the ohmic voltage drop is found to be:
Z
ID x=xr
dx
Vres =
qA x=xl p(x,t)(n + p ) + n ND
(3.29)
(3.30)
In order to solve eq. 3.30 and determine Vres , the discretized epilayer is used:
n
Vres =
ID X
x
qA i=1 Vi (x,t)(n + p ) + n ND
(3.31)
For the sake of simplicity, it is assumed that the concentration between the two
nodes of an element to be equal to
pi =
pi + pi+1
2
59
(3.32)
We can include the mobility degradation effect, due to the electron-hole scattering,
by assuming [29], [30], [77]:
n + p =
p 0 0
p0 + p
(3.33)
where 0 is considered as the sum of the mobilities in the base region and p0 is a
suitable constant in the order of the carriers concentration in the base under highinjection condition. By this assumption, we can note that in low-injection condition
the sum of the mobilities is not disturbed by electron-hole scattering effects. Depending on the width of the high-doped end regions of the diode, resistance in these
zones must also be taken into account as parasitic resistances, and other parameters of the diode must be supplied, as the doping concentration, width of the same
regions, and mobilities of holes and electrons in these regions.
3.4.3
The quasi-neutrality condition in the base layer is not satisfied during the final stage
of reverse-recovery transient, when the two space-charge regions build-up. This
phase begins when the concentration of carriers in the left junction drops to zero;
from this time instant on the quasi-neutrality region is confined between two moving
boundaries, advancing from both left and right junctions. In these conditions almost
all the diode voltage drops on the left space-charge region [9], [28]. By assuming a
saturated drift velocity condition in the above region, this voltage drops can easily
be expressed as follows [66], [79]:
q
| ID |
Vlef t =
ND +
x2l
(3.34)
2s
qAvs
q
| ID |
Vright =
ND +
(W xr )2
(3.35)
2s
qAvs
where xl is the width of the left junction space-charge region, (W xr ) is the width of
the right junction space-charge region, and vS is the hole and electron saturated drift
velocity. Here, the space-charge includes the ionized impurities and the density of
free carriers injected in the depleted regions. In this model, as most of the depleted
voltage drop is present in the left junction, in order to simplify the model just this
one is taken into account, following eq. 3.34.
The great challenge when modeling PiN diode models based in the solution of
the ADE regards the moving boundaries effect, that is, the calculation of the left and
right borders position during reverse recovery. One possibility is through the widely
used feedback scheme proposed the first time by Leturq [31], and adopted by many
other authors [31], [34], [43], [64], [65], [66]. The feedback scheme introduced in the
last chapter, makes possible the calculation of xl and xr from the voltages across the
60
depletion layers (Vlef t and Vright ) on each side of the carrier storage region. These
are derived from the carrier densities at the boundaries between the depletion layers
and carrier storage region, using a high-gain feedback loop as shown in Fig. 3.4,
where K is the high-gain. The effect of the feedback is to produce a depletion layer
voltage when the boundary carrier density falls below zero. The high gain ensures
that the boundaries xl and xr move to maintain a negligible error in the boundary
carrier densities. The depletion layers may form on each side of the carrier storage
region.
Another option would be using the standard equation representing the exponential relationship between current and voltage of a diode in the steady state condition:
i(t) = s
IS (exp(Vj )/(N VT ) 1)
(3.36)
1 + IS (exp(Vj )/(N VT ) 1)
IKF
where IS , IKF and N are model parameters, and Vj is the voltage drop on the
two P + N and N N + junctions. So, the current is by analogy substituted by
the concentration of carriers in the left junction, and the junction voltage is easily
related to the carrier concentration in the left junction [29], [30]. In this way, when
the depletion voltage starts building up in the diode left junction, the concentration
is imposed to be approximately zero, that is to the saturation value that is related
with the saturation reverse current of the standard diode IS , and it is possible to
calculate the position of the left border through eq. 3.34, since the voltage Vlef t
is known. The continuity of the equations are maintained by the standard diode
equation. Analyzing both implementations, it may be concluded that both of them
work in a very similar way. An advantage of the latter is that the heuristic gain of the
feedback scheme is eliminated, and the parameters needed for the implementation
of the model are all related to the physical and geometrical properties of the PiN
diode, plus the model parameters that must be fitted through static measurements.
Both the sub-models were implemented and simulated with the proposed model.
3.5
In the following, the complete diode model will be presented as a Pspice subcircuit
[58], without the need of modifying the code of the simulator. The subcircuit input
parameters are all directly related to the geometrical and physical parameters of
the diode, as shown in Table 3.1. If the feedback scheme proposed by Leturq [31] is
used, an additional parameter K is present, while for the proposed use of a standard
diode as explained in the last section [30], there will be three more parameters (IS ,
IKF , N) that must be fitted togheter with the p0 coefficient, accounting for carriercarrier scattering effects. The fitting must be done only with respect to static I-V
61
x
l
r
R C
N E T W O R K
p l
p r
n l
n r
d e p
Figure 3.4.
x l
, p
2
x
K
x r
, ... p
n
, p
n + 1
measurements, and it can be done in a fast and easy way, using MATLAB for
example [78].
Table 3.1.
Notation
ND
W
hl
WP
NP
WN
NN
A
p0
n
Parameter
Base doping
Base width
high injection lifetime
P+ emitter depth
P+ peak doping
N+ emitter depth
N+ peak doping
device area
coefficient describing carrier-carrier scattering in the base
number of elements of the discretized epilayer
Units
cm3
cm
s
cm
cm3
cm
cm3
cm2
cm3
power PiN diode subcircuit, considering the feedback scheme. The base region of
the device is represented by the network of Fig. 3.2, based on the FDM. In Fig. 3.5
the voltages at the nodes 1, 2, 3, 4 to 11 are proportional to p(0), p(W/n), p(2W/n),
p(3W/n) to p(W) respectively. Equally spaced elements W/n in the discretized base
region are considered.
V
1 0 0
A n o d e
G
L
P 1
Figure 3.5.
P 1
5 0
d io d e
2 0
3 0
G
1
L re c
d io d e
R S 1
P 2
C a th o d e
1 0
...
P 2
P 1 0
P 1 0
X L
R
+
1 1
R S 1 0
P 1 1
X L
R re c
G
R
P 1 1
are confined in a region that is wide (W - xL ), and from this time the width of the
elements starts to decrease). The complete model uses much less components (more
compact model), and is much more simple and with better convergence properties,
due to the fact that there are no discontinuities in the present model, than the
model presented by Araujo in [43]. This is not only due to the simpler solution of
the ADE, but also by the way in which the model is implemented within the Pspice
simulator, as will be seen in section 3.6.1. A constant of normalization kn for the
implementation into Pspice must be used with the RC network representing the
solution of the ADE, due to the fact that the SPICE based simulators do not work
with voltages higher than 10 GV, and the values of the single values will change.
The complete subcircuit code is shown in Appendix A, with reference to Fig. 3.5.
A n o d e
V
0
S 2
1 0 0
re s
2 0
Figure 3.6.
P 1
p in
P 1
3 0
G
1
L re c
d io d e
4 0
C a th o d e
R S 1
P 2
5 0
1 0
...
R
P 2
P 1 0
P 1 0
E
J
1 1
P 1 1
6 0
R S 1 0
S 1
R re c
G
R
P 1 1
The second way of implementation works in a similar way, and is shown in Fig.
3.6. Instead of using the boundary conditions in the same way of eq. 3.2 and eq.
3.3, eq. 1.48 and eq. 1.49 are used for obtaining the symmetrical system of ODEs,
meaning that the depletion current component is not taken into account. As can
be seen in Fig. 3.6, instead of having a current source in the first node, we have a
voltage source that is linked to the current flowing through the standard diode D1 .
The current through the diode by analogy is equivalent to the carriers concentration
in the first node, and the voltage drop on diode D1 represents the voltage drop
in both junctions. When the concentration tends to become negative, there is a
negative voltage drop in the junctions, that means the voltage drop in the depleted
region. The whole system of ODEs is divided by an additional constant kidiode, in
order to avoid convergence problems. The reason for doing that is the same for the
use of kn. The complete subcircuit code is shown in Appendix B, with reference to
Fig. 3.6.
64
3.6
Finally, Pspice simulations through the proposed compact diode model are compared with experimental results and simulations using another compact diode model
present in literature, and either with experimental characterizations or with SILVACO mixed-mode module simulations [7] of a commercial PiN power diode [19].
3.6.1
In order to compare the results of the proposed model with the model based in
the Finite Element Method proposed by Araujo [43], [44], [45], the first one was
implemented exactly in the same way that the last one, but substituting the RC
network of the FEM based model representing the solution of the ADE, by the RC
network of the proposed model. The circuit representing the complete diode model
is shown in Fig. 3.7. Only 4 elements for the discretization of the base region is
shown in order to illustrate the same, however, authors suggest that readers should
discretize the base in at least 10 elements for obtaining accurate results, as already
mentioned. The feedback scheme proposed by Leturq [31] was adopted in both
models, and only the voltage drop in the left space-charge region is considered here,
according to the equation below, which does not take into account the injection of
holes in the depleted region:
qND x2l
(3.37)
2s
where s is the dieletric constant of silicon [F/cm], and xl is the left boundary of the
base region [cm].
Vlef t =
A n o d e
V
1
P 1
1 2
P 1
7 0
re s1
Figure 3.7.
1 2
1 2
re s2
d io d e
2 0
V
2
P 2
8 0
1 0
re s3
re s
3 0
2 3
P 2
9 0
2 3
2 3
P 3
jl
V
3
re s4
3 4
jr
5 0
3 4
P 3
1 0 0
4 0
3 4
S C
V
4
P 4
6 0
4 5
C a th o d e
E
4 5
P 4
4 5
G
5
P 5
P 5
2 1
S C
W 1
W 2
W 3
V
R
2 2
W 4
In order to verify the effectiveness of the proposed Pspice model, several simulations have been run, and the results are presented and compared with experimental
65
measurements and simulations using the FEM based model. Physical parameters
of the diode under test are: W = 90 m, hl = 10 s, ND = 1014 cm3 , A = 4
mm2 , Dn = 25 cm2 /s, Dp = 10 cm2 /s and hp = hn = 1.5 1014 cm4 /s. Carriercarrier scattering and Auger recombination effects were not taken into account here
for the sake of comparison with the FEM-based model, which has not used theses
effects either. The test circuit used to measure and simulate the reverse recovery is
presented in Fig. 3.8, while the circuit operating conditions and the most relevant
performance parameters are reported in Table 3.2. The performance parameters
are highlighted in Fig. 3.9. An ideal switch was used in the simulations. The results of two different tests are highlighted in Fig. 3.10 and in Fig. 3.11, showing
excellent agreement either with experiments or the FEM-based model. Finally, in
Table 3.3 the relative percentual errors of the FDM-based model with respect to the
FEM-based model in [44] are presented.
I
D
L
L
D U T
D U T
V
D
G
Figure 3.8.
C C
A U X
Test circuit.
D io d e V o lta g e [V ]
D io d e C u rre n t [ A ]
d ID /d t
rm
rm
ts
t Irm
tV
rm
T im e [n s ]
Figure 3.9.
time consuming and used to require a relatively complex interface between circuit
simulator and ADE solver [28]. This is no longer true with the present model, owing
to the electrical circuit analogy, which allows it to reduce the simulation to a Pspice
subcircuit analysis. This work was published in [80].
67
Table 3.2.
Table 3.3.
FDM
Test
1
2
3
4
5
Irm
tIrm
Error Error
6
1.5
2.5
5
1.2
0
2.1
0.6
1
7.5
Vrm
Error
0
0
1.2
1
0.8
68
tV rm
Error
1
9.8
8.6
5.4
0.9
ts
Error
5.5
1.5
3.8
6.2
3.8
4 0
3 0
D io d e C u rre n t (A )
-1 0 0
-2 0 0
1 0
0
-1 0
-3 0 0
-4 0 0
-3 0
-4 0
-6 0 0
-7 0 0
-2 0
-5 0 0
0 .5
1 .5
2 .5
3
T im e (m s )
4 .5
(b )
2 0
1 0 0
-1 0 0
1 0
-2 0 0
-2 0
-5 0 0
0
-1 0
-3 0
-4 0
-3 0 0
-4 0 0
0 .5
1 .5
3 .5
4 .5
(c )
2 0
1 0 0
-1 0 0
-2 0 0
1 0
-1 0
-3 0 0
-4 0 0
-3 0
-4 0
-6 0 0
-7 0 0
-5 0 0
-2 0
0
0 .5
1 .5
2 .5
3
T im e (m s )
3 .5
4 .5
D io d e V o lta g e (V )
D io d e C u rre n t (A )
4 0
3 0
2 .5
3
T im e (m s )
-6 0 0
-7 0 0
D io d e V o lta g e (V )
D io d e C u rre n t (A )
4 0
3 0
3 .5
D io d e V o lta g e (V )
(a )
2 0
1 0 0
0
Figure 3.10. Reverse recovery transient - Test 2: (a) Experimental results, (b)
Simulation results using the FEM-based model, (c) Simulation results using the
proposed model.
69
4 0
3 0
1 0 0
-1 0 0
1 0
-2 0 0
-2 0
-5 0 0
-3 0 0
-4 0 0
0
-1 0
-3 0
-4 0
0 .2
0 .4
0 .6
4 0
3 0
0 .8
1
1 .2
T im e (m s )
1 .4
1 .6
1 .8
1 0 0
-1 0 0
-2 0 0
1 0
-1 0
-3 0 0
-4 0 0
-3 0
-4 0
-6 0 0
-7 0 0
-5 0 0
-2 0
0
0 .2
0 .4
0 .6
0 .8
1 .4
1 .6
1 .8
(c )
2 0
1 0 0
-1 0 0
1 0
-2 0 0
-2 0
-5 0 0
0
-1 0
-3 0
-4 0
-3 0 0
-4 0 0
0 .2
0 .4
0 .6
0 .8
1
1 .2
T im e (m s )
1 .4
1 .6
1 .8
-6 0 0
-7 0 0
D io d e V o lta g e (V )
D io d e C u rre n t (A )
4 0
3 0
1
1 .2
T im e (m s )
D io d e V o lta g e (V )
(b )
2 0
D io d e C u rre n t (A )
-6 0 0
-7 0 0
D io d e V o lta g e (V )
(a )
2 0
D io d e C u rre n t (A )
Figure 3.11. Reverse recovery transient - Test 5: (a) Experimental results, (b)
Simulation results using the FEM-based model, (c) Simulation results using the
proposed model.
70
3.6.2
D io d e C u rre n t [A ]
The present model has been applied to the analysis of IR Si-based FREDs (fast recovery diodes) and validated against experimental characterization data. The simulated PiN diodes has a 50 m long base, with doping level in the order of 1014 cm3 .
The devices have a specified current rating of 8A. Two devices have been investigated, having identical physical structure but different carrier lifetimes: hl = 200
ns (device D1) and hl = 40 ns (device D2). The base region of the simulated diodes
was discretized in 10 elements, and once more the feedback scheme is employed.
Further details on the device structure may be found in [19]. Simulations were also
carried out by exploiting the SILVACO mixed-mode module [7], where the device is
described through the standard drift-diffusion physics based transport model. The
SILVACO numerical model includes mobility dependence on doping, carrier-carrier
scattering, temperature, and electric field, bandgap narrowing, Schockley-Read-Hall
recombination and Auger recombination. The actual doping profile is analyzed,
while an abrupt approximation is used in the Pspice model. Material parameters
are the same in both simulators. A comparison between simulated and measured
forward I-V characteristic of the D1 and D2 diodes is presented in Fig. 3.12 and
Fig. 3.13, showing good agreement, which is possible due to the use of the mobility
model taking into account scattering effects.
1 0
1 0
1 0
E x p e rim e n ta l
P s p ic e
S ilv a c o
1 0
-1
Figure 3.12.
0 .8
1 .2
1 .4
1 .6
1 .8
D io d e V o lta g e [V ]
2 .2
2 .4
2 .6
Fig. 3.14 and Fig. 3.15 shows forward recovery simulations for both diodes,
71
D io d e C u rre n t [A ]
1 0
1 0
E x p e rim e n ta l
P s p ic e
S ilv a c o
1 0
-1
0 .5
Figure 3.13.
1 .5
2 .5
3
D io d e V o lta g e [V ]
3 .5
4 .5
obtained by supplying the device with a current ramp having a rise time of 100 ns
and a steady-state value Imax (see Fig. 1.8). Three cases have been considered:
Imax = 10A, Imax = 5A and Imax = 1A. Results of Fig. 3.14 and Fig. 3.15
show that the diode voltage behavior given by Pspice is in good agreement with the
ones of SILVACO. Note the forward voltage overshoot, due to the time needed for
injected carriers to fill-up the base, creating a conductivity-modulated region.
Concerning the recovery behavior, an ad hoc boost-like circuit has been employed
for diode characterization (Fig. 3.16) in order to ensure a complete knowledge of
all the circuit components (LDU T , LD and LS are the parasitic inductors) . As far
as the Pspice and SILVACO simulations, since the circuit is operated in continuous current mode, the input inductor LF and the output capacitor CR have been
replaced by a constant current source (IF ) and a constant voltage source (VR ), respectively. A STANDARD SPICE LEVEL 1 model for the IRFP460 MOSFET has
been implemented. Reverse recovery simulation results obtained with the Pspice
model are reported from Fig. 3.17 to Fig. 3.26 for both diodes with different di/dt
ratings, in order to investigate its influence on reverse recovery behavior. For the
case which the di/dt is 100 A/s, the parasitic inductances are: LDU T = 40 nH, LD =
30 nH and LS = 13 nH. For the other analyzed di/dt ratings, the values are: LDU T =
50 nH, LD = 5 nH and LS = 13 nH. The comparison against either experiments or
SILVACO-based simulations shows very good agreement, and it can be observed
that the peak reverse current and the recovery time obtained with the Pspice model
72
P s p ic e
S ilv a c o
Im a x = 1 0 A
3 .5
D io d e V o lta g e [V ]
3
2 .5
2
Im a x = 5 A
1 .5
1
Im a x = 1 A
0 .5
0
0
5 0
Figure 3.14.
1 0 0
1 5 0
T im e [n s ]
2 0 0
2 5 0
3 0 0
4 .5
P s p ic e
S ilv a c o
4
Im a x = 1 0 A
3 .5
D io d e V o lta g e [V ]
3
2 .5
Im a x = 5 A
2
1 .5
Im a x = 1 A
1
0 .5
0
0
Figure 3.15.
5 0
1 0 0
1 5 0
T im e [n s ]
2 0 0
2 5 0
3 0 0
are close the SILVACO and experimental results in all the simulated cases. It must
be highlighted, since the values of peak reverse current and peak overvoltage are the
73
L
in
IF
R
L
F
L
D
D U T
L
G
Figure 3.16.
D U T
C
R
V
R
Table 3.4.
74
10 ns 1 ns
0.69
6.16
5.42 12.08
0.53
P s p ic e
S ilv a c o
M e a s u re m e n ts
8
6
D io d e C u rre n t [A ]
4
2
0
-2
-4
-6
-8
-1 0
-1 2
0
1 0 0
Figure 3.17.
2 0 0
3 0 0
T im e [n s ]
4 0 0
5 0 0
6 0 0
P s p ic e
S ilv a c o
M e a s u re m e n ts
-2 0
-4 0
D io d e V o lta g e [V ]
-6 0
-8 0
-1 0 0
-1 2 0
-1 4 0
-1 6 0
-1 8 0
-2 0 0
0
Figure 3.18.
1 0 0
2 0 0
3 0 0
T im e [n s ]
4 0 0
5 0 0
6 0 0
75
P s p ic e
S ilv a c o
M e a s u re m e n ts
D io d e C u rre n t [A ]
-5
0
1 0 0
Figure 3.19.
2 0 0
3 0 0
T im e [n s ]
4 0 0
5 0 0
6 0 0
P s p ic e
S ilv a c o
M e a s u re m e n ts
-2 0
-4 0
D io d e V o lta g e [V ]
-6 0
-8 0
-1 0 0
-1 2 0
-1 4 0
-1 6 0
-1 8 0
-2 0 0
0
Figure 3.20.
1 0 0
2 0 0
3 0 0
T im e [n s ]
4 0 0
5 0 0
6 0 0
76
P s p ic e
S ilv a c o
M e a s u re m e n ts
8
6
D io d e C u rre n t [A ]
4
2
0
-2
-4
-6
-8
-1 0
0
5 0
Figure 3.21.
1 0 0
1 5 0
2 0 0
2 5 0
3 0 0
T im e [n s ]
3 5 0
4 0 0
4 5 0
5 0 0
0
-2 0
-4 0
P s p ic e
S ilv a c o
M e a s u re m e n ts
D io d e V o lta g e [V ]
-6 0
-8 0
-1 0 0
-1 2 0
-1 4 0
-1 6 0
-1 8 0
-2 0 0
0
Figure 3.22.
5 0
1 0 0
1 5 0
2 0 0
2 5 0
3 0 0
T im e [n s ]
3 5 0
4 0 0
4 5 0
5 0 0
77
P s p ic e
S ilv a c o
M e a s u re m e n ts
8
D io d e C u rre n t [A ]
6
4
2
0
-2
-4
0
5 0
Figure 3.23.
1 0 0
1 5 0
2 0 0
2 5 0
3 0 0
T im e [n s ]
3 5 0
4 0 0
4 5 0
5 0 0
P s p ic e
S ilv a c o
M e a s u re m e n ts
-2 0
-4 0
D io d e V o lta g e [V ]
-6 0
-8 0
-1 0 0
-1 2 0
-1 4 0
-1 6 0
-1 8 0
-2 0 0
0
Figure 3.24.
5 0
1 0 0
1 5 0
2 0 0
2 5 0
3 0 0
3 5 0
4 0 0
4 5 0
5 0 0
78
P s p ic e
S ilv a c o
M e a s u re m e n ts
5
D io d e C u rre n t [A ]
-5
-1 0
-1 5
-2 0
0
5 0
Figure 3.25.
1 0 0
1 5 0
2 0 0
2 5 0
3 0 0
T im e [n s ]
3 5 0
4 0 0
4 5 0
5 0 0
P s p ic e
S ilv a c o
M e a s u re m e n ts
0
-2 0
-4 0
D io d e V o lta g e [V ]
-6 0
-8 0
-1 0 0
-1 2 0
-1 4 0
-1 6 0
-1 8 0
-2 0 0
0
Figure 3.26.
5 0
1 0 0
1 5 0
2 0 0
2 5 0
3 0 0
T im e [n s ]
3 5 0
4 0 0
4 5 0
5 0 0
79
3.7
Power supply design has today challenging goals in terms of high efficiency and
electrical performance, together with low weight, size and cost. In order to achieve
such goals, a reliable and accurate CAD simulation and design of the SMPS is
needed [82], allowing for the choice of the best suited diode to be used in the DCDC converter and, when available, in the active Power Factor Correction (PFC)
stage. Owing to the good accuracy combined with short simulation time and robust
convergence, the proposed PiN diode model may be very useful from this point of
view, since it enables the reliable and fast evaluation of power losses in the switching
and conduction state.
After the validation of the commercial diodes presented in the previous section,
we illustrate the effectiveness and robustness of the presented diode model by exploiting it in the analysis of complex realistic circuits. We consider two SMPSs [83],
[84]; the first one (Fig. 3.27) uses a dc-dc buck converter with the following characteristics: Pout = 800 W, Voutput = 90 V dc, Vinput = 127 V ac rms at 50 Hz and
switching frequency of 100 kHz. The second one (Fig. 3.28) uses a dc-dc flyback
converter, operating in continuous current mode, with the following characteristics:
Pout = 100 W, Voutput = 5 V dc, Vinput = 220 V ac rms at 50Hz and switching
frequency of 100 kHz. Both circuits exploit as switching devices the IRFP460 MOSFET and the diode D1 analyzed in the previous section. The SMPSs were simulated
using a SPICE LEVEL 1 model for the IRFP460 MOSFET, and taking into account
the parasitic inductance of the diode.
LB
IRFP460
RG
DUT
R LOAD
CB
CF
LDUT
Figure 3.27.
Fig. 3.29 and Fig. 3.30 report the current waveforms across the diode D1 and
the switch for the buck SMPS. It is observed that the reverse recovery current of the
diode shows up in the MOSFET drain current. This current will cause significant
power dissipation in the MOSFET, along with increased EMI. In order to improve
80
LDUT
IRFP460
DUT
RG
Figure 3.28.
LP
CB
LS
R LOAD
CF
the efficiency of the SMPS, one can trade-off between the peak reverse current and
the recovery time of the diode or limit over-currents and EMI generation by means
of snubber circuits, which on the other hand cause unwanted RC power loss. During
the design stage, besides the usual parameters involved in the design of a SMPS, the
di/dt controlling the diode turn-off should also be taken into account, since higher
di/dt causes higher reverse current peak.
Fig. 3.31 and Fig. 3.32 show the voltage across the diode and the switch,
highlighting the voltage overshoot during the diode turn-on (forward recovery) that
also appears across the MOSFET drain-source prior to the blocking state. Such
additional voltage should also carefully considered during the design stage, in order
to choose a suitable switch with proper voltage specification and to properly design
a limiting snubber circuit. Finally, Fig. 3.33 to Fig. 3.36 report the simulation
results for the SMPS using the dc-dc flyback converter. This work was published in
[85].
81
3 0
D io d e C u r r e n t
S w itc h C u r r e n t
2 5
2 0
C u rre n t [A ]
1 5
1 0
5
0
-5
-1 0
-1 5
-2 0
1 0
Figure 3.29.
1 5
2 0
D io d e P e a k R e c o v e r y C u r r e n t
2 5
3 0
T im e [m s ]
3 5
4 0
4 5
5 0
3 5
D io d e C u r r e n t
S w itc h C u r r e n t
3 0
2 5
C u rre n t [A ]
2 0
1 5
1 0
5
0
-5
-1 0
-1 5
-2 0
Figure 3.30.
D io d e P e a k R e c o v e r y C u r r e n t
0 .5
1 .0
T im e [m s ]
1 .5
2 .0
Buck based SMPS: detail of the diode and switch currents during a
single commutation.
82
3 0 0
D io d e V o lta g e
S w itc h V o lta g e
2 5 0
2 0 0
V o lta g e [V ]
1 5 0
1 0 0
5 0
0
-5 0
-1 0 0
-1 5 0
-2 0 0
1 0
Figure 3.31.
1 5
2 0
2 5
3 0
T im e [m s ]
3 5
4 0
4 5
5 0
2 5 0
D io d e V o lta g e
S w itc h V o lta g e
2 0 0
1 5 0
V o lta g e [V ]
1 0 0
D io d e V o lta g e O v e r s h o o t
5 0
0
-5 0
-1 0 0
-1 5 0
-2 0 0
Figure 3.32.
0 .2
0 .4
T im e [m s ]
0 .6
0 .8
1 .0
Buck based SMPS: detail of the diode and switch voltages during a
single commutation.
83
4 0
2 0
D io d e C u r r e n t [A ]
S w itc h C u r r e n t [A ]
D io d e P e a k R e c o v e r y C u r r e n t
-2
1 0
2 5
3 0
T im e [m s ]
3 5
4 0
4 5
-2 0
5 0
4 0
2 0
-2
Figure 3.34.
2 0
D io d e P e a k R e c o v e r y C u r r e n t
0
0 .5
T im e [m s ]
1 .5
D io d e C u r r e n t [A ]
S w itc h C u r r e n t [A ]
Figure 3.33.
1 5
-2 0
Flyback based SMPS: detail of the diode and switch currents during
a single commutation.
84
6 0
4 0 0
4 0
2 0 0
2 0
0
0
-2 0
-2 0 0
-4 0 0
0
1 0
2 0
T im e [m s ]
3 0
4 0
-6 0
5 0
6 0 0
6 0
S w itc h V o lta g e
D io d e V o lta g e
5 0 0
5 0
4 0 0
4 0
3 0 0
3 0
2 0 0
2 0
D io d e V o lta g e O v e r s h o o t
1 0 0
1 0
0
0
-1 0 0
-1 0
-2 0 0
-2 0
Figure 3.36.
0 .5
T im e [m s ]
1 .0
1 .5
V o lta g e [V ]
Figure 3.35.
S w itc h V o lta g e [V ]
-4 0
S w itc h V o lta g e
D io d e V o lta g e
-6 0 0
-3 0 0
D io d e V o lta g e [V ]
6 0 0
D io d e
S w itc h V o lta g e [V ]
-3 0
Flyback based SMPS: detail of the diode and switch voltages during
a single commutation.
85
Chapter 4
Conclusions
In this tesis we have presented a novel approach for modelling power PiN diodes,
based on an equivalent circuit representation of the epilayer, developed from the
Finite Difference solution of the Ambipolar Diffusion Equation. This model fully
describes the distributed nonlinear behavior of carriers within the epilayer, and is
easily implemented as a SPICE subcircuit which takes into account the most important physical effects such as emitter recombination effects, carrier-carrier scattering
effects and the dynamic of the space-charge voltage build-up.
Comparisons of results of the proposed diode model with experimental results
and FEM-based model simulations reported in literature, and also of commercially
available fast recovery diodes and simulations carried on a physics based mixed-mode
simulator were done, and very good agreement has been obtained.
The model is characterized by its simplicity and good simulation times and
convergence properties, suitable for the simulation of practical power circuits such as
Switched Mode Power Supplies (SMPSs). We have reported examples of application
to the simulation of SMPSs. In this way it is possible to evaluate the power losses
and the efficiency of the power supplies already during the design stage by means of
CAD tools. The proposed modelling technique can be applied to any device region
in high injection condition and therefore is suitable for the modeling of many power
devices beside PiN diode, like BJTs and IGBTs.
86
Appendix A
Pspice subcircuit listing - feedback
scheme
.SUBCKT PiNdiode 100 30
*PiN DIODE model through Finite Differences, using the feedback scheme
.PARAM Da={2*Dn*Dp/(Dn+Dp)}, Dn=34.84, Dp=12.82, W=50e-4, Nd=2e14
+ thl=200n, n=10, hp=1e-15, hn=1e-15, A=0.04, q=1.6e-19
+ un={Dn/25.9m}, up={Dp/25.9m}, ni=1.45e10
.PARAM VT=25.9m, po=7.4e16, uo={un+up}, K=1e2, kn=1e16
+ eps=8.854e-14, epssi=11.7, vs=1e7
.FUNC pos(x) {limit(x,0,1e3)}
GRS1
GRS2
GRS3
GRS4
GRS5
GRS6
GRS7
GRS8
GRS9
RP1
RP2
RP3
RP4
RP5
RP6
RP7
RP8
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
10
0
0
0
0
0
0
0
0
VALUE={(V(1)-V(2))*Da/(((W-V(50))/n)2)}
VALUE={(V(2)-V(3))*Da/(((W-V(50))/n)2)}
VALUE={(V(3)-V(4))*Da/(((W-V(50))/n)2)}
VALUE={(V(4)-V(5))*Da/(((W-V(50))/n)2)}
VALUE={(V(5)-V(6))*Da/(((W-V(50))/n)2)}
VALUE={(V(6)-V(7))*Da/(((W-V(50))/n)2)}
VALUE={(V(7)-V(8))*Da/(((W-V(50))/n)2)}
VALUE={(V(8)-V(9))*Da/(((W-V(50))/n)2)}
VALUE={(V(9)-V(10))*Da/(((W-V(50))/n)2)}
{2*thl}
{thl}
{thl}
{thl}
{thl}
{thl}
{thl}
{thl}
87
RP9 9 0 {thl}
RP10 10 0 {thl}
RP11 11 0 {2*thl}
CP1
CP2
CP3
CP4
CP5
CP6
CP7
CP8
CP9
CP10
CP11
1
2
3
4
5
6
7
8
9
Vdiode
0
0
0
0
0
0
0
0
0
10
11
0.5
1
1
1
1
1
1
1
1
0 1
0 0.5
100
20
DC
Ediode 20 30 VALUE={-q/(2*eps*epssi)*(Nd+abs(I(Vdiode))/(q*A*vs))*(V(50))2+
+ VT*pos(log((V(1)*kn*Nd)/(ni2)))+I(Vdiode)*((W-V(50))/n)/(q*A)*(1/((pos(V(1))+
+ pos(V(2)))*kn*(po*uo/((pos(V(1))+
+ pos(V(2)))*kn+2*po))+Nd*un)+1/((pos(V(2))+pos(V(3)))*kn*(po*uo/((pos(V(2))+
+ pos(V(3)))*kn+2*po))+Nd*un)+1/((pos(V(3))+pos(V(4)))*kn*(po*uo/((pos(V(3))+
+ pos(V(4)))*kn+2*po))+Nd*un)+1/((pos(V(4))+pos(V(5)))*kn*(po*uo/((pos(V(4))+
+ pos(V(5)))*kn+2*po))+Nd*un)+1/((pos(V(5))+pos(V(6)))*kn*(po*uo/((pos(V(5))+
+ pos(V(6)))*kn+2*po))+Nd*un)+1/((pos(V(6))+pos(V(7)))*kn*(po*uo/((pos(V(6))+
+ pos(V(7)))*kn+2*po))+Nd*un)+1/((pos(V(7))+pos(V(8)))*kn*(po*uo/((pos(V(7))+
+ pos(V(8)))*kn+2*po))+Nd*un)+1/((pos(V(8))+pos(V(9)))*kn*(po*uo/((pos(V(8))+
+ pos(V(9)))*kn+2*po))+Nd*un)+1/((pos(V(9))+pos(V(10)))*kn*(po*uo/((pos(V(9))+
+ pos(V(10)))*kn+2*po))+Nd*un)+1/((pos(V(10))+pos(V(11)))*kn*(po*uo/((pos
+ (V(10))+pos(V(11222)))*kn+2*po))+Nd*un))+VT*pos(log((V(11)*kn)/(Nd)))}
GL 0 1 VALUE={Da/(2*q*A*kn*(W-V(50))/n)*(I(Vdiode)+q*Nd*A*DDT(V(50))+(q*(kn2)*A*hp*((pos(V(1)))2)))/Dp}
GLrec 1 0 VALUE={Da/(2*q*A*kn*(W-V(50))/n)*(q*(kn2)*A*hp*
+((pos(V(1)))2))/Dn}
GR 0 11 VALUE={Da/(2*q*A*kn*(W-V(50))/n)*(I(Vdiode)+q*Nd*A*DDT(V(50))+(q*(kn2)*A*hn*((pos(V(11)))2)))/Dn}
GRrec 11 0 VALUE={Da/(2*q*A*kn*(W-V(50))/n)*(q*(kn2)*A*hn*
+((pos(V(11)))2))/Dp}
88
EXL 50 0 VALUE={limit(-K*V(1),0,1e2)}
RXL 50 0 1
.ENDS PiNdiode
89
Appendix B
Pspice subcircuit listing - standard
diode
.SUBCKT Pin 100 40
*PiN DIODE model through Finite Differences, using the standard diode
.PARAM Da={2*Dn*Dp/(Dn+Dp)}, Dn=34.84, Dp=12.82, W=50e-4,
+ Nd=2e14, thl=200n, n=10, hp=1e-15, hn=1e-15, A=0.04,
+q=1.6e-19, un=Dn/25.9m, up=Dp/25.9m, ni=1.45e10
.PARAM po=7.4e16, uo=un+up, h=W/n;
.PARAM b={Dn/Dp}, kn=1e16, kpoisson={1/(7.66e-8*Nd)}, kidiode={b/((1+b)*q*A)}
.FUNC pos(x) {limit(x,0,1e3)}
Ej 50 0 VALUE={V(20,40)}
vs1 50 60 DC 0
D1 60 0 Djunction
.MODEL Djunction D(IS=1.35e-8, N=1.45, IKF=0.32)
Eres 100 20 VALUE={I(Vdiode)*(W-sqrt(pos(-V(20,40))*kpoisson))/n/(q*A)*
+ (1/((pos(V(1))+pos(V(2)))*kn*(po*uo/((pos(V(1))+
+ pos(V(2)))*kn+2*po))+Nd*un)+1/((pos(V(2))+pos(V(3)))*kn*(po*uo/((pos(V(2))+
+ pos(V(3)))*kn+2*po))+Nd*un)+1/((pos(V(3))+pos(V(4)))*kn*(po*uo/((pos(V(3))+
+ pos(V(4)))*kn+2*po))+Nd*un)+1/((pos(V(4))+pos(V(5)))*kn*(po*uo/((pos(V(4))+
+ pos(V(5)))*kn+2*po))+Nd*un)+1/((pos(V(5))+pos(V(6)))*kn*(po*uo/((pos(V(5))+
+ pos(V(6)))*kn+2*po))+Nd*un)+1/((pos(V(6))+pos(V(7)))*kn*(po*uo/((pos(V(6))+
+ pos(V(7)))*kn+2*po))+Nd*un)+1/((pos(V(7))+pos(V(8)))*kn*(po*uo/((pos(V(7))+
+ pos(V(8)))*kn+2*po))+Nd*un)+1/((pos(V(8))+pos(V(9)))*kn*(po*uo/((pos(V(8))+
+ pos(V(9)))*kn+2*po))+Nd*un)+1/((pos(V(9))+pos(V(10)))*kn*(po*uo/((pos(V(9))+
+ pos(V(10)))*kn+2*po))+Nd*un)+1/((pos(V(10))+pos(V(11)))*kn*(po*uo/((pos
+ (V(10))+pos(V(11222)))*kn+2*po))+Nd*un))}
90
Gpin 20 30 VALUE={I(VS2)*(W-sqrt(pos(-V(20,40))*kpoisson))/n}
Vdiode 30 40 DC 0
E0 70 0 VALUE={I(VS1)} VS2 70 1 DC 0
GLrec 1 0 VALUE={(kn2)*hp*((pos(I(VS1)))2)/(h*kidiodo)}
GRS1 1 2 VALUE={(V(1)-V(2))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
GRS2 2 3 VALUE={(V(2)-V(3))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
GRS3 3 4 VALUE={(V(3)-V(4))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
GRS4 4 5 VALUE={(V(4)-V(5))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
GRS5 5 6 VALUE={(V(5)-V(6))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
GRS6 6 7 VALUE={(V(6)-V(7))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
GRS7 7 8 VALUE={(V(7)-V(8))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
GRS8 8 9 VALUE={(V(8)-V(9))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
GRS9 9 10 VALUE={(V(9)-V(10))*Da*kn/kidiode/
+((W-sqrt(pos(-V(20,40))*kpoisson))/n)2)}
RP1
RP2
RP3
RP4
RP5
RP6
RP7
RP8
RP9
RP10
RP11
1
2
3
4
5
6
7
8
9
0
0
0
0
0
0
0
0
0
10
11
CP1
CP2
CP3
CP4
CP5
1
2
3
4
5
0
0
0
0
0
{2*thl*kidiode/kn}
{thl*kidiode/kn}
{thl*kidiode/kn}
{thl*kidiode/kn}
{thl*kidiode/kn}
{thl*kidiode/kn}
{thl*kidiode/kn}
{thl*kidiode/kn}
{thl*kidiode/kn}
0 {thl*kidiode/kn}
0 {2*thl*kidiode/kn}
{.5*kn/kidiode}
{1*kn/kidiode}
{1*kn/kidiode}
{1*kn/kidiode}
{1*kn/kidiode}
91
CP6
CP7
CP8
CP9
CP10
CP11
6
7
8
9
0
0
0
0
10
11
{1*kn/kidiode}
{1*kn/kidiode}
{1*kn/kidiode}
{1*kn/kidiode}
0 {1*kn/kidiode}
0 {.5*kn/kidiode}
GRrec 11 0 VALUE={(kn2)*hn*((pos(V(11)))2)/(w*kidiode)}
GR 0 11 VALUE={I(VS2)/b}
.ENDS Pin
92
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