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LECTURE II
Reference:
Modern computer architecture
1
By Mohamed Rafiquzzaman
And Rajan Chandra
COMPUTER INSTRUCTION SET- INTRODUCTION
Instruction set
Boundary between hardware & software
Instruction
Group of bits that instruct the computer to perform a specific
operation
Sequence of instructions constitutes a program
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3- address
Op-code Ad1 Ad2 Ad3
2-address
Op-code Ad1 Ad2
1- address
Op-code Ad
Zero -address
Op-code
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OP-CODE ENCODING
Instruction-binary
Assigning unique binary code to each op-code
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Block code technique
Expanding op-code technique
Huffman encoding
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Consider an instruction set
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1. BLOCK CODE TECHNIQUE
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Assign fixed length of binary
pattern to op-code
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Some op-code techniques are considered in which
the
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length of the op-code fn ( number of addresses) or
-- fn( relative frequency count)
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2.EXPANDING OP-CODE TECHNIQUE
To find a compromise between instruction length
& memory resolution
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Instruction
Length of op-code & address field 4 bits & 12 bits
Using this 16 operations can be specified & 4096 memory
locations
3bits & 13 bits
8 operations & 213 memory locations
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2.EXPANDING OP-CODE TECHNIQUE
Example case 1 : Four 2 address instructions derived
using 2 bit op- code field ( block code)
Instruction length = 8 bits
Op-code+ address field
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Four 2 address instruction
Address field size 3 bits
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2.EXPANDING OP-CODE TECHNIQUE
Case 2: three -2 address & eight- 1 address
instructions
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2.EXPANDING OP-CODE TECHNIQUE
Case 3: three-2 address ,seven 1 address &
eight- 0 address instructions
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8- bit instruction length
Include zero address instruction
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ADDITIONAL EXERCISE
The instruction set of a certain computer system
requires 5 numbers of 2- address instructions,
45 numbers of single address instructions and
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32 numbers of zero address instructions. The
instruction format has 11 bits instruction
length with 4 bit address field. Is it possible to
obtain all 82 instructions mentioned. Justify your
answer.
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3.HUFFMANS ENCODING
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Relative frequency count:
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Arrange instructions
acc to ascending order
of rel freq cnt
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Label with freq cnt
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HUFFMAN TREE
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Average number of bits per instruction
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=1
li op-code length
fi- relative frequency count of ith instruction
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Block code 8 instructions ,3 bits
Average number of bits needed per instruction=
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=1
1 1 1 1 1 1 1 1
= 3( + ) +3 ( + )+3 ( + + + )
4 4 8 8 16 16 16 16
= 3 bits
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Huffman code 8 instructions
Average number of bits needed per instruction=
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=1
1 1 1 1 1 1 1 1
= 2( + ) + 3 ( + ) + 4 ( + + + )
4 4 8 8 16 16 16 16
= 2.75 bits
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From information theory
The optimum number of bits needed to encode a set
of messages is = =1 2 ( )
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1 1 1 1 1 1
= -[ 2 ( ) 2 ( ) +2 ( ) 2 ( ) +4 ( ) 2 ( )
4 4 8 8 16 16
10 ()
Note: 2 () =
10 (2)
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1
1 10 (4)
Eg: 2 (4)= 10 (2)
REDUNDANCY
Redundancy = Difference between actual average
length & optimum length
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R=
Huffmans scheme :-
2.75 2.75
R= 2.75 = zero [For Huffman code, the redundancy is
zero when the probabilities are negative powers of two.]
Block scheme:-
3 2.75
R= = 8.33% 23
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ADVANTAGES & DISADVANTAGES OF
HUFFMAN'S SCHEME
Advantage:
Huffmans scheme achieves optimal result by keeping
the redundancy to a minimum value
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Disadvantage:
decoding process takes more time
Search must be conducted on Huffman tree
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ADDITIONAL EXERCISES
1. A processor needs 9 instructions I1 to I9 ,
probability of occurrence is given below.
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Instruction I1 I2 I3 I4 I5 I6 I7 I8 I9
probability 0.5 0.2 0.1 0.03 0.08 0.01 0.02 0.04 0.02
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SOLN:
SOLN: (contd)..
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I3 = 0011
5 x 0.04 + 6 x 0.02
I4 =00010
I5 = 0010
= 2.25 bits
I6 = 000000
I7 = 00001
I8 = 00011
I9 = 000001
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ADDITIONAL EXERCISES
2.
Instruction I1 I2 I3 I4 I5 I6 I7 I8
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probability 0.5 0.1 0.1 0.0125 0.2 0.0125 0.025 0.05
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ADDITIONAL EXERCISES
3. A processor needs 9 instructions I1 to I9 ,
probability of occurrence is given below.
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Instructi I0 I1 I2 I3 I4 I5 I6
on
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SOLN
I2 = 1
I4= 011
I3= 010
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I1= 001
I0= 0001
I5= 00001
I6= 00000
Average bits
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REDUNDANCY = 2.76%