Académique Documents
Professionnel Documents
Culture Documents
Abstract—The histogram method using small-amplitude trian- and V, efficiency and uncertainty of the test are analyzed. Fi-
gular waves for the quasi-static test of analog-to-digital converters nally, in Section VI, experimental results aimed at comparing
has been proposed for standardization aims. In this paper, after the proposed technique with the IEEE 1057/94 standard static
a brief description of the test procedure, analytical closed-form
relations for designing the test, as well as for its characterization test [1] are presented.
in terms of efficiency and uncertainty, are provided. Numerical
and experimental results of a comparative analysis with the IEEE II. THE PROPOSED TEST
1057-standard static test highlight its better performance in terms
of efficiency and accuracy. The basic idea lies on the use of small-amplitude triangular
waves, superimposed to increasing dc offset levels, as a test
Index Terms—ADC testing, histogram method, small/waves,
signal, and on the use of the histogram procedure [6]–[8]. The
static test, triangular waves.
input range is scanned by progressively increasing the offset
level step by step (Fig. 1). Small amplitude and slope in
I. INTRODUCTION comparison to the converter range and slew rate, respectively,
lead to quasi-static test conditions.
I N standard static testing of analog-to-digital converters
(ADCs), code transition levels are determined according
to a step-wise statistical algorithm [1]. The necessity for each
The histogram procedure [1], [3], [9]–[11] is adopted in order
to reduce the sample number and the test duration in compar-
transition level of about five input changes, and, for each of ison to the standard static test [1]. The number of samples to be
them, of a significant calibrator settling time, makes the test acquired for the same uncertainty is much lower than the tradi-
duration prohibitive for high-resolution ADCs. tional static test. Furthermore, the number of changes in the dc
Possible solutions are to reduce the number of transition level of the calibrator is reduced by several orders of magnitude.
levels or applied voltage changes. In the former case, a Consequently, the test duration will be greatly reduced owing to
model-based approach allows all-codes transition levels to the corresponding decrease of the total waiting time for the cal-
be computed [2] for the servo-loop test [3], [4]. In the latter ibrator settling.
case, a method based on a variable step size calculated with A calibrating linear signal (triangular wave) is used for
an extrapolated convergence factor technique was proposed achieving a uniform stimulus condition over the ADC range
[5]. A further histogram-based alternative approach [6] using [11]–[13]. Conversely, the standard histogram test exploits a
small-amplitude triangular waves, capable of reducing the sinusoidal stimulus signal, because it is easier to generate with
test duration more significantly, has been proposed [7], [8]. sufficiently low distortion than a triangular one [1], [9]. In the
The converter input range is stimulated by small-amplitude proposed test, the constraint on the linearity distortion of the
triangular waves superimposed to a progressively increased dc triangular generator is relaxed by using a signal of amplitude
level. The test allows linearity constraints of function genera- much lower than the ADC full scale. The input range is stimu-
tors to be relaxed and the experimental burden to be reduced. lated entirely by acquiring the samples for the histogram in
Although from preliminary experiments the test duration steps, with the same small-amplitude triangular wave, but with
appeared to decrease remarkably, a systematic investigation of different offset levels (Fig. 1).
its performance was still necessary. The procedure of the proposed test is reported in Fig. 2.
In this paper, a comprehensive analytical characterization of First, the instruments are set. In each of the steps, the
test efficiency and accuracy is carried out. In Section II, after ADC acquires records of samples of the small wave
a brief description of the basic idea underlying the proposed with amplitude [8]. The sampling frequency and the
method, the test procedure is illustrated. In Section III, analyt- small-wave frequency are selected according to the standard
ical relations for designing the test are provided. In Sections IV histogram procedure [1]. The data acquisition is repeated
times for values of the offset successively increasing. From
the samples acquired in each step, a cumulative histogram
Manuscript received May 29, 2001; revised April 23, 2002. is built [11]. All the transition levels for each step are
F. Alegria and A. M. da Cruz Serra are with the Telecommunication computed from the cumulative histogram [7], [8]. An example
Institute and Instituto Superior Técnico, Technical University of Lisbon,
Lisbon, Portugal (e-mail: falegria@lx.it.pt; acserra@alfa.ist.utl.pt; WWW: is presented in Fig. 3 for a five-bit ADC and a test with four
http://www.lx.it.pt/falegria). steps.
P. Arpaia and P. Daponte are with the Dipartimento di Ingegneria, After all the steps, the obtained transition level arrays have
Università del Sannio, Benevento, Italy (e-mail: arpaia@unisannio.it;
daponte@unisannio.it, http://lesim1.ing.unisannio.it). to be combined into a single one. However, the need for over-
Digital Object Identifier 10.1109/TIM.2002.803292 drive [8], [11] in each of the steps, and the inaccuracy of the
0018-9456/02$17.00 © 2002 IEEE
724 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 51, NO. 4, AUGUST 2002
A. Small-Wave Amplitude
The amplitude of the small wave i) has to be sufficiently
small, in order to permit a low linearity for the function gen-
Fig. 1. Signals applied to the ADC.
erator, and ii) has to include an overdrive, in order to increase
accuracy and to stimulate all the codes in the th step.
As far as the linearity requirement is concerned, the non-
linearity NL of a triangular generator can be defined as the
maximum difference between the actual and the ideal waves,
normalized to the ideal wave amplitude. This NL causes an
error on the measured transition level. Once a maximum value
is defined for this error, by considering the -bit ADC
resolution, a corresponding boundary for the wave amplitude
can be obtained
(1)
(2)
The maximum value of is , and random phase shift between the test signal and the
sampling clock. The minimum number of records to achieve a
(4) given uncertainty boundary on the transition levels for the
sinusoidal histogram can be determined [15]
For equal steps, the number of steps results
(5)
(11)
where the symbol denotes the integer part of . Conse-
quently, the exact range to be stimulated in each step is where is the confidence level and is the percentage of
overdrive used. Equation (11) has to be adapted to the case of a
(6) triangular stimulus by substituting the coefficient
by the corresponding . Moreover, in [11], the test signal am-
plitude was considered to be equal to half of the reduced full
Note that, since must be an integer number, the range
scale, times the overdrive . Here, the case of the amplitude
stimulated by each step will be, generally, smaller than the limit
lower than the full-scale voltage is considered
.
B. Offset
The offset to apply in the -th step is just the middle point (12)
of the stimulated range
IV. EFFICIENCY ANALYSIS
(7)
In this section, the proposed test efficiency in terms of time
duration is investigated analytically and compared to the one
where is the lowest transition level.
of the standard static test, at varying main test parameters: i)
C. Number of Samples number of bits, ii) input equivalent noise, iii) phase noise, and
iv) required uncertainty. With this aim, at first analytical expres-
The number of samples has to be i) sufficiently low in sions of are derived for both the tests, and the analysis con-
order to limit the influence of the uncertainty of the input and ditions are defined.
sampling frequencies, and ii) sufficiently high, in order to limit For the proposed test, depends on the step number , and
the influence of random noise. on the time taken by each step
As far as the first uncertainty source is concerned, a higher
boundary for has to be determined. depends
on the input frequency , the sampling frequency , and their (13)
accuracies and . The following expression sets a boundary
for the relative error of the ratio between these two where is the generator settling time, and the communi-
frequencies [14] cation time accounting for the time taken by a sample code to
be transferred from the ADC output to the computer memory.
(8) For the standard static test, depends on: the ADC number
of transition levels , the number of input voltages
where is the acquired number of signal periods. From (8), by used for each transition level determination, and the time nec-
substituting the explicit expression of , the maximum number essary for the acquisition [1]
of samples is derived:
(14)
(9)
The efficiency comparative analysis was carried out in the fol-
Since this test should be performed in quasi-static conditions, lowing conditions: i) a reduced full-scale voltage of 1 V; ii)
the acquisition should be performed during only one period of an accuracy of 0.001 LSB on the measured transition levels;
the stimulus signal . The frequency of the test signal iii) a small-wave frequency of 10 Hz; iv) a sampling frequency
can thus be calculated as of 10 Sample/s; v) accuracies and of ppm; vi)
a communication time of 100 s per sample; vii) a settling
(10) time of 0.1 s; viii) number equal to five input levels
for the determination of each transition level, as required on av-
As far as the second uncertainty source is concerned, three main erage by the standard static test [1]; and ix) a sample number
factors have to be considered for the transition levels derived , derived from [1] for a confidence
from the cumulative histogram: additive noise , phase noise level equal to .
726 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 51, NO. 4, AUGUST 2002
Fig. 4. Test duration t versus ADC bit number n , for the standard (thin line)
and the proposed test (solid thick line: 1 step, dashed line: 100 steps).
Fig. 6. Test duration t versus phase-noise standard deviation . for the Fig. 8. Uncertainty limit of the transition levels (B ) as a function of the ADC
proposed test (solid line: 1 step, dashed line: 100 steps). number of bits n .: standard test (thin line) and proposed test (1 step: thick solid
line; 100 steps: thick dashed line).
Fig. 7. Test duration t versus required uncertainty B , for the standard (thin
line) and the proposed test (thick line). Fig. 9. Uncertainty limit of the transition levels (B ) as a function of the
standard deviation of the input-equivalent noise in least-significant bit units
(LSB): Standard test (thin line): proposed test with 1 step (thick solid line) and
100 steps (thick dashed line).
In the proposed test, from (12) the uncertainty of the transition
levels is
B. Input-Equivalent Noise
In Fig. 9, the uncertainty is plotted as a function of the
(17)
input-equivalent noise standard deviation for both tests.
Also, here, the uncertainty of the transition levels obtained
with the standard test is greater. Furthermore, the uncertainty is
where is determined from (13)
greater the higher the number of steps used.
TABLE I
STANDARD TEST
TABLE II
PROPOSED TEST
Fig. 11. Difference 1INL between the INL obtained by the proposed (80
steps) and the standard test.
TABLE III
EFFICIENCY COMPARISON
[15] G. Chiorboli and C. Morandi, “About the number of records to be Pasquale Arpaia, photograph and biography not available at the time of
acquired for histogram testing of A/D converters using synchronous publication.
sinewave and clock generators,” in Proc. 4th Workshop ADC Modeling
Testing, Bordeaux, France, Sept. 1999, pp. 182–186.
António M. da Cruz Serra, photograph and biography not available at the time
of publication.
Francisco Alegria, photograph and biography not available at the time of Pasquale Daponte, photograph and biography not available at the time of
publication. publication.