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Dveloppement de FPGA avec Quartus II sur DE2

Carte DE2 :
Lancer Quartus II

File->New Project Wizard


Next>
o Working Directory MesDocuments
o Name of Project test
o Next>
Add files
o Next>
Device Settings
o Family : Cyclone II
o Name : EP2C35F672C6
o Next>
EDA Tools Settings
o Design Entry : Design Compiler / VHDL
o Simulation : ModelSim-Altera / VHDL
o Timing : Custom / VHDL
o Next>
Finish

File->New
Design Files : Block Diagram / Schematic File
OK

Le fichier Block1.bdf (zone de dessin) est cr.

Dans la zone de dessin :


Click-droit
o Insert
Symbol
Name : input
Placer la patte dentre
Faire de mme pour placer une output.
Dupliquer la patte dentre (avec CTRL-dplacer)
Placer une porte ET 2 entres (and2)
Relier les 2 entres et la sortie la porte.
Double cliquer sur les pattes pour modifier leur nom (par exemple A, B et ET) et leur proprits.

Enregistrer le fichier (cliquer sur licne Save)


Nom propos : Test(.bdf)
OK

Lancer la compilation avec :


Processing->Compiler Tool
ou
Cliquer sur licne Start Compilation

Observer le rsultat de compilation (Compilation Report ).

Affectation des pattes sur le FPGA :


Sur la carte dapplication DE2, on connecte les deux entres du ET sur SW0 et SW1(N25 et N26), et la sortie sur LEDG0
(Led verte 0, AE22) :
Assignments->Assignment Editor
o Category : Pin
o Edit :
Colonne To : double-cliquer Choisir la 1re patte dentre
Colonne Location : double-cliquer Choisir PIN_N25 (ou taper N25)

2me patte dentre : N26


Patte de sortie : AE22
o Fermer la boite de dialogue (enregistrer les modifications).

Recompiler le projet.

Crer un nouveau Block Diagram / Schematic File


Faire un additionneur binaire avec retenue.
XOR

A INPUT OUTPUT SOM


VCC
inst

AND2
B INPUT
VCC OUTPUT RET

inst3

Enregistrer sous : Additionneur2.bdf

File->Create/update->Create Symbol Files for Current File


o Enregistrer Additionneur2.bsf
Fermer la fentre Additionneur2.gdf

Revenir la fentre Test.gdf


Insrer le symbole Additionneur2 :
Click-droit
o Insert
Symbol
Additionneur2 (dans Project)

Relier les entres de ladditionneur aux entres du ET


Tirer une ligne depuis A
o Click-droit : Properties
Name : nom du signal dentre (A)
A INPUT
VCC AND2
PIN_N25 OUTPUT ET

inst PIN_AE22
B INPUT
VCC
PIN_N26
Additionneur2
A
OUTPUT SOM
B A SOM
OUTPUT RET
B RET

inst1

Connecter SOM sur LEDR0 et RET sur LEDR1 (avec Assignments->Assignment Editor)

Recompiler.

Le brochage du FPGA de la DE2 peut tre import partir du fichier DE2_pin_assignments.csv :


Assignments > Import Assignments
o File : DE2_pin_assignments.csv

SW[0] PIN_N25 HEX2[2] PIN_AC25 SRAM_ADDR[15] PIN_Y10 AUD_ADCLRCK PIN_C5


SW[1] PIN_N26 HEX2[3] PIN_AC26 SRAM_ADDR[16] PIN_AB8 AUD_ADCDAT PIN_B5
SW[2] PIN_P25 HEX2[4] PIN_AB26 SRAM_ADDR[17] PIN_AC8 AUD_DACLRCK PIN_C6
SW[3] PIN_AE14 HEX2[5] PIN_AB25 SRAM_DQ[0] PIN_AD8 AUD_DACDAT PIN_A4
SW[4] PIN_AF14 HEX2[6] PIN_Y24 SRAM_DQ[1] PIN_AE6 AUD_XCK PIN_A5
SW[5] PIN_AD13 HEX3[0] PIN_Y23 SRAM_DQ[2] PIN_AF6 AUD_BCLK PIN_B4
SW[6] PIN_AC13 HEX3[1] PIN_AA25 SRAM_DQ[3] PIN_AA9 ENET_DATA[0] PIN_D17
SW[7] PIN_C13 HEX3[2] PIN_AA26 SRAM_DQ[4] PIN_AA10 ENET_DATA[1] PIN_C17
SW[8] PIN_B13 HEX3[3] PIN_Y26 SRAM_DQ[5] PIN_AB10 ENET_DATA[2] PIN_B18
SW[9] PIN_A13 HEX3[4] PIN_Y25 SRAM_DQ[6] PIN_AA11 ENET_DATA[3] PIN_A18
SW[10] PIN_N1 HEX3[5] PIN_U22 SRAM_DQ[7] PIN_Y11 ENET_DATA[4] PIN_B17
SW[11] PIN_P1 HEX3[6] PIN_W24 SRAM_DQ[8] PIN_AE7 ENET_DATA[5] PIN_A17
SW[12] PIN_P2 HEX4[0] PIN_U9 SRAM_DQ[9] PIN_AF7 ENET_DATA[6] PIN_B16
SW[13] PIN_T7 HEX4[1] PIN_U1 SRAM_DQ[10] PIN_AE8 ENET_DATA[7] PIN_B15
SW[14] PIN_U3 HEX4[2] PIN_U2 SRAM_DQ[11] PIN_AF8 ENET_DATA[8] PIN_B20
SW[15] PIN_U4 HEX4[3] PIN_T4 SRAM_DQ[12] PIN_W11 ENET_DATA[9] PIN_A20
SW[16] PIN_V1 HEX4[4] PIN_R7 SRAM_DQ[13] PIN_W12 ENET_DATA[10] PIN_C19
SW[17] PIN_V2 HEX4[5] PIN_R6 SRAM_DQ[14] PIN_AC9 ENET_DATA[11] PIN_D19
DRAM_ADDR[0] PIN_T6 HEX4[6] PIN_T3 SRAM_DQ[15] PIN_AC10 ENET_DATA[12] PIN_B19
DRAM_ADDR[1] PIN_V4 HEX5[0] PIN_T2 SRAM_WE_N PIN_AE10 ENET_DATA[13] PIN_A19
DRAM_ADDR[2] PIN_V3 HEX5[1] PIN_P6 SRAM_OE_N PIN_AD10 ENET_DATA[14] PIN_E18
DRAM_ADDR[3] PIN_W2 HEX5[2] PIN_P7 SRAM_UB_N PIN_AF9 ENET_DATA[15] PIN_D18
DRAM_ADDR[4] PIN_W1 HEX5[3] PIN_T9 SRAM_LB_N PIN_AE9 ENET_CLK PIN_B24
DRAM_ADDR[5] PIN_U6 HEX5[4] PIN_R5 SRAM_CE_N PIN_AC11 ENET_CMD PIN_A21
DRAM_ADDR[6] PIN_U7 HEX5[5] PIN_R4 OTG_ADDR[0] PIN_K7 ENET_CS_N PIN_A23
DRAM_ADDR[7] PIN_U5 HEX5[6] PIN_R3 OTG_ADDR[1] PIN_F2 ENET_INT PIN_B21
DRAM_ADDR[8] PIN_W4 HEX6[0] PIN_R2 OTG_CS_N PIN_F1 ENET_RD_N PIN_A22
DRAM_ADDR[9] PIN_W3 HEX6[1] PIN_P4 OTG_RD_N PIN_G2 ENET_WR_N PIN_B22
DRAM_ADDR[10] PIN_Y1 HEX6[2] PIN_P3 OTG_WR_N PIN_G1 ENET_RST_N PIN_B23
DRAM_ADDR[11] PIN_V5 HEX6[3] PIN_M2 OTG_RST_N PIN_G5 IRDA_TXD PIN_AE24
DRAM_BA_0 PIN_AE2 HEX6[4] PIN_M3 OTG_DATA[0] PIN_F4 IRDA_RXD PIN_AE25
DRAM_BA_1 PIN_AE3 HEX6[5] PIN_M5 OTG_DATA[1] PIN_D2 SD_DAT PIN_AD24
DRAM_CAS_N PIN_AB3 HEX6[6] PIN_M4 OTG_DATA[2] PIN_D1 SD_DAT3 PIN_AC23
DRAM_CKE PIN_AA6 HEX7[0] PIN_L3 OTG_DATA[3] PIN_F7 SD_CMD PIN_Y21
DRAM_CLK PIN_AA7 HEX7[1] PIN_L2 OTG_DATA[4] PIN_J5 SD_CLK PIN_AD25
DRAM_CS_N PIN_AC3 HEX7[2] PIN_L9 OTG_DATA[5] PIN_J8 GPIO_0[0] PIN_D25
DRAM_DQ[0] PIN_V6 HEX7[3] PIN_L6 OTG_DATA[6] PIN_J7 GPIO_0[1] PIN_J22
DRAM_DQ[1] PIN_AA2 HEX7[4] PIN_L7 OTG_DATA[7] PIN_H6 GPIO_0[2] PIN_E26
DRAM_DQ[2] PIN_AA1 HEX7[5] PIN_P9 OTG_DATA[8] PIN_E2 GPIO_0[3] PIN_E25
DRAM_DQ[3] PIN_Y3 HEX7[6] PIN_N9 OTG_DATA[9] PIN_E1 GPIO_0[4] PIN_F24
DRAM_DQ[4] PIN_Y4 KEY[0] PIN_G26 OTG_DATA[10] PIN_K6 GPIO_0[5] PIN_F23
DRAM_DQ[5] PIN_R8 KEY[1] PIN_N23 OTG_DATA[11] PIN_K5 GPIO_0[6] PIN_J21
DRAM_DQ[6] PIN_T8 KEY[2] PIN_P23 OTG_DATA[12] PIN_G4 GPIO_0[7] PIN_J20
DRAM_DQ[7] PIN_V7 KEY[3] PIN_W26 OTG_DATA[13] PIN_G3 GPIO_0[8] PIN_F25
DRAM_DQ[8] PIN_W6 LEDR[0] PIN_AE23 OTG_DATA[14] PIN_J6 GPIO_0[9] PIN_F26
DRAM_DQ[9] PIN_AB2 LEDR[1] PIN_AF23 OTG_DATA[15] PIN_K8 GPIO_0[10] PIN_N18
DRAM_DQ[10] PIN_AB1 LEDR[2] PIN_AB21 OTG_INT0 PIN_B3 GPIO_0[11] PIN_P18
DRAM_DQ[11] PIN_AA4 LEDR[3] PIN_AC22 OTG_INT1 PIN_C3 GPIO_0[12] PIN_G23
DRAM_DQ[12] PIN_AA3 LEDR[4] PIN_AD22 OTG_DACK0_N PIN_C2 GPIO_0[13] PIN_G24
DRAM_DQ[13] PIN_AC2 LEDR[5] PIN_AD23 OTG_DACK1_N PIN_B2 GPIO_0[14] PIN_K22
DRAM_DQ[14] PIN_AC1 LEDR[6] PIN_AD21 OTG_DREQ0 PIN_F6 GPIO_0[15] PIN_G25
DRAM_DQ[15] PIN_AA5 LEDR[7] PIN_AC21 OTG_DREQ1 PIN_E5 GPIO_0[16] PIN_H23
DRAM_LDQM PIN_AD2 LEDR[8] PIN_AA14 OTG_FSPEED PIN_F3 GPIO_0[17] PIN_H24
DRAM_UDQM PIN_Y5 LEDR[9] PIN_Y13 OTG_LSPEED PIN_G6 GPIO_0[18] PIN_J23
DRAM_RAS_N PIN_AB4 LEDR[10] PIN_AA13 TDI PIN_B14 GPIO_0[19] PIN_J24
DRAM_WE_N PIN_AD3 LEDR[11] PIN_AC14 TCS PIN_A14 GPIO_0[20] PIN_H25
FL_ADDR[0] PIN_AC18 LEDR[12] PIN_AD15 TCK PIN_D14 GPIO_0[21] PIN_H26
FL_ADDR[1] PIN_AB18 LEDR[13] PIN_AE15 TDO PIN_F14 GPIO_0[22] PIN_H19
FL_ADDR[2] PIN_AE19 LEDR[14] PIN_AF13 TD_RESET PIN_C4 GPIO_0[23] PIN_K18
FL_ADDR[3] PIN_AF19 LEDR[15] PIN_AE13 VGA_R[0] PIN_C8 GPIO_0[24] PIN_K19
FL_ADDR[4] PIN_AE18 LEDR[16] PIN_AE12 VGA_R[1] PIN_F10 GPIO_0[25] PIN_K21
FL_ADDR[5] PIN_AF18 LEDR[17] PIN_AD12 VGA_R[2] PIN_G10 GPIO_0[26] PIN_K23
FL_ADDR[6] PIN_Y16 LEDG[0] PIN_AE22 VGA_R[3] PIN_D9 GPIO_0[27] PIN_K24
FL_ADDR[7] PIN_AA16 LEDG[1] PIN_AF22 VGA_R[4] PIN_C9 GPIO_0[28] PIN_L21
FL_ADDR[8] PIN_AD17 LEDG[2] PIN_W19 VGA_R[5] PIN_A8 GPIO_0[29] PIN_L20
FL_ADDR[9] PIN_AC17 LEDG[3] PIN_V18 VGA_R[6] PIN_H11 GPIO_0[30] PIN_J25
FL_ADDR[10] PIN_AE17 LEDG[4] PIN_U18 VGA_R[7] PIN_H12 GPIO_0[31] PIN_J26
FL_ADDR[11] PIN_AF17 LEDG[5] PIN_U17 VGA_R[8] PIN_F11 GPIO_0[32] PIN_L23
FL_ADDR[12] PIN_W16 LEDG[6] PIN_AA20 VGA_R[9] PIN_E10 GPIO_0[33] PIN_L24
FL_ADDR[13] PIN_W15 LEDG[7] PIN_Y18 VGA_G[0] PIN_B9 GPIO_0[34] PIN_L25
FL_ADDR[14] PIN_AC16 LEDG[8] PIN_Y12 VGA_G[1] PIN_A9 GPIO_0[35] PIN_L19
FL_ADDR[15] PIN_AD16 CLOCK_27 PIN_D13 VGA_G[2] PIN_C10 GPIO_1[0] PIN_K25
FL_ADDR[16] PIN_AE16 CLOCK_50 PIN_N2 VGA_G[3] PIN_D10 GPIO_1[1] PIN_K26
FL_ADDR[17] PIN_AC15 EXT_CLOCK PIN_P26 VGA_G[4] PIN_B10 GPIO_1[2] PIN_M22
FL_ADDR[18] PIN_AB15 PS2_CLK PIN_D26 VGA_G[5] PIN_A10 GPIO_1[3] PIN_M23
FL_ADDR[19] PIN_AA15 PS2_DAT PIN_C24 VGA_G[6] PIN_G11 GPIO_1[4] PIN_M19
FL_ADDR[20] PIN_Y15 UART_RXD PIN_C25 VGA_G[7] PIN_D11 GPIO_1[5] PIN_M20
FL_ADDR[21] PIN_Y14 UART_TXD PIN_B25 VGA_G[8] PIN_E12 GPIO_1[6] PIN_N20
FL_CE_N PIN_V17 LCD_RW PIN_K4 VGA_G[9] PIN_D12 GPIO_1[7] PIN_M21
FL_OE_N PIN_W17 LCD_EN PIN_K3 VGA_B[0] PIN_J13 GPIO_1[8] PIN_M24
FL_DQ[0] PIN_AD19 LCD_RS PIN_K1 VGA_B[1] PIN_J14 GPIO_1[9] PIN_M25
FL_DQ[1] PIN_AC19 LCD_DATA[0] PIN_J1 VGA_B[2] PIN_F12 GPIO_1[10] PIN_N24
FL_DQ[2] PIN_AF20 LCD_DATA[1] PIN_J2 VGA_B[3] PIN_G12 GPIO_1[11] PIN_P24
FL_DQ[3] PIN_AE20 LCD_DATA[2] PIN_H1 VGA_B[4] PIN_J10 GPIO_1[12] PIN_R25
FL_DQ[4] PIN_AB20 LCD_DATA[3] PIN_H2 VGA_B[5] PIN_J11 GPIO_1[13] PIN_R24
FL_DQ[5] PIN_AC20 LCD_DATA[4] PIN_J4 VGA_B[6] PIN_C11 GPIO_1[14] PIN_R20
FL_DQ[6] PIN_AF21 LCD_DATA[5] PIN_J3 VGA_B[7] PIN_B11 GPIO_1[15] PIN_T22
FL_DQ[7] PIN_AE21 LCD_DATA[6] PIN_H4 VGA_B[8] PIN_C12 GPIO_1[16] PIN_T23
FL_RST_N PIN_AA18 LCD_DATA[7] PIN_H3 VGA_B[9] PIN_B12 GPIO_1[17] PIN_T24
FL_WE_N PIN_AA17 LCD_ON PIN_L4 VGA_CLK PIN_B8 GPIO_1[18] PIN_T25
HEX0[0] PIN_AF10 LCD_BLON PIN_K2 VGA_BLANK PIN_D6 GPIO_1[19] PIN_T18
HEX0[1] PIN_AB12 SRAM_ADDR[0] PIN_AE4 VGA_HS PIN_A7 GPIO_1[20] PIN_T21
HEX0[2] PIN_AC12 SRAM_ADDR[1] PIN_AF4 VGA_VS PIN_D8 GPIO_1[21] PIN_T20
HEX0[3] PIN_AD11 SRAM_ADDR[2] PIN_AC5 VGA_SYNC PIN_B7 GPIO_1[22] PIN_U26
HEX0[4] PIN_AE11 SRAM_ADDR[3] PIN_AC6 I2C_SCLK PIN_A6 GPIO_1[23] PIN_U25
HEX0[5] PIN_V14 SRAM_ADDR[4] PIN_AD4 I2C_SDAT PIN_B6 GPIO_1[24] PIN_U23
HEX0[6] PIN_V13 SRAM_ADDR[5] PIN_AD5 TD_DATA[0] PIN_J9 GPIO_1[25] PIN_U24
HEX1[0] PIN_V20 SRAM_ADDR[6] PIN_AE5 TD_DATA[1] PIN_E8 GPIO_1[26] PIN_R19
HEX1[1] PIN_V21 SRAM_ADDR[7] PIN_AF5 TD_DATA[2] PIN_H8 GPIO_1[27] PIN_T19
HEX1[2] PIN_W21 SRAM_ADDR[8] PIN_AD6 TD_DATA[3] PIN_H10 GPIO_1[28] PIN_U20
HEX1[3] PIN_Y22 SRAM_ADDR[9] PIN_AD7 TD_DATA[4] PIN_G9 GPIO_1[29] PIN_U21
HEX1[4] PIN_AA24 SRAM_ADDR[10] PIN_V10 TD_DATA[5] PIN_F9 GPIO_1[30] PIN_V26
HEX1[5] PIN_AA23 SRAM_ADDR[11] PIN_V9 TD_DATA[6] PIN_D7 GPIO_1[31] PIN_V25
HEX1[6] PIN_AB24 SRAM_ADDR[12] PIN_AC7 TD_DATA[7] PIN_C7 GPIO_1[32] PIN_V24
HEX2[0] PIN_AB23 SRAM_ADDR[13] PIN_W8 TD_HS PIN_D5 GPIO_1[33] PIN_V23
HEX2[1] PIN_V22 SRAM_ADDR[14] PIN_W10 TD_VS PIN_K9 GPIO_1[34] PIN_W25
GPIO_1[35] PIN_W23
Simulation :
Crer un fichier de vecteurs de test :
File->New->Vector Waveform File
o OK
Enregistrer le fichier (Test.vwf)

Dure de la simulation :
Par dfaut : 1s
Pour la modifier :
Edit->End Time

Grille de simulation :
Par dfaut : 10 ns
Pour la modifier :
Edit->Grid Size

Saisie des signaux :


Edit->Insert->Insert Node or Bus
o Node Finder
Filter : Pins : all
List
Double cliquer sur les signaux utiliser
OK
o OK

Slectionner des zones de signaux et mettre aux niveaux souhaits.

Simulation fonctionnelle :
Assignments
o Settings
Simulator Settings
Simulation mode : Functional
OK
Processing->Generate Functional Simulation Netlist

Lancement de la simulation :
Processing->Start Simulation ou cliquer sur

Simulation complte :
Assignments
o Settings
Simulator Settings
Simulation mode : Timing
OK

Lancement de la simulation :
Processing->Start Simulation ou cliquer sur

Programmation :
Sur la DE2, mettre le switch RUN/PROG sur RUN.
Mettre la DE2 en marche (bouton rouge appuy)
Tools->Programmer ou cliquer sur
o Hardware Setup (si USB-Blaster nest pas prsent)
Choisir USB-Blaster
Close
o Start
Carte cible : DE2

Switches
Signal Name FPGA Pin No. Description
SW[0] PIN_N25 Toggle Switch[0]
SW[1] PIN_N26 Toggle Switch[1]
SW[2] PIN_P25 Toggle Switch[2]
SW[3] PIN_AE14 Toggle Switch[3]
SW[4] PIN_AF14 Toggle Switch[4]
SW[5] PIN_AD13 Toggle Switch[5]
SW[6] PIN_AC13 Toggle Switch[6]
SW[7] PIN_C13 Toggle Switch[7]
SW[8] PIN_B13 Toggle Switch[8]
SW[9] PIN_A13 Toggle Switch[9]
SW[10] PIN_N1 Toggle Switch[10]
SW[11] PIN_P1 Toggle Switch[11]
SW[12] PIN_P2 Toggle Switch[12]
SW[13] PIN_T7 Toggle Switch[13]
SW[14] PIN_U3 Toggle Switch[14]
SW[15] PIN_U4 Toggle Switch[15]
SW[16] PIN_V1 Toggle Switch[16]
SW[17] PIN_V2 Toggle Switch[17]

Pushbuttons
Signal Name FPGA Pin No. Description
KEY[0] PIN_G26 Pushbutton[0]
KEY[1] PIN_N23 Pushbutton[1]
KEY[2] PIN_P23 Pushbutton[2]
KEY[3] PIN_W26 Pushbutton[3]
LEDs
Signal Name FPGA Pin No. Description
LEDR[0] PIN_AE23 LED Red[0]
LEDR[1] PIN_AF23 LED Red[1]
LEDR[2] PIN_AB21 LED Red[2]
LEDR[3] PIN_AC22 LED Red[3]
LEDR[4] PIN_AD22 LED Red[4]
LEDR[5] PIN_AD23 LED Red[5]
LEDR[6] PIN_AD21 LED Red[6]
LEDR[7] PIN_AC21 LED Red[7]
LEDR[8] PIN_AA14 LED Red[8]
LEDR[9] PIN_Y13 LED Red[9]
LEDR[10] PIN_AA13 LED Red[10]
LEDR[11] PIN_AC14 LED Red[11]
LEDR[12] PIN_AD15 LED Red[12]
LEDR[13] PIN_AE15 LED Red[13]
LEDR[14] PIN_AF13 LED Red[14]
LEDR[15] PIN_AE13 LED Red[15]
LEDR[16] PIN_AE12 LED Red[16]
LEDR[17] PIN_AD12 LED Red[17]
LEDG[0] PIN_AE22 LED Green[0]
LEDG[1] PIN_AF22 LED Green[1]
LEDG[2] PIN_W19 LED Green[2]
LEDG[3] PIN_V18 LED Green[3]
LEDG[4] PIN_U18 LED Green[4]
LEDG[5] PIN_U17 LED Green[5]
LEDG[6] PIN_AA20 LED Green[6]
LEDG[7] PIN_Y18 LED Green[7]
LEDG[8] PIN_Y12 LED Green[8]

7 Segments Displays
Signal Name FPGA Pin No. Description
HEX0[0] PIN_AF10 Seven Segment Digit 0[0]
HEX0[1] PIN_AB12 Seven Segment Digit 0[1]
HEX0[2] PIN_AC12 Seven Segment Digit 0[2]
HEX0[3] PIN_AD11 Seven Segment Digit 0[3]
HEX0[4] PIN_AE11 Seven Segment Digit 0[4]
HEX0[5] PIN_V14 Seven Segment Digit 0[5]
HEX0[6] PIN_V13 Seven Segment Digit 0[6]
HEX1[0] PIN_V20 Seven Segment Digit 1[0]
HEX1[1] PIN_V21 Seven Segment Digit 1[1]
HEX1[2] PIN_W21 Seven Segment Digit 1[2]
HEX1[3] PIN_Y22 Seven Segment Digit 1[3]
HEX1[4] PIN_AA24 Seven Segment Digit 1[4]
HEX1[5] PIN_AA23 Seven Segment Digit 1[5]
HEX1[6] PIN_AB24 Seven Segment Digit 1[6]
HEX2[0] PIN_AB23 Seven Segment Digit 2[0]
HEX2[1] PIN_V22 Seven Segment Digit 2[1]
HEX2[2] PIN_AC25 Seven Segment Digit 2[2]
HEX2[3] PIN_AC26 Seven Segment Digit 2[3]
HEX2[4] PIN_AB26 Seven Segment Digit 2[4]
HEX2[5] PIN_AB25 Seven Segment Digit 2[5]
HEX2[6] PIN_Y24 Seven Segment Digit 2[6]
HEX3[0] PIN_Y23 Seven Segment Digit 3[0]
HEX3[1] PIN_AA25 Seven Segment Digit 3[1]
HEX3[2] PIN_AA26 Seven Segment Digit 3[2]
HEX3[3] PIN_Y26 Seven Segment Digit 3[3]
HEX3[4] PIN_Y25 Seven Segment Digit 3[4]
HEX3[5] PIN_U22 Seven Segment Digit 3[5]
HEX3[6] PIN_W24 Seven Segment Digit 3[6]
HEX4[0] PIN_U9 Seven Segment Digit 4[0]
HEX4[1] PIN_U1 Seven Segment Digit 4[1]
HEX4[2] PIN_U2 Seven Segment Digit 4[2]
HEX4[3] PIN_T4 Seven Segment Digit 4[3]
HEX4[4] PIN_R7 Seven Segment Digit 4[4]
HEX4[5] PIN_R6 Seven Segment Digit 4[5]
HEX4[6] PIN_T3 Seven Segment Digit 4[6]
HEX5[0] PIN_T2 Seven Segment Digit 5[0]
HEX5[1] PIN_P6 Seven Segment Digit 5[1]
HEX5[2] PIN_P7 Seven Segment Digit 5[2]
HEX5[3] PIN_T9 Seven Segment Digit 5[3]
HEX5[4] PIN_R5 Seven Segment Digit 5[4]
HEX5[5] PIN_R4 Seven Segment Digit 5[5]
HEX5[6] PIN_R3 Seven Segment Digit 5[6]
HEX6[0] PIN_R2 Seven Segment Digit 6[0]
HEX6[1] PIN_P4 Seven Segment Digit 6[1]
HEX6[2] PIN_P3 Seven Segment Digit 6[2]
HEX6[3] PIN_M2 Seven Segment Digit 6[3]
HEX6[4] PIN_M3 Seven Segment Digit 6[4]
HEX6[5] PIN_M5 Seven Segment Digit 6[5]
HEX6[6] PIN_M4 Seven Segment Digit 6[6]
HEX7[0] PIN_L3 Seven Segment Digit 7[0]
HEX7[1] PIN_L2 Seven Segment Digit 7[1]
HEX7[2] PIN_L9 Seven Segment Digit 7[2]
HEX7[3] PIN_L6 Seven Segment Digit 7[3]
HEX7[4] PIN_L7 Seven Segment Digit 7[4]
HEX7[5] PIN_P9 Seven Segment Digit 7[5]
HEX7[6] PIN_N9 Seven Segment Digit 7[6]

Clocks
Signal Name FPGA Pin No. Description
CLOCK_27 PIN_D13 27 MHz clock input
CLOCK_50 PIN_N2 50 MHz clock input
EXT_CLOCK PIN_P26 External (SMA) clock input
LCD module
Signal Name FPGA Pin No. Description
LCD_DATA[0] PIN_J1 LCD Data[0]
LCD_DATA[1] PIN_J2 LCD Data[1]
LCD_DATA[2] PIN_H1 LCD Data[2]
LCD_DATA[3] PIN_H2 LCD Data[3]
LCD_DATA[4] PIN_J4 LCD Data[4]
LCD_DATA[5] PIN_J3 LCD Data[5]
LCD_DATA[6] PIN_H4 LCD Data[6]
LCD_DATA[7] PIN_H3 LCD Data[7]
LCD_RW PIN_K4 LCD Read/Write Select, 0 = Write, 1 = Read
LCD_EN PIN_K3 LCD Enable
LCD_RS PIN_K1 LCD Command/Data Select, 0 = Command, 1 = Data
LCD_ON PIN_L4 LCD Power ON/OFF
LCD_BLON PIN_K2 LCD Back Light ON/OFF

VHDL : Convertisseur Binaire/7 segments


LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY Aff7Seg IS
PORT ( BIN : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
SEG : OUT STD_LOGIC_VECTOR(0 TO 6));
END Aff7Seg;

ARCHITECTURE Behavior OF Aff7Seg IS


BEGIN
with BIN select
SEG<=not("1111110") when "0000",
not("0110000") when "0001",
not("1101101") when "0010",
not("1111001") when "0011",
not("0110011") when "0100",
not("1011011") when "0101",
not("1011111") when "0110",
not("1110000") when "0111",
not("1111111") when "1000",
not("1111011") when "1001",
not("0000000") when others;

END Behavior;