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The different BJT families discussed in the following chapters are presented in essentially chronological order. About every five years, a new BJT logic sub- family was introduced starting with RTL in 1962. Subsequent models (DTL, TTL, STIL, ....) are im- provements of previous sub-families with the same general TTL super-circuitry discussed in section 4.3. ‘The logic family presented in this chapter is re- sistor-transistor logic (RTL). As the name implies, cir- cuits of the Resistor-Transistor logic family are con- structed from resistors and transistors (BJTs). RTL was the first logic family to become commercially available. Inverters (NOT), non-inverters (buffers), NOR, NAND, OR, and AND gates can all be con- structed with RTL logic. In addition, low-, medium-, and high-power versions of the various RTL gates were obtained by varying the magnitudes of the re- sistors. Large resistors are used for low power ap- plications and small resistors for high power. 5.1 BASIC RTL INVERTER Figure 5.1 shows the basic RTL inverter and its volt- age transfer characteristic. This is the simple BJT in- verter presented and analyzed in section 4.2. The ctitical voltages are Vou foc Vi. = Vae(FA) Vou = Vee(SAT) Vin = Vee (SAT) + Yee =VeelSAT) BrRe The following sections show that NOR and NAND gates can be constructed by adding additional tran- sistors and base resistors. Later in the chapter, a non- inverting RTL circuit will be presented along with 56 RESISTOR- TRANSISTOR LOGIC [RTL] modifications that realize AND and OR gates. Im- provements in RTL design along with analyses for determination of maximum fan-out and power dis- sipation are also presented. 5.2 BASIC RTL NOR GATE Figure 5.2 shows an RTL configuration of parallel (ideally matched) BJTs and base resistors using a common collector resistor. For this circuit, the cur- rent through the single collector resistor is the sum of the BJT collector currents and is given by D les The output voltage is then Vour = Vee ~ IncRe This circuit is in fact a NOR gate, as can be seen by examining various combinations of input voltage lev- els with corresponding output as in the following sub-sections. | All Inputs Low If all inputs V;, V2, ..., and V,, are less than Vag(FA), then all BJTs are cutoff. As a result, Ipc = 0 and the output voltage is Vou = Voc Any Input High If any input is greater than or equal to Vir(FA), the corresponding BJT conducts collector current and the resulting output is less than Vcc. If any input reaches Vat (from Chapter 4) the corresponding BIT enters satutation and the output drops to Vou = Vee(SAT) (all inputs low) (for input high)

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