10-600MHz 120W Amplifier PDF

AN10953
BLF645 10 MHz to 600 MHz 120 W amplifier

Rev. 1 3 March 2011 Application note
Document information
Info Content
Keywords BLF645, broadband
Abstract The BLF645 is a 100 W, 32 V LDMOS RF power push-pull transistor for
broadcast transmitter and industrial applications from HF to 1.4 GHz. This
application note describes a broadband amplifier that delivers more than
100 W from 10 MHz to 600 MHz.
NXP Semiconductors AN10953
Revision history
Rev Date Description
v.1 20110303 initial version
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
Application note Rev. 1 3 March 2011 2 of 19

1. Introduction
The BLF645 is a 100 W LDMOS RF power push-pull transistor for broadcast transmitter
and industrial applications in the HF to 1.4 GHz frequency range. This application note
describes a broadband amplifier which delivers more than 100 W from 10 MHz to
600 MHz.
019aaa994
Fig 1. BLF645 10 MHz to 600 MHz amplifier

2. Test summary
The RF performance described in Section 3 may be summarized as follows:
Table 1. Summary of RF performance

Item Performance
Specified frequency range 10 MHz to 512 MHz
Specified drain voltage 28 V
Quiescent drain current 1A
Input return loss 5 dB; 15 dB typical
Peak CW power 100 W; 120 W typical
Gain 22.5 dB
Gain flatness 1.8 dB
Efficiency at 100 W 50 %
Efficiency flatness at 100 W 12 %
IMD3 at 100 W PEP 30 dBc typical

3. RF Performance
3.1 1-Tone CW
019aaa995
200
PL(M)
(W)
160
(1)
120 (2)
80
40
0
10 102 103
f (MHz)
IDq = 1.0 A
(1) VDS = 32 V
(2) VDS = 28 V
Fig 2. Peak output power at 3 dB compression as a function of frequency
019aaa996
30
Gp
(dB) (1)
26
(2)
22
18
14
10 102 103
f (MHz)
VDS = 28 V; Pi = 10 dBm
(1) IDq = 4.0 A
(2) IDq = 1.0 A
Fig 3. Small-signal power gain as a function of frequency

019aaa997
25 25
G
(dB) (%)
23 (1) 20
(2)
21 15
(3)
(4)
19 10
17 5
15 0
10 102 103
f (MHz)
IDq = 1.0 A; PL = 10 W
(1) gain; VDS = 32 V
(3) efficiency; VDS = 28 V
Fig 4. Gain and efficiency as a function of frequency
019aaa998
25 80
G
(dB) (%)
23 70
(1)
21 (2) 60
19 50
(3)
(4)
17 40
15 30
10 102 103
f (MHz)
IDq = 1.0 A; PL = 100 W

Fig 5. Gain and efficiency as a function of frequency

019aaa999
24 70
G
(dB) (%)
(1)
22 (2) 50
(3)
20 30
(4)
(5)
(6)
18 10
0 40 80 120 160
PL (W)
VDS = 28 V; IDq = 1.0 A

(1) gain; f = 20 MHz
(2) gain; f = 100 MHz
(3) gain; f = 500 MHz
(4) efficiency; f = 20 MHz
Fig 6. Gain and drain efficiency as a function of output power

019aab000
24 70
G
(dB) (%)
(1)
22 (2) 50
(3)
20 30
(4)
(5)
(6)
18 10
0 40 80 120 160 200
PL (W)
VDS = 32 V; IDq = 1.0 A

(2) gain; f = 100 MHz
(3) gain; f = 500 MHz
Fig 7. Gain and drain efficiency as a function of output power
019aab001
0
IRL
(dB)
5
10
15
20
25
10 102 103
f (MHz)
VDS = 28 V; Pi = 10 dBm; IDq = 1.0 A

Fig 8. Input return loss as a function of frequency

019aab002
0
(2)
IMD
(dBc)
20
(3)
40
(1)
60
80
10 102 103
f (MHz)
VDS = 50 V; Pi = 10 dBm; IDq = 0.9 A; PL = 100 W

(1) 2nd harmonic level
(2) 3rd harmonic level
(3) system test floor
Fig 9. 2nd and 3rd harmonic levels
Note that the measured 2nd harmonic levels are at the system test limit, so the actual
levels may be significantly lower.

3.2 2-Tone CW
019aab003
24 70
G
(dB) (%)
(1)
(2)
22 (3)
50
(4)
20 (5) 30
(6)
18 10
0 40 80 120 160 200
PL (W)
VD = 28 V; IDq = 1.0 A; f = 100 kHz

(2) gain; f = 100 MHz
(3) gain; f = 500 MHz
Fig 10. 2-tone power gain and efficiency as a function of output power

019aab004
0
IMD3
(dBc)
(7)
20 (8)
(4) (9)
(5)
(6)
40
(1)
(2)
(3)
60
38 42 46 50 54
PL (dBm)
VD = 28 V; f = 100 kHz
(1) IDq = 1.0 A; f = 20 MHz
(2) IDq = 1.0 A; f = 100 MHz
(3) IDq = 1.0 A; f = 500 MHz
(4) IDq = 2.0 A; f = 20 MHz
(5) IDq = 2.0 A; f = 100 MHz
(6) IDq = 2.0 A; f = 500 MHz
(7) IDq = 4.0 A; f = 20 MHz
(8) IDq = 4.0 A; f = 100 MHz
(9) IDq = 4.0 A; f = 500 MHz
Fig 11. 3rd order intermodulation distortion as a function of output power

3.3 Alternative input matching

It is possible to improve input return loss at high frequencies by matching the input with a
9:1 transformer constructed with 18 cable, as illustrated in Figure 12. However, this has
the undesired effect of reducing gain flatness and low-frequency gain, so it was not used
in the design described in this application note.
019aab005
Fig 12. 9:1 input transformer

019aab006
0
IRL
(dB)
5
(1)
10
15
(2)
20
25
10 102 103
f (MHz)
VD = 28 V; IDq= 1.0 A; Pi = 10 dBm

(1) 9:1 input transformer
Fig 13. Input return loss as a function of frequency
019aab007
28
G
(dB)
(2)
24
(1)
20
16
12
8
10 102 103
f (MHz)
VD = 28 V; IDq = 1.0 A; Pi = 10 dBm

Fig 14. Small-signal gain as a function of frequency

4. PCB information
C32
R115
D101
C108
C107 L101 C31
R117
R101
R103
C106
R116
R118
C5
U101
C4
C3
R102 C30
C102
C103
R114
C104
U103
L102
R2
R106
C12
C10
C11
C105
D102
U102
R112
R4
C20
R111
R108
E102
R015
R113
T4
C33
T2
R109
C101
C104
Q101
R1 L1
E101 R110
C23
C1 C22
C2 C24
C25
T3
T6 T7
C21
T1 R5
R3
C9
C8
C7
019aab008
(1) PCB is Taconic RF35; r = 3.5 F/m; height = 0.79 mm; Cu thickness = 35 m
(2) T4, T6, and T7 cores are bonded to the baseplate with a thermally-conductive adhesive such as Wakefield DeltaBond 152
Fig 15. PCB layout

4.1 RF circuit
T1 Input balun = T4, T6 Output 15 4:1 =

55 mm UT047 on 3 2843002402 core 50 mm UT085-15 on 2861000202 core
T2, T3 Input 25 4:1 = T7 Output balun =

50 mm UT047-25 on 2 2843002402 core 80 mm UT085 on 2 2861000202 core
C3 C5 C4
4.7 nF 100 nF 10 F
R2
20
1210 C22
R4 C20
T2 200 510 pF
510 pF T4
C1 input 25 4:1 20 W output 15 4:1 C23 J2
J1 1 Q1 T7 NF
4.7 nF
NF T1 3 4.7 nF
5 BLF645
output
input 4 C25 balun
C2
balun 2
T6 4.7 nF
4.7 nF T3
R5 C21 output 15 4:1
input 25 4:1 C24
200 510 pF
20 W 510 pF
R6 L1
R1 R3 10 8T +28 V @ 10 A GND
10 20 3W 18 AWG TP1 TP2
0.5 W 1210
VG VD
C10 C12 C12 C7 C9 C8 C31 C32 C30 C33
10 F 100 nF 4.7 nF 4.7 nF 100 nF 10 F 4.7 nF 100 nF 10 F 470 F
63 V
019aab009
Fig 16. RF schematic
Table 2. RF circuit bill of materials

Component Description Value Remarks
C1, C2, C3, C7, C11, capacitor, 100 V 5 % NP0, 1210 4.7 nF
C23, C25, C31
C4, C8, C10 capacitor, 10 V 10 % X7R, 1206 10 F
C5, C9, C12 capacitor, 50 V 10 % X7R, 0805 100 nF
C20, C21, C22, C24 capacitor, 500 V 5 % NP0 510 pF ATC 100B
C30 capacitor, 100 V 10 % X7S, 2220 10 F TDK C5750X7S2A106M
C32 capacitor, 100 V 10 % X7R, 1210 100 nF
C33 capacitor, 63 V, alum electrolytic 470 F
L1 8 turns 18AWG on R6
T1 55 mm UT-047 50 coax + input balun
(3) Fair-Rite 2861002402 core
T2, T3 50 mm UT-047 25 coax + 4:1 input transformer
T4, T6 50 mm UT-085C-15 15 coax + 4:1 output transformer
Fair-Rite 2861000202 core
T7 80 mm UT-085 50 coax + 1:1 output balun

Table 2. RF circuit bill of materials

R1 resistor, 5 % CC, 0.5 W 10
R2, R3 resistor, 5 % 100 ppm CF, 2010 20
R4, R5 resistor, 5 % 20 W flange-mount 200 ATC FR10300N0200J
R6 resistor, 5 % 3 W MF 10
4.2 Bias circuit

Table 3. Bias circuit bill of materials
L101, L102 ferrite bead, 200 mA, 0805 1000
C101, C102 capacitor, 50 V 10 % X7R, 0805 100 nF
C105, C106, D102, not installed
U102, R111, R112, R114,
E101, E102
C103, C104, C107 capacitor, 50 V 10 % X7R, 0805 1 F
C108 capacitor, 100 V 10 % X7R, 1210 2.2 F
D101 LED, green, 1206
U101 voltage regulator Linear LT3010EMS8E
Q101 transistor NPN 45 V 100 mA GP NXP Semiconductors
BC847B
U103 rail-rail opamp National LM7321MF
R106 potentiometer, 5 turns cermet 200
R113, R117, R118 resistor, 1% 100 ppm CF, 0805 10.0 k
R104, R115 resistor, 1% 100 ppm CF, 0805 1.10 k
R105 resistor, 1% 100 ppm CF, 0805 2 k
R102, R103, R108 resistor, 1% 100 ppm CF, 0805 432
R116 resistor, 1% 100 ppm CF, 0805 52.3 k
R109 resistor, 1% 100 ppm CF, 0805 5.11 k
R101 resistor, 1% 100 ppm CF, 0805 0.0
R110 resistor, 1% 100 ppm CF, 0805 909

VD
L101 U101
BLM21BD102 LT3010EMS8E
IN OUT
8 1
C108 R118 EN ADJ R116 C106 C107 R115
2.2 F 10.0 k 5 2 52.3 k 1 nF 1 F 1.10 k
GND: 4, 9 D101
HSMGC150
R117 green = power
10.0 k
R103 R104 C103 VG

R105 bias monitor/overdrive
432 1.10 k U103 1 F
200 E102 L102
LM7321MF
R105 BLM21BD102
R102 3 5
1 VGATE
432 R108 R113
2.00 k C102 4
2 ground
100 nF E101
R101 432 10.0 k
75.0
C101 R109 C104
100 nF 5.11 k 1 F
3 R111
1 Q101 88.7 k R114
BC847B 1.10 k
2 3 5 D102
1
R110 HSMHC150
909 red = overtemp
C105 R112 400 mV
100 nF 10.0 k
6
4
U102
2 LT6700CS63
019aab010
Fig 17. Bias circuit schematic diagram
5. Abbreviations
Table 4. Abbreviations
Acronym Description
ACPR Adjacent Channel Power Ratio
CCDF Complementary Cumulative Distribution Function
DPD Digital PreDistortion
IBW Integration BandWidth
LDMOS Laterally Diffused Metal-Oxide Semiconductor
MOSFET Metal Oxide Silicon Field Effect Transistor
PAR Peak-to-Average power Ratio
W-CDMA Wideband Code Division Multiple Access

6. Legal information
6.1 Definitions design. It is customers sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customers applications and
products planned, as well as for the planned application and use of
Draft The document is a draft version only. The content is still under
customers third party customer(s). Customers should provide appropriate
internal review and subject to formal approval, which may result in
design and operating safeguards to minimize the risks associated with their
modifications or additions. NXP Semiconductors does not give any
applications and products.
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of NXP Semiconductors does not accept any liability related to any default,
use of such information. damage, costs or problem which is based on any weakness or default in the
customers applications or products, or the application or use by customers
third party customer(s). Customer is responsible for doing all necessary
6.2 Disclaimers testing for the customers applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customers third party
Limited warranty and liability Information in this document is believed to
customer(s). NXP does not accept any liability in this respect.
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or Export control This document as well as the item(s) described herein
completeness of such information and shall have no liability for the may be subject to export control regulations. Export might require a prior
consequences of use of such information. authorization from national authorities.
In no event shall NXP Semiconductors be liable for any indirect, incidental, Evaluation products This product is provided on an as is and with all
punitive, special or consequential damages (including - without limitation - lost faults basis for evaluation purposes only. NXP Semiconductors, its affiliates
profits, lost savings, business interruption, costs related to the removal or and their suppliers expressly disclaim all warranties, whether express, implied
replacement of any products or rework charges) whether or not such or statutory, including but not limited to the implied warranties of
damages are based on tort (including negligence), warranty, breach of non-infringement, merchantability and fitness for a particular purpose. The
contract or any other legal theory. entire risk as to the quality, or arising out of the use or performance, of this
Notwithstanding any damages that customer might incur for any reason product remains with customer.
whatsoever, NXP Semiconductors aggregate and cumulative liability towards In no event shall NXP Semiconductors, its affiliates or their suppliers be liable
customer for the products described herein shall be limited in accordance to customer for any special, indirect, consequential, punitive or incidental
with the Terms and conditions of commercial sale of NXP Semiconductors. damages (including without limitation damages for loss of business, business
Right to make changes NXP Semiconductors reserves the right to make interruption, loss of use, loss of data or information, and the like) arising out
changes to information published in this document, including without the use of or inability to use the product, whether or not based on tort
limitation specifications and product descriptions, at any time and without (including negligence), strict liability, breach of contract, breach of warranty or
notice. This document supersedes and replaces all information supplied prior any other theory, even if advised of the possibility of such damages.
to the publication hereof. Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
Suitability for use NXP Semiconductors products are not designed,
all direct or general damages), the entire liability of NXP Semiconductors, its
authorized or warranted to be suitable for use in life support, life-critical or
affiliates and their suppliers and customers exclusive remedy for all of the
safety-critical systems or equipment, nor in applications where failure or
foregoing shall be limited to actual damages incurred by customer based on
malfunction of an NXP Semiconductors product can reasonably be expected
reasonable reliance up to the greater of the amount actually paid by customer
to result in personal injury, death or severe property or environmental
for the product or five dollars (US$5.00). The foregoing limitations, exclusions
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
and disclaimers shall apply to the maximum extent permitted by applicable
NXP Semiconductors products in such equipment or applications and
law, even if any remedy fails of its essential purpose.
therefore such inclusion and/or use is at the customers own risk.
Applications Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no 6.3 Trademarks
representation or warranty that such applications will be suitable for the
specified use without further testing or modification. Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product

7. Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Test summary. . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 RF Performance . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 1-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 2-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 Alternative input matching . . . . . . . . . . . . . . . 12
4 PCB information. . . . . . . . . . . . . . . . . . . . . . . . 14
4.1 RF circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2 Bias circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
6.1 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.2 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.3 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section Legal information.
NXP B.V. 2011. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 3 March 2011
Document identifier: AN10953

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AN10953

BLF645 10 MHz to 600 MHz 120 W amplifier

Application note Rev. 1 3 March 2011 2 of 19

Fig 1. BLF645 10 MHz to 600 MHz amplifier

Application note Rev. 1 3 March 2011 3 of 19

Table 1. Summary of RF performance

Application note Rev. 1 3 March 2011 4 of 19

Application note Rev. 1 3 March 2011 5 of 19

IDq = 1.0 A; PL = 100 W

Application note Rev. 1 3 March 2011 6 of 19

VDS = 28 V; IDq = 1.0 A

Application note Rev. 1 3 March 2011 7 of 19

VDS = 32 V; IDq = 1.0 A

VDS = 28 V; Pi = 10 dBm; IDq = 1.0 A

Application note Rev. 1 3 March 2011 8 of 19

VDS = 50 V; Pi = 10 dBm; IDq = 0.9 A; PL = 100 W

Application note Rev. 1 3 March 2011 9 of 19

VD = 28 V; IDq = 1.0 A; f = 100 kHz

Application note Rev. 1 3 March 2011 10 of 19

Application note Rev. 1 3 March 2011 11 of 19

3.3 Alternative input matching

Fig 12. 9:1 input transformer

Application note Rev. 1 3 March 2011 12 of 19

VD = 28 V; IDq= 1.0 A; Pi = 10 dBm

VD = 28 V; IDq = 1.0 A; Pi = 10 dBm

Application note Rev. 1 3 March 2011 13 of 19

Application note Rev. 1 3 March 2011 14 of 19

T1 Input balun = T4, T6 Output 15 4:1 =

T2, T3 Input 25 4:1 = T7 Output balun =

Fig 16. RF schematic

Table 2. RF circuit bill of materials

Application note Rev. 1 3 March 2011 15 of 19

Table 2. RF circuit bill of materials

4.2 Bias circuit

Application note Rev. 1 3 March 2011 16 of 19

R103 R104 C103 VG

Fig 17. Bias circuit schematic diagram

Application note Rev. 1 3 March 2011 17 of 19

Application note Rev. 1 3 March 2011 18 of 19

NXP B.V. 2011. All rights reserved.

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