Basic Logic Gates

Prateek Chauhan
M.Sc Physics
Roll No-16510054
prateek.chauhan@iitgn.ac.in

Jan 09,2017

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Physics Lab Report IIT GANDHINAGAR

Contents
1 OBJECTIVE 3

2 THEORY 3

3 OBSERVATIONS 5
3.1 OR Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 AND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3 NOT Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.4 NAND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.5 NOR Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.6 AND Gate from NAND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.7 OR Gate from NAND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.8 NOT Gate from NAND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.9 AND Gate from NOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.10 OR Gate from NOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.11 NOT Gate from NOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 CONCLUSION 7

5 REFERENCES 7

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1 OBJECTIVE
This experiment will examine the operation of the AND, NAND, OR, and NOR logic gates and
compare the expected outputs to the truth tables for these devices. The NOT function will be
implemented using NAND and NOR gates..

2 THEORY
A logic gate is an elementary building block of a digital circuit. Most logic gates have two inputs
and one output. At any given moment, every terminal is in one of the two binary conditions low
(0) or high (1), represented by different voltage levels.
Here are diagrams and truth table for basic logic gates OR, AND, NOT, NOR and NAND.

Figure 1: Basic Logic Gates1

NAND and NOR are known as Universal Logic Gates, because all other gates can be formed by

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Physics Lab Report IIT GANDHINAGAR

combining one or more than one of these gates with itself. This can be seen by following diagram.

Figure 2: Formation of logic gates using NAND and N OR2

For experimental purpose we use Inetgrated Circuits(IC) to study the logic gates. An IC is
a flat chip on which electronic circuits are fabricated. For different logic gates different ICs are
available. For NAND gate the IC structure is shown by Figure 3.

Figure 3: Integrated Circuit IC and NAND gate in IC74003

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Physics Lab Report IIT GANDHINAGAR

3 OBSERVATIONS
High end voltage = 5.02 V
Low end voltage = 0.0 V

3.1 OR Gate
Input Output
A B X Vout (Volt)
0 0 0 0
0 1 1 4.53
1 0 1 4.61
1 1 1 4.67

3.2 AND Gate

Input Output
A B X Vout (Volt)
0 0 0 0
0 1 0 0
1 0 0 0
1 1 1 4.67

3.3 NOT Gate

Input Output
A X Vout (volt)
0 1 5.2
1 0 0

3.4 NAND Gate

Input Output
A B X Vout (Volt)
0 0 1 4.90
0 1 1 4.89
1 0 1 4.87
1 1 0 0

3.5 NOR Gate

Input Output
A B X Vout (volt)
0 0 1 4.93
0 1 0 0
1 0 0 0
1 1 0 0

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3.6 AND Gate from NAND

Input Output
A B X Vout (volt)
0 0 0 0
0 1 0 0
1 0 0 0
1 1 1 5.02

3.7 OR Gate from NAND

Input Output
A B X Vout (volt)
0 0 0 0
0 1 1 4.96
1 0 1 4.92
1 1 1 4.88

3.8 NOT Gate from NAND

Input Output
A X Vout (Volt)
0 1 4.98
1 0 0

3.9 AND Gate from NOR

Input Output
A B X Vout (volt)
0 0 0 0
0 1 0 0
1 0 0 0
1 1 1 4.89

3.10 OR Gate from NOR

Input Output
A B X Vout (volt)
0 0 0 0
0 1 1 4.42
1 0 1 4.42
1 1 1 4.36

3.11 NOT Gate from NOR

Input Output
A X Vout (Volt)
0 1 4.98
1 0 0

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4 CONCLUSION
The operational behaviour of all the logic gates has been verified by experimental readings. Also
universal nature of NAND and NOR gate can be seen by observations.

5 REFERENCES
1. http : //www.inetdaemon.com/tutorials/basicc oncepts/numbers ystems/binary/gates.shtml
2. http : //benschonken176226.blogspot.in/2016/02/activity 222 universal logic gates
nand.html
3. https : //www.pinterest.com/explore/nand gate/
4. IITGN Physics Laboratory (https://sites.google.com/a/iitgn.ac.in/ph102/)
5. Wikipedia
6. Digital Fundamentals by Thomas L. Floyd

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