622Active Filters

FULLY CURRENT-MODE AMSC-TAMU

Edgar Snchez-Sinencio
Input Signal: Current
Output Signal: Current

Basic Building Blocks are:

Inverting Integrators Vin'
Io
Inverting (Current Amplifiers) ZL
Primitive Circuit Implementations: C MODE
Single Transistor Inverting Amplifier
Vin'
Simple Current Mirror Vo
ZL
Capacitor
T MODE
 Current-Mode Implementation using OTAs
I in gm
I in Io
gm 1
Io
C sC

Integrator
1
I in
sRC

gm Io I in Io

1
C R
sC gm

Self Loop Integrator

1
g mr R
g mr
 In order to fully obtain the benefits of current-mode techniques simpler circuits
with reduced parasitics are desireable.
Primitive CM Circuits
Ib

Io I in g m Io

I in sC

Inverting Integrator
Ib kI b
I in k I in
Vin
Vo
Io
I in Io

W W
k
L L

Amplifier (Multiplier by a constant)

 I bo Ib kI b

Io I in Io
g
I in m
W
sC k
W
C k
L L

Non-Inverting Integrator
3.3V Power supply VDD
High frequency IB
Low area io
Suitable for digital process ii
Good PSR
Poor linearity, efficiency (1% THD => < 4%) C
Poor voltage gain

Low power supply (3.3V)

VDD VDD
High frequency
Low area IB IB
Suitable for digital process io io
Very good PSR ii ii
Good Linearity (differential)
Excellent efficiency ( 100%) C C
Poor common mode rejection
 RP M RP VRP
R
M INTN M INTN VRN
ii io ii io VC
M INTN M INTN
VRP
C RN C M RN VRN R
(a) (b) (c)
(a) Tunable CMOS class AB integrator (b) Transistor Implementation with Mrn
and Mrp operating in triode region (c) Bias implementation (diffusion or poly
resistors).
Linearity sufficient
Very high efficiency (> 100%) => AB, low power
Very high frequency
Small area
Low Power Supply
Linearity dep. on process variations
PSR poor
How to convert a Lossy Transconductance Integrator
With Positive Feedback into a Current-Mode Lossy Integrator

Vin Z
g m1 Vo


g m2
C

Vo g m1 Z g m1

Vin 1 g m1 Z sC 2 (g m 2 g m1 )
OTA-C Lossy Integrator With Single (Negative) Input OTAs

1
Vin
g m1 Vo


g m2
C

Current-Mode Version

1
I in

g m2

Io
g m1
C
 Current-Mode Version
1
I in

g m2

Io
g m1
C

Generalized Current-Mode Lossy Integrator

If
I in

g m1

Io

g m2 g m3
C g m4


 If

I b2 I b1 I b3 I b4 I b0
I in

g m2 g m1 g m3 g m0 g m1
g m4
C

Transistor Level Implementation

CM Lossy (Lossless) Integrator
 I b2 I b1 I bo
Io

I in
g m2 g mo
g m1

C
Ib Ib

g m3
g m4

Redrawing the CM Integrator

 Fully Pseudo Differential Integrator

I in

C I o
C
Vin g mN I o
Vo g mP I in
1/ s
Vin
Vo
C
I in I o
A N AP
I in
(a )
(g m N g m P )
g mN I o
g mP
( b)

I I o u
Adm

I in I in s ( A N A p ) u

I o I o u
A cm

I in I in s ( A N A p ) u
 Continuous - Time Current-Mode Integrator
Based On Current-Mirrors.

i1 2I i2 2I KI
i out
W
K
M5 L 4
M3
M1 M2 C M4

if

i1 1 2 i out
g m1 V1 g m 2 V1 g m3 V2 g m 4 V2 g m5 V2
V1 C V2

if
 g m2
i1 i2
g m1
if g m1 g m 4

g m1 g m3 sC g m 2 g m 4

g m2
i1 i2
g m1
i f g m1 g m 4
g m1 g m3 g m 2 g m 4 g m1 sC

a) Lossless Integrator
g m1 g m2 and g m3 g m4

g m4
if i1 i 2
sC

g m4
i out K i1 i 2
sC
b) Lossy Integrator
g m1 g m3 g m2 g m4 , g m1 kg m2 , g m3 kg m4
k ki 1 i 2
if , k 1
k 1
2
sC k 1
2
1
g m4 k
i.e. k 2
2 2i1 i 2
if
3 1 sC 3
g m4 2

If the parasitic capacitances and the output

conductances are considered, then

k1 (s z1 )i1 k 2 (s z 2 )
if
(s p1 )(s p 2 ) (s p1 )(s p 2 )
 Where
k1 g o / C1 , k 2 g m / C 2
p1 4g o / C 2 , p 2 g m / C1
g g g go
z1 m m , z2 m
C2 g o C1

All transistors are equal, and C1 and C2 are the lumped

nodal capacitances associated with nodes 1 and 2 . Note
that p1 moves from the origin to
g m3
o C2 g m3 4g o
p1
g m g m C2
4g o
And
g m1 C 2
Q
g m3 C1
 Lets consider the input and output impedance,

i1 if i2
1 2
C1 g o2 g o3 g o4
g o1 C2
g m1 V1 g m 2 V1 g m3 V2 g m 4 V2

V g m3 g o 2 g o3 sC 2
z in 1
i1 g m 4 g m 2 (g m1 g o1 g o 4 sC1 )(g m3 g o 2 g o3 sC 2 )
i2 0

V g m3 (1 sC 2 / g m3 )
z in 1
i1 g m 4 g m 2 g m1 g m3 s(C 2 g m1 C1g m3 ) s 2 C1C 2
i2 0
a) Lossless Integrator

g m3
z in (0) g m1 g m
g m 4 g m 2 g m1 g m3 2
g m3 g m 4

b) Lossy Integrator

k2 1
z in (0) , k0
k 1 g m1
2

1
z o (0)
g o5