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FAST RADIX 10 MULTIPLICATION USING REDUNDANT BCD CODES 2014

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FastRadix10MultiplicationUsingRedundantBCDCodes2014 Phone

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We present the algorithm and architecture of a BCD parallel multiplier that

exploits some properties of two different redundant BCD codes to speedup its
computation:theredundantBCDexcess3code(XS3),andtheoverloadedBCD Subject

representation (ODDS). In addition, new techniques are developed to reduce Re: Fast Radix 10 Multiplication Using Redundant BCD Codes 2014
significantly the latency and area of previous representative highperformance
implementations. Partial products are generated in parallel using a signeddigit Message

radix10 recoding of the BCD multiplier with the digit set [5, 5], and a set of
positive multiplicand multiples (0X, 1X, 2X, 3X, 4X, 5X) coded in XS3. This encoding has several advantages. First, it is a self
complementingcode,sothatanegativemultiplicandmultiplecanbeobtainedbyjustinvertingthebitsofthecorrespondingpositive
one.Also,theavailableredundancyallowsafastandsimplegenerationofmultiplicandmultiplesinacarryfreeway.Finally,thepartial
productscanberecodedtotheODDSrepresentationbyjustaddingaconstantfactorintothepartialproductreductiontree.Sincethe
ODDSusesasimilar4bitbinaryencodingasnonredundantBCD,conventionalbinaryVLSIcircuittechniques,suchasbinarycarry
save adders and compressor trees, can be adapted efficiently to perform decimal operations. To show the advantages of our
architecture,wehavesynthesizedaRTLmodelfor1616digitand3434digitmultiplicationsandperformedacomparativesurveyof
thepreviousmostrepresentativedesigns.Weshowthattheproposeddecimalmultiplierhasanareaimprovementroughlyintherange
2035percentforsimilartargetdelayswithrespecttothefastestimplementation.
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