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Cyclone II & Cyclone Devices
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Differences between Cyclone II & Cyclone Devices

Following the tremendous success of the first-generation Cyclone device family, Cyclone II devices
further expand the role of FPGAs in low-cost, high-volume applications in both new and existing
FPGA markets. Cyclone II FPGAs offer logic densities up to 68,416 logic elements (LEs), new
features such as 18x18 embedded multipliers, support for new external memory interfaces and
new I/O standards, all at 30 percent lower cost than the equivalent first-generation Cyclone devices.

Feature Comparison
Cyclone II devices are manufactured on 300-mm wafers using TSMC's successful 90-nm, low-k
dielectric process technology. With more than three times the logic density of first-generation
Cyclone devices, Cyclone II devices offer the same powerful and versatile features found in Cyclone
devicesincluding M4K RAM blocks, phase-locked loops (PLLs), and external memory interfaces
in addition to the new features outlined below. Table 1 compares the features offered by Cyclone II
and Cyclone devices.

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 Table 1. Cyclone II & Cyclone Feature Comparison
Device
Feature
Cyclone II Cyclone

30 percent lower cost than Offers a mix of features,

Cost-Optimized Cyclone FPGAs (on a cost-per-LE density, and
Architecture basis) performance at low cost

0.13-m, FSG dielectric

90-nm, low-k dielectric process
Process Technology process
Built on 300-mm wafers
Built on 300-mm wafers

Core Voltage 1.2 V 1.5 V

I/O Voltage 1.5 V, 1.8 V, 2.5 V, 3.3 V 1.5 V, 1.8 V, 2.5 V, 3.3 V

Logic Density 4,608 to 68,416 LEs 2,910 to 20,060 LEs

I/O Pin Count 85 to 622 65 to 301

26 to 250 M4K RAM blocks, 13 to 64 M4K RAM

Embedded Memory
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including 512 parity bits per
block
Offers up to 1.1 Mbits of on-chip
memory
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blocks, including 512
parity bits per block
Offers up to 288 Kbits
of on-chip memory
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 External Memory Single data rate (SDR), double
DDR, SDR
Interface Support data rate (DDR), DDR2, QDRII

Up to 25 18x18 soft
Digital Signal Up to 150 embedded 18x18
multipliers
Processing (DSP) multipliers (implemented using
(implemented using
Implementation dedicated circuitry)
LEs)

1 to 2 PLLs per device

2 to 4 PLLs per device with up to
PLLs with up to 6 PLL
12 PLL outputs
outputs

Up to 16 dedicated global clocks

Up to 8 global clock per
Clock Networks (GCLK) and 20 dual-purpose
device
clocks per devices

LVDS, mini-LVDS, LVPECL, RSDS,

I/O Standards LVDS, RSDS, SSTL, PCI,
SSTL, HSTL, PCI, PCI-X, LVTTL,
Support LVTTL, LVCMOS
LVCMOS

Nios II Embedded Yes Yes

Processor Support
144-pin TQFP
208-pin PQFP 100-pin TQFP

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 240-pin PQFP 144-pin TQFP
256-pin FineLine BGA 240-pin PQFP
Packages 484-pin Ultra FineLine BGA 256-pin FineLine BGA
484-pin FineLine BGA 324-pin FineLine BGA
672-pin FineLine BGA 400-pin FineLine BGA
896-pin FineLine BGA

Table 2 summarizes how Cyclone II devices compare with Cyclone devices in terms of available logic
resources.

Table 2: Cyclone II & Cyclone Device Family Comparison

Cyclone II Devices Cyclone Devices
Max.
M4K Total M4K Total
User
Device LEs RAM RAM PLLs Device LEs RAM RAM PL
I/O
Blocks Kbits Blocks Kbits
Pins

EP1C3 2,910 13 59,904

EP1C4 4,000 17 78,336

EP2C5 4,608 26 119,808 2 142

EP1C6 5,980 20 92,160

EP2C8 8,256 36 165,888 2 182

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 EP2C8 8,256 36 165,888 2 182

EP1C12 12,060 52 239,616

EP2C20 18,752 52 239,616 4 315

EP1C20 20,060 64 294,912

EP2C35 30,216 105 483,840 4 475

EP2C50 50,528 129 594,432 4 450

EP2C70 68,416 250 1,152,000 4 622

Embedded Multipliers
Cyclone II devices feature up to 150 18x18 embedded multipliers that are ideal for low-cost DSP
applications such as consumer applications, wireless, and image processing. Cyclone II 18x18
embedded multipliers are capable of efficiently implementing common DSP functions such as FIR
filters, FFTs, correlators, encoders/decoders, and numerically controlled oscillators (NCOs).

Capable of running at 250 MHz, the embedded multipliers in Cyclone II devices eliminate the
performance bottleneck in complex arithmetic calculations and increase overall DSP system
throughput. Cyclone II devices can be used as FPGA co-processors for DSP applications that offload
complex arithmetic computations from the DSP processor and boost overall system performance
for lower system costs. See the embedded multipliers page for more details.

External Memory Interfaces

Cyclone II and Cyclone devices provide ample embedded memory for many applications in low-cost
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 products. However, some applications require external memory to address additional storage
requirements. Cyclone II devices fulfill all the requirements for additional memory.

Cyclone II and Cyclone devices have been designed for reliable data transfer to and from external
memory devices at high speed. They are designed to interoperate with DDR and SDR SDRAM
devices. New with Cyclone II FPGAs is the support for DDR2 SDRAM devices and QDRII SRAM
devices through a dedicated interface that ensures fast, reliable data transfer at up to 668 Mbps.
See the external memory interface page for more information.

High Performance I/O Standards

Cyclone II devices support a variety of single-ended and differential I/O standards, giving designers
more flexibility in designing their high-performance systems. New with Cyclone II FPGAs is the
support for LVPECL, mini-LVDS, HSTL, and PCI-X I/O standards. Single-ended I/O standards are
critical when working with advanced memory devices such as DDR/DDR2 SDRAM and QDRII SRAM.

Additional single-ended and differential I/O standards that Cyclone II FPGAs support include LVTTL,
LVCMOS, PCI, SSTL, LVDS and RSDS. See the I/O standard page for more information.

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