Vous êtes sur la page 1sur 11

DATA SHEET

Timers and signal generators


Order code Manufacturer code Description
77-1212 n/a n/a
82-0336 NE555 NE555 SINGLE TIMER (RC)
82-0338 NE555D NE555D SINGLE TIMER (SMD) (RC)

Timers and signal generators Page 1 of 11


The enclosed information is believed to be correct, Information may change without notice due to Revision A
product improvement. Users should ensure that the product is suitable for their use. E. & O. E. 20/02/2007

Sales: 01206 751166 Technical: 01206 835555 Fax: 01206 751188


Sales@rapidelec.co.uk Tech@rapidelec.co.uk www.rapidonline.com
NE555
SA555 - SE555

GENERAL PURPOSE SINGLE BIPOLAR TIMERS

.. LOW TURN OFF TIME


MAXIMUM OPERATING FREQUENCY

.. GREATER THAN 500kHz


TIMING FROM MICROSECONDS TO HOURS
OPERATES IN BOTH ASTABLE AND

. MONOSTABLE MODES
HIGH OUTPUT CURRENT CAN SOURCE OR

.. SINK 200mA
ADJUSTABLE DUTY CYCLE

. TTL COMPATIBLE
TEMPERATURE STABILITY OF 0.005%
PERoC

N D
DESCRIPTION DIP8 SO8
The NE555 monolithic timing circuit is a highly stable (Plastic Package) (Plastic Micropackage)
controller capableof producing accuratetime delays
or oscillation. In the time delay mode of operation,
the time is precisely controlled by one external re-
sistor and capacitor.For a stableoperation as an os-
cillator, the free running frequency and the duty cy-
cle are both accurately controlled with two external ORDER CODES
resistors and one capacitor. The circuit may be trig- Part Temperature Package
gered and reset on falling waveforms, and the out- Number Range N D
put structure can source or sink up to 200mA. The NE555 0oC, 70oC
NE555 is available in plastic and ceramic minidip

555-01.TBL
SA555 40oC, 105oC
package and in a 8-lead micropackage and in metal o o
can package version. SE555 55 C, 125 C

PIN CONNECTIONS (top view)

1 8 1 - GND
2 - Trigger
3 - Output
2 7 4 - Reset
5 - Control voltage
6 - Threshold
3 6 7 - Discharge
8 - VCC
4 5

April 1995 1/10


NE555/SA555/SE555

BLOCK DIAGRAM
VCC+

5k

COMP
DISCHARGE
THRESHOLD
CONTROL VOLTAGE R

FLIP-FLOP

Q
5k
COMP OUT
TRIGGER
S
INHIBIT/
RESET

5k

RESET S

555-03.EPS
S - 808 6

SCHEMATIC DIAGRAM
CONTROL
VOLTAGE OUTPUT
THRESHOLD
COMPARATOR

5
VCC

R1 R2 R3 R4 R8 R12
4.7k 830 4.7k 1k 5k 6.8k

Q21
Q19
Q5 Q6 Q7 Q8 Q9 Q20 Q22
R13

3.9k
R11
5k
3
R17 D1
THRESHOLD Q1 Q4 4.7k
Q23
Q2 Q3 R9 R14
5k D2 220
Q11 Q12
Q24
2
TRIGGER Q10 Q13
Q16 Q18
R16 R15
100 4.7k
4
RESET Q15
7
DISCHARGE Q17

R5 R6 R7 R10
Q14
10k 100k 100k 5k
1
GN D
555-04.EPS

TRIGGER COMPARATOR FLIP FLOP

ABSOLUTE MAXIMUM RATINGS


Symbol Parameter Value Unit
Vcc Supply Voltage 18 V
o
Toper Operating Free Air Temperature Range for NE555 0 to 70 C
for SA555 40 to 105
for SE555 55 to 125
555-02.TBL

o
Tj Junction Temperature 150 C
o
Tstg Storage Temperature Range 65 to 150 C

2/10
NE555/SA555/SE555

OPERATING CONDITIONS
Symbol Parameter SE555 NE555 - SA555 Unit

555-03.TBL
VCC Supply Voltage 4.5 to 18 4.5 to 16 V
Vth, Vtrig, Vcl, Vreset Maximum Input Voltage VCC VCC V

ELECTRICAL CHARACTERISTICS
T amb = +25oC, VCC = +5V to +15V (unless otherwise specified)
SE555 NE555 - SA555
Symbol Parameter Unit
Min. Typ. Max. Min. Typ. Max.
ICC Supply Current (RL ) (- note 1) mA
Low State VCC = +5V 3 5 3 6
VCC = +15V 10 12 10 15
High State VCC = 5V 2 2
Timing Error (monostable)
(RA = 2k to 100k, C = 0.1F)
Initial Accuracy - (note 2) 0.5 2 1 3 %
Drift with Temperature 30 100 50 ppm/C
Drift with Supply Voltage 0.05 0.2 0.1 0.5 %/V
Timing Error (astable)
(RA, RB = 1k to 100k, C = 0.1F,
VCC = +15V)
Initial Accuracy - (note 2) 1.5 2.25 %
Drift with Temperature 90 150 ppm/C
Drift with Supply Voltage 0.15 0.3 %/V
VCL Control Voltage level V
VCC = +15V 9.6 10 10.4 9 10 11
VCC = +5V 2.9 3.33 3.8 2.6 3.33 4
Vth Threshold Voltage V
VCC = +15V 9.4 10 10.6 8.8 10 11.2
VCC = +5V 2.7 3.33 4 2.4 3.33 4.2
Ith Threshold Current - (note 3) 0.1 0.25 0.1 0.25 A
Vtrig Trigger Voltage V
VCC = +15V 4.8 5 5.2 4.5 5 5.6
VCC = +5V 1.45 1.67 1.9 1.1 1.67 2.2
Itrig Trigger Current (Vtrig = 0V) 0.5 0.9 0.5 2.0 A
Vreset Reset Voltage - (note 4) 0.4 0.7 1 0.4 0.7 1 V
Ireset Reset Current mA
Vreset = +0.4V 0.1 0.4 0.1 0.4
Vreset = 0V 0.4 1 0.4 1.5
VOL Low Level Output Voltage V
VCC = +15V, IO(sink) = 10mA 0.1 0.15 0.1 0.25
IO(sink) = 50mA 0.4 0.5 0.4 0.75
IO(sink) = 100mA 2 2.2 2 2.5
IO(sink) = 200mA 2.5 2.5
VCC = +5V, IO(sink) = 8mA 0.1 0.25 0.3 0.4
IO(sink) = 5mA 0.05 0.2 0.25 0.35
VOH High Level Output Voltage V
VCC = +15V, IO(source) = 200mA 12.5 12.5
555-04.TBL

IO(source) = 100mA 13 13.3 12.75 13.3


VCC = +5V, IO(source) = 100mA 3 3.3 2.75 3.3
Notes : 1. Supply current when output is high is typically 1mA less.
2. Tested at VCC = +5V and VCC = +15V.
3. This will determine the maximum value of RA + RB for +15V operation the max total is R = 20M and for 5V operation,
the max total R = 3.5M.

3/10
NE555/SA555/SE555

ELECTRICAL CHARACTERISTICS (continued)


SE555 NE555 - SA555
Symbol Parameter Unit
Min. Typ. Max. Min. Typ. Max.
Idis (off) Discharge Pin Leakage Current 20 100 20 100 nA
(output high) (Vdis = 10V)
Vdis(sat) Discharge pin Saturation Voltage mV
(output low) - (note 5)
VCC = +15V, Idis = 15mA 180 480 180 480
VCC = +5V, Idis = 4.5mA 80 200 80 200
tr Output Rise Time 100 200 100 300 ns

555-05.TBL
tf Output Fall Time 100 200 100 300
toff Turn off Time - (note 6) (Vreset = VCC) 0.5 0.5 s
Notes : 5. No protection against excessive Pin 7 current is necessary, providing the package dissipation rating will not be exceeded.
6. Time mesaured from a positive going input pulse from 0 to 0.8x VCC into the threshold to the drop from high to low of the
output trigger is tied to treshold.

Figure 1 : Minimum Pulse Width Required for Figure 2 : Supply Current versus Supply Voltage
Trigering

555-06.EPS
555-05.EPS

Figure 3 : Delay Time versus Temperature Figure 4 : Low Output Voltage versus Output
Sink Current
555-08.EPS
555-07.EPS

4/10
NE555/SA555/SE555

Figure 5 : Low Output Voltage versus Output Figure 6 : Low Output Voltage versus Output
Sink Current Sink Current

555-09.EPS

555-10.EPS
Figure 7 : High Output Voltage Drop versus Figure 8 : Delay Time versus Supply Voltage
Output
555-11.EPS

Figure 9 : Propagation Delay versus Voltage 555-12.EPS

Level of Trigger Value


555-13.EPS

5/10
NE555/SA555/SE555

APPLICATION INFORMATION Figure 11


t = 0.1 ms / div
MONOSTABLE OPERATION
In the monostable mode, the timer functions as a INPUT = 2.0V/div
one-shot. Referring to figure 10 the external capaci-
tor is initially held discharged by a transistor inside
the timer.
Figure 10
OUTPUT VOLTAGE = 5.0V/div
VCC = 5 to 15V

Reset

R1
4 8
Trigger 2 7

NE555 6 C1
CAPACITOR VOLTAGE = 2.0V/div

555-15.EPS
Control Voltage R1 = 9.1k, C1 = 0.01F, RL = 1k
Output 3 5
0.01 F
555-14.EPS

1
Figure 12

The circuit triggers on a negative-going input signal


when the level reaches 1/3 Vcc. Once triggered, the
circuit remains in this state until the set time has C
elapsed, even if it is triggered again during this in- (F)
terval.The duration of the output HIGH stateis given 10

by t = 1.1 R1C1 and is easily determined by 1k
figure 12. 1.0
R1
= k
10
Notice that since the charge rate and the threshold 0k
0.1 10 M
level of the comparator are both directly proportional 1
M
to supply voltage, the timing interval is independent 0.01 10
of supply. Applying a negativepulse simultaneously
to the reset terminal (pin 4) and the trigger terminal 0.001
(pin 2) during the timing cycle discharges the exter- 10 100 1.0 10 100 10 (t d )
s s ms ms ms s
nal capacitor and causes the cycle to start over. The
timing cycle now starts on the positive edge of the
555-16.EPS

reset pulse. During the time the reset pulse in ap-


plied, the output is driven to its LOW state.
When a negativetrigger pulse is applied to pin 2, the
flip-flop is set, releasing the short circuit across the ASTABLE OPERATION
external capacitor and driving the output HIGH. The When the circuit is connected as shown in figure 13
voltage across the capacitor increases exponen- (pin 2 and 6 connected)it triggers itself and free runs
tially with the time constant = R1C1. When the volt- as a multivibrator. The external capacitor charges
age across the capacitor equals 2/3 Vcc, the compa- through R1 and R2 and discharges through R2 only.
ratorresets the flip-flop which then discharge the ca- Thus the duty cycle may be precisely set by the ratio
pacitor rapidly and drivers the output to its LOW of these two resistors.
state. In the astable mode of operation, C1 charges and
Figure 11 shows the actual waveforms generatedin discharges between 1/3 Vcc and 2/3 Vcc. As in the
this mode of operation. triggeredmode, the chargeand discharge times and
When Reset is not used, it should be tied high to therefore frequency are independent of the supply
avoid any possibly or false triggering. voltage.

6/10
NE555/SA555/SE555

Figure 13 Figure 15 : Free Running Frequency versus R1,


R2 and C1
VCC = 5 to 15V

R1
C
4 8 (F)
Output 3 7 10 1k
10
NE555 R2 1.0
R1 10 k
0
Control + 1M k
Voltage
5 6 0.1 R2
=
0.01 F
1 2
10
C1 M

555-17.EPS
0.01

0.001
0.1 1 10 100 1k 10k f o (Hz)
Figure 14 shows actual waveforms generatedin this
mode of operation.
The charge time (output HIGH) is given by :

555-18.EPS
t1 = 0.693 (R1 + R2) C1
and the discharge time (output LOW) by :
t2 = 0.693 (R2) C1 PULSE WIDTH MODULATOR
Thus the total period T is given by : When the timer is connected in the monostable
T = t1 + t2 = 0.693 (R1 + 2R2) C1 mode and triggered with a continuous pulse train,
The frequency ofoscillation is them : the output pulse width can be modulated by a signal
1 1.44
f= = applied to pin 5. Figure 16 shows the circuit.
T (R1 + 2R2) C1
and may be easily found by figure 15. Figure 16 : Pulse Width Modulator.
The duty cycle is given by :
R2
D=
R1 + 2R2 VCC

RA
4 8

Figure 14 Trigger 2 7

t = 0.5 ms / div
NE555 6

OUTPUT VOLTAGE = 5.0V/div Modulation


Input
Output 3 5
C
1
555-20.EPS

CAPACITOR VOLTAGE = 1.0V/div


555-19.EPS

R1 = R2 = 4.8k, C1= 0.1F, RL = 1k

7/10
NE555/SA555/SE555

LINEAR RAMP 50% DUTY CYCLE OSCILLATOR


When the pullup resistor, RA, in the monostable cir- For a 50% duty cycle the resistors RA and RE may
cuit is replaced by a constant current source, a linear beconnected as in figure19. The time preriod for the
ramp is generated. Figure 17 shows a circuit con- output high is the same as previous,
figuration that will perform this function. t1 = 0.693 RA C.
For the output low it is t2 =
Figure 17. RB 2RA
[(RARB) (RA + RB)] CLn
2RB RA
1
Thus the frequency of oscillation is f =
VCC
t1 + t2
RE R1 Note that this circuit will not oscillate if RB is greater
4 8

Trigger 2 7
Figure 19 : 50% Duty Cycle Oscillator.
2N4250
or equiv.
NE555 6 VCC
VCC
C
Output 3 5 R2
0.01F RA
1 51k
4 8
RB
555-21.EPS

2 7
22k

NE55 6

Figure 18 shows waveforms generator by the linear


ramp. Out 3 5 0.01F
C
The time interval is given by : 1 0.01F
(2/3 VCC RE (R1+ R2) C
T= VBE = 0.6V

555-22.EPS
R1 VCC VBE (R1+ R2)

Figure 18 : Linear Ramp.


than 1/2 RA because the junction of RA and RB can-
not bring pin 2 down to 1/3 VCC and trigger the lower
comparator.
ADDITIONAL INFORMATION
Adequate power supply bypassing is necessary to
protect associated circuitry. Minimum recom-
mended is 0.1F in parallel with 1F electrolytic.
555-23.EPS

VCC = 5V Top trace : input 3V/DIV


Time = 20s/DIV Middle trace : output 5V/DIV
R 1 = 47k Bottom trace : output 5V/DIV
R 2 = 100k Bottom trace : capacitor voltage
R E = 2.7k 1V/DIV
C = 0.01F

8/10
NE555/SA555/SE555

PACKAGE MECHANICAL DATA


8 PINS - PLASTIC DIP OR CERDIP

e4

I
a1

L
b1

B B1
b E
e

e3 Z
Z

8 5
F

PM-DIP8.EPS
1 4

Millimeters Inches
Dimensions
Min. Typ. Max. Min. Typ. Max.
A 3.32 0.131
a1 0.51 0.020
B 1.15 1.65 0.045 0.065
b 0.356 0.55 0.014 0.022
b1 0.204 0.304 0.008 0.012
D 10.92 0.430
E 7.95 9.75 0.313 0.384
e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 6.6 0260
i 5.08 0.200
L 3.18 3.81 0.125 0.150
DIP8.TBL

Z 1.52 0.060

9/10
NE555/SA555/SE555

PACKAGE MECHANICAL DATA


8 PINS - PLASTIC MICROPACKAGE (SO)

a3
c1

C
a2

b1
b e

a1
s
e3 E

D
M

8 5 F

1 4

PM-SO8.EPS
Millimeters Inches
Dimensions
Min. Typ. Max. Min. Typ. Max.
A 1.75 0.069
a1 0.1 0.25 0.004 0.010
a2 1.65 0.065
a3 0.65 0.85 0.026 0.033
b 0.35 0.48 0.014 0.019
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.020
o
c1 45 (typ.)
D 4.8 5.0 0.189 0.197
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F 3.8 4.0 0.150 0.157
L 0.4 1.27 0.016 0.050
M 0.6 0.024
SO8.TBL

o
S 8 (max.)

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsi-
bility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which
may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON
Microelectronics. Specifications mentioned in this publ ication are subject to change without notice. This pub lication supersedes
and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical
components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics.

1994 SGS-THOMSON Microelectronics - All Rights Reserved


ORDER CODE :

SGS-THOMSON Microelectronics GROUP OF COMPANIES


Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

10/10

Vous aimerez peut-être aussi