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D Wide Operating Voltage Range of 2 V to 6 V D Low Power Consumption, 80-A Max ICC
D High-Current Outputs Drive Up To D Typical tpd = 11 ns
15 LSTTL Loads D 6-mA Output Drive at 5 V
D 3-State Outputs Drive Bus Lines or Buffer D Low Input Current of 1 A Max
Memory Address Registers
1OE
2OE
VCC
2Y4
1A1
1OE 1 20 VCC
1A1 2 19 2OE 3 2 1 20 19
1A2 4 18 1Y1
2Y4 3 18 1Y1
1A2 4 17 2A4 2Y3 5 17 2A4
2Y3 5 16 1Y2 1A3 6 16 1Y2
1A3 6 15 2A3 2Y2 7 15 2A3
2Y2 7 14 1Y3 1A4 8 14 1Y3
9 10 11 12 13
1A4 8 13 2A2
2Y1
2A1
1Y4
2A2
GND
2Y1 9 12 1Y4
GND 10 11 2A1
description/ordering information
These octal buffers and line drivers are designed specifically to improve both the performance and density of
3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The HC244
devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low,
the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE
PART NUMBER MARKING
PDIP N Tube of 20 SN74HC244N SN74HC244N
Tube of 25 SN74HC244DW
SOIC DW HC244
Reel of 2000 SN74HC244DWR
SOP NS Reel of 2000 SN74HC244NSR HC244
40 C to 85
40C 85C
C
SSOP DB Reel of 2000 SN74HC244DBR HC244
Tube of 70 SN74HC244PW
TSSOP PW Reel of 2000 SN74HC244PWR HC244
Reel of 250 SN74HC244PWT
CDIP J Tube of 20 SNJ54HC244J SNJ54HC244J
55C 125C
55 C to 125 C CFP W Tube of 85 SNJ54HC244W SNJ54HC244W
LCCC FK Tube of 55 SNJ54HC244FK
SNJ54HC244FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright 2003, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested
standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production
testing of all parameters. processing does not necessarily include testing of all parameters.
FUNCTION TABLE
(each buffer/driver)
INPUTS OUTPUT
OE A Y
L H H
L L L
H X Z
2 18 11 9
1A1 1Y1 2A1 2Y1
4 16 13 7
1A2 1Y2 2A2 2Y2
6 14 15 5
1A3 1Y3 2A3 2Y3
8 12 17 3
1A4 1Y4 2A4 2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA
Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
VCC
Input 50% 50%
0V
tPLH tPHL
In-Phase VOH
90% 90%
Output 50% 50%
10% 10% V
OL
tr tf Output
Control VCC
tPHL tPLH
VOH (Low-Level 50% 50%
Out-of-Phase 90% 90% Enabling) 0V
50% 50%
Output 10% 10% tPZL tPLZ
VOL
tf tr Output VCC VCC
Waveform 1 50%
VOLTAGE WAVEFORMS
(See Note B) 10% VOL
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
tPZH tPHZ
VCC Output VOH
Input 90% 90% 90%
50% 50% Waveform 2 50%
10% 10% 0 V
(See Note B) 0 V
tr tf
www.ti.com 10-Jun-2014
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
5962-8409601VRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8409601VR
A
SNV54HC244J
5962-8409601VSA ACTIVE CFP W 20 25 TBD A42 N / A for Pkg Type -55 to 125 5962-8409601VS
A
SNV54HC244W
84096012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84096012A
SNJ54HC
244FK
8409601RA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 8409601RA
SNJ54HC244J
8409601SA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 8409601SA
SNJ54HC244W
JM38510/65705B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
65705B2A
JM38510/65705BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
65705BRA
JM38510/65705BSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
65705BSA
M38510/65705B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
65705B2A
M38510/65705BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
65705BRA
M38510/65705BSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
65705BSA
SN54HC244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54HC244J
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 10-Jun-2014
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 10-Jun-2014
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com 10-Jun-2014
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Dec-2014
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Dec-2014
Pack Materials-Page 2
MECHANICAL DATA
0,38
0,65 0,15 M
0,22
28 15
0,25
0,09
5,60 8,20
5,00 7,40
Gage Plane
1 14 0,25
A 08 0,95
0,55
Seating Plane
PINS **
14 16 20 24 28 30 38
DIM
4040065 /E 12/01
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright 2014, Texas Instruments Incorporated