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leroe ee ronle
_,reu, S
SIXTH eDITION
Adel S. Sedra
University of Waterloo
Kenneth C. Smith
University of Toronto
With offices in
Argentina Austria Brazil Chile Czech Republic France Greece
Guatemala HungaI)' Italy Japan Poland Portugal Singapore
South Korea Switzerland Thailand Turkey Ukraine Vietnam
Preface xxii
Copyright 1': 2010. 2004.1998 Ox.ford Unive~ity Press, Inc., IQ91, IQ87
Holt. Rinehart, and Winston. Inc .. 1982 CBS College Publishing
PART I DEVICES AND BASIC CIRCUITS 2
Published by O\.ford Univer..ity Press, Inc.
198 Madison A\,enue, Nell York, New York 10016 1 Signals and Amplifiers 4
http: //\\WI\ ,oup.com 2 Operational Amplifiers 52
O\.ford IS a regi~tered trademark of Odord Universit), Pre~s
3 Semiconductors 124
4 Diodes 164
All right~ re'>erved No pan of this publication may be reproduced, 5 MOS FieldEffect Transistors (MOSFETs) 230
stored in a rttnel'al system, or transmitted, in any form or by any means,
electronic, mechanical, photocopying, recording. or otherwise,
6 Bipolar Junction Transistors (BJTs) 350
without the prior permission of Oxford University Press.
PART II INTEGRATEDCIRCUIT AMPLIFIERS 490
7 Building Blocks of IntegratedCircuit Amplifiers 492
Librar) of Congrw. Catalogingin Publication Data
8 Differential and Multistage Amplifiers 586
Sedra, Adet S. 9 Frequency Response 686
MIcroelectronic circuit~ f Adel"S. Sedra, Kenneth C. Smith. 6th ed, 10 Feedback 802
p. cm . (The Oxford series in electrical and computer engineering)
ISBN 978019 5323030 11 Output Stages and Power Amplifiers 910
I Electronic circuits. 2. Integrated circuits. I Smith, Kenneth Carles.. , II Title 12 Operational Amplifier Circuits 974
TK 7867 .s_~9 10 I0
611.3815, dcn
1009042633
PART III DIGITAL INTEGRATED CIRCUITS 10S8
Multlsim and National Instruments are trademarks of N ( II 13 CMOS Digital Logic Circuits 1060
boo " IS a product of O\!'ord University Press not National I nstrumenb
l . a lona
C'.
The Sedra/Smith H I C
,. leroe eOOIll{'\ in/liu, Sixth Edition
Up' ,nstruments orporatlon or any of 'ts rh]' d . 14 Advanced MOS and Bipolar Logic Circuits 1142
OIveNlt)' re~s IS ~olely responsible for the SedralSmth book d' I a late compaOles, and Oxford
nor any of the books and other goods and services offe~ed by Oa~ d'''Ucontent. Neither O;\ford University Press, the SedraJSmilh book, 15 Memory Circuits 1202
C .' . xlor OIverslly Press are official bl" . .
orporatlon or any of lis affiliated companies and the)' are t f. I d . pu Icatlons of NatIOnal Imtrumenh
po ra t Ion or any 0fIb' afhhated
"
companies.
., no a late wllh endorsedbyo db
, r sponsore y NatIonal Instruments Cor
.
PART IV FILTERS AND OSCILLATORS 1252
OrCad. and PSpice are. trademarks of Cadence Design Sy!otems, Inc The Sedral' .. .. 16 Filters and Tuned Amplifiers 1254
product of Oxford UOIverslty Press nOl Cadence n .. S SmJlh, M/( roelectolllcs Clrcuit,\ Sixth Editi() book .
. . ' " vt:slgn ystems, Inc or' , f' ffi' ' " IS a
1\ "olel.>' re~ponslble for the Scdra/Smith book and its COntent. Neithe;Ox;n) 0 Its a hated companies, and Oxford University Pre .. s 17 Signal Generators and WaveformShaping Circuits 1334
books and olh~r goods and ~ervices offered by Oxford Universil P .. ord UnIversity Press, the SedralSmith book, nor any of the
.
any. ~ft alhllated companies, and they are nOl affiliated With, e~dO~:~ ~~ offiCial publications of Cadence DeSign Systems, Inc or
Appendixes
II~ a h la~ed companle\. The uuthnn would likt: to thank Cudellct: D . ) ~r ~ponsored by Cadence Design Systems, Inc. or an '01
dlHnhllft Dread dt'mo ,mftware wifll thi5 bool t:5/J:1I SUIt/11j, Inc lor alloll'ing a'fiord U '. '. p )
, . nller.llt) n'.H, /t/(. 10 A VLSI Fabrication Technology Al (o n OV O)
CO I U Photo: The device is a full), integrated tri Ieband .. B SPICE Device Models and Design and Simulation Examples Using PSpice and
including tned and mobile tenninals
readily adapted to differe t
p" ,dualarm WtMAX RFIC targeted at broadba
. I' as well as PICQ and femlo ba,c ~talions The mul. I f
. '. ,.
nd Wireless acces .. applicatloO\,
Multisim n , B1 (on OVO)
Multlple.Output (M IMO) ~e:~~lona reqUirements, while the dualarm (dual~hannel) a:::~ requency bands enable equipment to be C Tw oPort Network Parameters Cl (on OVO)
lt
highquality Pha'tLocked LoaOlogRY d Illustrate .. the high degree of integrJtion required b tgheml ent allows the use of MultipleInput!
p~, a 10 Fr~uency Low N
mabie baseband filter .. and digital' . f
A .
 Olse mphfiers. Mixer.. and Po
Y e ate~t wlrele .. s stand d .
A ' ' ar s, Incorporating
o Some Useful Network Theorems 01 (on OVO)
.
!>O Iutlon .. provider, NASDAQ:PMCS Ci
CirCUitry or control and )'b .
'.
., wer mphfier stages'
COl I rallOn. (Photo credit PMCSie
II
'. ., a., we as program E Singl eTimeConstant Circuits El (on OVO)
) rr UllS, Analog (AcllveIoaded DIfferential A )'fi rr.a .. the premier Intemet infrastruuurc F sDomain Analysis: Poles, Zeros, and Bode Plots Fl (on OVO)
mp I er). Digital (CMOS Inverter).
Pnntmg number q 8 7654 3 2 I
G Bibliography Gl (on OV O)
H Standard Resistan ce Values and Unit Prefixes Hl
Printed in the: United States of America I Answers to Selected Problems 11
on aCldfree paper
Index IN'
v
TABLE OF CONTENTS
""
VII
Table of Contents ix
viII
2.7.2 Frequency Response of the Closed 4.3 Modeling the Diode Forward 5 I I DeVice Structure 232 Config uration 294
Loop Amplifier 99 Charaeterislie 179 5 1.2 Operation with Zero Gate 5.6.4 The CommonSource Amplifier wi th
2.8 LargeSignal Operation of Op Amps 102 4.3.1 The Exponemial Model 179 Vohage 234 a Source Resistance 297
2.8.1 0u1pUl Voltage SlI1Ur8Iion 102 4.3 .2 Graphical AnalySIs Usmg the 5.1.3 Creating a Channel for Current 5.6.5 The CommonGate Amplifier 300
2.8.2 Outpul Currenl Limits 102 Exponemial Model 180 Flow 234 5.6.6 The CommonDrain Amplifier or
2.8.3 Slew Rate 104 4.3.3 herative Analysis Using the 5.1.4 Applying a Small "os 236 Source Follower 302
2.8.4 FullPower Bandwidth 106 Exponemial Model 180 5.1.5 Operalion as "DS is Increased 239 5.6.7 Summary and Comparisons 305
SUlilmary 107 4.3.4 The Need for Rapid AnalysIS 181 5.1.6 Operation for "os;': "01' 242 5.7 Biasing in MOS Ampli fier Circuits 306
Problems 108 4.3 .5 The ConstantVoltageDrop 5,1.7 The pChannel MOSFET 244 5.7, 1 Biasing by Fixi ng Ves 307
Model 181 5.\.8 Complementary MOS or CMOS 246 5.7.2 Biasing by Fixing lie and Connect ing
4.3.6 The IdealDiode Model 183 a ReSistance in the Source 308
3 Semiconductors 124 4.3.7 The SmallSignal Model 184
5.1.9 Operating the MOS Transistor in the
Subthreshold Region 246 5.7.3 Biasing Using a DraintoGate
InImduc:lionI25
4.3.8 Use of the Diode Forward Drop In 5.2 Current Voltage Characteristics 247 Feedback Resistance 311
3.1 Inb;olic 125
Vohage Regulation 187 5,2,1 Circuit Symbol 247 5.7.4 Biasing Using a ConstantCurrent
3.2 Doped 126
4.4 Operallon in the Reverse Breakdow n Source 312
33 Flow mS, mo ...1401. 132 Region  Zener Diodes 189
5.2.2 The iD"D,' Characteristics 248
33.1 Drift 5.2.3 The iD"G' Characteristic 250 5.7.5 A Final Remark 314
4.4.1 Speeif)lng and Modeli ng the Zener 5.2.4 Finite Output Resistance in 5.8 DiscreteCirculi MOS Amplifiers 314
Diode 190 Saturation 253 5.8.1 The Basic StruclUre 314
4.4.2 Use of the Zener as a Shum 5.2.5 Characteri st ics of the pChannel 5.8.2 The CommonSource (CS)
Regulator 191 MOSFET 256 Amplifier 316
4.4.3 TemperalUre Effects 194 5.3 MOSFET Circui ts at DC 258 5.8.3 The CommonSource Amplifier with
4.4.4 A Final Remark 194 5.4 Applying the MOSFET in Amplifier a Source Resistance 318
4.5 Rectifier CirCUits 194 5.8.4 The CommonGate Ampli fier 318
Design 26R
4.5.1 The HalfWave Rectifier 195 5.4 .1 Obtaining a Vohage Amplifier 268 5.8.5 The Source Follower 321
4.5.2 The FullWave Rectifier 197 5.4 .2 The Voltage Transfer Characteristic 5.8.6 The Amplifier Bandwidth 322
45.3 The Bridge Reclifier 199 (VTC) 268 5.9 The Body Effect and Other Topics 323
,Rela!ionship of 4.5.4 The Rectifier with a Fiher 5.4 .3 Biasing the MOSFET to Obtain 5.9 I The Role of the Substrate The
Capacitor The Peak Reclifier 200 Linear Ampli fication 269 Body Effect 323
4.5.5 Precision HalfWave Rectifier The 5.4.4 The SmallS ignal Voltage Gain 270 5.9.2 Modeling the Body Effect 324
Super Diode 206 5.4.5 Determmlng the VTC by Graphical 5.9.3 TemperalUre Effects 325
4.6 limiting and Clamping Circuits 207 59.4 Breakdown and Input Protection 325
AnalYSIS 274
4.6.1 limiter Circuits 207 5.9.5 Velocity Saturation 326
5.4.6 Locating the Bias Poim Q 275
156 4.6.2 The Clamped Capacitor or DC 5,5 SmallSignal Operation and Models 276 5.9.6 The DepletionType MOSFET 326
Restorer 210 Summary 328
5.5.1 The DC Bias Point 276
4.6.3 The Voltage Doubler 212 5.5.2 The Signal Current m the Drain Problems 329
4.7 Special Diode Types 213
Terminal 277
4.7.1 The SchOltkyBarrier Diode 5.5 .3 Voltage Gain 279 Bipo la r Junction Transist o rs
(SBD) 213
5.5.4 Separating the DC Analysis and the
4.7.2 Varactors 214 (BJTs) 350
Signal Analysis 279
4.7.3 Photodiodes 214 IntroduClion 351
166 5.5.5 Small S ignal EqU ivalent Circuit
4.7.4 lightEmitting Diodes (LEDs) 214 6, I Device StruclUre and PhYSical
Models 280
Summary 215 Operal1on 352
5.5.6 The Transconductance Km 282
Problems 216 6.1 I Simplified Structure and Modes of
5.5 .7 The T Equi valem Circuit Model 287
Operation 352
5.5.8 Summary 290 6.1.2 Operation of the IIpll Transistor In
S MOS FieldEffect Transistors 5.6 Basic MOSFET Amplifier
the Active Mode 353
(MOSFETs) 230 Confi gurations 291 6.1 3 Structure of Actual Transistors 361
175 IntrodUction 231 5.6 I The Three Basic Con(iguratlons 292 6.1.4 Operation in the Saturation
178 S.I Device St ructure and PhYSical 5.6 ,2 Charactefi ling Amplifiers 293
Mode 362
178 5.6.3 The CommonSource
Operation 232
Table of Contents xi
x flbl. of Contents
6.1.5 The pnp Transistor 364 an Emitter Resistance 432 7.3 The Cascade Amplifier 506 8 Differential and
6.2 CurrentVoltage Characteristics 365 6.6.5 The CommonBase (CB) 7.3.1 Cascoding 506 Multistage Amplifiers 586
6.2.1 Circuit Symbols and Amplifier 436 7.3.2 The MOS Cascode 507 IntroductJon 5587
Conventions 365 6.6.6 The CommonCollector Amplifier or 7.3.3 Distribution of Voltage Cain in a 8 I The MOS Differential Pair 588
6.2.2 Graphical Representation of Emitter Follower 438 Cascade Amplifier 514 8.1.1 Operation with a CommonMode
Transistor Characteristics 370 6.6.7 Summary and Comparisons 445 7.3.4 The Output Resistance of a Source Input Voltage 589
6.2.3 Dependence of i, on the Collector 6.7 Biasing in BJT Amplifier Circuits 446 Degenerated CS Amplifier 517 8.1.2 Operation with a Differential Input
Voltage The Early Effect 371 6.7.1 The Classical DiscreteCircuit 7.3.5 Double Cascoding 518 Voltage 59_1
6.2.4 An Alternative Form of the Biasing Arrangement 447 7.3.6 The Folded Cascode 519 8.1.3 LargeSignal Operation 594
CommonEmitter Characteristics 374 6.7.2 A TwoPowerSupply Version of the 7.3.7 The BJT Cascode 520 8.2 SmailSIgnal Operation of the MOS
6J B11 Circuits at DC 378 Classical Bias Arrangement 450 7.3.8 The Output Resistance of an Emitter Differential Pair 599
6.4 Applying the B11 in Amplifier Design W6 6.7.3 Biasing Using a CollectortoBase Degenerated CE Amplifier 524 8.2.1 DIfferential Calll 599
6.4.1 Obtaining a Voltage Amplifier 396 Feedback Resistor 451 7.3 _9 BiCMOS Cascodes 525 8.2.2 The Differential HalfCircuit 001
6.4.2 The Voltage Transfer Characteristic 6.7.4 Biasing Using a ConstantCurrent 7.4 IC BiasingCurrent Sources_ Current
(VTC, )97 8.2.3 The Differential Amplifier with
Source 452 Mirrors. and CurrentSteering Circuits 526 CurrentSource Loads 603
6.4.3 Bia;ing the B11 to Obtain Linear 6.8 DiscreteCircuit BJT Amplifier 453 7 A.I The Basic MOSFET Current
Amplification 397 8.2.4 Cascode Differential Amplifier 004
6.8.1 The Basic Structure 453 Source 527 8.2.5 CommonMode Cain and Common
0.4.4 The SmallSignal Voltage Gain 399 7.4.2 MOS CurrentSteenng Circuits 530
6.8.2 The CommonEmiller Amplifier 455 Mode Rejection Ratio (CMRR) 005
0.4.5 Determining the VTC by Graphical
6.8.3 The CommonEmitter Amplifier with 7.4.3 BIT Circuits 532 8.3 The BIT Differential Pair 612
Analysis 4H1
an Emitter Resistance 457 7.5 CurrentMirror Circuits with Improved 8.3.1 Basic Operation 613
6.4.6 Locating the Bias Point Q 402
6.8.4 The CommonBase Amplifier 459 Perfonnance 537 8.3.2 Input CommonMode Range 615
0.5 SmallSignal Operation and Model, 40)
6.8.5 The Emitter Follower 460 7.5.1 Cascode MOS Mirrors 538 8.3.3 LargeSignal Operation 616
05.1 The Collector Current and the
Transl'(mdul'tance 404 6.8.6 The Amplifier Frequency 7.5.2 A Bipolar Mirror with BaseCurrent 8.3.4 SmallSignal Operation 61R
65 .2 The Base Current and the Input Response 461 Compensation 539 8.3.5 CommonMode Cain and
Rt.!sisli.tnL'C althc Base 406
1>.9 Transistor Breakdown and Temperature 7.5.3 The Wilson Current Mirror 539 CMRR 624
Effects 463 7.5.4 The Wilson MOS Mirror 542 8.4 Other Nonideal Characteristics of the
6jJ TheEmmer Current and the Input
Rt.!slstanl:c al the Emitter 407 6.9.1 Transistor Breakdown 463 7.5.5 The Widlar Current Source 543 Differential Amplifier 629
0,5,4 Voltage Gain 40S 6.9.2 Dependence of f3 on Ie and 7.6 Some Useful Transistor Pairings 546 8.41 Input Offset Voltage of the MOS
(,S5 Separating the Signal and the DC Temperature 464 7.6.1 The CCCE. CDCS_ and CDCE Differential Amplifier 629
QUilntiticlJ ..JOg Summary 465 Configurations 546 8.4.2 Input Offset Voltage of the Bipolar
h 5.6 The H)hrid_7 Model 410 Problems 466 7.6.2 The Darlington Configuration 549 Differential Amplifier 632
h'i.7 ThcTModd 41t 7.6.3 The CCCB and CDCC 8.4.3 Input Bias and Offset Currents of the
o S.X SmailSIgnal ~lode" of the pilI' Configurations 550 Bipolar DIfferential Amplifier 634
1 ran\I\lor 412 PART II INTEGRATED CI RCUIT Summary 553 8.4.4 A Concluding Remark 635
h.5.4 Applic'a"on of the SmallSignal 8 5 The DifferentIal Amplifier with Active
hIUI\ak'nt Cin.:uih 41."!
AMPLIFIERS 90
Appendix 7_A Comparison of the Load 635
6S I() Plormlng SmallSignal 8.5.1 Differential to SingleEnded
Analysj, Dircl."liv. on the CJreu,t. 7 Building Blocks of Integrated M05FET and BJT 554
. Conversion 636
I )I,tgram 41q Circuit Amplifiers 492 7 AI Typical Values of IC MOSFET 8.52 The ActiveLoaded MOS
6S II Augmenting the SmallSignal IntrodUction 493 Parameters 554 Differential Palf 637
MnJl'j to A":l'ouni for the Earl 7.1 IC DeSign Philosophy 494 7.A.2 Typical Values of IC BIT 8.5 '\ Differential Cain of the ActJvc
Ulclt 4~n ) 7.2 The Basic Calll Cell 495 Parameters 556 Loaded MOS Pair 63H
hSI~ Summaf\ 4'1
h '. ..~ 7.2.1 The CS and CE Amplifiers WIth 7.AJ Companson of Important 8.5.4 CommonMode Gain and
.n Ih'lC IlJ I Amplther ('onli .'
h h 1 Th J'h CurrentSource Loads 495 Characteristics 557 CMRR 641
" l: ree R "I\I. C Uratlon,
.
422
h (1 ~ rho . _ _,' l onhgurdtilln\ .P4 7.2.2 The Intnnsic Calll 496 7.AA Combining MOS and Bipolar 8.55 The Bipolar Differential Palf \\ Ith
().~.~ Th~ra.lIl'n/lllgAmplit1ers 42~ 72.3 Effect of the Output Resistance of Transistors: BiCMOS Circuits 568
'. c lOlllmnn_F'm. .. Active Load 644
004 Th. . . Itkr Amplther 4'7 the CurrentSource Load 499 7 AS Vahdlty of the SquareLaw MOSFET 8.6 Multistage Amplifiers 651
I.: (. nmmtln+.mittcr Amplifier \\ ;th 7.2.4 lncreaslllg the Calll of the Basic Model 569 8.61 A TwoStage CMOS Op Amp 1>51
Cell 50S Problems 569 8.6.2 A Bipolar Op Amp 657
xII Tabl. of Contents Table of Contents xiii
Summary 666 9.7.1 The Source FOllower 756 10.5.1 The Ideal Case 834 11 Output Stages and
Problems 1167 9.7.2 The Emiuer FOllower 758 105.2 The Practical Case 836 Power Amplifiers 910
9.8 HighFrequency Response of Differential 10.53 Summary 836 Introduction 911
Amplihers 76(1 10.6 The Feedback TransresistanceAmphfier
9 Frequency Response 686 II I Classification of Output Stages 912
Introduction 687 9.8.1 Analysis of the Remllvel} Loaded (ShuntShunt) 846 11 .2 Class A Output Siage 913
MOS Ampliher 760 10.6.1 The Ideal Case 846
9.1 LowFrequency Response of the CS and 11.2 I Transfer Characteristic 913
CE Amplifiers 689 9.8.2 Analys" of the Active Loaded MOS 10.6.2 The Practical Case 848 11 .2.2 SIgnal Waveforms 915
9.1.1 The CS Amplifier 689 Amplifier 765 10.6.3 Summary 855 11.2.3 Power Dissipation 915
9.1.2 The CE Amplifier 694 9.9 Other Wldeband Amplifier 10.7 The Feedback CurrentAmplifier (Shunt 11.2.4 Power Conversion Efficiency 917
9.2 Intemal Capacitive Effects and the High C"nhguralions 770 Series) 855 11.3 Class B Output Slage 918
Frequency Model of the MOSFET and the 9.9.1 Obtaining Wide band Amplificalion 10.71 The Ideal Case H55 11.3.1 Circuit Operation 918
BIT 701 by Source and Emitter 10.7 .2 The PractIcal Case 856 11 .3.2 Transfer Characleristic 919
9.2.1 The MOSFET 701 Degeneration 770 10.8 Summary of the I'eedback Analysis 11.1.3 PowerConversion EffiCiency 920
9.2.2 The BIT 706 9.9.2 The CDCS. CCCE and CD.CE Method 863 II 3.4 Power DiSSIpation 921
9.3 HighFrequency Response of the CS and Conhgurations 771 10.9 Determining the Loop Gain 863 II 3.5 Reducing Crossover
CE Amplifiers 711 9.9.3 The CCCB and CDCG 10.9 I An Altemalive Approach for D"lortlon 923
9.3.1 The CommonSource Amplifier 712 ConfiguratIons 777 Finding Vi 865 II 3.(\ SingleSupply Operation 924
9.3.2 The CommonEmi"er Amplifier 717 9.10 HIghfrequency Response of Multislage 10.9.2 EqUIvalence of Circuits from a 11.4 Class AB OutpUI Stage 924
9.4 Useful Tools forthe Analysis of the High. Amplifiers 779 Feedback Loop POint of View 866 11.4 I Circuit OperatIOn 924
Frequency R"ponse of Amplifiers 721 9.1 ().I Frequency Response of the Two. 10.10 The StabJilty Problem 868 11.4.2 Output Resistance 926
9.4.1 The HighFrequency Gain Stage CMOS Op Amp 780 10 10 I The Transfer Function of the 11.5 Biasing the Class AB Circuit 929
Function 721 9.10.2 Frequency Respon se of Ihe BIpolar Feedback Amplifier 868 11.5 I BlaSIng Using Diodes 929
9.4.2 Delermining Ihe 3dB Frequency Op Amp of Secllon 8.6.2 783 10.10.2 The Nyquist PIOI 869 11 .5.2 Biasing Using the Vo,
1" 721 Summary 7H4 10.11 Effect of Feedback on the Amplifier Multiplier 931
9.4.3 USing OpenCircuil Time ConSlant, Problems 7H~ Poles 870 11.6 CMOS Class AB Output Stages 933
for the Approx.imate Detennination 10.11 I Slabllit} and Pole Location 871
of!" 724 11.6.1 The Classical Configuration 9.1.1
10 Feedback 802 10.11.2 Poles of the Feedback 11 .6.2 An Alternative Circuit Utlli/ing
9.4.4 Miller\ Theorem 721
Introduction H03 AmplIfier 8n CommonSource Transistors 9J6
95 A Clmer uXlk at Ihe HighFrequency
1011 .3 Amplilier with a SinglePole II 7 Power BJTs 943
R"pon'e of the CS and CE Amp I'fi I ef'> 711
10.1 The General Feedback Structure 804
9.5.1 The Equivalent Circuit 731 . 10.2 Some PropenlC> of Negative Response 872 II 7 I Junction Temperature 944
9.5.2 Analysis USing Miller's Feedback H09 10 11.4 Amplifier WIth a Two Pole II 7 .2 Thermal Resistance 944
Theorem 732 Response 873 11 7 3 Power Dissipation versus
10.2.1 Gain DesensJliYit} 809
95.3 Analysis Using OpenCircuit Time 10 11.5 Amplifier WIth Three or More Temperature 944
10.2.2 Bandwidth Extension HIO
Con ... tam ... 735 Poles 877 II 7.4 Transistor Case and Heat Sink 946
10.2.3 NOISe Reducllon HI I
95.4 Exact Analysis 737 10.12 Stability Study USing Bode Plots 879 II 7.5 The BJT Safe Operating Area 949
10.2.4 Reducllon in Nonlinear
95 j Adapting the Formula, for the C 10.12 .1 Gain and Phase Margins 879 11.7.6 Parameter Valucs of Power
Distonlon 813
of the CE Amplifier 741 ase 10. 12.2 Effect of Phase Margin on Transistors 950
10.3 The Four BaSIC Feedback Topologies 814
95.6 The SUuatilm When R . L 10 J.1 Voltage Amplifiers 814
Closed Loop Response 880 11 .8 Variations on the Class AB
9 " HIg.he,roquen .. R' .... " ow 74' 10.12 .3 An Alternative Approach for
'Y esponse 01 the CG and Conhguration 950
C'a't,lde Amplih.rs 74~
IOJ.2 Current Amplifiers HI6
In vesti gating Stability 881
10.3 J Transconductance Ampl ihers 819 11 .8.1 Usc of Input Emitter
%.I HighFrequency Response of the CG 10.13 hcquency CompensatJ(lO 884 Followers 95 I
Amph"er 146 IOJ.4 TranSTeslStance Amplifiers H21
10 .13.1 Theory 8H4 11.8.2 Usc of Compound Devices 952
10.3.5 A Concluding Remark 822
96.2 HlghFrequency Res 10.13 .2 Implementation 885 11.83 ShortCircuit Protection 954
MOS ponse of the lOA The Feedback VoltageAmpliher (Senes'
9 6 1 H hC"sende Ampliher 750 Shunt) 823 10 13 '\ Miller Compensation and Pole 11 .8,4 Thermal Shutdown 955
'" Ig hequency Response of the 10.4.1 The Ideal Case 82.1 Splitt ll1g H86 II 9 IC Power Amplifiers 955
. BIpolar Cascode Am Ir Summary 890 II 9.1 A FixedGain Ie Power
97 Hlgh.f'requency. Rc PI ler 755 10.4.2 The Practical Case H25
dI \ptm\e of the S IOA.3 Summary 827 Problems 890 Ampilficr 956
an :mltter Follower... 756 ' nurce
10.5 The Feedback Transconductance. 11.9.2 Power Op Amps %0
Amplifier (SeriesSeries) 8:14 II 93 The Briuge Amplifier 960
Table of Contents xv
12.4.1 Reference Bias Current IIK)7 13.1.7 Propagalion Delay IOSO 14. 1.1 The PseudoN MOS Insener 1114
12.4.2 InputStage Bias 1007 13.1 .8 PowerDelay and EnergyDelay 14. 1.2 Sialic Characleri sllcs 1145
12.4.3 Input Bias and Offset Products 1084 14 . U Demallon of Ihe VTC 114h
Currents 10 10 13.1.9 Silicon Area 1085 14.1.4 D) namic Operation 1144
12.4.4 Input Offset Voltage 10 I0 13.1 .10 Digital IC Technologies and 14. 1.5 Design 1144
12.4.5 Input CommonMode Range 1010 logicCirc uit Families 1081i 14 .1.0 Gate CircUI ts 11 50
12.4.6 SecondStage Bias JO II 13.1 .11 Styles for DigitalSystem 14 .1.7 Condudmg Remarks Iioll
12.4.7 OutputStage Bias 1011 Design 1088 14 .2 PassTransistor Logu: Circui ts l iS.:!
12.4.8 Summary 1012 13.1 .12 Design Abstraction and 14 .~. 1 An Essenllal Design
12.5 SmallSignal Analysis of the 741 1013 Computer Aids 1088 ReqUirement 11 53
12.5.1 The Input Slage 10IJ 13.2 The CMOS Invener 1089 14 .~.~ Operat ion wi th NMOS Trans"tors
12.5.2 The Second Slage 1019 13 .2.1 Circuit Operation 1089 as Sw itc hes 1154
12.5.3 The OUtpUI Stage 1022 13 .2.2 The VoltageTransfer 14.:!.J Restoring the Val ue of \ O ff to
12.6 Gain, Frequency Response. and Slew Rale Characteri stic J092 VDn 115R
oflbe 741 1026 13 .2.3 The Situation When Q, and Qp are 14.~.4 The Use of Cvl0S Transmission
12.6.1 SmallSignal Gain 1026 Not Matched 1094 Gates as Switches 1159
121
12.6.2 Frequency Respon se Ion 13.3 Dynamic Operation of the CMOS 14.2.5 PassTransistor logIC CIrCUli
1'2.11
12.6.3 A Simplified Model 1028 Invener 1098 Examples 11M
121.2
12.6.4 Slew Rate 1029 133 .1 Determining the Propagation 14.~.6 A Final Remark 1166
12.6.5 Relationship Belween1, and 143 D) namlc MOS logIC CirCU Its 1166
12 13 \\IIIIfI CIlIa 9t8 Delay 1099
14.3 I The Basic Principle 1167
12 1.4 i IIiIjiI:Iion Ratio SR 1030 13.3 .2 Determining the Equivalent l oad
12.7 Modem Techniques for the Design of BJT Capacitance C 1104 143.2 Nonideal Effects 1171l
(CMRR) 981
12U Op Amps 1031 13.3 .3 In vener Sit ing 11 07 14.33 Domi no CMOS logIC 1173
981 143.4 Concluding Remarb 11 75
12 I 6 Slew RaIe 984 12.7.1 Special Performance 13 .3.4 Dynamic Power Di ssipation 1109
1217 Requirements 103 1 13.4 CMOS l ogicGate CirCUIts 111 0 14.4 EmitterCoupled log ic (ECl) 1175
Ratio 14.4.1 The B"ic Princ iple 1175
(PSRR) 986 12.7.2 Bias Design 1033 13.4.1 Basic Structure 111 0
12 I 8 DeIian 'IDdeoIIi \l87 12.7.3 Design of Input Siage 10 Oblain 13.4.2 The Two In put NOR Gate II J3 14.4.2 ECl Fami lies 1176
12.2 The Polded 0n00tJe CMOS RailtoRail VI(U I(n, 13.43 The Two Input NAND Gate 1114 14.4 3 The Basic Gate CirCUIt 1177

OpAmp 991 12.7.4 CommonMode Feedback 10 13.4.4 A Complex Gate 11 15 14.4 .4 VoltageTransfer
12.2.1 The Cimait 991 Charactcri~tics 11 RO
Control the DC Vohage al Ihe 13.4.5 Obtain ing the PUN from the PDN
12.2.2 Output of the Inpul Siage 104 1 and Vice Versa 1115 14.4 .5 Fan Out 1185
Output SWID& 993 12.7.5 OutputSlage Des ign fo r Near 13.4.6 The ExclUSiveOR Function 1115 14.4.0 Speed of Operation ano SIgnal
12.2.3 VoIIlSeOain 994 RailtoRail OUlpUI Sw ing 1045 13.4 .7 Summary of the Synthesis Transmission II X5
12.2.4 frequency Summary 1050 14.4 .7 Power Dissipation liMn
Method 111 7
12.2.~ Slew RaIe 99'7 Problems 1051 14.4.H Thermal effects IIX7
13.4 .8 TranSIStor Sit ing 1117
12.2.6 Comma 13.4 .9 Effects of FanIn and FanOut on 14.4.9 The WiredOR Capabdll) II'm
M D
14.4.10 Final Remarks II 'XI
ade Renae' RaiJtoRaiJ In t Propagation Delay 1121
Opelilion 999 pu 145 BiCMOS DigItal Circuits 1190
12.2.7 Incre"ina lite Output Vo
DIGITAL INTEGRATED 13.5 Implications of Technology Scaling:
14.5 I Thc BiCMOS Invener 1191
Issues in DeepSub mlcron DeSIgn 1122
Renae The IIISe CIRCUITS 1058 14.5.2 Dynamic Operallon 1193
13 .5.1 Scaling Implications 1123
Minor 1000 14.5 3 BIC1\IOS I.ogic Gates 114.1
12.3 The 741 OpAmp Cimdt 1002 13.5 .2 Veloc ity Satu ralion 1124
13 CMOS Digital Logic Circuits 1060 13 .5.3 Subthresho ld Conducllon 1129 Summar) 1195
12.3 I Biu Cimdt 1002 IntrodUction 1061
13 .5 .4 Wi ring The Interconnect 1130 Problems 1196
12.3.2 P 13 .I D'Iglta
. I logIC
. Inveners 106'
(';...... UIIetioa 13 .. Summar) 11 32
 "11004 .1.1 FunctIOn 01 the Insener 1062
12.3.3 11te Iaput SIISe 1004 Problems I 134 Memory Circuits 1202
13.1.2 The Voltage Transfer
g~~ ~~s.. 1004 Characteristic (VTC! 1062
IntTOlluction 12(>.'
15 I l.atches and FlipFlops 1204
12.3 6 0uIput SIISe lOllS
Device 13.1.3 Noise Margins 10M 14 Advanced MOS and
I, I I The latch 120.
12.4 DCAn'I)'iiIof~OIIS 13.1.4 The Ideal VTC 10hn Bipolar Logic Circuits 1142 15 .1 2 The SR FlipFlop 120n
13.1.5 Invener Implementation 1066 Introducti on II . n 15 I .1 CMOS Implementallon 01 SR
13.1.6 Power Dissipation 11178 14.1 PseudoN MOS Log ic Circuits 1114 Flip Flops 1207
Table of Contents xvii
xvi Table of Contents
16.11.5 The Cascode and the CCCB Waveforms 1366
16.5 The SecondOrder LCR Resonator 1279 Cascade 1321 17 .6 Generation of a Standardized Pulse
15.14 A Simpler CMOS ImplementatIon 16.5.1 The Resonator Natural
of the Clocked SR RipRop 1211 16 .11 .6 Synchronous Tuning 1321 The Monostable Multivibrator 1367
Modes 1279 16.11.7 Staggertuning 1323 17.7 IntegratedCircuit Timers 1369
151.5 D FlipFlop Circuits 1212 16.5.2 Realization of Transmission
15.2 SemIconductor Memories: Types and Summary 1327 17 .7. 1 The 555 Circuit 1369
Zeros 1280
Architectures 1214 Problems 1328 17 .7.2 Implementing a Monostable
16.5.3 Realization of the LowPass
15 .2. 1 MemoryChip Organization 1215 Multivibrator Using the 555
Function 1280
15 .2.2 MemoryChip Timing 1217 IC 1370
16.5.4 Realization of the HighPass 17 Signal Generators and 17.7.3 An Astable Multivibrator Using
15 .3 RandomAccess Memory (RAM)
Function 1282 WaveformShaping Circuits 1334
Cells 121 7 the 555 IC 1372
16.5.5 Realization of the Bandpass
15.3.1 Static Memory (SRAM) Cell 1218 Introduction 1335 17 .8 Nonlinear WavefOI mShaping
Function 1282
15.3.2 Dynamic Memory (DRAM) 17.1 Basic Principles of Sinusoidal Circuits 1374
16.5.6 Realization of the Notch
Cell 1225 Oscillators 1336 17.8.1 The Breakpoint Method 1375
15.4 Sense Amplifiers and Address Functions 1282
17 .1.1 The Oscillator Feedback 17.8 .2 The NonlinearAmplification
Decoders 1227 16.5.7 Realization of the AllPass
Loop 1336 Method 1377
154.1 The Sense Amplifier 1227 Function 1284
17 1.2 The Oscillation Criterion 1337 17.9 Precision Rectifier Circuits 1378
15.4.2 The RowAddress Decoder 1235 16.6 SecondOrder Active Filters Based on
17 .1.3 Nonlinear Amplitude Control 1339 17 .9. 1 Precision HalfWave Rectifier
15.4.3 The ColumnAddress Inductor Replacement 1285
17 .1.4 A Popular Limiter Circuit for The "Superdiode" 1378
Decoder 1237 16.6. 1 The Antoniou Inductance
Amplitude Control 1339 17 .9.2 An Alternative Circuit 1379
15.4.4 PulseGeneration Circuits 1238 Simulation Circuit 1285
16.6.2 The Op AmpRC Resonator 1286 17 .2 OpAmpRC Oscillator Circuits 1342 17.9.3 An Application: Measuring AC
15.5 ReadOnly Memory (ROM) 1240
16.6.3 Realization of the Various Filter 17.2 .1 The WienBridge Oscillator 1342 Voltages 1380
15.5.1 A MOS ROM 1240
Types 1288 17.2.2 The PhaseShift Oscillator 1344 17 .9.4 Precision FullWave Rectifier 1382
15.5.2 MaskProgrammable ROMs 1242
16.6.4 The AllPass Circuit 1289 17 .2.3 The Quadrature OsciIlator 1346 17.9.5 A Precision Bridge Rectifier for
15.5.3 Programmable ROMs (PROMs
16.7 SecondOrder Active Filters Based on the 17 .2.4 The ActiveFilterTuned Instrumentation Applications 1384
and EPROMs) 1243
Summary 1246 TwoIntegratorLoop Topology 1293 Oscillator 1347 17 .9.6 Precision Peak Rectifiers 1385
Problems 1247 16.7.1 Derivation of the TwoIntegrator 17.2.5 A Final Remark 1349 17.9.7 A Buffered Precision Peak
Loop Biquad 1293 17.3 LC and Crystal Oscillators 1349 Detector 1385
16.7.2 Circuit ImplementatIon 1295 17.3 .1 LCTuned Oscillators 1349 17.9.8 A Precision Clamping Circuit 1386
PART IV FILTERS AND 16.7.3 An Alternative TwoIntegrator 17 .3.2 Crystal Oscillators 1353 Summary 1386
Loop Blquad Circuit 1297 17.4 Bistable Multivibrators 1355 Problems 1387
OSCILLATORS 1252
17.4 I The Feedback Loop 1355
16.7.4 Final Remarks 1298
16.8 SingleAmplifier Biquadratic Active 17 .4.2 Transfer Characteristics of the Appendixes 1396
Filters 1299 Bistable Circuit 1356 VlSI Fabrication Technology (by Wai Tung
16 Filters and 16.8. 1 Synthesis of the Feedback 17.4.3 Triggering the Bistable Ng) A1 (on DVD)
Tuned Amplifiers 1254 Loop 1299 Circuit 1358 B SPICE Device Models and Design and
Introduction 1255 16.8.2 Injecting the Input Signal 1302 17.4.4 The Bistable CirCUIt as a Memory Simulation Examples Using PSpice* and
16 1 Filter Transmission. Types. and 16.8.3 Generation of Equivalent Element 1358 Multisim ' B1 (on DVD)
SpeCification 1256 Feedback Loops 1304 17 .4.5 A Bistable Circuit with C TwoPort Network Parameters C1 (on DVD)
16 1.1 Filter Transmission 1256 16.9 Sensitivity 1307 Noninverting Transfer o Some Useful Network Theorems 01
16 1.2 Filter Types 1257 16.9.1 A Concluding Remark 1309 Characteristics 1359 (on DVD)
16 .1.3 Filter SpeCification 1257 16.10 SwitchedCapacitor Filters 1310 17 .4.6 Application of the BIstable Circuit E SingleTImeConstant Circuits E1 (on DVD)
16 .2 The Filter Transfer Function 1260 16.10.1 The Basic Principle 1310 as a Comparator 1360 F 5Domain Analysis: Poles, Zeros, and Bode
16.3 Butterworth and Chebyshev Filters 1263 16.10.2 Practical Circuits 1312 17.4.7 Making the Output Levels More Plots F1 (on DVD)
16.3.1 The Butterworth Filter 1263 16.10.3 A Final Remark 1315 Preci se 1361 G Bibliography G1 (on DVD)
16.3.2 The Chebyshev Filter 1267 16.11 Tuned Amplifiers 1315 17 .5 Generation of Square and Triangular
16.4 FirstOrder and SecondOrder Filter H Standard Resistance Values and Unit
16.11 .1 The Basic Principle 1315 Waveforms Using Astable Prefixes H1
Functions 1270
16.11.2 Inductor Losses 1317 Multivibrators 1363 I Answers to Selected Problems 11
16.4 .1 FirstOrder Filters 1271
16.11.3 Use ofTransformers 1319 17.5 .1 Operation of the Astable
16.4.2 SecondOrder Filter
16.11.4 Amplifiers with Mu ltiple Tuned Multivibrator 1363 Index IN1
Functions 1271
Circuits 1320 17.5.2 Generation of Triangular
TABLES
FOR REFERENCE AND STUDY
XIX
PREFACE
Microelectronic Circliits, sixth edition, is Intended as a text for the core courses In electronic
circuits taught to majors in electrical and computer engineering. It should also prove useful to
engineers and other professionals wishing to update their knowledge through selfstudy.
As was the case with the first Ii ve editions, the objective of this book is to develop in the
reader the ability to analyze and design electronic circulls, both analog and digital, discrete
and Integrated. While the application of integrated circuits is covered, emphasis is placed on
transistor circuit deSign. This is done because of our belief that even if the majority of those
studYing this book were not to pursue a career in IC design, knowledge of what is inside the
IC package would enable intelligent and innovalive application of such chips. Furthermore,
with the advances in VLSI technology and design methodology, IC design itself is becoming
accessible to an increasing number of engineers
Prerequisites
The prerequisite for studying the material in this book IS a first course in circuit analysis
As a reView, some linear circuits matenal IS Induded here In the appendices. specifically,
twoport network parameters in AppendiX C; some useful network theorems in AppendiX D~
singletimeconstant circuits in Appendix E~ and .Idomain anal) sis in Appendix F No pnor
J,.nowledge of physical electronics is assumed. All required semiconductor device phySiCS IS
included, and Appendix A provides a brief description of IC fabrication. All these appendices
can be found on the DVD that accompanies this book.
Emphasis on Design
It has been our philosophy that circuit design IS best taught by pointing out the vanous trade
offs available in selecting a circuit configuration and 111 selecting component values for a
given configuration. The emphasis on design has been increased in this edition by including
more design examples, simulation examples, exercise problems, and endofchapter prob
lems Those exercises and endofchapter problems that are considered "designorientecr
arc mdicated with a D. Also, considerable material is provided on the most valuable deSign
aid, SP ICE, mcluding Appendix B, which is available on the DVD sO that it can be offered
in searchable format, and in the full detail it deserves while 110t crowding other topics out of
the text
XXI
Preface xxiii
Preface
3. Streamlined MOSFETs and BJTs. Chapters 5 (MOS FETs) and 6 (BJTs) have been
New to This Edition rewritten to Increase the clarity of presentation and emphasize essential topics. Also.
these chapters are now shorter and can be covered faster.
Although the philosoph) and pedagogical approach of the first five edi ~,ons have heen re
4. Cascode Configuration . A nove l and Intuiti ve ly appealing approach is used to in
tamed. several changes have been made to both orgal1lzatlon and CQvera!!e.
troduce the cascode config uration In Chapter 7.
1. FourPart Organization . The book has been reorganized II1tO fou r Parts . Part I
5 . Comparison of MOSFETs and BJTs. The insightful comparison of the MOSFET
DeVIces tlnd BaSIC Circuits (Chapters I 0) prov ides a coherent and comprehenSIve
ami the BJT has been moved to an appendi x attached to Chapter 7. The appendi x
singlesemester introductory course in electronics. SI milarly. Part II Integrated
also includes an update of the dev ice parameter values corresponding to various
Cir:'uit Amplifiers (Chapters 712) presents a rich package of material SU Itable tor
generati ons of fabrication process technologies. This appendix prov ides a good re
a second course Part III: Digitlllllllegrated Circuits (Chapters 1315) represents
view and a reference that can be consulted at various points in a second course.
a nearh selfcontained coverage of digItal e1ectrol1lcs that can be studIed after
Chapte~ 5 (~OSFETs) and 6 (BJTs). or even only 5 If the emphaSIS IS on ]l.[OS 6 . Feedback . The feedbac k chapter (Chapter 10) has been rewritten to increase clarity.
digItal CIrCUItsextremely helpful for teaching Computer EngIneenng ,tudents Also. a large number of new examples. mostly MOSbased . are included .
Finalh Part [\. Filters alld OSCillators' Chapters 617 I. deal, WIth more specitic 7. Class AB Amplifiers. New material on MOS FET class AB amplifiers is Incl uded
applic'atlononented material that can be used to supplement a second course on In Chapter II
analog CIrcuits_ be part of a thIrd course. ,Jr used as reading and reference matenal to
support student deSIgn projects. More on course deSign IS gIven below 8 . Low Voltage Bipolar Design . While the classical 74 1 opamp circuit is retained.
a new sectIon on modem techniques for the design of lowvoltage bipolar op amps
2. Flexible organization. The most important feature of thIS edition is its flexible or
has been added to Chapter 12.
gal1lzatlOn Some manifestations of this flexibility are:
"I08FETs and BJTs Chapter 5 (MOSFETs) and Chapter 6 (BITsl are wntten 9 DeepSubmicron Design . In addition to augmenting and consolidating the material
10 be completely independent of each other and thus can be taught in whatever on digital electronics in Part Ill . a new section on technology scaling (Moore 's Law)
order the Instructor desires. Because the two chapters have identical structures. and deepsubmicron des ign issues has been added (Chapter 13).
the chapter taught second can be covered much faster 10. MOS Emphasis . Throughout the book. greater emphasis is placed on MOS circuits
Robust Digital Coverage. The digital matenal has been grouped together In to reAect the current dominance of the MOS FET in electronics .
.he new Part m. updated. and expanded. It can be covered at vanous pmnts In
11. Bonus Reading on DVD. Supplementary matenal on a wide variety of topics that
the first or second course. All that IS needed by way of background IS the mate
nal on the two transistor types (Chapters 5 and 61 or even Just Chapter 5 since were Included In previous editIons is made available on the DVD accompanying the
most digital electrol1lcs today IS "lOSbased. book (see a li sting be low)
Semiconductors as :Ieeded. The reqUITed matenal on senuconductor physics 12 Examples. Exercises. and Problems. The number of Examples has been Increased.
has been grouped together 111 a short chapter Chapter 31 that can be taught . Also. the inchapter Exercises and endofchapter Problems have been updated with
slupped. or aSSIgned as readIng matenal. depending on the background of 'the parameter values of current tec hnologies so students work with a realworld per
students and the Instructors teaching philosophy This chapte; serves as a specti ve on technology. More Exercises and Problems. of a greater variety. have
pnmer on the basICS. or as a refresher. depending on whether students have had been added .
a pnor course in senuconductors
13. Summary Tables. As a study aId and for easy reference . many summary tables are
Opamps Anywhere The opamp chapter (Chapter 2) can be taught at any
included . See the complete List of Summary Tables after the Table of Contents.
pomt m the first or second course or skipped altogether if this matenallS taught
In other courses . ... 14. Learning Objectives. A new section (In Thi s Chapter You Will Learn ... ) has been
:requency Response. The matenal0n amplifier frequency response has ':leen added at the beg inning of each chapter to foc us attention on the major learning
erouped together II1tO a SIngle chapter (Chapter q) . The chapter is orgal1lled n objecti ves of the chapter.
a way that allows coverage 01 as few sectIons '''s the nstrut
_ ' <..l.,; I
d
l or eems necessary 15. SPICE A SIgnI ficant number of new Slmulallon examples using National Instru
Also. some 01 the basIC matenal (Sections ljl IL' q 3 can be covered earlier ments'" Multisim '" are added to the Cadence PSpice' simulation examples . To
aiter Chapters 5 or hi as part of the first course gether with a sectIon describing the SPICE deVIce models. these design and simula
"'lustCover" ~ . F'
'. .. OplCS Irst. Each chapter IS orgal1lzed so that the essentIal tIon examples are grouped together in Appendi x B. They can also be found together
mustcover tOPICS are placed Ii t d h .
last ~o . . al' . rs. an t e more speCIalized material appears WIth ot her simul ation fi les in the Labona Di sc on the DVD .
.  re spec I" Ized matenal that can be Iu d
the student IS first leamll1g th b' .. s ppe on a first reading. whIle 16. Simulation A number of endorchapter Pro blems in each chapter are marked with
e aSles. I marked WIth a '+' 0 . h d
understand the COre concepts th v nee t e stu ents the SIM icon , as simulation pro blems. Students attempting these problems will
tOpICS. ey can return to these rt b . .
. Impo ant ut 'peclailled find considerable additi onal gUIdance on the DVD .
17. Key Equations. All equations that will be crossreferenced and used again are num
bered . Particul arly important equations are marked with a spec ial icon. 0
Preface XXV
xxiv Preface
A website for the book has been set up (www.oup .comJus/sedrasmith, or www.sedrasmith .
. d . 'bed above new coverage is induded on all of the
As well as the structural differences escn . org). Its content will change frequently to refl ect new developments in the field . On the site ,
following technical topiCS. PowerPointbased slides of all the fi gures in the text are available for easy notetaking. The
Entirely rewritten coverage of semiconductors (Chapter 3) '. website also features datasheets for hundreds of useful dev ices to help in laboratory experi
MOSFET and BJT chapters extensively rewntten and restructured. with new ments, links to industrial and academic websites of interest, and a message center to com
figures and examples (Chapter 5 and 6) municate with the authors and with Oxford Uni versity Press.
The basic gain cell (Chapter 7)
The cascode amplifier (Chapter 7)
CCCE, CDCS, and CDCE transistor confi gurations (Chapter 7)
CMRR (Chapter 8) Exercises and EndofChapter Problems
The differential amplifier with acti ve load (Chapter 8)
Determirung the output resistance Ro(Chapter 8) Over 475 Exercises are integrated throughout the text. The answer to each exercise is given
All new sections on frequency response (Chapter 9) below the exercise so students can check their understanding of the material as they read .
Many. many new MOS examples of feedback (Chapter 10) Solvmg these exercises should enable the reader to gauge his or her grasp of the preceding
CMOS class AB output stages (Chapter I I) material. [n addition, more than 1450 endofchapter Pro blems, 55% of which are new or re
Rejection ratios (CMRR and PSRR ) (Chapter 12) vised m this editIOn, are provided . The problems are keyed to the indi vidual chapter sections
Modem techniques for the deSign of BJT op amps (Section 12.7) and theJf degree of difficulty is indicated by a rating system: difficult problems are marked
Digiral logJc Inverters (Chapter 13) with an asterisk ('); more difficult problems with two asterisks (**); and very difficult (andJ
The CMOS inverter (Chapter 13) or time consuming) problems with three asterisks (***). We must admit , however, that this
Deep subrnicron design and technology scaling (Moore's Law) (Section 135) claSS ification is by no means exact. Our rating no doubt depended to some degree on our
thmking (and mood! ) at the time a particular problem was created . Answers to sample prob
lems are given in Appendix I, so students have a checkpoint to tell if they are working out
the problems correctl y. Complete solutions for all exercises and problems are included in the
The DVD and the Website Instructor s Soilitions Manllal, which is available from the publisher to those instructors who
adopt the book.
A DVD accompanies this book It contains much useful supplementary mforrnation and ma As in the previous fi ve editions, many examples are included . The examples, and indeed
terial intended to enrich the student's learnmg experience. These include most of the pro blems and exercises, are based on real circuits and anticipate the applications
1 Student versIOns of both Cadence PSpice and NatlOnallnstruments T" Multisim'" encountered in designing reallife circuits. This edition continues the use of numbered solu
2. The input files for all the PSpice and Multisim T" examples m this book. tion steps in the fi gures for many examples , as an attempt to recreate the dynamics of the
classroom
3. Stepbystep gUIdance to help With the simulation Examples and endorchapter
Problems Identified With a ' Icon
Course Organization
4 . A link to the book's website, offenng PowerPoint slJdes of every figure m th" book
that students can pnnt and carry to class to facilitate taking notes. The book contams sufficient material for a sequence of two singlesemester courses (each
of 4050 lecture hours). The organization of the book provides considerable flexibility for
5. Bonus text material of specialized tOpiCS not covered in the current edition of the
textbook. These mclude: course design. In the follow ing , we suggest various possibilities for the two courses. This is
also laid (,ut in an easytofollow visual form at the beginning of the Instructor 's Edition of
Junction FieldEffect TransIStors (JFETs)
the book.
Gallium Arsenide (GaAs) deVices and circuits
TransistorTransistor Logic (TTL) Clfcuits The First Course
Analogto D' Iglla I and DlgllaltoAnalog
. . converter Circuits At the core of the fi rst course are Chapters 4 (Diodes), 5 (MOSFETs) , and 6 (BJTs). Of
6 , Appendices for the book these three, the MOS FET chapter IS the one that has to be covered most thoroughly. If it is
: AppendiX A. VLSI Fabncation Technology covered before the B1T, and we recommend that it should be. then the BIT chapter can be
AppendiX B SPICE Device Models and Desi n . . covered much faster. If time does not pellllit , some of the later sections in Chapter 4 can be
109 PSPICe' and Muhisim T" g and SimUlatIOn Examples Ls sk ipped. Chapter I (S ignals and Ampli fiers) deserves some treatment in class. Although the
: AppendiX C TwoPort Network Parameters Signal concepts can be ass igned as outofclass reading, the amplifier material should be
AppendiX D: Some Useful Network Theorems discussed. However, if frequency response IS not emphasized in the first course, Section 1.6
: AppendiX E: SingleTimeConstant Circuits can be skipped .
Around this core, one can build three poss ible curricula for the first course:
1. Standard : Chapters 16. Here, some or all of Chapter 2 (Op Amps) can be delayed.
Also, the dec ision as to how much to cover of Chapter 3 (Semiconductors) will
xxvi Preface Preface xxvii
depend on the students' background and the mstructor's philosophy If deSIred. this Amplifiers are introduced as circuit building blocks and their various types and models are
course can be supplemented by the material on amplifier frequency response m Sec studied. ThiS chapter also establishes some of the telillinology and conventions used through
tions 9.19.3. out the text
2. Digital Orielltalloll: Chapters I (without Section 1.6),4 (without the later applica Chapter 2. Chapter 2 deals with operational amplifiers, their terminal characteristics ,
tions sections), all of 5. 6 (perhaps focusing only on the early sections), Section 9.2, simple applications, and practical limitations . We chose to discuss the op amp as a circuit
and Chapters 13, 14, and 15. If time constraints are a concern. coverage of 6 can be building block at this early stage simply because it is easy to deal with and because the stu
shortened; Section 13.5 on Moore's Law and deepsubmicron design can be skipped, dent can experiment with opamp circuits that perform nontrivial tasks with relative ease
and Sections 14.4 and 14.5 that depend on BJTs can be omitted. This course is ideal and with a sense of accomplishment. We have found this approach to be highly motivating
for Computer Engineering students. to the student. We should pOint out, however, that part or all of this chapter can be skipped
3. Analog Orientation. Chapters 1.4 (perhaps without all of the later, more application and studied at a later stage (for instance, in conjunction with Chapter 8, Chapter 10, and/or
oriented sections). 5. 6. 7 (without the advanced material in 7.6).8,9 (including at Chapter 12) with no loss of continuity.
least 9.19.3, and the instructor's selection of other topics)' and 10 (a selection of Chapter 3 . Chapter 3 provides an overview of semiconductor concepts at a level suf
topics). This is a heavy cour e. and assumes that the students have previously cov ficient for understanding the operation of diodes and transistors in later chapters. Coverage
ered op amps and maybe diodes. as well as device physics. This course is ideal where of this material is useful in particular for students who have had no prior exposure to device
the first electrical engineering course is a hybrid of circuits and basic electronics. and phYSICS . Even those with such a background would find a review of Chapter 3 beneficial as
where students have taken a semiconductor del'ice physics course. a refresher. The instructor can choose to cover this material in class or assign it for outside
readmg.
The Second Course
Chapter 4 . The first electronic device. the diode, IS studied in Chapter 4. The diode
There are three possibilities for the second course:
termmal characteristics, the circuit models that are used to represent it. and its circuit ap
1. Standard: Chapters 712. If time does not permit, some of the later sections m Chap plicatIOns are presented. Depending on the time available in the course, some of the diode
ter 9 can be skipped. Also, some of the more advanced topics in Chapters II and 12 applications (e.g., Section 4.6) can be skipped. Also, the brief description of special diode
can be skipped . If desir~d, some material from Chapter 16 (Filters) and Chapters types (Section 4.7) can be left for the student to read .
17 (Os~d lators) can be mcIuded. This course ideally follows the "Standard First Chapters 5 and 6. The foundation of electronic circuits is established by the study of
Course outlmed above. the two transistor types in use today: the MOS transistor in Chapter 5 and the bipolar transis
2. Analog alld Digital Combination: Chapters 7,8,9 (selection of topics), 10 (selection tor in Chapter 6. These are the two most important chapters of the book. These two chapters
of tOPICS), 13 (p~rhaps without Section 13.5 on technology scaling), 14 (omitting have been written to be completely independellt of one another and thus can be studied ill
14.4 and 14.5 If lime IS short), and 15 (selection of topics). either order. as desired. Furthermore. the two chapters have the same structure. making it
3. Electrical Followup: Chapters 6. 7, 8, 9,10, and a chOIce of tOpiCS as time allows easier and faster to study the second device, as well as to draw comparisons between the two
selected from Chapters II and 12. This course is ideal for Electrical En ineerin ' device types .
students who took a first semester with a "Digital Orientation" outlined ~bove t~ Each of Chapters 5 and 6 beginS with a study of the device structure and its physical
accommodate Computer Engineering students. operation, leading to a description of its terminal charactenstlcs. Then, to allow the student to
become very familiar with the operation of the transistor as a circuit element. a large number
of examples are presented of dc circuits utilizing the device . We then ask: How can the tran
Supplementary Material/Third Course
sistor be used as an amplifier? To answer the question we consider the largesignal operation
Chapters 16 (Filters) and 17 (Oscillators) contain m . of the basic commonsource (commonemitter) circuit and use it to delineate the regions over
third course on analog circuits. As well thi ,atenal that can be used to supplement a which the device can be used as a linear amplifier, from those regions where it can be used
used to aid students Who are pu . d'. s matenal IS highly deSignoriented and can be
rSUing eSlgn prOjects as a switch. We then pursue the smallsignal operation of the transistor and develop circuit
Chapters 13, 14, and 15 can be used as ab ' models for its representation . The various configurations in which the transistor can be used
Course on digitallC design . out half (IS hours of lecture) of a senior level
as an amplifier are then studied and contrasted. This is followed by a study of methods to
bias the transistor to operate as an amplifier in discretecircuit applications. We then put ev
erything together by presenting complete practical discretecircuit transistor amplifiers. The
last section of each of Chapters 5 and 6 deals with secondorder effects that are included for
An Outline for the Reader completeness. but that can be skipped if time does not permit detailed coverage.
PartI,DevicesandB . C' After the study of Part l. the reader will be fully prepared to study either integrated
aSlc /Tcuits, includes the m circuit amplifiers in Part Il , or digital integrated circuits in Part III.
the study of electronic circuits. At the same tim . ost fundamental and essential tOPICS for
COurse On the SUbject. e, It constitutes a complete package for a first Part II, IntegratedCircliit Amplifiers, is devoted to the study of practical amplifier cir
Chapter 1. The book starts with a . . cuits that can be fabricated in the integratedcircuit (IC) form. Its six chapters constitute a
Chapter I. Signals, their frequency spe~:antrodduchtl~n to the basic concepts of electronics in coherent treatment of IC amplifier design and can thus serve as a second course in electronic
,an t elf analog d d' . circuits.
an Igltal forms are presented.
Preface xxix
xxviii lface
digItal cirCUIts.
Chapter 7 Begmnmg with a bnef introduction to the philosophy of IC desl~n. Chapter 7
Chapter 14. Chapter 14 builds on the foundation established in Chapter 13 and pres
. . b 'Id'
presenh the basIc circuIt U1 mg bl"ks l C, that
' are used
 10 the deslon o.
of IC ampllfie".
_. _
We start
ents three Important types of MOS logic circuits. As well, a SIgnificant family of bipolar
. .' II . . 'ammonsource (commonemItter) tranSIstor loaded
\\ ilh the ba\.c gam ce compnsmg a I.: . '. . ,) . _ ,
logIC cirCUIts, emittercoupled logic, is studied. The chapter concludes with an interesting
. d k" How can we mcrease Its voltaoe oam. TIllS leads naturall) to
with a current source. an as . . _ eo 0 _
digital CIrcuit technology that attempts to combine the best attributes of bipolar and CMOS:
(he concept 0 f casco. d'mg and I'ts.use ' in the. cascade
.. amplifier
. and the cascade. current source. __ BiCMOS.
We then consIder the methods used for blasmg IC amplifiers. The chapter concludes. as do
most chapters In the book. with advanced topi" (Secllons 7.5 and 7.6) that can be skIpped If Chapter 15. Digital circuits can be broadly divided into logic and memory circuits. The
latter is the subject of Chapter 15.
the Instructor is pressed for time. . '
Chapter Appendix 7,A Chapter 7 includes an appendix that provIdes a comprehensIve Part IV, Filters and Oscillators, is intentionally oriented toward applications and sys
compilation and companson of the properties of the MOSFET and the BJT. The comparISon tems. The two topics illustrate powerfully and dramatically the application of both negative
is aided by the inclusion of typical parameter values of deVIces fabncated WIth modern pro and positive feedback.
cess technologIes This appendix can be consulted at any pomt from Chapter 7 on. and should Chapter 16. Chapter 16 deals with the design of filters, which are important building
serve as a concise revIew of the important charactenstics of both transistor types. blocks of communication and instrumentatIon systems. A comprehensive, designoriented
1\10S and Bipolar. Throughout Part II. both MOS and bipolar circuits are presented treatment of the subject is presented. The material provided should allow the reader to per
S1debYSlde Because the MOSFET is by far the dominant deVIce. Its circuits are presented form a complete filter design. starting from speCIfication and ending with a complete circuit
first. Bipolar CIrCUItS are dIScussed to the same depth but occasionally more briefly. realizatIOn. A wealth of destgn tables is included .
Chapter 8. The most importantlC bUIlding block. the differential pair. is the mam tOpIC Chapter 17. Chapter 17 deals with circuits for the generation of signals with a variety
of Chapter 8 The last section of Chapter 8 is devoted to the study of multistage amplifiers . of waveforms: slOusoidal, square. and triangular. We also present circuits for the nonlinear
Chapter 9 Chapter 9 presents a comprehensive treatment of the Important subject of shaping of waveforms.
amphfier frequency response Here. SectIons 9.1,9.2. and 9.3 contain essential material; Sec Appendices. The eight appendIces contain much useful background and supplementary
tions 9.4 and 9.5 provide an indepth treatment of very useful new tools; and Sections 9.0 to material. We wish to draw the reader's attention in particular to the first two: Appendix A
9.10 present the frequency response analysis of a variety of amplifier configurations that can provides a concIse introduction to the important topic of lC fabrication technology including
be studied as and when needed. A selection of the latter sections can be made dependmg on IC layout. Appendix B provides SPICE device models as well as a large number of design
the lime avadable and the mstructor's preference and simulation examples in PSpice~ and MultisimT\'. The examples are keyed to the book
Chapter 10. The fourth of the essential tOpICS of Part II. feedback. is the subject of chapters . These Appendices and a great deal more material on these simulation examples can
Chapter 10 Both the theory of negat"'e feedback and its application 10 the deSIgn of practical be found on the DVD accompanying the book.
feedback amplifiers are presented. We also discuss the stability problem in feedback amplI
fiers and treat frequency compensation In some detail
Chapter 11 . In Chapter II we switch gears from dealing with smallsignal amplifiers
to those that are reqUIred to handle large signals and large amounts of power. Here we study Ancillaries
the dIfferent amplifier classesA, B. and AB and their realization in bipolar and CMOS
technologIes . We also consider power BJTs and power MOSFETs, and study representative A complete set of ancillary materials is avadable WIth this text to support your course.
IC power amplifiers. Dependmg on the availability of tIme, some of the later sectIons (e .g.,
I I .81 1.10 on spCClal applicatIons) can be skipped in a first reading.
For the Instructor
~hapter 12. Fmally, Chapter 12 brings together all the topics of Part 1/10 an Important
applicatIOn. namely, the deSIgn of operatIonal amplifier circuits. We study both CMOS and The IlIstructor:S Soilltiolls Manllal provides complete worked solutions to all the exercises in
bIpolar op amps. [n the latter category. besides the classical and still timely 741 circuit. we each chapter and all the endofchapter problems in the text.
present modern technIques for the deSIgn of low,voltage op amps (Section 127) The Instructor's Resource CD is bound into the Instructor's Solutions Manual so
ffi P~rt :11 ,Dlgltalllllegrated Cirmit.l. provides a brief but nonetheless comprehenSIve and instructors can find all their support materials in one place. The Resource CD contains
:~g IClentht ) detaIled study of dlgltallC design. Our treatment is almost selfcontamed requir PowerPomtbased slides of every figure in the book and each corresponding caption. The
or e most part only a thorough d d' f ' slides can be projected 10 class. added to a course management system. printed as overhead
Chapter 5 Thus Part III can b .t d' dun eh"tan Ing 0 the MOSFET material presented 10
.. e S u Ie ng t after Chapte 5 Th I . . transparencIes. or used as handouts. The CD also contains complete solutions and instruc
the last two sections in Chapter 14 'h" h r. e on ) exceptIons to th" are
" Ie require knowledge f th BJT C tor's support for the LabonaDisc simulatIon problems . (ISBN 9780195340303)
knowledge of the MOSFET iote I ' . a e (hapter 6) Also,
Chapter 13 Ch I' rna capaCItances (SectIon 9 2.2) will be needed.
. apter,' " the foundatIon 01 Part III l b ' . . ..
crs (Seellon 11 I) and then co . t egms '\lth dIgItal logIC IOvert For the Student and Instructor
o. , ncentrates on the breadand b '. . .
the CMOS mverter (SectIons 112 and 11.3) and  utter tOPICS of dlgltallC deSIgn The DVD IIlcluded with every new copy of the textbook can tams LabonaDisc SImulation
seCllon (13.5) deals with the impl'c t' I' CMOS logIC gates (Sectmn 13.4) . The last
'. I a Ions Il teChnology sc I' ( M ' . activities In Multisim'M and PSpice " for many of the simulation Examples and Problems in
Important ISsues m deepsubmlcron tech I ' .. a mg oore s law) and dIScusses the text. It also contains a Student Edition of Cadence PSpice ' v. 16.2 Demo software, and a
115 h' ' .
.. ,t c matenalm Chapter 13 is th . no ogles. With the pO 'bl .
SSI C exceptIOn of SectIon
' . e mInImum needed to I . Student Edtlion of National Instruments T " Multisim'" version 10.1.1, both of which can be
earn somethIng meaningful about
xxx Preface Preface xxxi
run by studenlS on their own computers so they can practice their course work wherever the) We wish to extend specml thanks to our Publisher at Oxford University Press. John
happen to study. Bonus text topics, the Appendices, and a link to the book's websJle featur Challice. and to the hardworking editorial team of Englneenng ASSOCiate Editor Rachael
ing manufacturer datasheelS and PowerPointbased slides of all of the book's illustrations. Zimmermann and Editorial Director Patrick Lynch. who have meticulously prepared all the
complete the DVD. ancillary support for this book Steve Cestaro. Director of Editorial. Design. and ProduclIon.
pulled out all the stops on this edition Barbara Mathieu. Senior Production Editor. worked
quietly. cheerfully. and tirelessly to bring this book to completion under Significant pressure.
making a difficult job look easy with grace and creativity, And last but certainly not least. a
Acknowledgments special note of thanks and gratitude to our Development Editor. Danielle Christensen. who
was our main point of contact with OUP throughout the enlIre project and who managed the
Many of the changes in this sixth edition were made in response to feedback received from project with creativity. thoughtfulness. and dedication.
ins.tructors who adopted the fifth edition. We are grateful to all those who took the time to Finally. we wish to thank our families for their support and understanding. and to thank
wnte to us. In addition. dozens of reviewers provided detailed commentary on the fi fth edi all the students and instructors who have valued this book throughout its history .
110n and suggested many ofthe changes that we have incorporated in this revision. They are
lIsted later; to all of them. we extend our sincere thanks. Adel S. Sedra
A number of individuals made significant contributions to this edition, Sam EmamIneJad Kenneth C. (KC) Smith
and Muhammad F31sal prepared the Multisim'" and new PSpice' simulations and helped
With many aspeclS of the manuscript preparation. Olivier Trescases of the University of To
ronto and hIS 'studenlS
. helped Immense . I y, 'Independently testing ' all the simulations In the
LabonaDlSc Wal Tung Ng f th U' . of Toronto rewrote Appendix A Gordon
' . . a e DIversity
Rabe rts 0fM cGIII VDlvefSlty gave u ' ..
SPICE 2'" d" s permISSIon to use some of the examples from the book
e Itlon. by Roberts and Sedra S' D'.. .
d t '1 d . . Ima Imltrljev OfGflffith University undertook a
e al e review of Chapter 3 on semicond d,.. 0 '
of Srillsh C I b' '" . uctor eVlces. and DaVid Pulfrey of the UnlvcrsHy
o urn la ouered suggeslIons as w II A" h> . ,,
M G'I1 V' . . e. SlOt c prevIous ed1l10n. Ana, HamOUI of
c I mverslty was the source of man ood' .
prepared discs for the stud t d' Yg Ideas. Jim Somers of Sonora DeSlgnworks
en an IOstructor support t ' I J ' .
the revisions with k'll d , r n a efla s, enOl fer Rodngues typed all
0
Robe'
alTungN U'
'
0
nIVCn.,u), Pr" . b
Is \arIOUS ant:ilJari' \11 css contn uted to the development of
Pauhl Schlosser d d . CS. we would lik ~ t . . .
JIll (' 00 an eSigners Dan Niver S' b' ,c 0 speCifically mention Art DIrector
rnS~(ln. as well S . In In LI . a nd AnnJ' k ' Senior Copywriter
'
 _ "
B nenla. Jim Sf! k as usanne Arringt a Sann
on. Andy Sat I B'
GI 'atcr, colO s, (,hm Cntelli M 'h ' t e. flan Black Sonya Borders. Gigi
0 , 0 '
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icroe ectron ic
"'ircuits
PART I
art I, Devices and Basic Circuits, includes the most fundamental and essential topics
for the study of electronic circuits. At the same time, it constitutes a complete pack
age for a first course on the sUbject.
The heart of Part I is the study of the three basic semiconductor devices: the diode
(Chapter 4); the MOS transistor (Chapter 5); and the bipolar transistor (Chapter 6). In each
I case, we study the device operation, its characterization, and its basic circuit applications.
For those who have not had a prior course on device physics, Chapter 3 provides an over
view of semiconductor concepts at a level sufficient for the study of electronic circuits . A
review of Chapter 3 should prove useful even for those with prior knowledge of semi
conductors.
Since the purpose of electronic circuits is the processing of signals, an understanding
is essential of signals, their characterization in the time and frequency domains, and their
analog and digital representations. This is provided in Chapter 1, which also introduces
the most common signal processing function, amplification, and the characterization
and types of amplifiers.
Besides diodes and transistors, the basic electronic devices, the op amp is studied in
Part I. Although not an electronic device in the most fundamental sense, the op amp is
commercially available as an integrated circuit (IC) package and has welldefined termi
nal characteristics . Thus, despite the fact that the op amp's internal circuit is complex, typ
ically incorporating 20 or more transistors, its almostideal terminal behavior makes it
possible to treat the op amp as a circuit element and to use it in the design of powerful
circuits, as we do in Chapter 2, without any knowledge of its internal construction . We
should mention, however, that the study of op amps can be delayed to a later point, and
Chapter 2 can be skipped with no loss of continuity.
The foundation of this book, and of any electronics course, is the study of the two
transistor types in use today: the MOS transistor in Chapter 5 and the bipolar transistor
in Chapter 6. These two chapters have been written to be completely independent of one
another and thus can be studied in either order as desired. Furthermore, the two chap
ters have the same structure, making it easier and faster to study the second deVice, as
well as to draw comparisons between the two device types.
After the study of Part I, the reader will be fully prepared to undertake the study of
either integratedcircuit amplifiers in Part II or digital integrated circuits in Part III.
3
CHAPTER 1
I"troduction 5 5. The most basic and pervasive signalprocessing function: signal amplifi
1.5 Circuit Models for Amplifiers 21 cation, and correspondingly, the signal amplifier.
1.1 Signals 6 1.6 Frequency Response of Amplifiers 30
6. How amplifiers are characterized (modeled) as circuit building blocks
1.2 f reqllency Spectrum of gna s 9 Summary 41 independent of their internal circuitry.
1.3 Analog and D,gltal Signals Problems 2 7. How the frequency response of an amplifier is measured, and how it is
1.4 Ampllf,ers '4 calculated, especially in the simple but common case of a singletime
constant (STC) type response .
Introduction
The subject of this book is modem electronics, a field that has come to be known as micro
electronics. Microelectronics refers to the integratedcircuit (IC) technology that at the
time of this writing is capable of producing circuits that contain hundreds of millions of
components in a small piece of silicon (known as a silicon chip) whose area is on the order
of 100 mm'. One such microelectronic circuit. for example, is a complete digital computer,
which accordingly is known as a microcomputer or, more generally, a microprocessor.
In this book we shall study electronic devices that can be used singly (in the deSign of dis
crete circuits) or as components of an integratedcircuit (IC) chip. We shall study the
design and analysis of interconnections of these devices, which form discrete and integrated
circuits of varying complexity and perform a wide variety of functions . We shall also learn
about available IC chips and their application in the design of electronic systems .
The purpose of this first chapter is to introduce some baSIC concepts and terminology. In
particular, we shall learn about signals and about one of the most important signalprocessing
functions electronic circuits are deSigned to perform, namely, signal amplification. We shall
then look at circuit representations or models for linear amplifiers. These models will be
employed 111 subsequent chapters in the design and analysis of actual amplifier circuits .
5
6 Chapter 1 Signals and Amplifiers 1.1 Signals 7
In addluon to mot vaung the stud} at elect" niCS. thIs c'lapter serves as a bndge ~etwee~
the study of near c'rct: 's and that If the subject vf th,s ~ook. the deSIgn and ana YSIS 0
by Its Thevenin equivalent fonn. find the voltage v, that appears across RL , and hence the condItion that R
eh!ctromc CIrcuits. must satisfy for v, to be close to the value of "" Repeat for the Nortonrepresented source; in thIs case
findmg the current i, that flows through RL and hence the condition that R must satisfy for i to be close to
the value of I,. '
1.1 Signals
~iJ!nals comam mfonnauon about J vanet} of thmgs and actIvities 10 our phYSIcal world R,
Examples abound: Intonnauon about the weather IS contained 10 sIgnals that represent the
alf temperature. pressure wind speed. etc. The vOIce of a rad,o announcer readmg the news
mto a mIcrophone proVIdes an acousuc "gnal that can tams 'nfonnatJOn about world affalfs. to,
+
i, t R,
TO momtor the status of a nudear reactor nstruments are used 0 measure a multttude 0"
Thus for a signal source represented by its Norton eqUIvalent. Ideally R, =~. and as R, IS reduced. relative
to the load resistance R, with which this source is intended to operate, the current 10 that flows through the
load becomes smaller, not a desirable outcome
The OUtpUI resIstance of a SIgnal ,ource. althOUgh tneVI bl . . .
source to deliver Its full SIJ!n3i trength to I d T ta e,'5 an Impertectlon that !tmlls the ablltty of the Finally, we note that although CirCUIt deSIgners cannot usually do much about the value of R" they may
h ' a 0 3 . 0 see thIS pomt m 'I I .
w en connected 10 a load resIStance Rash F' are c ear y, conSIder the SIgnal source have to deVIse a Circuit solution that minImizes or eliminates the loss of signal strength that results when
f
.
Sown m Ig . I ..
' For th . h'
e ca~e In w Ich the source IS repn:st:ntcd the source IS connected to the load.
  
8 Chapter 1 Signals and Amplifier s 1.2 Frequency Spectrum of Signals 9
I I
I F igure 1.4 Sme\\a\e \'o itagl!' signal of
I amplitude I and freque nc) f l iT Hl The
Time, I T >1
angu lar frequency OJ = 21[/ rads.
Figure 1.3 An arbitrary voltage Signal v,(1). 'The reader who has not yet studied these topics should not be alarmed. No detailed applicalion of thIS
matenal will be made unlil Chapter 9. Nevenhelcss, a genera l understanding of SectIOn J.2 should be
very helpful in studying early pans of this book.
10 Chapter 1 Signals and Amplifiers 1.3 Analog and Digital Signals 11
I' ~
0

~
"
+/
,
3
I E
~
u
~
 I' "0
~
;..,
u
c
.orld around us are an:: 0 E <'(.11"00" , '.. that jJoce ~,b ;rJ . knc" n ..., ana
u
l' (I)
102 circuit\ \ et: ot anall 0 ru IS . c,e ~.~J  tIns
An Jlte'n::' \e f. em of _Z'.al '""re;ertaIJ
r n !hat 1 a ..... ,,e vf num
... , 'u" ... .. . 
r:
~ representing the Slg" m.J~TlJn.Je c:.! .m lSl3nt (' Ur;;e :re I. . Su. n; = 3 I \". ! ed a A
dil!ilal signal Il see hOl> . ;raJ can ':>e repr~'ru  tIns IT" that I ho> ==~ J . . ~
be co~. mod ('am 0:131',3 to dl;ltal 'efIT c;mslder f = J .11. Ht'e me ;"\ e repr _ a
voltale Signa., Identlul Ie lh31lr. ~ Ig J <\t eq...:.. "!en Is a :;;. e 'Ime de I _ "e J:: e +5
marked !he time Instants I I ' md n. \t ea. b cf We et ~ e
=_.
me mCo=~ T[Uue.
the Signal 15 me:: ured, a proce:s 1JI011 n as ampljnz f ::ur~ ~o'u r~pr
ofthes.gna. ): tlg I Rial Ir tef"! of Its sanp '" Thnlgr.aJ (I f ; : bl detined
, . e"1.1tlO
at J n.
the sampling Instants, t nJ lon;er IS a c "JIlln_oos tur:" D cf urne rather II I d' )
f . I '" I,c rete
,me "I(n. '101le\ er, Since Ihe rr.lgm:ude of eac" o;.;,..,ple an take am \alue In d. _. _ _ I
range. the <Jgnal.n FI~ 8(b, !III an anal _ 51=1
  . _.  us Logic values . 0
I 0 I I 0 I o o .
Time. t
0" It "e represenll~e 'llJgmlUde of e"o h ortheslpial "'~rlcs In FI~ I I bl [1\ r
h3\ ng a finlle numt>er l f dl~lts. '~er '~e sl_nal ~mpl'~ de" J r Figure 1.9 Variation ora particular binary digital signal with time .
_ . umber
ath ..   .u ( ,c.. . .:er be C',ntrnuu 
r er,. IS said Ie be quantized di,cretized .lf di:!itized "'e result ~ d~~ :1::n u.> .
~ ~ . ~ al the I onl y two possible values, denoted 0 and I. Correspondingly, the digital signals in bmary sys
p
.mpl} a sequence of numbe" Oal represent the "la2J'ltude' ofth
Th h f be  e __ CcesSI\ e ~a s.Jmpl tems need have only two voltage levels, which can be labeled low and high. As an example. in
e COlee 0 num r '''Iem 10 'epresent 'he _. .~ . es.
signal produced, and h.... a prof' und ~lTect "n 'he .~~~Ie~~~ ~h<lf'ecots the type of di;:al some of the digital circuits studied in this book, the levels are 0 V and +5 V. Figure 1.9
' pr~ce<;s the slgnas. II turns OUI th.t the binan "uf!'~ e dl~n.J1 ClrL_ ts reCjulred
 shows the time variation of such a digital signal. Observe that the waveform is a pulse tram
Sible dIgItal s'l!TIal' and CIrCUIIS In' b . ' r S} ,tern results In t,)e I.plt"'t pos with 0 V representing a 0 signal. or logic 0, and +5 V representing logic I.
 . iJ lDaf! S}stem. each dl;; the nUl!'ber laKes on one vf Ifwe use N binary digits (bits) to represent each sample of the analog signal. then the dig
Itized sample value can be expressed as
<'I I) t
I
( 1.3) o
,
II I I where ho' h" ... , b, I' denote the V bits and have values of 0 or I. Here bit bo is the least
significant bit (LSB), and bit b, I is the most significant bit (MSB). Conventionally, th,s binary
I number IS written as h" h, ., .. . booWe observe that such a representation quantizes the analog
I I. sample IOta one of2 ' levels. Obviously the greater the number of bits (i .e .. the larger Ihe N), Ihe
closer the digilal word D approximates the magnitude of the analog sample. That is. increasing
I
I I
Ihe number of bits reduces the tjllallli=alion error and increases the resolution of the analogto
digital conversion. ThiS improvement is. however, usually obtained at the expense of more com
plex and hence more costly circuit implementations. It is not our purpose here to delve into this
fa, topic any deeper; we merely want Ihe reader to appreciate the nature of analog and digital signals.
(I) Nevertheless. it is an opportune time to introduce a very important circuit building block ofmod
em electronic systems: the analogIodigital converter (A I D or ADC) shown in block fom1 in
Fig. 1.10 The ADC accepts at its input the samples of an analog signal and provides for each
input sample the corresponding Nbit digital representation (according to Eq . 1.3) at its N output
tennmals. Thus although the voltage at the input might be. say, 6.51 V. at each of the output ter
mmals (say, at the ith tem1mal). the voltage will be either low (0 V) or high (5 V) if h is supposed
,
I ho
Analog + hi Dlgilal
AID ~
1' ,
mpul converter output
(b)
h ,\,
Figure 1.8 S,
o mplln~ the COnlinu(JU5 I
 ImC' ilOalog si

gnalln (a) results in the '., " _ .
dI Sl:fc !c  II OlC signal In (b). FIgure 1.10 Bloc kd, agram reprosenlati on oflhe analog Iodlgilal converter lA De).
I 14 Chapter 1 Signals and Amplifiers
1.4 Amplifiers 15
to be 0 or I. respecmel). The dual CIrCUIt of the AD( ISthe digitaltoanalog converter (D/A or
DAC). It convertS an \ blt digual input to an analog output voltage. signals are too small for reliable processing, and processing is much easier if the signal magni
Once the signal is In digital form. u can be processed USIng digital circuits. Of course tude is made larger. The functional block that accomplishes this task is the signal amplifier.
digital circuits can deal also with Signals that do not have an analog on gin , such as the si _ It IS appropriate at this point to discuss the need for linearity in amplifiers. Care must be
nals that represent the \anous instructions of a digital computer g exercised in the amplification of a signal, so that the information contained in the signal is
Since digital circUits deal e\c1usi\el) with bin3l) signals, their design is simpler than that of not changed and no new information is introduced. Thus when we feed the signal shown in Fig.
analog CIrcuits. Furthermore, digital systems can be designed using a relatively few different 1.3 to an ampli fier, we want the output signal of the amplifier to be an exact replica of that at
kinds of digital circuit blocks. Howe\er, a large number (e.g., hundreds of thousands or el'en mil the input, except of course for having larger magnitude. In other words, the "wiggles" in the
hons) of each of these blocks are usually needed. Thus the des ign of digital circuits poses its OWn output waveform must be identical to those in the input waveform. Any change in waveform
set of challenges to the designer but prol ides reliable and econom ic implementations of a great is considered to be distortion and is obviously undesirable.
lanely of signalprocessing functIOns. many of which are not possible \\ ith analog circuits. At An amplifier that preserves the details of the signal waveform is characterized by the rela
the present time, more and more of the signalprocessing functions are being performed digitalll tionship
Examples around us abound: from the digital watch and the calculator to digital audio S"st 
. I
d19ita d.
cameras an more recentl). di~ital telelision. Moreover, some longstanding analog syS~
J ems ( I .4) o
terns such as the telephone communication system are nOI\ almost entirely digital. And I\e where l', and Vo are the input and output Signals, respectively, and A is a constant representing
should not forget the most Important of all digital systems, the digital computer the magnitude of amplification, known as amplifier gain . Equation (1.4) is a linear relation
The b~lc building blocks of dlgual systems are logic circu its and memory circuits. We ship, hence the amplifier it describes is a linear amplifier. It should be easy to see that if the
shall stud) both In thiS book, beginning In Chapter 13. relationship between Vo and l', contains higher powers of II" then the waveform of "owill no
One final remark: Although the digital processing of Signals IS at present all .' longer be identical to that of v" The amplifier is then said to exhibit nonlinear distortion.
there~1 . penaslle
r aln many signa processing functions that are best perfomled by analo circuits' The amplifiers discussed so far are primarily intended to operate on very small input signals.
Indeed, man) electroniCsystems Include both analog and digital parts. It follows t; t d Their purpose is to make the signal magnitude larger and therefore are thought of as voltage
el~ctron~cs engineer must be proficient in the design of both analog and d ' t I a agoo amplifiers. The preamplifier in the home stereo system is an example of a voltage amplifier.
mixedSignal Or miledmode design as u IScurrently known. Such is the a:~~ : f~~:~~:~t At this time we wish to mention another type of amplifier, namely, the power amplifier.
 Such an amplifier may provide only a modest amount of voltage gain but substantial current
gain . Thus while absorbing little power ITom the input signal source to which it is connected,
often a preamplifier, it delivers large amounts of power to its load. An example is found in the
power amplifier of the home stereo system, whose purpose is to provide sufficient power to
1.9 Consider a 4bu digital word D=b b b b dri ve the loudspeaker, which is the amplifier load. Here we should note that the loudspeaker is
between 0 V and + 15 V ' , , 0 (see Eq. IJ) used to represent an analog Signal l' that ,'aries the output transducer of the stereo system; it converts the electric output signal of the system
(a) Glle D corresponding to l' = 0 V I V 2 V ' into an acoustic signal. A further appreciation of the need for linearity can be acquired by
(b) Wh h ' "" and 15 V
_ at c ange tn t', causes a change from 0 to I . .. . reflecting on the power amplifier. A linear power amplifier causes both soft and loud music
(C) 1/ t', . 5.2 V, what do you expect D to be' W tn (I) b", (II) b" (II I) b" and (iv ) h,ry passages to be reproduced without distortion .
Ans. (a) 0000,0001 . 0010,1111, (b) +1 V hat ISthe resulttng error In representatlOnry
,+2 V,+4 V,+8 V; (c) 0101, 4%
1.4.2 Amplifier Circuit Symbol
 =   " 
The signal amplifier is obviously a twoport network. Its function is conveniently represented by
1.4 Amplifiers the circuit symbol of Fig. 1.1 I(a). This symbol clearly distinguishes the input and output ports
and indicates the direction of signal flow . Thus, in subsequent diagrams it will not be necessary
In thiSsection we shall l'nt d to label the two ports "input" and "output." For generality we have shown the amplifier to have
. ' ro uce the fu
IS employed In so f l ' most ndamental i I . two mput terminals that are distinct ITom the two output terminals. A more common situation is
We shall stud h me orm tn almost eve", elect . s gna process mg functIOn , one that
y t e amphfi . .J rODiC system n I ' .. illustrated in Fig. I. I I(b), where a common terminal exists between the input and output ports of
characteristics and lea' ler as a clfcuit bui ldingblock' th .' ame y, Signal amplification.
ve the deSign of its lOt I' : at IS, we shall conslderlts external the amplifier. This common terminal IS used as a reference point and is called the circuit
ema CIfCUIt to later chapters ground .
1.4.1 Signal Ampl'f' . .
.catlon
From a conCeptual ' . 1.4.3 Voltage Gain
Ii polOt of View th .
on. The need for am r . e Simplest slgnal_ ro ' . A linear amplifier accepts an input signal ",(1) and proVides at the output, across a load resis
"weak," that is in th Plficatlon arises because Ira Pd cessIng task IS that of signal amplifica
, e microvolt ( V ns ucers P 'd . tance RL (see Fig. 1.12(a), an output signal ",,(1) that is a magnified replica of ", (I). The
/l ) Or millivolt (mV) roVI e Signals that are said to be VOltage gain orthe amplifier is defined by
range and possessIng
. little
. energy. Such
Voltage gain (A ,,) =Vo
",
(1.5) o
I
16 Chapter 1 Signals and Amplifiers
14 Amplifiers 17
where I" is the_ current that the amplifier delivers to the load (R, ), '0= VoiR" and I , IS the cur
rent the amplilier draws from the signal source. The current gain of the amplifier is defined as
InpUI OUlPUI InpUI OUlPUI
I

Current gain ( 4,) ;; .!.!
"
( 1.8) o
From Eqs. ( I .5) to (I 8) we note that
(a) ( b)
Figure 1.11 (a) Circuil symbol for amplifier (b) An amplifier with a common terminal (ground) bCl\l,'cen
( 1.9) o
the input and output ports.
1.4.5 Expressing Gain in Decibels
Fig. I 12(b) shows the transfer characteristic ofa linear amplifier. If we apply to the Input
of this amplifier a smusotdal voltage of amplitude /", we obtain at the output a SinUSOid of The amplifier gains defined above are ratios of similarly dimensIOned quantities . Thus they
amplitude A 1'. wIII be expressed either as dimensionless numbers or, for emphasis. as VV for the voltage
gain. A 'A for the current gain. and W W for the power gain. Alternatively, for a number of
1.4.4 Power Gain and Current Gain reasons. some of them historic, electroniCs engineers express amplifier gain with a loganth
mlc measure SpeCifically the voltage gain I can be expressed as
An amplifier mcreases the Signal power. an Imponant feature that distingUishes an ampltfier
from a Iransformer. In the case of a transfomler. although the voltage delivered to the load
could be greater than the voltage feeding the mput side (the primary). the power deltvered to
Voltage gam In deCibels = 20 10giA..i dB
o
Ihe load (from the secondary side of the Iransformer) is less than or at most equal to the power and the current gain A can be expressed as
supplied by the Signal. source. On the other hand. an amplifier provides the load With power
greater th~n Ihat oblamed from the signal source. That is. amplifiers have power gam . The
power gam oflhe amplifier m Fig. I 12(a) is defined as
Current gain m deCibels = 20 log A, dB o
Smce power IS related to voltage (or current) squared. the power gain A, can be expressed In
o Power gain (.4
p
) ;; load power (PLl
(I 6)
deCibels as
Input power (PI)
o Power gam m decibels = 10 log 4p dB o
( I .7) The absolute v'alues of the voltage and current gams are used because m some cases.{ or
I. W III be a negative number A negative gain.1 simply means that there is a 180' phase dif
ference between II1pUt and output Signals; it does not imply that the amplitier is attenuating
l'o
I
thc signal On the other hand. an amplifier \\ hose \'{lltage gain is, say, 20 dB IS 111 fact allen
I uatll1g the Input Signal by a factor of 10 (lc .. 1 = 0.1 V'V)
I
,
n
) I 1.4.6 The Amplifier Power Supplies
,( I)
SII1CC the power delivered to the load IS greater than the power drawn from the Signal source.
the question anscs as to the source of this additltmal power. The answer is found by observ
 1'1 II1g that amplifiers need dc power supplies for their operation. These dc sources supply the
estra power delivered to the load as well as any powcr that might be diSSipated in the Inter
nal CirCUit of the amplifier (such power IS comcrled to heat). In Fig. 1.12(a) we have not
explicit ly sho\\ n these de sources.
I Figure I I 3(a) shll\\ s an amplifier that reqUIres tw 0 dc sources. one posim e of \'alue I , ,
I
I and one negatl\e of value I u Thc amplltier has two terminals. labeled I' and I . for connec
lal tion to the dc suppltes. For the amplifier to operate. the temlinal labeled I has to be con
Figure 112 ( (b) nected to the poslti\e Side of a dc sourcc \\ hose voltage IS I" and VI hose negatl\e Side IS
(b T . aj A VOltage amplifier red" IIh a .'
) ransfer charactcri~uc of a linear voltage am;:rfin~' v/(th) and connected to a load resistance R connected to the Circuit ground. Also. the terminal labeled I has to be connected to the nega
cr\l,lt voltagegainA /'
live side of a dc source VI hose voltage is 1/1 and whose positive Side is connected to the circuit
grou nd Now. If the CUITent draVln Irom thc positive supply IS denoted In and that Irom the
negat ive supply IS II/ (sec rig. I 13(1). then the dc power delivered 10 the amplifier is
18 Chapter 1 Signals and Amplifiers
1.4 Am plifiers 19
o ( 1.1 0)
A, = 20 log 90 = 39.1 dB
The power effiCiency IS an Important performance parameter for amplifiers that handle large
P= V I =9 9 = 40.5 mW
amounts of power. Such amplifiers, called power amplifiers, are used. for examp le, as out L Q rm l rml ~ J2
put ampli fiers of stereo systems.
V 1 = I 0.1 = 0.05 mW
In order to simplity circuit diagrams, \\'e shall adopt the convention Illustrated 10 Fig. 1, IJ(b), ',m 'rm, J2 J2
Here the" tenmnal is shown connected to an arrowhead pointing upward and the J temllnal
to an arrowhead pointing down\\'ard , The corresponding voltage is indicated next to each arrow Ap =~
PI
= 40.5 = SIO WIW
0.05
head. Note that in many cases we Will not explicitly shm\' the connections of the amplifier to the
dc power sources. Finally, we note that some amplifiers require only one power supply or
Ap = 10 10gSI0 = 29.1 dB
< P d, = IO x 9.S+IO x 9.S = 190mW
PdlSSipated = P dc + P, P L
I
= 190+0.05  40.5 = 149.6mW
P
+ + l ee Tf = P LX 100 = 21.3 /0
I"
I , R, '" + I R, de

I,
t     

 
 IU

ilEE \ 'H
From the above example we observe that the amplifier converts some of the dc power it
draws fro m the power supplies to signal power that it delivers to the load .
(a)
(b )
Figure 1.13
An amplifier thaI requires tw o de supplies (shown as batteries) for operatIOn . 1.4.7 Amplifier Saturation
Practically speaking, the amplifier transfer characteristic remains linear over only a limited
range of mput and output voltages. For an amplifier operated from two power supplies the out
put vo ltage cannot exceed a specified positive limit and cannot decrease below a specified neg
ati ve limit. The resulting transfer characteristic is shown in Fig. 1.14, with the positive and
ConSider an amplifier operating from + I0 V ' negative saturatIOn levels denoted L, and L" respectively. Each of the two saturation levels is
peak and delivers a Sinusoidal voltageo t' pOf\\9'er supplies. It IS fed with a SinUSOidal voltage hal 109 I V usua lly within a fraction ofa volt of the voltage of the corresponding power supply.
95 A~ . u put 0 V peak to a I ill I d Th '
, m rom each of Its two power supplies Th  oa , e amplifier draws a current of Obviously, III order to avo id distorting the output signal waveform, the input signal swing
with 0.1 rnA peak. Find the voltage gal'n th ' e Input current of the amplifier is found to be smusoldal must be kept within the linear range of operation,
su I h ' , e current gain the ' '
pp les, t e power diSSipated in the amplifi d h " power gain, the power drawn from Ihe dc
ler, an I e amplifier effiCiency
Solution
9
A,. =  = 9 V/V
I In Fig. 1. 14, which shows two input waveforms and the corresponding output waveform s,
the peaks of the larger waveform have been cl ipped off because of amplifier saturation.
20 C~apter' Signals and Amplifiers 1.5 Circ uIt Model s fo r Ampl ifiers 21
'e
)lJ[])u. "<lk
" "pped 'Jc' I
3.t" r tlon
I' I'
I' ,,
I , I '
L  ' ,    
o
'e
'UIPUI
1  
JV( r lS
I
L I I
A
II
"I o L   LL_____________________________
I

I I Figure 1.15 Symbol conveolloo employed lhroughoullhe book.
I I
'4<  signal quantities are denoted by a lowercase symbol with lowercase subscript(s}. for example.
'L I I " ( (I), v,, (I) . If the signal is a sine wave, then its amplitude is denoted by an uppercase symbol
I ,I
I
I
I 10 ,1 with lowercase subscript(s). for example f" V.,. Finally, although not shown in Fig. 1.15, de
power supplies are denoted by an uppercase letter with a doubleletter uppercase subscript, for
I example. 1'"" / '00 ' A similar notation is used for the de current drawn from the power supply.
for example.lcc. IDo .
Input
I I l\ forn"
I I I
\n amplifier fran<;ter charaClenstu: that is linear eXl:ept for output saturauon, 1.10 An amphfier has a voltage gam of 100 vrv and a current gain of 1000 NA . E.\press the voltage and
current gams to decibels and find the power gam.
Ans. 40 dB ; 60 dB; 50 dB
1 4.8 Symbol Convention
1.11 An amplifier operating from a single 15V supply provides a 12V peaktopeak sinewave signal
~~t~~soPkOlT'nt'\IVle draw thhe reader's attentIon to the term mology we shall employ throughout to a Iill load and draws negltgible input current ITom the signal source. The de current drawn ITom the
. 0I ustrate t e termmologv FilS h h'  ~ 15V supply is 8 rnA. What is the power dissipated in the amplifier. and what is the amplt fier efficiency?
. through a branch' . . .J' I Ig.
IS t1 oWlOg sows t e waveform ora current I (I) that Ans. 102 mW; 15%
nent I on whIch IS , l O a ~artlcu ar CtrCUIt. The current 'lit) consists of a de compo
se
Obse~e that at a tl~:~e;hme Ptoot , . a ~tmusoldal component I (t) whose peak amplitude .'i I
a tns antaneous current (I) th
and the SIgnal current , ') . I. IS e sum at the de current I,
1.5 Circuit Models for Amplifiers
Ie'" ~ 1,+: (I)
(I' )
A substantral part of this book is concerned with the deSIgn of amplifier cirCUIts that use transIs
where the SIgnal current's gIven ~y tors of various types. Such circuits will vary in complexity from those using a single transistor to
those with 20 or more devices. In order to be able to apply the resulting amplifier circuit as a
I'll = 1'10101 building block rn a system, one must be able to charactenze. or mode'. its terminal behavior. In
Thus. we state so me conventIons' Total this SectIon, we study simple but effective amplifier models. These models apply irrespective of
'ymb I . '. IOstantaneous qu It'
S a WIth uppercase subscnpt(,) , an lIes are denoted by a lowercase the complexity of the internal circuit of the amplifier. The values of the model parameters can be
den t d b ./or~xample" .(1) (I) D
a e y an uppercase symbol th ' ,vns . Irectcurrent (de) quantitres are found either by analyzing the amplifier circuit or by performing measurements at the amplifier
WI uppercase subscnpt( ) fi
. s. or example I V,.I" Incremental temlinals.
22 Chapter 1 Signals and Amplifiers 1.S Circuit Models for Amplifiers 23
1.5.1 Voltage Amplifiers at whIch this gain is measured or calculated. If a load resistance is not specified, it is nor
mally assumed that the given voltage gain IS the openCIrcuit gain A"o'
. 't mo del "cor the voltage amplifier.
Figure 1.16(a) shows a CIrCUI . The'model consists of a volt The finite input resistance R, introduces another voltagedivider action at the input, with
agecontrolled vo Itage source ha\ "ngI a gain factor A'.' . resIstance R, that aCCOunts
an mput the result that only a fraction of the source signal v. actually reaches the input terminals of the
for the fact that the amplifier draws an input current from the sIgnal sourc~, and an output ampltfier; that is,
.
resistance R t hat accoun ts 'or
Q II the change in output voltage
. as. the ampltfier IS called
. upon to
supp Iy outpu t current to a load . To be specific. we show m FIg. 1.16(b) the amplt fier model _R:.:..!...,_
fed with a signal voltage source II, having a resistance R, and connected at the output to a V, = VI (1.13)
R, + R,
load resistance R,. The nonzero output resistance R, causes only a fractIon of A ",v, to
appear across the output. Using the voltagedivider ru le we obtam
It follows that in order not to lose a significant portion of the input sIgnal in coupling the
RL signal source to the amplifier input, the amplifier must be designed to have an input resis
VO = A Vi R R
(10
tance R, much greater than the resistance of the signal source, R, :i> R,. Furthermore, there
L+ 0
are applications in which the source resistance IS known to vary over a certain range. To
Thus the voltage gain IS gl\en by
mimmize the effect of this variation on the value of the signal that appears at the input of the
RL amplifier, the design ensures that R, is much greater than the largest value of R,. An ideal
o Vo
A,,;;; =A,'oR
V,
R
L + 0
(1.12) voltage ampltfier is one with Ri = =. In this ideal case both the current gain and power gam
become infinite.
It follows that in order not to lose gam in coupling the amplifier output to a load, the out
The overall voltage gain (v/v, ) can be found by combining Eqs. (1.12) and (1.13),
put resistance Ro should be much smaller than the load resistance R,. In other words, for
a given R, one must design the amplifier so that its Ro is much smaller than RI . Further
Vo R, RL
more, there are applications in whIch R, is known to vary over a certain range. In order to
keep the output voltage Vo as constant as possible, the amplifier is designed with R, much
;;  A uo R,+R , R L +Ro o
smaller than the lowest value of R" An ideal voltage amplifier is one with Ro = O. Equa
tion (1.12) indicates also that for R, = 00, A" = A,. Thus A,. is the voltage gain of the There are situations in which one is interested not m voltage gain but only in a sIgnificant
unloaded amplifier, or the opencircuit voltage gain . It should also be clear that in spec power gain. For instance, the source signal can have a respectable voltage but a source resis
ifying the voltage gain of an amplifier, one must also specify the value of load resistance tance that is much greater than the load resistance. Connecting the source directly to the load
would result m significant signal attenuation. In sllch a case, one requires an ampltfier with a
high input resistance (much greater than the source resistance) and a low output resistance
(much smaller than the load resistance) but with a modest voltage gain (or even unity gain).
R, Such an ampltfier is referred to as a buffer amplifier. We shall encounter buffer ampltfiers
+ often throughout this book.
v, R,
A",P,
 "
To find the voltage gain from source to load, we multiply A" by the factor representing the loss of gain at
the input; that is,
~ _ 'lit V,I == A V;I
v~ II, I V t
,. V
t
Figure 1.17 depicts an amplifier composed of a cascade of three stages. The ampli fi er is fed by a signal  818 x 0.909 = 743 .6 VN
source with a source resistance of 100 ill and delivers its output Into a load resistance of 100 n. The first
stage has a relatively high mpul reSIStance and a modest gam factor of 10" The second stage has a hIgher gam or 57.4 dB.
factor but lower input resistance" Finally, the last, or output, stage has unity gain but a low output resistance. The current gaIn is found as follows :
We wish to evaluate the overall voltage gain. that is. VL! V" the current gain, and the power gam.
, , Vol/I Mn
Source I Slage I 4 6
Slage ~ I Slage J I Load = 10 X A" = 8.18 X 10 NA
100 , or 138 .3 dB .
I k!1
HI + +
Ik!1 10 n The power gam is found from
I M!1 100 +
v,,
+   k!1 lOW 100 n PL
Ap = p =
vLi(l
"
v, _  I Vii ',
6
= A" A, = 818 x 8. 18 x 10 = 66.9 x 10 8 WIW
       
or 98.3 dB. Note that
Figure 1.17 Threestage amplifier ror Example I.l. Ap(dB) = ~ [A ,,(dB) +A ,(dB)]

Solution
A I'fJ
R (1.14)
In the design of an electronic system, the SIgnal of interest whether at the system inpu~ at an ,
IOterrnediate stage, or at the output can be either a voltage or a current. For Instance, some trans
ducers have very high output resistances and can be more appropriately modeled as currenl Similarly, we can show that
sources. Similarly, there are applications in which the output current rather than the voltage is of A "0  GmRo (1.15)
and
Table 1.1 The four Ampl ifier Types
Rm
Type
A"" = R, (1.16)
.
Circuit Model Gam Parameter Ideal Characteristics
Voltage Amplifier The expressions tn Eqs. (1 .14) to (1 .16) can be used to relate any two of the gain parameters
'.~ OpenCircun Voltage Gam
R. A 'v ' A , C m , and Rm'
R, =oo
+ A = v"
  (V N)
v, R, 1.\

+
,
,~
V, . 0 R = 0

A "'v, , = 1.5.5 Determining R; and Ro
 From the amplifier circuit models given 111 Table I I. we observe that the 111put resistance R, of
Curren! Amplifier . the ampltfier can be determined by applYing an input voltage II, and measunng (or calculating)
"~ . ShonCircult Current Gain
the input current I,; that tS, R, = II,fI,. The output resistance is found as the ratio of the open
~ .
I,
R, = 0
R, < f A,,I, Roo
AIJ =~I,
(NA)
R ~
CIrCUit output voltage to the shortcircuit output current. Alternatively, the output resistance
can be found by ell1nmating the input stgnal source (then i, and v, will both be zero) and apply
, =0
t'
I ing a voltage signal v, to the output of the ampltfier. as shown in Fig. I. 18. If we denote the
 current drawn from v, inlo the output terminals as I, (note that i, is opposite in direction to ,"),
Transconductance then R" = v,li,. Although these technIques are conceptually correct, in actual practice more
Amplifier ShortC ircul!
~
refined methods are employed in measuring R, and R".
Transconductance R, =00
+ .
v,

R,
{ G.,v, R.
",  ~
Gm = (A N ) R, =00 , .
v, <
'v. ,0
TransreSIStance

Amplifier l',
"~
Roo
,. OpenCircUli Transresistance
~
Rm == ~.
R, = 0
 
R,
V R." ', i, . ,0
(VIA)
R~
"
O
l'
R"
1 Figure 1.18 Determining the output resistance.

28 Chapter 1 Signals and Amplifiers
1.5 Circ Uit Models for Amplifiers 29
. . transIStor
The bipolar Juncllon . (BJT) . \\ hIC h \\III be studied 10 Chapter 6. IS a threetern1inal
did b de,ice
I I ( 1.19)
that \\ hen pm\ eredup by a dc source (bane"') . J and operated With small signals can be mo ed eh y t 1e m
. . shO\\.n'10 F'Ig. I . 19( a ). The three terminals are
ear ClTCUIt . _the base (B). the emitter
. (E).
>'
an .t, eb collector
0 B
..
Observe that the gain is negative. mdlcatlng that thiS amplifier is mverting. For the given component values.
(e). The hean ate f h rna deI IS. a transconductance ampliher represented by . an mput
. reSistance ct\\ een Va 25
and E (denoted r,) , a shortCITcult transconductance g . and an output resistance, ;; = 2.5'+5 x40 X (511100)
= 63.5 VN
B c R, B c Neglecting the effect of r". we obtain
= 66.7 VN
E which IS quite close to the value obtamed including 1'" , This IS not surprising. smce ro ~ R
L
(b) For the model in Fig. I 19(c) to be eqUIvalent to that m Fig. 1.19(a).
(a)

.
Ib)
B I.
) c
For the values given.
P=gr
.,
+
" , , P = 40 mAN x 2.5 kQ
' 100 AlA
E
(c I
~ = C mR R'R (R" II R L )
TI, I + \
I r~
30 Chapter 1 Signals and Amplifiers 1.6 Fre qu e ncy Respo nse of Amplifi e rs 31
' the model show ,n 10 the founh row of Table I I Let the
1.20 Consider a transresistance amplifier ha, 109 h ng a resistance R, and let the output be connected Lmear amplifier
gnal currentsource I, a" '
amplifier be red With a sS'hOW that the overall gain IS gl\en by
to a load resistance R,
!I R, RL t
...!!=R
. mR + RR+R L 0 v, = V, sin wI
IJ .1 I 1' 1 Th I {I, \' ~IO (wt .I.. cb)
' I B d G m the CIrCUit shown 10 Fig. E ,, e vo tage
21 Find the mput resistance between termma S an _'
1, V is a test voltage wit h the I'nput resistance R" defined as R" = v, I"
,

). B "" c Figure 1.20 Measurmg the fTequency response ofa linear amplifier' At Ihe lesl fTequency Ill, Ihe ampli fier
gain is charaClel/zed by ils magnilude (V /I ~ ) and phase '
r_
known, by T( OJ), then
R,
E v
IT( OJ)I   0
R, V,
 L T( OJ) =
R. Figure El.21
The response of the amplifier to a sinusoid of frequency OJ is completely described by IT(OJ)I
Ans. R" = r, + (/1+ I )R.:. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ _ __ and L T( OJ). Now, to obtain the complete frequency response of the amplifier we simply
change the frequency of the input sinusoid and measure the new value for IT I and L T. The
end result will be a table and/or graph of gain magnitude [IT(OJ)I) versus frequency and a
table and/or graph of phase angle (L T(OJ)] versus frequency. These two plots together
constitute the frequency response of the amplifier; the first is known as the magnitude or
1.6 Frequency Response of Amplifiers2 amplitude response, and the second is the phase response. Finally, we should mentIOn that
it IS a co mmon practice to express the magnItude of transmission in decibels and thus plot
From Section l.~ we know that the input signal to an amplifier can always be expressed as 20 log IT(OJ)I versus frequency .
the sum of sinusOIdal signals. It follows that an imponant characterization of an ampli fier IS
in terms of its response to Input sinusolds of different frequencies. Such a characterization of
amplifier performance is known as the amplifier frequency response.
1.6.2 Amplifier Bandwidth
Figure 1.2 1 shows the magnitude response of an amplifier. It indicates that the gain is almost
1,6,1 Measuring the Amplifier Frequency Response
constant over a wide frequency range, roughly between OJ, and OJ,. Signals whose frequencies
We shall introduce the subject of amplifier frequency response by showing how it can be are below OJ, or above OJ, will experience lower gain, with the gain decreasing as we move
measured. Figure I.~O depicts a linear voltage amplifier fed at its input with a sinewave fanher away from OJ, and OJ,. The band of frequencies over which the gain of the amplifier is
signal of amplitude /' and frequency w. As the figure indicates. the signal measured at the almost constant, to within a certain number of decibels (usually 3 dB), is called the amplifier
amplifier output also is Sinusoidal with exactly the same frequency OJ, Th is is an imponant bandwidth. Normally the amplifier is designed so that its bandwidth coincides with the
pOint to note: 11?,.nel'er a Sll1eII'al'e sigllal is applted to a Imear clrclIit, the re.l lIltmg Olltput spectrum of the signals it is required to amplify. If this were not the case, the amplifier
is Sinusoidal \\'Ith Ihe same irequell(l' as rhe IlipUI. In fact, the sine wave is the only Signal would distort the frequency spectrum of the ,"put signal, with different components of the
that does not change sh ' h input Signal being amplified by different amounts.
, " ape as It passes t rough a linear CIrcuit. Obsene. however. that the
output SinUSOId Will In general have a different amplitude and wlil be shifted in phase relatl\e
to the input. The rallO of the amplitude of the output SinUSOid (/' ) to the amplitude of the
Input sinusoid (I ) IS th 'd ' 16.3 Evaluating the Frequency Response of Ampl ifiers
, e magmtu e of the amplifier gain (or transmiSSion) at the test fre
quency w. Also. the angle I/! is the ph as fth I'fi "
w. If we den ote the amplifier trans ' e ,0 e amp I ler transmisSion at the test frequencyI ' Above, we deSCribed the method used to measure the frequency response of an amplifier.
miSSIOn, Or transfer fun ction as 1\ IS more common) We now briefl y discuss the method for analytically obtaining an expression for the fre
quency response. What we are about to say is just a preview of this imponant subject, whose
'Excepi for lis us ' h detailed study is in Chapter 9.
e In I e study of Ihe frequen ' , , '" h
malenalln this section will nOI be need d Cj response of opamp ClrCUlIs 10 SectIOns 2 5 and 2 7, I e
e In a substantial manner until Chapter 9
I .
Chapter 1 Signa Is an d Amplifiers
32 1. 6 Frequen cy Res po nse o f Am pl ifi ers 33
Table 1.2
Frequency Response of STC Networks 20 log IT~w) I (dB)
HighPass IIIP)
Lo"Pass (LP)
 ..
.
I\s
.
1\ o 
Transfer Funcllon 7l.s) s+Wo
I+(s /Wo)
I
A I
1\ 10
Transfer Function (for physical I i( Wo W) I
frequencies) T{jlLl} l+j(W/Wo) +20 dB / decade I
IA1 I
IA1 , 20 I
\Iagn'tude Response P'Vld)1 I
JI +(W. Wo)'
J I+(WII wI"
I
.I ~:O.;I!II:l:O'' ;;. (log scale)
tanl(w!Wo) tan (Wo W)
Phase Response L7l.jOJ)
(a)
0
Transmission at (J)= 0 Ide) A
0
A <P(w)
Transmission at W= 00
0.1 w
II  (log scale)
10 wo
I I
I I
I I
I
I
I
900
I "" I
45 0 decade t
~f
"
(b)
Figure 1.23 (a) Magnitude and (b) phase response of STC networks of the lowpass type.
36 Chapter 1 Signals and Amplifiers 1.6 Frequency Response of Amplifiers 37
This expression can be put 10 the standard fonn for a lowpass STC network (see the top line of Table 12)
by extractmg [I + (R,I Ri)l from the denominator; thus we have
R, R" R
V = "J' I.
U ,.. 'R L +R a
+
+
R, l ThIS equahon can be combined with Eq . (1 .20) to obtain the amplifier transfer funchon as
, R, C, J.t\
\
" j
Va I I I
=jJ
      V, I+(R ,. R,) I + (R a , RL ) 1+ sCi[(R,R,). (R, + R,ll (I 21)
Solution ( 1.23)
(a) Utilizing Ihe voltagedl\ider rule. we can express J, 10 lerms of J' as follows
The 3dB frequency % can be found from
Z
I  J' ,
I IZ, + R,
I I
%=  = ( 1.24)
\\ here Z IS Ihe amplifier IOpul impedance. SlOce Z, is composed of two parallel elements, it IS obviously T C,(R , II R,)
easier 10 work 10 lerms of Y, = 1/ 2,. Toward that end we diVide Ihe numerator and denominator by Z, .
Ihus obtalOlOg Since the frequency response of this amplIfier IS of Ihe lowpass STC type. the Bode plots for the gain
magOitude and phase will take the fonn shown in Fig. 1.23. where K is given by Eq. (1.23) and % IS given
v, = V .,.:1::". by Eq. (1.24) .
' I+R, Y,
(b) Substitutmg the numencal values given mto Eq. (1.23) results m
I
= V ;:~:;7:~
' I +R [(IR,)+sC,] K  144 I I = 100 V'V
Thus.  1+(20 100) I +(200 / 1000)
Thus the amplIfier has a dc gam of 40 dB. Substitutmg the numerical values mto Eq . (1 .24) gives the 3dB
l', I frequency
f, = 7"'1::::R~:::
+( R,)+ sC,R,
I
COD = 60 pF K (20 kQI 100 kQ)
 I = 10 radls
 60 x I0 '~X (20100. (20+ 100)) x 10J
38 Chapter 1 Signals and Amplifiers 1.6 Frequency Respo nse o f Amplifiers 39
u.(t) = 10 sm 10'1, V
(ii) For llJ = 10' rad/s, which is (llJo / IO), the Bode plots of Fig. 1.23 suggest that IT! = K = 100 and
= 5 .7. The transfer function expression gives IT! = 99.5 and = tanI 0.1 = 5.7. Thus,
R, = I kfl c
\ +
R, = 9 kfl \
  Figure E1.24
,
1/11) 1
J J
'" Problems 43
create using senes and parallel comblOatlons of these three? 1.8 ou are given three resistors, each of 10 kil, and a 9V
computer Simulation Problems the resistor reqUIred? What is the mput resIStance of the
LISt them ill value order. lowest first. Be thorough and battery whose negative tenmmal is connected to ground. With current divider in each case?
Problems involvlOg design are marked with D throughout organized (Hill/.' In your search. first consider all parallel com a voltage divider using some or all of your resistors. how
the text As well. problems are marked with astensks to binatlons, then consider series combmatlons, and then conSider many positivevoltage sources of magnitude less than 9 V can o 113 A particular electronic signal source generates cur
describe their degree of difficulty. Difficult problems are seriesparallel combinations. of which there are two kinds). you deSIgn? List them m order, smallest first. What is the out rents in the range 0 rnA to I rnA under the condition that its
marked with an asterisk (0); more difficult problems With put resistance (i.e., the Thevenin resistance) of each" load voltage not exceed I V. For loads causing more than I V
two asterisks (00); and very challenging andlor time 1.5 In the analysis and test of electrolllc clfcuits. is of
It to appear across the generator, the output current is no longer
consuming problems with three asterisks (... ). ten useful to connect one resistor in parallel with another o '1.9 Two resIStors. with nominal va lues of 4.7 kil and
assured but will be reduced by some unknown amount. This
10 kil, are used in a vo ltage divider with a + 15V supply
to obtain a nonstandard value, one which is sma ller than Circuit limitation, occurring, for example, at the peak of a sine
to create a nom mal + 10 V output. Assummg the resistor values
Circuit Basics the smaller of the two resistors. Often, particularly dUTlng wave signal, will lead to undesirable signal distortion that must
to be exact. what is the actual output voltage produced? Which be avoided. If a I Ok!lload is to be connected, what must be
circuit testing, one resistor is already mstalled, in which resistor must be shunted (paralleled) by what third resistor to
As a review of the basics of clfcuit analysis and in order for case the second. when connected m parallel, is said to done? What is the name of the circuit you must use? How
the readers to gauge their preparedness for the study of elec create a voltagedivider output of 10.00 V" If an output many resistors are needed? What is (are) the(ir) value(s)?
"shunt" the first. If the original resistor is 10 kil, what is resistance of exactly 3.33 k!l is also required, what do you
(TOnic circuits, this section presents a number of relevant cir
cuit analysis problems. For a summary of Thevenin's and the value of the shunting resistor needed to reduce the suggest" What should be done if the originaI4.7k!l and 10k!l
Norton's theorems. refer to Appendix D. The problems are combmed value by 1%. 5%, 10%, and 50%? What is the re resistors are used but the requirement is 10.00 V and 3.00 k!l? Thevenin Equivalent Circuits
grouped in appropriate categories. sult of shunting a 10k!l resistor by I MO? By 100 kil? By
10 k!1? Current Dividers 1.14 For the circuit m Fig. PI 14. find the Thevenin equiva
lent circuit between tenminals (a) I and 2, (b) 2 and 3. and
Resistors and Ohm's Law 1.10 Current diViders play an Important role in cirCUIt deSIgn. (c) I and 3.
Voltage Dividers Therefore it IS Important to develop a facihty for deahng with
11 Ohm's law relates I: I. and R for a resistor. For each of
1.6 Figure P16(a) shows a tworeSIstor voltage divider current dividers in circuit analysis. Figure P I 10 shows a two I
the Sltuallons follow 109. find the misslOg Item:
Its function is to generate a voltage I" (smaller than the resistor current diVider fed with an ideal current source I
(a) R= I kn.I'= IOV Show that
powersupply voltage VOO) at its output node X. The Clf Ik
(b) V= 10V.1 = I rnA cult looking back at node X is eqUivalent to that shown In
(c) R= 10kn.l= lOrnA Fig. Pl.6(b). Observe that this is the Thevenin eqUIvalent I,  R, I 3V
(d) R = 100 n. V = 10 V R, + R,
of the voltage diVider circuit. Find expressions for 1'0
and Ro. R, Ik
1.2 Measurements taken on various resistors are shown r. ;;;: I
below. For each. calculate the power dissipated in the resistor R, + R,
and the power ratlOg necessary for safe operation uSlOg stan
and find the voltage 1 that develops across the current divider.
dard components With power ratings of 1/8 W. 1/4 W. 112 W. Figure P114
I W. or 2 W:
R, 115 Through repeated appitcatlOn of Thevenm's theorem.
(a)I kn conducllng 30 rnA tl find the Thevenin eqUIvalent of the Clfcuit m Fig. P 1.15
(b)I kn conducting 40 rnA R X between node 4 and ground. and hence find the current that
(c)10 kn conducting 3 rnA  R, Ro \
flows through a load resistance of 1.5 k!l connected between
(d)10 kn conducting 4 rnA node 4 and ground.
(e)) ill dropping 20 V
(0 I kn dropping I) V
Ro \   
I 10 k 10k 10k
1.3 Ohm's law and the power law for a resistor relate V I  Ro 
Figure Pl.10
R, and P, making only two variables independent For e;ch
pair Identified below, find the other two: (a) (b) o 111 DeSIgn a simple current divider that will reduce the 10 V "'*"' 10 k 10 k
(a) R= I kn.l= lOrnA Figure Pl .6 current provided to a Ikil load to 20% of that available from
(b) 1'= 10 V, 1= I rnA the source.    
(c) 1'= IOV.p= I W
(d) 1= 10mA.P=0.1 W
1.7 A tworeSIstor voltage diVider employmg a 3.3kn o 112 A deSIgner searches for a simple cirCUit to proVide
Figure P1.1S
and a 6.8kn resIStor IS connected to a 9 V groundrefer onethird of a signal current I to a load resistance R. Sug
(e)R=lkn.P=IW
(enced
I power suppl Y ta provi'd e a relatively
. low voltage gest a solution using olle resistor. What must its value be')
c ose to 3 V). Sketch the circuit. Assummg exactvalued What is the mput resIStance of the resultmg current Circuit Analysis
Combining Resistors reSIstors, what output voltage (measured to ground) and divider" For a particular value R. the designer dIScovers
eqUivalent output resistance result? If the resistors used are that the otherwlSebestavaiiable resistor IS 10% too high. 1.16 For the circuit shown in Fig. PI 16, find the current m
~.4 You are given Ihree resistors whose values are 10 ill not Ideal but have i5"
h
.
a " manufactuTlng tolerance what Suggest two cirCUit topologies using one additIOnal all resistors and the voltage (with respect to ground) at their
.0 ill. and 40 ill. How many different resistances can yo~ are tl ?e extreme output voltages and resistances th~t can resistor that Will solve this problem. What IS the value of common node using two methods.
resu 1.
44 Chapter 1 Signals and Amplifiers Pro blems 45
III Cal ('urrcnl: Ddine hrand (um:nts I. and '' in R, and R" ICI IOOHl in paraliel With 100 pF (b l :U.9 V peak. a ...omewhat 1.:"0mm(ln peak \nlt age m rel"l i"
\
a respectivel)'. IIjcnlily (\I,U cqualU'ln': and suh:e them. (dl IIXI!l in series wllh 10 mH fler ci rl.:" uit...
(() 220 V nns . a household powe r voltage in pan ... of
UI
oJ
th) Vllltagc I>dinc the "oJc \ult<.tge r allhc common node:
..+1
, R,.
o Idcnl1ly a singli!' ('(IUallon: and wive it.
Ii, R.
Section 1,1: Signals
1.22 Any given signal source pro\ldes an opencircuit volt
Eumpe
Id ) 220 k V nns. a highvo ltage tran... mi ... , ill nline \o ltage in
...
.: Wh'l' h method do } 011 prefer" Why? North Ame rica
IL Ill! IW age. I '",. and a shancircuit current i JC ' For the foll owm g
... ; III V
~ I C; V Ii. sources. calculate the internal resistance. R,; the Norton cur ' .29 Gi\.'c: express ions for the smewa\c \oltage signals ."
::c
UI Ill!
ren!. i,; and the Thevenin voltage, I'~. hav in g~
o
CD
..c
~
II, II,
Ii,.
Ill!
R.,
an
(al v~ =IOY", = IOO~A
(bl " , = 0. 1 Y" , = 10 ~A
(a l
(h I
IO,Y pea~ amplI1ude and IOkH z 'roquen,)
120V rm , and 60 Hl fn::quency
r
I
.: HII In ll! (e) 0.2V peal topeak and IOOO radJ\ frclJueney
1.1 1.23 A particular Signal source produces an output of 30 m V (d l IOO mY peak and I ms peri od
<r ..,.,..  )
II,
<~
Id,r'IOs
(el/ =oOIl,
1 33 Find the: amplitude of a symmetrical square waH of
penod T th<l:t prm'ldes the same power as a sine wa\e of peak
HI! t f) it) = I ~radJs Section 1.2: Frequency Spectrum of Signals
amplitude I' and thc same frequency. Docs thiS rt!,ult depend
1I,"tz. or'lI. (gl f 0 I~(XI \IHI
': 27 To famillan l c yourself with tYPical values of angular on equality of the frequencit:s ofthc two wa\'t'11.1rms'
I ! UI I I ~II Irequcn ey m. conve nti onal frequency / and period T. com
1.20 hnd the com I . ' , ., .
1 mg hasl!.: cir . _I P ~\ IInpedance, L, 01 each 01 the fo llow
CUI! t: eOlcnts at 60 Hz, 100 kIl l:, and I u Hr
plete the entries in the fo ll owing tab le
 T (5)
Section 1.3: Analog and Digit al Sign a ls
,j GIV!.! the tunal) represl:ntation ofth!.! fl.lllowmg dl:l:imal
IJlIII~ll t
c_as_e_ _ _=w:..(::,ra:.d:./.::
s):...._ _ ' (Hz)
numbt'rs: 0, 5. X, 25, and 57,
Fig ure P11 7 Ihl (' 10 n~ , I 10'
(C) ( 2pF 1.35 Consider a 4bit digital word hJh.hJ}, in a lonnat called
b 1 )( IO~
Idl I 10 mH , 1><:10 10 signedmagnitude. in whic~ the m.ost 3ignit~l'ant bie h. I'
1.18 IOTthe l' lfl'UlIIO 11 ~. 1'11 1'l r J 1<1[ I nil interpreted as a sign bit 0 lor pOSitive and I tor negall\ e val,
1.lflee In l!fl1und . R . In lit) Ih ' , II" the equl\aknt fl':<'IS d bll
I
~ IS, apr \ a \olta
Il' mUlla \ ,lI1d l'rlllIlldmd 1'1 d h . ~e
I , .,
~'''een
, h.::X )( If>' ue,. List the value" that can ~ represented by thiS scheme
10. , ~ . n tCcurr'llt l 1.21 hnd the l"Ompl I 10 What IS peculiar about the: representatIOn of lero) ~or a par,
"wll' Ih.11 ' ilU c,m usc pln, . I I
I.: W:J\\l1 from J net\\nr~s e\ Impedance at I () 1\111' of the 1'0110\\ 109
. lU aT 5['\.'(lal P
( Irnlllin ,'Cllhc result d,r ' .11 ' \
1.:1.:"
.
0\\ II R
ropcnlh
' 'If tho
..  .  ticular analogh1dlgllal comert!.![ (ADC), each change in D
l:oITI..'sponds to a OJ \' change 10 the analog IIlput What I' the
"hallh'l'S R hcl'omc) .  IS ral"(d 10 I 2 kU
'J' I ~U .
mscne:s \I,lth 10 F
1.28 For the following: peak or ffilS valul!s of some important full range ofthl! analug ~Ignal that can. he repre~cnt~d': ~'h~~
'hi I ~U. n SlOe \l,aw s, calc ul ate the com:sponding other ,alue' signedmagnttude digital code rt.sults tor an mput It + v
on parallcl ~l1h ~F Om For lO \h' hlr +~ 7 \ ) For ~,8 \ )
(a) 11 7 V rm s, a househo ld.ptl\..cr voltage In North America
Problems 47
46 Chapter 1 Signals and Amplifiers
measured from the source intemal voltage to the load? Where (b) If the peak current available from the source is 0.1 (.lA,
did all the gain go? What would the gain be If the source was what is the smallest input resistance allowed? For the design
connected directly to the load? What is the ratio of these two with this value of R" find the overall current gain and power
gams? ThIS ratio is a useful measure of the benefit the ampli
gam.
fier brings. (c) If the amplifier power supply hmlts the peak value of
1.46 A buffer amplifier with a gain of I VN has an input the output opencircuit voltage to 5 V, what is the largest
reSistance of I Mn and an output resistance of Ion. It is output resistance allowed?
connected between a IV, 100ill source and a loon load. (d) For the design with R, as in (b) and R" as in (c), what is the
What load voltage results? What are the corresponding volt
age, current, and power gains (in dB)? Va
Figure Pl.37 required value of opencircuit voltage gain I.e.,  of
drawn. The average current in each supply IS measured to be the overall voltage gain v/ v, obtamed when the first and sec the amplifier?
between 0 and I " (where the subscnpt FS denotes full
20 rnA Find the voltage gain, current gain, and power gam ond stages are interchanged. Compare thIS value with the (e) If, as a pOSSIble deSign option, you are able to increase
scale").
expressed as ratios and in deCibels as well as the supply result in Example 1.3, and comment. R, to the nearest value of the form I x 10' n and 10 decrease
(a) Show that the lea,t Significant bit (LSB) corresponds to power, amplifier dissipation, and amphfier effiCiency. R. to the nearest value of the form I x 10" n, find (i) the
a change 10 the analog ,ignal of I Fs. (2'  I). This is the 1.48 You are given two amplifiers, A and B, to connect in IOput resistance achievable; (ii) the output resistance achiev
1.41 An amplifier us 109 balanced power supplies is known to cascade between a I Om V, 100ill source and a loon load. able; and (ill) the opencircuit voltage gain now required to
resolution of the converter saturate for signals extending withm 1.2 V of either supply.
(b) Con\'lnce yourself that the maximum error in the con The amplifiers have voltage gam, input resistance, and output meet the specifications.
For linear operallon, its gain is 500 VN. What IS the rms reSistance as follows: for A, 100 VN, 10 ill, 10 ill, respec
version (called the quantization error) is ~alf the resolution~ value of the largest undistorted sinewave output available, o 1.52 A voltage amplifier with an input resistance of
tively; for B, I VN, 100 ill, 100 n, respectively. Your prob
that IS, the quantization error;. i'Fs/ 2(2"'  1). and input needed, with SV supplies? With IOV supplies? 10 kn, an output resistance of 200 n, and a gain of 1000 VN
lem is to decide how the amplifiers should be connected. To
(c) For I " = 10 V. how many bits are required to obtrun a With 15V supplies? is connected between a 100kn source With an opencircuit
proceed, evaluate the two possible connections between
resolution of 5 mV or bellee? What is the actual resolution voltage of 10 mV and a loon load. For this situation:
1.42 Symmetncally saturating amplifiers, operating m the source S and load L, namely, SABL and SBAL. Find the volt
obtained? What is the resulting quantization error? age gain for each both as a ratio and in decibels. Which ampli
socalled clipping mode, can be used to convert sine waves to (a) What output voltage results?
1.37 Figure PI.37 shows the cirCUit of an Nbit digitalto pseudosquare waves. For an amplifier with a smallsignal fier arrangement is best?
analog converter (DAC). Each of the N bits of the digital (b) What IS the voltage gain from source to load?
gain of 1000 and clipping levels of 9 V, what peak value of
word to be converted controls one of the switches. When the
input sinusoid is needed to produce an output whose extremes
o 1.49 A designer has available voltage amplifiers with an (c) What is the voltage gain from the amplifier input to the
bit IS O. the S\\ itch is in the position labeled 0; when the bit is mput resistance of 10 ill, an output resistance of I ill, and load?
are JUst at the edge of clipping? Clipped 90% of the time?
I. the switch is in the posilion labeled I. The analog output IS an opencircuit voltage gain of 10. The signal source has a 10 (d) [f the output voltage across the load is twice that needed
Clipped 99% of the time?
the current 10 , J ~f is a constant reference Voltage. kn reSistance and provides a 10mV rms signal, and it is and there are signs of internal amplifier overload, suggest the
reqUired to provide a signal of at least 2 V rms to a Iill load. location and value of a single resistor that would produce the
(a) Show that
Section 1,5: Circuit Models for Amplifiers How many amplifier stages are required? What is the output desired output. Choose an arrangement that would cause
. I ref b,. voltage actually obtained. minimum disruption to an operatmg circuit (Hint. Use par
10 :;;; + ,.
R 1.43 ConSider the voltageamplifier circuit model shown
? in Fig. I 16(b), in which A,. = 10 VN under the following o 1.50 DeSign an amplifier that proVides 0.5 W of signal
allel rather than senes connections.)
conditions: power to a loon load resistance. The signal source provides 1,53 A current amplifier for which R, = I ill, R. = 10 ill,
(b) Which bll "the LSB? Which is the MSB? a 30mV rms Signal and has a resistance of 0.5 Mn. Three and Au = 100 AlA is to be connected between a 100mV
(c) For I " , = 10 V. R = 5 kn. and N = 6. find the maximum (a) R, = lOR" R, = lOR, types of voltageampli fier stages are available: source with a resistance of 100 ill and a load of I ill. What
value of i {} obtained. What is the change in io resulting from (b) R, =R" R, =R, are the values of current gain ie/i,. of voltage gain v)v" and
the LSB changing from 0 to I? (c) R, = R, 'IO, R, = R/ IO (a) A hlghlOputreslStance type with R, = I Mn, A,." = 10,
of power gain expressed directly and in decibels?
and R" = 10 kn
1.38 In compactdisc (CD) audio technology, the audio sig Calculate the overall voltage gam v) v, in each case,
nal is sampled at 44.1 kHz. Each sample is represented by 16 (b) A highgain type with R, = 10 kn,t ,. = 100, and R" = 1,54 A transconductance amph fier with R, = 2 kn, G" =
expressed both directly and in decibels. Ikn 40 mAN, and R = 20 ill is fed With a voltage source having
bits. What IS the speed of thIS system in bits per second?
(c) A lowoutputresistance type with R, = 10 kn, A", = I, a source resista;ce of 2 ill and is loaded with a Iill resis
1.44 An amplifier with 40 dB of smailSignal, opencirculi
Section 1.4: Amplifiers voltage gam, an mput resistance of I Mn, and an output and R = 20 n tance. Find the vo/tage gain realized.
"
.
mm.t Also for a nom mal transducer opencircuit
.d output
. . volt voltage gain, current gain. and power gam expressed as Figure P1.64 shows an equivalent CirCUit representation of
age of 10 mY, the amplifier is require? to pro~1 ~ a mlnl.mum ratios and in decibels? these two equations. By comparing thiS equivalent circuit
of I rnA current through the load. \\hat type at amph.ller IS
to that of the voltage amplifier in Fig. 1.16(a). identify cor
reqUired') Sketch the amplltler CIrCUIt modeL and specll} val 1.63 Figure P 1.63(a) shows two transconductance amplifi
responding currents and voltages as well as the correspon
+ ues for ItS parameters. For R, and R .. speclty values In the ers connected in a special configuration. Find I'" In tenns of v,
dence between the parameters of the amplifier equivalent
i' , R, ~) gm i ', form I (10'" n and " . Let gm= 100 mAIV and R = 5 ill If 1', = 1'. = I V. find
cirCUit and the g parameters. Hence give the g parameter
0 1.60 It IS required to design an amphlier to sense the
= =
the value of i'". Also. find 1'" for the case 1', 1.0 I V and 1',
that corresponds to each of R,. A , and R". Nolice that there
.
0.99 V (Note: This Circuit is called a differe ntial amplifier
shortcirCuli output current of a transducer and to provide a is an additional g parameter with no correspondence in the
and" given the symbol shown in Fig. PI.63(b). A particular
I amplifier equivalent Circuit. Which one? What does it sig
 proportional voltage across a load reSistor. The equIvalent
source resistance of the transducer IS speCified to \ '31)' In the
type of dinerentia I amplifier known as an operationa l a mpli
fier wi 11 be studied in Chapter 2.)
nIfy? What assumption did we make about the amp li fier
range of I kn to 10 kl1. Similarly. the load resIStance is that resulted in the absence of this particular g parameter
R known to vary In the range of I kn to 10 kn. The change in from the equivalent circuit in Fig. I 16(a)?
load voltage corresponding to the speCified change In R o 0
Figure P1.S6 should be 10% at most. Similarly. the change in load voltage +
corresponding to the specitied change In R, is to be limited to
R, of the resulting oneport network. IHint: Apply a test volt 1
10%. Also. for a nominal transducer shortcircuit output cur
age II, between the two input terminals, and fmd the current i, rent of I0 ~A. the amplifier is required to provide a minimum
drawn from the source. Then, Ren = liz:' i ,. ) voltage across the load of I \~ What t)pe of amplifier IS +
required~ Sketch its circuit modeL and specify the values of t
o 1.57 It ISrequired to design an amplifier to sense the
opencircuit output voltage of a transducer and to provide a the model parameters. For R, and R . specify appropriate val  R I' ,
\',
.1 \
proportional voltage across a load resistor. The equivalent ues In the form I x 10" n
source resistance of the transducer is specified to vary in the 1.61 For the circuit in Fig. P1.61. sho\\' that
0<0 
range of I ill to 10 ill. Also. the load resistance varies in the + Figure Pl .64
range of I kl1 to 10 kl1. The change in load voltage corre i~
sponding to the specified change in R. should be 10% at most  
I 
(b) The 3dB frequency of the amplifier IS equal to or greater
than a specified valuej" .
frequency end it is detennmed by a lowpass STC circuit.
What do you expect the comer Irequencies of these two cir
Figure Pl. 71
 (c) The dc gain' 0' " is equal to or greater than a speCIfied
value Ao'
cuits to be? What is the drop in gain in decibels (relative to the
maximum gain) at the two frequencIes that define the ampli
fier bandwidth? What are the frequencIes at which the drop in
Show that these constramts can be met by selectmg gain is 3 dB"
CHAPTER 2
IN THIS CHAPTER YOU WILL LEARN
1. The terminal characteristics of the ideal op amp.
Introduction 53 2.6 DC Imperfections 88 5 Important nonldeal characteristics of op amps and how these limit the
performance of basic opamp circuits.
2.1 The Ideal Op Amp 54 2.7 Effect of Finite OpenLoop Gain and
Bandwidth on Circuit Performance 97
2.2 The Inverting Configuration 58
2.8 LargeSignal Operation of
2.3 The Noninverting Configuration 67
Op Amps 102
2.4 Difference Amplifiers 71 Introduction
Summary 107
2.5 Integrators and Differentiators 80
Problems 108 Having learned basIc amplifier concepts and terminology. we are now ready to undertake the
study ofa circuit building block of universal importance: The operational amplifier (op amp).
Op amps have been in use for a long time. their initial applications being primarily in the areas
of analog computation and sophisticated instrumentation. Early op amps were constructed
from discrete components (vacuum tubes and then transistors. and resistors). and their cost was
prohibitively high (tens of dollars). In the mld1960s the first integratedcircuit (Ie) op amp
was produced. This unit (the JiA 709) was made up of a relatively large number of transistors
and resistors all on the same silicon chip. Although its characteristics were poor (by today's
standards) and its prIce was still quite high. its appearance signaled a new era In electronic cir
cuit deSign. Electronics engineers started using op amps in large quantities. which caused their
prIce to drop dramatically. They also demanded betterquality op amps. Semiconductor manu
facturers responded quickly. and within the span of a few years. highquality op amps became
avaIlable at extremely low prices (tens of cents) from a large number of supplIers.
One of the reasons for the popularity of the op amp is its versatility. As we will shortly
see. one can do almost anything with op ampsl Equally important is the fact that the Ie op
amp has characterIstics that closely approach the assumed ideal. This implies that it is quite
easy to design circuits uSing the Ie op amp. Also. opamp circuits work at performance levels
that are qUite close to those predicted theoretically. It is for this reason that we are studYing op
amps at this early stage. It is expected that by the end of this chapter the reader should be able
to design nontrivial circuits successfully usmg op amps.
As already Implied. an Ie op amp is made up of a large number (tens or more) of tran
sistors. resistors. and (usually) one capacitor connected in a rather complex circuit. Since
53
2.1 The Ideal Op Amp 55
54 Chapter 2 Operational Amplifiers
In additIOn to the three signal tenninals and the two powersupply tenninals. an op amp
we have not yet studied transistor circuits. the ClfcUlt inside the op amp wIll not be dis
may have other tellllmais for specIfic purposes. These other tenninals can include tenninals
' h' h t Rather we will treat the op amp as a circuIt buIldmg block and study
cussed m t IS C ap e r . . " . .f for frequency compensation and tenninals for offset nulling; both functions will be explained
its terminal characteristics and its applications. ThIs approach IS qUIte satls actory m many
in later sectIOns.
t' Nevertheless for the more difficult and demandmg applIcatIons It IS
opamp app IIca I O n s . . d d' Ch
quite useful to know what is inside the opamp package. This topic WIll be stu Ie m ap
ter 12. More advanced applications of op amps wIll appear m later chapters.  
T' , +
)
i, = 0
J
VId = "2  VI (2. I ) o
The commonmode input signal vlcm is the average of the two input signals ", and v,;
namely, 

)
2
+ ( Powersupply (2.2) o
common terminal) Equations (2 . I) and (2 .2 ) can be used to express the input signals v, and v, in terms of their
= 0
I
"  differential and commonmode components as follows :
(2.4)
Furthermore, gam A IS called the differential gain, for obvIOUS ~easons. Perhaps not so obVI These equations can in tum lead to the plctonal representation in Fig. 2.4.
ous IS another name that we will attach to A: the openloop gain . The reason for thiS name
will become obvious later on when we "close the loop" around the op amp and define another I 1
gain, the closedloop ga in.
An important characteristic of op amps is that they are directcoupled or dc amplifiers,
where dc stands for directcoupled (it could equally well stand for direct current, since a 
T" 1I//2
+
directcoupled amplifier IS one that amplifies signals whose frequency is as low as zero). The
fact that op amps are directcoupled devices will allo\\ us to use them In many important
applicallons. Unfortunately, though, the directcoupling property can cause some serious


practical problems, as Will be discussed m a later section. + 
 {I,/'2
+
How about bandwidth? The ideal op amp has a gain A that remains constant down to
zero frequency and up to infinite frequency. That is, ideal op amps Will amplify signals of any
,
 ,
frequency with equal gain, and are thus said to have infimte bandwidth. 
We have discussed all of the properties of the ideal op amp except for one, which In v, +

fact is the most important. This has to do With the value of A. The ideal op amp should hove
a gain A whose vallie is very' large and ideal/v infinite. One may justifiably ask: If the gain A
IS infinite, how are we going to use the op amp? The answer is very simple: In almost all 
applications the op amp will not be used alone in a socalled openloop configuration.
Figure 2.4 Representation of the Signal sources til and V.' In tenns of their differential and commonmode
Rather, we wi ll use other components to apply feedback to close the loop around the op components.
amp, as will be illustrated in detail m Section 2.2.
For future reference, Table 2. I lists the characteristics of the ideal op amp.
2 .2 ConSider an op amp that IS ideal except that its openloop gain A = 10'. The op amp is used in a feed
I. Infinite mput impedance
back circuit, and the voltages appearing at two of its three signal terminals are measured. In each of
2. Zero output impedance
the follOWIng cases, use the measured values to find the expected value of the \ oltage at the third ter
3. Zero commonmode gam or, equi\alcntly, mfinlte commonmode rejection mmal. Also give the differential and commonmode input signals III each case. (a) T', = 0 V and 1') =
4. In fimte open loop gam A
2 V, (b) 1', = +S V and v) = 10 V; (c) 1', = 1.002 V and 1', = 0.998 V; (d) ", = 3.6 V and 1') = 3.6 V.
5. Infinite bandwidth
Ans. (a) 1', = 0.002 V, vIJ= 2 mY, Vic",'  I mY; (b) v, = +S.OI V, IIld = 10 mY, I't.m = 5.00S ~ S V;
(c) v) = 4 V. V ld =4 mY, "1", = I V; (d) 11, = 3.6036 V, VId= 3.6 mY, V k ", = 3.6 V
2.2 The Inverting Configuration 59
58 Chapter 2 Operational Amplifiers
R,
b odeled b} the clfcuit shown In Fig. E2.3 Express
2.3 The Internal Clrcuil ofa particular op amp can_ ~;'mAN R = 10 kfl, and f1 = 100, find the value of R,
tl, as a function of {I. and tI~. For the case G,  . .. 
I 3
Ihe openloop gain A.
Ans. ", =fiG jI( v,  ",); A =I0,000 VN or 80 dB t'l + 2 + +
t 'o
Figure 2 .5 The inverting closedloop
1',    configuration.
1 "
1
1 ground). Temninal 3 is, of course, a convenient pomt from which to take the output, since the
1 Impedance level there IS ideally zero. Thus the voltage Vo Will not depend on the value of the cur
1 rent that might be supplied to a load Impedance connected between temninal 3 and ground.
1
1
1 2,2.1 The Closedloop Gain
o t 1 o
1 + We now \\ ish to analyze the circuit in Fig. 2.5 to detemnlne the closedloop gain G, de tined as
1 "I 1.10
1  G=
1
VI
1 3
1
1
 +
We will do so assuming the op amp to be Ideal. Figure 2.6(a) shows the eqUivalent CirCuit,
and the analYSIS proceeds as follows: The gain 4 is very large (ideally infinite). If we assume
1 R that the CIfCUIt IS "workmg" and producmg a finite output voltage at terminal 3, then the
1 voltage between the opamp input temninals should be negligibly small and ideally zero.
21  /. Specifically, if we call the output voltage vo' then, by definition,
0>=;'1 0 ' : ' " ':' 
+ " tlo
1 " v,  v, = 
 A
=0
1 _
lh Gmt; " "
: 1 """" It follows that the voltage at the invertmg mput termmal (v,) IS given by V, = v,. That is,
because the gam ., approaches infinity, the voltage v, approaches and Ideally equals v,. We
1
1
"
,,"
"
speak of thiS as the two mput temninals "trackmg each other in potential." We also speak of a
1 ,," ", Irtual short circuit" that eXists between the two mput temninals. Here the word \'irtual should
1 ,," be emphasl/ed, and one should not make the mistake of physically shorting temnmals I and 2
.," together while analyzmg a clfcuit. A virtual short circuit means that whatever voltage is at 2
Figure E2.3 Will automatically appear at I because of the mfinlte gam A. But tenninal2 happens to be con
nected to ground; thus v, = 0 and v, = O. We speak often11inal I as being a virtual ground
that IS, having zero voltage but not physically connected to ground.
Now that we have determined II, we are in a position to apply Ohm's law and find the
current i , through R, (see Fig. 2.6) as follows:
2.2 The Inverting Configuration
  
As menlioned above, op amps are not used alone; rather, the op amp IS connected to passIVe
components m a feedback CIrCUit. There are two such basic CIrcuit configurations employmg Where will this current go? It cannot go Into the op amp, since the ideal op amp has an mfilllte
an op amp and two resistors: the Invertmg configuratIOn, which IS studied m thiS section, and mput impedance and hence draws zero current. It follows that i, will have to flow through R, to
the nonmvertl_ng configuration, which we shall study in the next section. the lowimpedance temnmal3. We can then apply Ohm's law to R, and detemnine vo; that is,
Figure'
2.) .
shows the invenmg configu ra t'Ion. It consists
. 0 f one op amp and two resistors R,
and R,. ReSistor R, IS connected 1T0m the output terminal of the op amp, terminal 3 hack to the
II1\'ertll1g or l1egall\'e Input term' I t ' I I '
','R ma, ermma . We speak of R, as applying negative feedback'  0
I ,WCre connected betwee t ' I 3 d  ,
Note I h R I n ermma s an 2 we would have called this positive feedback. Thus,
terml~a~o,ta~td c'ocnnoeScetSdthe loop around the op amp. In addition to addmg R" we have grounded o
 e a resistor R between te ' I I d ' . R,
age v. The output of th II " " rmma an an mput signal source with a voll   
I e overa CirCUit IS taken at termma. I 3 (I.e.,
. between tennmal 3 and R,
2.2 The Inverting Configuration 61
2 Op erational Amplifiers
60 Chapter
The fact that the closedloop gain depends entirely on external passive components
Ireslstors R, and R ) IS very significant. It means that we can make the closedloop gain as
~_.:.'=':t):""'_' R\r_ _ _ _ i accurate as \\ e want by se lecting pass ,ve components of appropriate accuracy. It also
means that the closedloop gain is (ideally) Independent of the opamp gain. This is a dra
matic dlustration of negative feedback : We started out with an amplifier having very large
gam 1. and through applying negative feedback we have obtained a closedloop gain
R, R, that IS much smaller than A but is stable and predictable. That is, we are trading gain
for accuracy.
" ) R,v~_=::;::I_
o 2.2.2 Effect of Finite OpenLoop Gain
The pomts Just made are more clearly illustrated by deriVing an expression for the c1osed
l', + loop gain under the assumption that the opamp openloop gain A is finite. Figure 2.7 shows
A. All  'I)
, + the analYSIS. If we denote the output voltage 1'", then the voltage between the two input
 termmals of the op amp will be vo, A . Since the positive input termmal is grounded. the
 voltage at the negative input ternlmal must be Vo ' A . The current i, through R, can now be
found from
   v,  (1'0 ' A)

R,
(a)
,, R
I' ,
..
=~:.......R,~_ o
0), =R  ..:='~'_~R,
:>
 .::=:>~

0 0
.....:=~.=. R '. :> ':.1
A+
A
+ I',
+ 0\ n Figure 2 .7 Analysis of Ihe invertmg
I ',
  + configuration takmg into account the finite

@ o    openloop gam of the op amp.
   R,
CD' , = 0 (Vinu,1 ground)
'"
~l'
R, '
The mfinite mput 'mpedance of the op amp forces the current ;, to flow entirely through
(b) R,. The output vo ltage "n can thus be determllled from
Figure 2.6 Analysi~ of the inverting configuration. The circled numbers indicate the order oj" the analysis
steps. Vo   
.4
= _ va _ (III + IIO' .4) R,
.~ R, 
which IS the required closedloop gain. Figure 2.6(b) dlustrates these steps and md,cales by Collecting terms, the closedloop gam G IS found as
the CIrcled numbers the order in \\ hich the analYSIS is perfonned
R ,. R,
We thus see that Ihe closedloop gam IS simply the ratio of the two resIStances Rand R,.
The minus sign means that the closedloop amplifier provides signal IIlvcrsion. Thus If
G; 
VO
",
=
I + ( I +R, R ,),' ~
(2.5 ) o
R, R I = 10 and we apply at the mput (",) a smewave Signal of I V peaktopeak, thcn the
We note Ihat asl approaches 00, G approaches the Ideal value of  R ,. R ,. Also. from Fig. 2.7
output Un \\111 be a sme wave of 10 V peaktopeak and phaseshifted 180' '\lth respect to the
we see that as 1 approaches 00, the voltage al the inverting input termmal approaches zero.
mput sme wave. Because of the mmus sign associated with the closedloop ga,n, Ihis con fig
ural Ion IS called the inverting configuration Th iS IS the Virtual ground assumption we used 111 our earlier analysis when the op amp was
62 Chapter 2 Operational Amplifiers 2.2 The Inverting Configuration 63
( ' 5) in fact Indicates that to mInimize Since the output of the invertmg configuration IS taken at the terminals of the Ideal voltage
'd I F'nally note that Eq. . . h Id
assumed to be I ea. I ,
ed loop gam
e on
I . lue of the openloop gain A, we s ou
tIe ,a source A(v,  " I) (see Fig. 2.6a), it follows that the output resistance of the closedloop amplt
f h l
the dependence 0 t e c os  fier IS zero.
make
AssumIng the op amp to be ideal, derive an expression for the closedloop gain I',), '" of the CirCUit
shown In Fig. 2.8. Use this Circuit to design an inverting amplifier with a gam of 100 and an Input
ConSider Ihe mverting configuration with R, = I kn and R = 100 kn. . resistance of I MO. Assume that for practical reasons it is required not to use resistors greater than
. h  10' , 10' , and 10' In each case determme the percentage I MO. Compare your design '''th that based on the inverting configuration of Fig. 2.5 .
(a) lFO ed th closedloop gam for t e cases .,  . I d
. h d I . I e of R R (obtamed with A = =). A so eter
error in the magnitude of e relattve to tel. ea .' a u . l ' I _
'ne the volta e" that appears at the invertmg mput terminal" hen VI  0.1 V. .
(b) ml
If the openloopg gam
'. A changes fr om,100000 to 50 '000 (t.e" drops
?
by 50%), what IS the correspond
109 percentage change in the magnttude of the closedloop gam e.
Solution
(a) Substituting the given values in Eq. (2.5), we obtain the values given In the following table, where the @
percentage error E is defined as
, 00 
E= IGI(R ,IR , \ 100 CD R,
(R, I R, ) +
CD
The values of V, are obtamed from V, =  " 0' A = e",;A with VI = 0.1 V. '"

A I: v,
  
10' 90.83 9 .17%  9.08 mV
10' 9Q .00 1 .00%  0.99 mV Figure 2 .8 Circuit for Example 2.2. The Circled numbers indicate the sequence of the steps In the analYSIS.
105 99. 90 0.10%  O.IOmV
Solution
(b) Using Eq. (2.5), we find that for A = 50,000, IGI = 99 .80. Thus a 50% change in the openloop gaIn The analysis begins at the InvertIng Input termInal of the op amp, where the voltage is
results in a change of only 0.1% 10 the closedloop gainl
2.2.3 Input and Output Resistances Here we have assumed that the circuit IS "working" and prodUCIng a finite output voltage I'". Know
Ing ",. we can determIne the current i , as follows:
Assuming an ideal op amp with Infinite openloop gain. the input resistance of the closedloop
inverting amplifier of Fig. 2.5 is simply equal to R,. This can be seen from Fig. 2.6(b), where   '"
R,
o = R, SInce zero current flows Into the Inverting Input temllna!. all of" will flow through Ro. and thus
Now recall that in Section 1.5 we learned that the amplifier input resistance form s a voltage
diVider with the resistance of the source that feeds the amplifier. Thus, to aVOid the loss of Signal
strength, voltage ampltfiers are required to have high input resistance. In the case of the invert Now we can determIne the voltage at node r :
Ing opamp configuration we are studying, to make R, high we should select a high value for R,.
However. If the required gain R I R . I h' h h
, I IS a so Ig , t en R, could become impractically large
(e.g., greater than a few megohms) We Id h  . .  o
i,R 1 '"
R,
RI 
=
to kfi
Thus the voltage gain is given by
Input
 Outpul
0.5 mA 10 Ul
which can be )muen in the form  +
:2=_~(I+~+~) 
VI RI R, R,  
Now. since an mput resistance of I MQ is required, we select R, = 1 MQ. Then, with the limita (a) (b)
tIOn of using resistors no greater than I MQ, the maximum value possible for the first factor in the Figure E2.S
gam expression is I and is obtained by selectmg R, = I MQ. To obtain a gain of I 00, R, and R,
must be selected so that the second factor in the gain expression is 100. If we select the maximum
allowed (in this example) value of I MQ for R,. then the reqUIred value of R, can be calculated to 2.6 For the c~rcUlt m Fig. E2.6 determme the values of "" I" i,. " 0 ' iL' and iv. Also detennlOe the voltage
be 10.2 kQ. Thus this circuit utilizes three IMQ resistors and a 10.2kQ resistor. In compartson. gain t'o, 1'/. current gam iLi l and power gain Pu Pl_
If the II1vertmg configuration were used with R, = I MQ we would have required a feedback reSIS Ans. OV; I rnA; I mA;IOV;IOmA;11 rnA:IO VN (20dB).IONA(20dB): 100 WIW (20 dB)
tor of 100 MQ. an Impractically large value
'
Before leaving this example it is insightful to inquire IOtO the mechanism by which the circuit is
able to realize a large voltage gain without using large resistances m the feedback path. Toward that
end. observe that because of the virtual ground at the inverting input terminal of the op amp. R, and R, 10
)
are 111 effect in parallel. Thus. by making R, lower than R, by. say. a factor k (i.e . where k> I). R) is I
forced to carry a current ktimes that in R,. Thus. while i, = i,. i) = ki, and i, = (k + I )i ,. It is the current IV +
multiplication by a factor of (k + I) that enables a large voltage drop to develop across R, and hence a
large Vn without using a large value for R,. Notice also that the current through R, is independent of the
value of R,. It follows that the circuit can be used as a current amplifier as shown in Fig. 2.9.
  Ikfi
,.
 Figure E2.6
R)
R
R .
,. Il  Figure 2.9 A currenl amplifier based on Ihe
2.2.4 An Important Application The Weighted Summer
cirCUli of Fig. 2.8. The amplifier delivers liS A very Important application of the Inverttng configuration IS the weightedsummer Cir
output current to R~. It has a current gain of
CUit shown in Fig. 2.10. Here we have a resistance RI in the negativefeedback path (as
" t (1 + R,IR 1 ), a zero input resistance, and an infi
nite output resistance. The load (R~), however. before); but we have a number of tnput signals II" 1', . . . " " each appJted to a corre
, R )
  II + R i, must be floating (i.e .. neither of its two termi
nals can be connected to ground).
sponding resistor R , . R, . .... R". which are connected to the inverting terminal of the op
amp. From Our prevIous discussion. the ideal op amp will have a virtual ground appeanng

2.3 The Noninvertlng Configuration 67
66 Chapter 2 Operational Amplifiers
. . .
.. ,ifl are
. tt na l Ohm's la\\ then tells us that the currents ',. ',. R,
at ,ts negative InpU erml .
given by R,
lin
 ,V,
 .

v,
,   , 
 V, R.
"  " R"
'I R, R, R, 
+ R, t'o
''2
+
'" R,
 v,

Figure 2 .11 A weighted summer capable of Implementing summing coefficients of both signs.

0"
~+
  02.7 Design an inverting opamp circuit to form the weighted sum " 0 of two inputs ", and ",. It IS
R, ) required that Vo =  (v , + 5v, ). Choose values for R" R" and Rf so that for a maximum outP~t volt
U (8!"
R I
~ Rfl n
age of lOY the current in the feedback resistor will not exceed I rnA.
Ans. A possible choice: R, = 10 kQ. R, = 2 kQ, and R, = 10 kQ
Figure 2.10 A weighted summer.
02.8 Use the idea presented in Fig. 2.11 to deSIgn a weighted summer that provides
All these currents sum together to produce the current i ; that is,
Ans. A possible choice: R, = 5 kQ. R, = 10 kQ, R" = 10 ill, R. = 10 kQ, R, = 2.5 kQ.
R, =IOkQ .
i = i, + ;,+ .. . + i , (2 .6 )
 .
will be forced to flow through Rf (since no current flows into the mput termmals of an Ideal op
amp). The output voltage Vo may now be determined by another application of Ohm' s law, 2.3 The Noninverting Configuration
vo =O  iR/ =  iR/
The second closedloop configuration we shall study IS shown in Fig. 2. 12. Here the mput
Thus, signal v, is applied directly to the positive input terminal of the op amp while one terminal of
R, is connected to ground.
o va=  (!1R , v,+ !1R, vd ... + R,,'J
Rv'I f (2 .7)
sIgnals wIth opposIte sIgns. Such a function can be implemented, however. uSIng two op
amps as .shown In FIg 2 II Ass . d I . Thus the voltage at the inverting input term mal WIll be equal to that at the noninverting mput
. . . umlng I ea op amps. It can be easily shown that the output
0
voltage IS gIven by terminal. whIch is the applied voltage "r The current through R, can then be determined as
v,1 R ,. Because of the infinite input impedance of the op amp. this current will flow through
R" as shown in Fig. 2. 13 . Now the output voltage can be determined from
(2 .8)
2 b ) "
va= v,+(;')R,
68 Chapter 2 Operational Amplifiers 2.3 The NOnlnvertmg Configuration 69
+
R,
+ P(I A I +=
v, R,
  This is the same condition as in the inverting configuration, except that here the quantity on
the righthand side is the nominal closedloop gain.The expressions for the actual and ideal
Figure 2.13 Analysis of the noninvcrting circuit, The sequence of the steps In the analysIs is Indicated by
values of the closedloop gain Gin Eqs. (2.11) and (2.9), respectively, can be used to deter
the circled numbers.
mine the percentage error in G resulting from the finite opamp gain A as
which yields
. I+(R, . R , )
o ~ = I +~ (2.9)
Percent gain error = 
1+
I R R x 100
+(, ,)
(2.121
v, RI
Further insight Into the operation of the non Inverting configuratIOn can be obtained by Thus, as an example, Ifan op amp WIth an openloop gain of 1000 IS used to design a nonm
considenng the following: Since the current Into the opamp inverting input IS zero, the cIr vertlng amplifier WIth a nominal closedloop gain of 10, we would expect the closedloop
cuit composed of R, and R, acts In effect as a voltage diVIder feeding a fraction of the output gam to be about I% below the nominal value .
voltage back to the inverting input temlinal of the op amp; that is,
2.3.3 Input and Output Resistance
V, = VO( R,:'R ,) (2.10)
The gain of the noninverting configuration is positive hence the name noninverling. The
Then the infinite opamp gain and the resulting virtual short circuit between the two input tennl input impedance of this closedloop amplifier is ideally infinite, since no current nows into
nals of the op amp forces this voltage to be equal to that applied at the positive input terminal; thus, the positive input terminal of the op amp. The output of the nonmverting amplifier IS taken
at the terminals of the ideal voltage source 04(1',  ",) (see the opamp equivalent circuit in
Vu( R,:' R,) = VI Fig. 2.3), thus the output resistance of the noninverting configuration is zero.
which YIelds the gain expression gIven In Eq . (2.9).
ThIS is an appropriate point to renect further on the action of the negative feedback present 2.3.4 The Voltage Follower
In the non inverting. CIrcuit of Fig . ? . P . Let' S h ' .
v, Increase. uc a change In v will cause II to The property of hIgh mput impedance IS a very deSIrable feature of the noninverting configura
Increase, and v" wlil correspondingly Increase as a result of the hIgh (ideally I~finite) gain of'the tion. It enables using this circuit as a buffer amplifier to connect a source with a high Imped
op amp. However, a !TactIOn of the IIlcrease in v will be fed back to th' ' . . I
of the 0 am h h h . . () e inverting Input term Ina ance to a lOWImpedance load. We have discussed the need for buffer amplifiers in Section 1.5
p P t roug t e (R R,) voltage dIVIder. The result of this feedback will be to counter In many applications the buffer amplifier IS not required to provide any voltage gain: rather, It
act the Increase In v dnvlng" v back t Ib . .
h . id ' 'J 0 zero, a ell at a hIgher value of II that corresponds to is used mamly as an impedance transfomler or a power amplifier. In such cases we may make
~a~~c~eased val~e of v,. Th is degeneralil'e action of negalJve feedback g:~es it the altemative R, = 0 and R, = ~ to obtain the unitygain amplifier shown in Fig. 2.14(a). This cirCUIt IS
egeneratlVe feedback Finally note that tI b
decreases. A formal and d ta 'I' d d ' le argument a ove applies equally well if v, commonly referred to as a voltage follower, since the output "follows" the mput. In the ideal
e I e stu y of feedback IS presented in Chapter 10. case, v( ) = V f ' R =~ Rout =0' and the follower has the equivalent circuit shown in Fig. 2.14(bl.
In
70 Chapter 2 Operational Amplifiers 2.4 Difference Amplifiers 71
2 .13 For the circuit in Fig. E2: 13 find the values of i" v" i" i,. va' i" and ' a' Also find the voltage gain
"oi l'" the current gaIn 'L I ", and the power gain PL I P,.
0 0 Ans, 0; I V; I rnA; I rnA; 10 V; 10 rnA; II rnA; 10 VIV (20 dB);~; ~
 + +
.
.
+
", I "~I 1'0
, ': 9 kfi
 <b )

<a) Ikfl
Figure 2.14 <a) The uniIYgam buffer or follower amplifier. (b) lis eqUivalenl CIrCUit model
SInce in Ihe voltagefollower circuit the enlire output is fed back to the InvertIng input,   Fi gure E2 .13
the CIrCUit IS said to have 100% negative feedback. The infinite gain of the op amp then acts
to make V'd = 0 and hence va = v[" Observe that the circuit is elegant in its simplicity I 2 .14 It IS reqUired to connect a transducer having an opencircuit voltage of I V and a source resistance
Since the noninverting configuration has a gain greater than or equal to unity, depending of I MO to a load of Iill resistance. Find the load voltage if the connectIOn IS done (a) directly and
(b) through a unitygain voltage follower.
on the chOice of R,I R I' some prefer to call it "a follower with gain."
Ans. (a) I mY; (b) I V
_. '.  
_ r~'
  
_~~ W~. _ _
 .  ~ .
~

.~ ~..     .. , . . ..
3kfl
 Figure E2.9 (2.13)
2,10 If in the circuit of Fig E2 9 th I k!l. . . where Ad denotes the amplifier differential gain and A,m denotes its commonmode gain (ide
SIgnal source V use ;up~rpo~(~ I r~SI~tor IS dISconnected from ground and connected to a third ally zero). The efficacy of a differential amplifier is measured by the degree of its rejection
Ans v _ 6v '~4 9 I n 0 e ermme va m terms of v,, v,, and v,,
. 0  I v~  v1 of commonmode signals in preference to differential signals. This is usually quantified by a
02,11 measure known as the commonmode rejection ratio (CMRR). defined as
DeSIgn a nonmvenmg amplifier with a gam of2 At th .
rent m the voltage dIVider is to be 10 !lA. . e maximum output voltage of 10 V the cur
Ans. R, = R, = 0.5 Mfl
2.12 CMRR = 10
_ Iogl A"I (2 14) o
(a) Show that if the op amp m the Circuit ofFi 2 12 h Acm
loop gam IS given by Eq. (2.11). (b) For R,}i kn
an~s ~ f:,te openloop gamA, Ihen the closed
01 the closedloop gam from the ideal value f 1 9 kfl find the percentage deViation E
Forv, =1 V, find m each case the voltage bet:e(1 +hR,I R , ) for the cases A = 10' , 10', and 10 ' . 'The terms difference and differen'ial are usually used to describe somewhat different amplifier types.
Ans, E= I %, _ 0.1 %  00 IOk en I e two Input terminals of the op amp For Our purposes at this point, the distinction is not sufficiently significant. We will be more precise near
, . 0,v, v, =9.9mV, I mV,O.1 mV . the end of this section.
72 Chapter 2 Operational Amplifiers 2.4 Difference Amplifiers 73
R,
R,
 ,
lild'  till
+
I' , I' I til R,
I
l ie +
Vf, , ( fill + {tel I' (I
 R,
+ Figure 2.15 Representing the input signals to a   Figure 2 .16 A dlfTerence amplilier.
differential amplifier in terms of their differential
and common mode components.

This completes our work. However. we have perhaps proceeded a little too fast l Let's step
The need for difference amplifiers anses frequently in the deSign of electronic systems. espe back and venfy that the circuit In Fig. 2 16 with R, and R, selected according to Eq . (2 .15)
cially those employed in instrumentation. As a common example. constder a transducer pro does in fact function as a difference amplifier SpeCifically. we wish to determine the output
"ding a small (e.g.. I mY) signal between its two output terminals while each of the two voltage v" In tenns of t'll and v". Toward that end. we observe that the circuit is linear. and
wires leading from the transducer terminals to the measuring instrument may have a large thus we can use superposition.
interference signal (e.g . I V) relative to the circuit ground. The instrument front end obvI To apply superposition. we first reduce v" to zero that is. ground the terminal to
ously needs a difference amplifier. which vf.' IS applied and then find the corresponding output Voltage. which will be due
Before we proceed any further we should address a question that the reader might have : entirely to VII We denote this output voltage VIII ' Its value may be found from the circuit In
The op amp is itself a difference amplifier: why not just use an op amp? The answer is that Fig. 2.17(a). which we recognize as that of the inverting configuration. The existence of R,
the very high (ideally infinite) gain of the op amp makes it impossible to use by itself Rather. and R, does not affect the gain expression. since no current flows through either of them.
as we did before. we have to dense an appropriate feedback network to connect to the op Thus.
amp to create a circuit whose closedloop gain IS finite . predictable. and stable.
(2 16) o
which can be put In the form
Thus. as expected. the Circuit acts as a ditTerence amplifier with a differential gain 4" of
R, R,
;;":: =
R, + RJ 4" = RI (2 .17) o
ThiS condition is satisfied by selecting
Of course tillS IS predicated on the op amp being ideal and furthennore on the selection of R,
and R, so that their ratio matches that of R, and R, (Eq . 2.15). To make this matcillng
(2 .15) requirement a little easier to satisfy. we usually select
74 Chapter 2 Operational Amplifiers 2.4 Difference Amplifiers 75
R,
'=:'~)=J, R, ,,_,
R,
' ) R,
R, ,
R,
VII

, 01  RJ
'n
~+
+ lin +
R, R, VIIIII
+
  
(a) (b)
 
Figure 2.18 Analysis of the difference amplifier to determine its commonmode gain A cm = vOl vhm '
Figure 2.17 Application of superposition to the analySiS of the CIrcuit of Fig. 2. 16.
(i.e .. the reststance seen by v,), called the differential input resistance R,d' consider Fig. 2.19.
Here we have assumed that the resistors are selected so that
RJ = R, and R, = R, RJ = R, and R,  R,
Let's next consider the cirCUIt with only a commonmode signal applied at the Input. as Now
shown in Fig. 2.18. The figure also shows some of the analysis steps. Thus,
Via
. I R, R'd == .
I   V V
I  RI Ic m  R4 + R3 f ern "
Since the two input tenninals of the op amp track each other in potential. we may write a
RJ I loop equat ion and obtam
= V" mR, + RJR, (2 .18)
A,m;: va
v"m
=( R,
R,+R
(I R, R3)
R, R; (2 .19) I.
(
For the design with the resistor ratios selected according to Eq. (2.15), we obtain
A,m = 0
as expected. Note, however that any mismat h . . +
and hence eM RR IiIOlte,
" c In the reSistance ratios can make A em nonzero
I, R, Figure 2.19 Finding the IOput reSIS
In addition to reJectmg cOmmonmod' .  tance of the difference amplifier for
to have a high input resistance To Ii d he Signals, a difference amplifier tS usually required
. In t e mput reststanc b
e etween the two 'mput tennmals.  the case R} = R, and R~ := R~.
2.4 Difference Amplifiers 77
76 Chapter 2 Operationa l Amplifiers
R,
. . . F' 1 I" r the case R  R  1 Hl and R = R = R,
2.1S ConSider the differenceamplifier CIrCUli of Ig.  ".or . . ,   .. > '
~OO kO (a) Find the value of the dliTercntlal gam A (b) Fmd the value of th: ddfercn~ ,a l mput 2R , R, A,
.
r~ sls t ance
R. , an
d the output resistance R,
(c) If the reSIStor.; have 1'0 tolerance (I e .. each
d
can
'
be +
withm I~o of Its nom ma l value), use Eq . (2 19) to find the \\ orstcase commonmo e gam A "
and hence the corresponding value ofCMRR
Ans. (a) 100 VN (40 dB); (b) 4 kO. 0 0 ; (c) 0.04 VN. 68 dB
02.16 Fmd values for the resistances in the CIrcuit of Fig. 2.16 so that Ihe ClfcUlt beha,es as a difference
amplitier with an mput resistance of ~o Hl and a gam of 10.
 
( b)
Ans. R, =R =10 kO; g =R, = 100 kO
   ~
t
0,
2.4.2 A Superior Circuit The Instrumentation Amplifier
R, R,
The lowmputresistance problem of the difference amplifier of Fig. 2.16 can be solved by usmg "I
to
~
voltage followers to buffer the two mput terminals; that is. a voltage follower of the type in Fig. 2.14 111./2R I
R,
IS connected between each mput terminal and the corresponding input terminal of the difference
amplifier. However, if we are going to use two additional op amps, we should ask the question: Can
( Ilf. tl/l )
{lId
2R , IlfJ
'2R I
II'd ~ 2R)
2R, A,
t
we get more from them than just impedance butlering? An obvious answer wou ld be that we t t +
IIIJI'2R I
R,
should tty to get some voltage gam. It is especially mterestmg that we can achieve this without com
1Ir.
E
1/0 = R4 (I t Rl.)"1d
promlsmg the high input resistance simply by usmg follower.; with gain rather than unitygam fo l
lowers. Achieving some or indeed the bulk of the required gam m this new first stage of the
to R, R, R, R,
OV  
R ,.
I  +
till  R
A.
(c)
R
Figure 2.20 ( Colllllllledj
R, R, differential ampli fier eases the burden on the difference amplifier m the second stage, leavmg 11 to
Its main task of implementing the difterencing function and thus rejecting commonmode signals.
~ x
A, The resulting circuit is shown in Fig. 2.20(a). It consists of two stages in cascade. The first
 R, R, + stage IS fo rmed by op amps A I and A, and their assoc iated resistors, and the second stage is the
R. bynowfami liar difference amplifier fo rmed by op amp A, and its four assoc iated resistors.
l 'f)
Observe that as we set out to do, each of A I and A, is connected in the noninverting configura
tion and thus reahzes a gam of ( I + R,. R I ). It fo llows that each of VII and Vn is amplified by
l   _ _ ..
A   thiS factor, and the resu lting ampl ified signals appear at the outputs of A, and A,. respectively.
The difference amp li fier 111 the second stage operates on the di fference signal
I R I
R I.'r. ( I + R,. R 1)( " Il  " " ) = ( I + R, R I) T"J and provides at its output
I
(a)
Figure
. _ _ 2 . 20_A p l ar urcull
opu ..lor an Ins trumenlation . I' Ii . .
clrcun In nh the connectIOn between nod ' X d amp I ler. (a) 100tiai approach to the circ uit (b) The
(a) \I,
together. This si mple wi ri ng change dra , c, . ,a,~ g round removed and the two resistors R, and R, lumrcd Thus the differenti al ga m realized is
' . 
(b) assummg Ideal op amps.
rna lea i' Improves p e r~ .  ,
ormance. (e) A nalYS IS 01 th e c irc ulI In
(2 .21)
78 Chapter 2 Operat,onal Amplifiers 2.4 Difference Amplifiers 79
The commonmo de gam "11w, be zero because of the differencmg actIOn of the secondstage Consider next what happens when the two input termmals are connected together to a common.
mode input voltage v,,",, It is easy to see that an equal voltage appears at the negative input terminals
amplifier. . . II' fi . ). .
The circuit in Fig. 2.20(a) has the advantage of very h'gh (,dea y 10 m,te . mput resIs of A, and A,. causing the current through 2R, to be zero. Thus there will be no current flowing in the
tance and high differential gain. Also, provided A, and A, and their correspond 109 resistors R, resistors. and the voltages at the output termlOals of A, and A, will be equal to the input (i.e., v,=).
are matched, the two signal paths are symmetric a defintte advantage 10 the deSign of a dif Thus the first stage no longer amplifies vkm : it simply propagates v km to its two output terminals,
ferential amplifier. The circuit, however. has three major disadvantages: where they are subtracted to produce a zero commonmode output by Ay The difference amplifier
in the second stage. however, now has a much improved situation at its input: The difference signal
1. The mput commonmode Signal " k m is amplified in the first stage by a gain equal to
has been amplified by (I + R,! R,) while the commonmode voltage remained unchanged.
that experienced by the differential signal "/d' ThiS IS a very senous Issue. for ,t could
Finally. we observe from the expression in Eq. (2.22) that the gain can be varied by
result in the signals at the outputs of A, and 04 1 being of such large magnitudes that the
changing only one resistor, 2R,. We conclude that thiS is an excellent differential amplifier
op amps saturate (more on opamp saturation in Section 2.8). But even if the op amps
circuit and is widely employed as an instrumentation amplifier: that is, as the input amplifier
do not saturate, the difference amplifier of the second stage will now have to deal
used in a variety of electronic instruments.
with much larger commonmode signals. with the result that the CMRR of the overall
amplifier will inevitably be reduced.
2. The two ampltfier channels in the first stage have to be perfectly matched. otherwise
a spunous signal may appear between their two outputs. Such a signal would get
amplified by the difference amplifier in the second stage. DeSign the mstrumentation amplifier circuit in Fig. 2.20(b) to provide a gam that can be varied over
3. To vary the differential gam Ad' two reSIStors have to be vaned simultaneously. say the range of 2 to 1000 utilizing a 100kQ variable resistance (a potentiometer. or "pot" for short).
the two resistors labeled R,. At each gain setting the two resistors have to be perfectly
matched: a difficult task. Solution
All three problems can be solved with a very Simple wiring change: Simply disconnect the It IS usually preferable to obtain all the reqUIred gam in the first stage, leaving the second stage to
node between the two resistors labeled R" node X. from ground. The circuit with this small perform the task of taking the difference between the outputs of the first stage and thereby rejecting the
but functionally profound change is redrawn in Fig. 2.20(b). where we have lumped the two commonmode signal. In other words. the second stage is usually designed for a gain of l. Adopting
resistors (R, and R,) together into a single resistor (2R ,). this approach. we select all the secondstage resistors to be equal to a practically convenient value,
. Analysis of the circuit in Fig. 2.20(b), assuming ideal op amps, is straightfOlward. as IS say 10 kQ. The problem then reduces to designing the first stage to realize a gain adjustable over the
Illustrated 10 Fig. 2.20(c). The key point is that the Virtual short circuits at the inputs of op range of 2 to 1000. Implementing 2R, as the series combination of a fixed resistor R" and the vari
amps A, and A, cause the mput voltages l'/I and ,,~ to appear at the two terminals of resistor able resistor R" obtained using the I OOkil pot (Fig. 2.21 ). we can write
(2R ,). Th~s the differential input voltage tIn  " I ' = vlJ appears across 2R, and causes a current '2R.,
, = v,/ _R , to flow through 2R , and the two resistors labeled R,. ThiS current 10 tum pro 1+ =2to1000
duces a voltage difference between the output terminals of A, and A2 given by R" +R".
Thus,
2R ,)
vm  "a' = ( 1+ 2R ' vid
, 2R.,
1+ '=1000
The difference amplifier formed b A d ' . RI!
d ' f~ . Y op amp 1 an ,ts assOCiated resistors senses the voltage
I erence (v",  va') and prOVides a proportional output voltage u,,: and
R, 2R.,
va = R( 1
V 02  va, ) \+ .
R,,+IOOkO
= 2
R,( R ,)
= R I + " v'J
These two equations Yield R" = 100.2 0 and R, = 50.050 kO. Other practical values may be
) R, selected: for instance, R,/ = 100 Q and R = 499 kO (both values are avaIlable as standard \%
Thus the overall differential voltagegam is given by tolerance metalfilm reSistors, see AppendIX H) results in a gain covering apprmomately the
reqUIred range.
o AJ =~ = ~(I+R2)
vid R, R (2 .22)
Observe that proper differential operat,on does 110/ de '
labeled R2 Indeed. if one of the tw' fd'f!i pend on the match 109 of the two res,stors
o IS 0 'erent value , sa y R',. th e expressIOn
. for A,I becomes 2R, 
I DO k!1
A = ~(I + R +R; )
J
2 pot } RI! 1 To make the gam of the circuit in Fig. 2.20(b) vanable. 2Rl
implemented as the series combination of a tixed resistor Rtf and a variable
IS
RJ 2R, (2.23)
resistor RIt~ Resistor RlI ensures that the ma:\imum available gain is limited.
80 Chapter 2 Operational Ampl.f'ers 2.5 Integ rators and Dlffe rentlato rs 81
c,
Solution
2.5 1 The Inverting Configuration with General Impedances To obtal11 the transfer functIOn of the clfcuit 10 Fig. 2.23, we substitute in Eq . (2 .24), Z, = R, and
To begin WIth. conSider be ''''venL~g c1osedI\JOp conligurallon With Impedances Z .(s and Z, = R ~ II( I ,C~ ) Since Z, IS the parallel connectIOn of two components, It is n:ore convenient to
work 10 terms of ) . that is, we use the fo llowing alternative form of the transfer function :
Z I, ' replacmg resistor< R and R, respec'nely. The resulting CirCUit IS sh\J\\n 10 Fig. 2..c2
and. for an Ideal op amp. has the closedlOOp pi!' or, more appropnate.y, the C osedI\J\Jp
transfer funcllon
o f ,( r)
~, ( , I
 1.1 S I
l(n
and substitute Z, = R , and )"2(s ) = ( I I R, ) + sC, to obtam
 
As ~xplamed 10 Section 1.6, replacmg: ' by (Wprovldes the transfer functIOn tor phYSical fre  I
~uenC1es (J), that IS. the transmiSSIOn magnitude and phase for a sinUSOidal mput Signal of RI
frequency w.  + s C, R ,
R, 

Thi s transfer functIOn IS of first order, has a finite de gain (at s = 0, I". I = R, R I ), and has zero
ga111 at 111finitc frequenc y. Thus it is the transfer function of a lowpass STC network and can be
expressed 111 the standard fornl of Table 1.2 as follow s:
I~( s ) R,IR ,
  I
I (s )

I + sC R,

I

  
from which we find the dc gam A. to be
R,
FigurL "".,," The lO'.'Crtmg 'onfi I

, . guratJon 1\ _n 5I!n~rJllmpcJanl..c", In th~ t~cdbJ(k. and the feedIn paths
2.5 Integrators and Differentiators 83
82 Chapter 2 Operational Amplifiers
+ i 'I
\ ', .,CR
We could have found all this fromthe CIrcuit in Fig. 2.23 by mspection. Specdi~ally. note that the
capacitor behaves as an open circuit at dc; thus at dc the gam IS simply (R ,/ RI)' Furthermore.   
because there IS a VI ua I gr0 und at the invertmg mput tennma!. the resistance seen by the capacitor
. 'rt
(a)
IS R and thus the time constant of the STC network is C,R,. .
' ow to 0 b'
N tam a dc gam
. of40 dB that is . 100 V'V . we select R, R, = 100. For an Input resls
tance of I ill. we select R, = I ill. and thus R, = 100 kn. Finally. for a 3dB frequency/; = I kHz.
f, (dB)
we select e, from

, I
2JrxlxlO= ,
C,x
 100x 10
which yields C, = 1.59 nF.
The CIrcuit has gain and phase Bode plots of the standard fonn 10 Fig. 1.23. As the gam falls ofTat the
rate of  20 dB/decade, it will reach 0 dB in two decades, that is, at J = 100fo = 100 kHz. As Fig. 6 dB/octave
1.23(b) indicates, at such a frequency which is much greater thanfo, the phase is approximately 90.
To this, however, we must add the 1800 arising from the inverting nature of the amplifier (i.e., the
negative sign in the transfer function expression). Thus at 100 kHz, the total phase shift will be 270'
or, equivalently, +90 0 .
o w (log scale)
I
CR
(b)
2,5.2 The Inverting Integrator
Figure 2.24 (a) The Mllter or invertmg mtegrator. (b) Frequency response of the mtegrator.
By placmg a capacitor 10 the feedback path (I.e., 10 place of Z, in Fig. 2.22) and a resistor at
the IOpUt (in place of Z,). we obtam the circuit of Fig. 2.24(a). We shall no\\ sho\\ that thiS
cirCUit realizes the mathematical operation of mtegratlon. Let the mput be a timevarying
function v, (I). The Virtual ground at the mvertmg opamp mput causes 11,( 1) to appear 10 mtegrator circuit is said to be an inverting integrator. It IS also known as a Miller integra
effect across R, and thus the current ;,(t) "ill be ",(I). R. ThiS current nows through the tor after an early worker in this field.
capaCItor C, causmg charge to accumulate on C If we assume that the circuit begins opera The operation of the integrator circuit can be described alternatively in the frequency
tIOn at time, = 0, then at an arbitrary time 1 the current; (I) will have deposited on C a domain by substituting Z,tS) = Rand Z2(S) = l/SC in Eq. (2.24) to obtain the transfer
charge.equal to I~;,(!)dl. Thus the capacitor voltage v,1l)' will change by : I,:i,(l) ",. If function
the IOlllal voltage on C (at 1 = 0) IS denoted I'" then
I;, (s) _
vd!) = I~
I I
I~ (s)
 
I
sCR
(2.26 ) o
+clil(l)dl
o
For phYSical frequencies, s = jOJ and
Now the output voltage V,P) = v,1t); thus,
I: (j m) _
I~(j m)
I
 ''
jmCR
(2.27) o
o vo(l) = CR
I
f
I
as opposed to the ideal function of  I f s CR. The lower the value we select for R , the
and phase higher the comer frequency (I fC R,) wlil be and the more non ideal the integrator
F
o Th Bode plot for the ,"tegrator magnitude response can be obtained by noting from Eq. (2.28)
becomes. Thus selecting a value for RF presents the designer with a tradeoff between dc
performance and signal performance. The effect of R, on Integrator performance is investi
tha~ as UJ doubles (increases by an octave) the magnitude is halved (decreased bY,6 dB) . gated further In the Example 2.5.
Thus the Bode plot is a straight line of slope 6 dB/octave (or, equlValently,_O dB/
decade). This line (shown in Fig. 2.24b) intercepts the OdB line at the frequency that makes
I/~I';I = I, which from Eq. (2.28) is
I (2 .30)
o CR
The frequency cu.", is known as the integrator frequency and is simply the Inverse of the Find the output produced by a Miller Integrator In response to an input pulse of IV height and Ims
Integrator time constant. Width [Fig. 2.26(a)]. Let R = 10 kn and C = 10 nF. If the integrator capacitor is shunted by a IMn
Comparison of the frequency response of the Integrator to that of an STC low pass net reSistor, how will the response be modified') The op amp is specified to saturate at 13 V
work Indicates that the integrator behaves as a low pass filter with a comer frequency of zero.
Solution
Observe also that at UJ= 0, the magnitude of the Integrator transfer function is infinite. ThiS
Indicates that at dc the op amp is operating with an open loop. This should also be obvious In response to a IV, Ims Input pulse, the Integrator output will be
from the Integrator circuit itself. Reference to Fig. 2.24(a) shows that the feedback element IS
a capacitor, and thus at dc, where the capacitor behaves as an open circuit, there is no nega "0(1) =
I '
fo
C R I dl, 0 ~ I < I ms
tive feedback! This is a very significant observation and one that indicates a source of prob where we have assumed that the Initial voltage on the integrator capacitor is O. For C = 10 nF and
lems with the integrator circuit: Any tiny dc component in the Input signal will theoretically R = 10 kn, CR = 0.1 ms, and
produce an infinite output. Of course, no infinite output voltage results In practice; rather, the
output of the amplifier saturates at a voltage close to the opamp positive or negattve v,,(1)= 101, o~ I ~ I ms
power supply (L, or LJ, depending on the polarity of the input dc signal.
The dc problem of the Integrator circuit can be alleviated by connecting a resistor R which IS the linear ramp shown In Fig. 2.26(b). It reaches a magnitude of 10 V at 1= 1 ms and
across the Integrator capacitor C, as shown in Fig. 2.25 and thus the gain at dc Will be R Ii remains constant thereafter.
rather than infinite. Such a resistor provides a dc feedback path. Unfortunately, however, Fthe That the output is a linear ramp should also be obvIOUS from the fact that the IV input pulse
Integrallon IS n? longer Ideal, and the lower the value of RF , the less Ideal the Integrator circuit produces a constant current through the capacitor of I V 10 kn = 0.1 rnA. ThiS constant current
becomes. This IS because RF causes the frequency of the integrator pole to move from its ideal 1= 0.1 mA supplies the capacitor with a charge II, and thus the capacitor voltage changes linearly
location at UJ= 0 to one determined by the comer frequency of the STC network (R" Cl. Spe as (II e), resulting in "0 = (I C)I It is worth remembering that charging a capacitor with a
Cifically, the Integrator transfer function becomes constant current produces a linear voltage across it.
Next consider the situation with resistor R, = I Mn connected across C. As before, the IV
I~ (s) pulse will proVide a constant current 1= 0.1 rnA. Now, however, this current is supplied to an STC
 
I~(s) I +sCR F network composed of RF in parallel with e Thus, the output will be an exponential heading toward
100 V with a time constant of eR, = 10 )< 10' . I X 10' = 10 ms,
The output waveform is shown in Fig. 2.26(c), from which we see that mcluding R, causes the ramp to
be slightly rounded such that the output reaches only 9.5 V, 0.5 V short of the ideal value of 10 V.
+ Furthermore, for I > I ms, the capacitor discharges through R,. with the relatively long timeconstant of
Figure 2.25
.
The MII .
I er Integrator With a large resistance R
10 ms. Finally, we note that op amp saturation, specified to occur at 13 V, has no effect on the opera
  
connecled In parallellh C
b k WI In order to provide negative feed
ac and hence finite gain at dc.
F
tion of this circuit.
2.5 Integ raters and Dlfferentlaters 87
86 Chapter 2 Op erational Amplifiers
v,,(jOJ) _ ."rR
V. (j OJ)  Jw.. (2.33) o
, ,. R
 lOY       "      
C
(b )
,. 0
) ,r I) C"p{(')
.I,
+ 1'0(') eR .I"dti
vdt) .I,
\,
 ,(R
 0\   \
0 I ms
,
I (a)
I
I V" (dB)
I V,
I ........
.... .",.. h l V
I
I
 9.5 Y /
I xpontntl .. :s \\.'111 /
" Ilml l:Jlnqanl 01 10 ms
" o I Iv
(C)
" ur' 2.26 Waveforms for Example 2.5: (a) tnpul pulse. (b) OUlPUI linear ramp of Ideal inlegralor wi lh lIme con
stant oro.1 ms. (c) Output exponential ramp with resistor Rf con nected across integrator capac itor.
+6 dB/oclave
oL_ _ w (log scale I
/ I
. The preceding example hints at an Important application of integrators namely their use / CR
m provldmg tnangular way Ii . , , .
ex I . . e orms m response to squarewave inputs. This application IS
(b)
P oredf'fin ExerCise 2.18.
deSlgn 0 liters (Chapter 16).Integrators have many other applications including their use in the
'
Figure 2.27 (a) A dilTerentoator. (b) Frequency r.'ponse of a dltTerentialOr with a tlmeconstanl CR.
88 Chapter 2 Operational Amplifiers 2.6 DC Imperfections 89
amp is not a bad one, a circuit designer has to be thoroughly familiar with the charactenstics
Thus the transfer function has magnitude of practical op amps and the effects of such characteristics on the performance of opamp cir
~ =wCR (2.34) cuits. Only then will the designer be able to use the op amp intelligently, especially if the
o v, application at hand is not a straightforward one. The nOnldeal properties of op amps will. of
and phase course. limit the range of operation of the circuits analyzed in the previous examples.
In this and the two sections that follow, we consider some of the important nonideal
if = _90 (2.35 )
o properties of the op amp .' We do this by treating one nonideality at a time, beginning in this
section with the dc problems to which op amps are susceptible.
The Bode lot of the magnitude response can be found from Eq. (2.34) by noting that for an
. p . h 't d doubles (increases by 6 dB). Thus the plot IS simply a
octave mcrease 10 (J), t e magnl u e . . h 0 dB
. of slope +6 dB/oc tave"
straight Ime (or equivalently +20 dB/decade) mtersectlng
. t e [ 2.6.1 Offset Voltage
. (where 10. I'/, 1 I) at ~E., = I 'CR , where CR is the differentiator timeconstant see
line Because op amps are directcoupled devices with large gains at de. they are prone to dc
Fig.2.27(b)]. h f h t f STC h gh problems. The first such problem is the dc offset voltage. To understand this problem con
The."requency response 0 fthe differentiator can"be thoug to as tao , an Ih pass
Sider the following conceptual experiment: If the two input terminals of the op amp are tied
filter with a comer frequency at infinity (refer to Fig. 1.24). Finally, we ~,hould note t at the
together and connected to ground. it will be found that despite the fact that tI'J = O. a finite dc
,ery nature of a differentiator CirCUit causes it to be a "nOise magnifier ThiS IS due to the
voltage exists at the output. In fact, if the op amp has a high dc gain, the output will be at
spike introduced at the output every time there is a sharp change In ",(I); such a change
either the positive or negative saturation level. The opamp output can be brought back to its
could be interference coupled electromagnetically ("picked up") from adjacent Signal
Ideal value of 0 V by connecting a dc voltage source of appropriate polarity and magnitude
sources. For this reason and because they suffer from stability problems (Chapter 10), dlffer
between the two input tenninals of the op amp. This external source balances out the Input
entiator CIrcuits are generally avoided in pracllce. When the cirCUit of Fig. 2.27(a) IS used, .it
offset voltage of the op amp . It follows that the input offset voltage (Vas ) must be of equal
is usually necessary to connect a smallvalued resistor in series with the capacitor. ThiS
magnitude and of opposite polarity to the voltage we applied externally.
mod ification, unfortunately, turns the circuit into a nonideal differentiator.
The input offset voltage arises as a result of the unavoidable mismatches Present in the input
differential stage inside the op amp. In later chapters (in particular Chapters 8 and 12) we shall
study thiS tOpiC in detail. Here. however. our concern is to investigate the effect of Vos on the oper
ation of closedloop opamp circuits. Toward that end, we note that generalpurpose op amps
exhibit l os in the range of I mV to 5 mV . Also, the value of J;" depends on temperature. The op
2.18 ConSider a symmetrical square wa,e of10V peaktopeak, 0 average, and 2ms penod applied amp data sheets usually specity typical and maximum values for J;'s at room temperature as well
to a Miller mtegrator. Find the ,alue of the lime constant CR such that the triangular waveform at as the temperature coefficient of Vos (usually In I1V /OC). They do not. however. specity the
the output has a 20V peaktopeak amplitUde. Polanty of J'os because the component mismatches that give rise to I;,s are obviously not known a
Ans. 0.5 ms priori; different units of the same opamp type may exhibit either a positive or a negative J ~, .
02.19 Use an Ideal op amp to design an mvertmg mtegrator With an mput resistance of 10 kn and an To analyze the effect of Vos on the operation of opamp circuits. we need a circuit model
1
Integration time constant of 10 s. What is the gam magnitude and phase angle of this Circuit at for the op amp with input offset voltage. Such a model is shown in Fig. 2.28. It consists of a
10 radls and at I radls? What is the frequency at which the gam magnitude is unity?
Ans. R= 10 ill, C=O.I ).IF; at OJ = 10rad/s: I; I; = 100 VN and = +90o; at W= I radls .
1"/ V, I = 1,000 VNand = +90; 1000 radls
02.20 DeSign a dlfferentiatorto have a time constant of I0 ' s and an Input capacitance of 0.0 I I1F What
y Actual op amp
ISthe gam magnitude and phase of this Circuit at 10 radls, and at 10' rad/s? In order to limit the
I
highfrequency gam of the differentiator circuit to IDO, a resistor IS added in senes with the ca
pacitor Find the required resistor value . 3
r"
Ans. C = 0.01 ).IF; R = I Mrl; at (J) = 10 radls: I = O. I VN and =  90'; at W= 1000 radls: '0  ,,,
+
_ Y
II> 1,1 = 10 VN and =90o; 10 ill 0,
\ (J.'\ Offsetfree op amp
Figure 2.28 Circu.' model for an op amp \\.,h
input otTset \'ohage I 'OY
2.6 DC Imperfections
'We should note that real op amps have non ideal effects addillonal to those discussed in this chapter
Thus far we have conSidered the 0 a t b 'd I These include finite (nonzero) commonmode gam or, equivalently, nonlnfimte CMRR, nonmfimte.
. 0f the effect of the opa P fi mp
CUSsion ' 0 .e I ea . The only exception has been a brief dis input resistance, and nonzero output resistance. The effect of these. however, on the performance 01
. .
nonmvertmg configurations Alth mp mite
h' gain A on the closedloop
. . gain of the inverting and 1110st of the closedloop circuits studied here is not very significant. and their study WI)) be postponed
. oug 10 many applicatIOns the assumption of an ideal op to latcr chapters (in particular Chapters 8, 9, and 12).
90 Chapter 2 Operational Amplifiers 2.6 DC Imperfections 91
. . h h
. I J' laced In senes Wit t e POSI
'!lve .Input lead of an offsetfree op amp. R,
dc source of \a ue os p I ~ 1I0ws from the descnptlOn above.
The Justification for this mode 0
\'0 '(I
\ os "r Rl)
R;
 +e + I"
_ _tlO=(+V)i    V
I 8
I 6
I To rest   
4
I
I
, of clfcuit  
+
8 7 6 4 3  2 I I
, 3 4 5 6 Vld (mV)
, Offsetnull ing  ...~
I 
> terminals
I 4
I 6 V
I
8 Figure 2.30 The output de offset voltage of an op amp can be trimmed (0 zero by connecllng a
 10 potenllometer to the two offsetnulling terminals , The \\ Iper of the potentiometer IS connected to the
negatl\e supply of the op amp.
I oltage resulting from the opamp In . put otTset voltage J'os \\ til be that shown 10 Fig, 2 3I(b),
Th us ,,,see s in effect a unitygain voltage follo\\er, and the dc output voltage J o wtll be
' , h h J' (I + R R) "
htch IS 'case
the h \\ It out the coupi 'capac Itor
equal "to , as rat er t an os ,'I ' II 109
. Typical values for generalpurpose op amps that use bipolar tranSIStors are 18 = 100 nA and
As far as Input signals are concerned, the coupling capacitor C forms together \I Ith R, an STC los = 10 nA
highpass Circuit with a comer frequency of (()o = I CRI' Thus the gam of_the capacltllely We now Wish to find the dc output voltage of the closedloop amplifier due to the
coupled amplifier will fall off at the lowfrequency end [from a magnitude 01 ( I + R" RI) at input bias currents, To do this we ground the signal source and obtain the circuit shown 10
11Igh frequencies) and will be 3 dB down at coo' Fig, 2.33 for both the inverting and noninverting configurattons. As shown in Fig. 2.33, the
output de vo ltage IS given by
(2.37) o
This obVIOusly places an upper limit on the value of R" Fortunately, however, a technique
eXists for reducing the value of the output dc voltage due to the input bias currents. The
2.22 ConSider an mvenmg amplifier \\ Ith a nom mal gam of 1000 constructed from an op amp \\ Ith an method consists of introducing a resistance R, in series with the noninverting input lead, as
mput offset loltage of3 mV and Ilith output saturatIOn levels ofIO V. (a) What IS (approximately)
the peak slOewave mput Signal that can be applied Without output clippmgO (b) If the effect of' 0'
is nulled at room temperature (25'C), ho\\ large an mput can one nOli apply If: (I) the Circuit is to
operate at a constant temperature o (il) the CirCUit IS to operate at a temperature In the range O"C to
75 'C and the temperature coefficient of , os IS Ia ~ v' Co
Ans. (a) 7 mY. (b) 10 mY, 9 5 mV
2,23 Consider the same amplifier as 10 Exercise 2,22 that IS. an mvening amplifier With a nom mal gam
of 1000 constructed from an op amp With an input offset voltage of3 mV and \luh output saturation I
levels of + Ia v except here let the amplifier be capacitively coupled as 111 Fig. 2.31 (a) , (a) What
is the dc offset voltage at the output. and what (approXimately) is the peak slOewave signal that can
be applied at the input wilhoUl output clippmgO Is there a need for offset tnmming" (b) If R, = I kQ
and R = I MQ. find the value of the coupling capaCilor C, that 1\111 ensure that the gam \\ ill be greater 
than 57 dB down to 100 Hz,
Ans. (a) 3 mY. 10 mY, no need for offset trimmmg: (b) 1.6 ~F
'This IS the case for op amps constructed uSIOg bipolar Juncllon transistors (BJTs). Those using
MOSFETs 10 the first (input) stage do not draw an appreCiable input bias current: nevenheless, the IOpUt
tennmals should have continuous dc paths to ground, More on thiS in later chapters.
94 Chapter 2 Operational Amplifiers 2.6 DC Imperfections 95
(2.40) o
which is usually about an order of magnitude smaller than the value obtained without R,
(Eq . 2.37). We conclude that to minimize the effect of the input bias currents, one should
place in the positive lead a resistance equal to the equil'Glal1t dc resistance seen by the
inverting terminal. We emphasize the word dc in the last statement; note that if the ampli
fier is accoupled, we should select R, = R" as shown in Fig. 2.35.
While we are on the subject ofaccoupled amplifiers, we should note that one must
always provide a continuous dc path between each of the input terminals of the op amp
and ground. This is the case no matter how small I. is. For this reason the accoupled
nonlnvertmg amplifier of Fig. 2.36 will 110t work without the resistance R, to ground.
Figure 2.33 Analysis of the closedloop amplifier, takmg into account the mput hlas currt!nts.
Unfortunately, including R, lowers considerably the input resistance of the closedloop
ampll fier.
.11M
< R,
" Ie I I
R
R
182 R _\
R
~ 
..J. R, = R,
R,
 t IBI 
1._  .l.
,
Figure 2.35 In an accoupled amplifier the de resistance seen by the Inverting terminal IS R:. hence
.A
+
./
\ ( RI is chosen equal to R~.
RJ \ .l.

 t I B'J
t I.,R,) ./ R,
C,
Figure 2.34 Reducing the effect of the input bias currents by mtroducing a reSi stor R: R,
shown In Fig. 2.34. From a signal point of"ew, R has a negligible effect (ideally no effect).
The appropriate value for R, can be determined by analyzing the circuit 10 Fig. 2 34, \\ here
+
analysIs details are shown, and the output voltage is given by
c,
o ..1 0
4(s) = :~
I + s. w,
(242)
2.26 An mtemally compensated op amp IS speCified to have an openloop dc gam of 106 dB and a UnIty
which for physical frequencies, S = Jill, becomes gam bandwidth of3 MHz. Findf. and the openloop gam (in dB) atf., 300 Hz, 3 kHz, 12 kHz. and
60 kH z.
o A(jlll) = Ao
I +jwlWb
(2.13)
Ans. 15 Hz; 103 dB; SO dB; 60 dB; 48 dB; 34 dB
where Ao denotes the dc gain and Ill, IS the 3dB frequency (corner frequency or "brea k" fre
quency). For the example shown m Fig. 2.39,../" = IO' and Ill, = 2;r x 10 rad/s. For Irequencies 2.7.2 Frequency Response of ClosedLoop Amplifiers
1lI ~ Ill, (about 10 times and higher) Eq . (2.43) may be approximated by
We next consider the effect of limited opamp gam and bandwidth on the closedloop transfer
..l ow,
A(jW) "" (2.14) functions of the two baSIC configurattons: the invertmg circuit of Fig. 2.5 and the non inverting
jW
Thus, cirCUit of Fig. 2.12. The closedloop gain of the mverting amplifier, assuming a finite opamp
openloop gam 4. was denved in Section 2.2 and given in Eq. (2.5). which we repeat here as
IA(jW)1 =4u W, I'  R, R,
from which It can be seen that the ga A h
W
(2.45)
1 R,, '::R:,)':A
"1+:(:I+C=
(2.50) o
o d
angl~~
in I reac es Untty (0 dB) at a frequency denoted by 0),
'Sincef, is the product of the de gam 04 0 and the Jd8 bandwidth!" (where;; = m,, 121l). It IS also known
(2.46) as the gain bandwidth product (GB). The reader is cautioned. however, that 111 some amplifiers. the
unnygain frequency and the gambandwidth product are 1101 equa\.
2.7 Effect of Finite OpenLoop Gain and Bandwidth on Circuit Performance 101
100 Chap t er 2 Ope rational Amplifiers
. . s that for a lowpass STC network (see Table 1.2, page 34). Thus
c
which IS of the same .orm a d f t de eq al to
. I'fi has an STC lowpass response with a c gam a magOi u u 20
the mvertmg amp I ler II ff at a uniform  20dB 'decade slope with a comer fre
R,i R, The closedloop gam ro sO
I
q~ency (3dB frequency) given by I
10 I
W,
(2.53) I 20 dB 'decade
o ~dB = :;;~;;
I+R" R, I
I
I
Similarly, analysIs of the noninvertmg amplifier of Fig. 2.12, assuming a finite openloop
10 1 10 ' I 10 100 1000 10'
gam A, yields the closedloop transfer function l(kHz)
Vo  I +R, I R , 1 4
o 1';  1+(1 +R, I R,) I A
(_.5 )
Figure 2.40 Frequency response of an amplifier "ilh a nominal gam of +1 0 VN.
Subslitutmg for A from Eq . (2.42) and makmg the approximation 04 0 ,> I + R,I R I results 10
I',,(s ) _ _ _I _+_R.:..,I_R,,__
o I', (s ) s
(2.55) ~I (dB)
I + w" ( I + R, R I )
Thus the non inverting amplifier has an STC lowpass response with a dc gam of ( I + R, R ,)
and a 3dB frequency given also by Eq . (2.53). 20 _ _ _ _ _ _ _ _ _ _...;;;.;::_>..t 3 dB
Example 2.6
10 20 dB / decade
Consider an op amp with /, = I MHz. Find the 3dB frequency of closedloop amp li fiers with nomi
nal gams of + I000, + I00, + I0, + I, I,  10, 100, and  1000. Sketch the magnitude frequency
response for the amplifiers with closed loop gains of + 10 and  10. 90.9 909 l(kHz)
Solut ion
Figure 2 .41 Fr~quem;y response of an amplifier with a nominal gain of 10 Viy'
We use Eq . (2.53) to obtam the results given 10 the following table.
Consider the noninverting amplifier circuit shown in Fig. 2.42. As shown, the circuit is designed for
nIoo ain of 10' YN and an ac openloop gam of 40. a noml~al gam (1 + R2/ R I) = 10. YN. It is fed with a lowfrequency sinewave signal of peak voltage
2.27 An inlemally compensated op amPfihas a de op~ OItyP ~gam frequency, its gam bandwidth product,
dB at 10. kHz. Estimate Its 3dB requency, I s u Vp and IS connected to a load resIstor R,. The op amp is specified to have output saturation voltages
and its expected gain at I kHz. of 13 Y and output current limits of 2o. mA.
Ans, I Hz; I MHz; 1 MHz; 60. dB .
(a) For Vp = I Y and R, = 1 ill, specify the signal resulting at the output of the amplifier.
2.28 An op amp having a ID6dB gain at de and a singlepole frequency response withf, = 2 MHz '~
used to design a nonmvertmg amplifier WIth nom mal de gam of 100.. Fmd the 3dB frequency 0 (b) For T~ = 1.5 Y and R, = I ill, specify the signal resulting at the output of the amplifier.
(c) For R, = I k!1, what is the maximum value of V for which an un distorted sinewave output is
the closedloop gain. obtained? p
Ans, 20. kHz
(d) For T~ = I V, what is the lowest value of R, for which an undistorted smewave output is
 _., obtained?
~  ..  ~
"
R, = 9 kfi
,, ,
 ~~  15 V
 13 V
2.8 LargeSignal Operation of Op Amps Ikfi
In this section, we study the limitations on the performance of opamp circuits when large R, a
output signals are present.  '0
t
vp  
II
13 V
2.8.1 Output Voltage Saturation
t
15 V
\
 ~ 
, ,
Similar to all other amplifiers, op amps operate linearly over a lImited range of output volt  
ages. SpecIfically, the opamp output saturates in the manner shown in Fig. 1.14 with Land (a) (b)
L within 1 Y or so of the pOSItive and negatIve power supplies, respectively. Thus, an op
amp that IS operatmg from + 15 V supplies will saturate when the output voltage reaches Figure ,42 (a) A non inverting amplifier with a nominal gain of 10 VN designed using an op amp that saturates at
about + 13 V in the positive direction and 13 Y in the negative direction. For this particular 13V oulpUI vohage and has lDrnA outpul currentlirnlts. (b) When the input sine wave has a peak of 1.5 V. the
output IS clipped off at t3 V.
op amp the rated output voltage IS said to be 13 Y. To aVOId clIpping off the peaks of the
output waveform, and the resulting waveform distortion, the input signal must be kept corre
spondingly small. Solution
(a) For ~~ = I V and R, = I k!1, the output will be a sine wave with peak value of 10. Y. This is
lower than output saturation levels of13 Y, and thus the amplifier is not limited that way. Also,
2.8.2 Output Current Limits
when the output is at its peak (10. V), the current in the load will be 10. Y I kn = 10. mA, and
Another lImItation on the operation of op amps is that their output current IS Im1lted to a the current m the feedback network will be 10. Y (9 + I) kfl = 1 mA. for a total opamp OUtpllt
specIfied maximum. For mstance, the popular 741 op amp is specIfied to have a maximum current of II mA, well under its limit of2o. mA.
output
.
current of 2o. mA .
Th s . d . . I d I . . .
U. In eSlgnIng c ose  oop cIrcuIts utllIzmg the 741, the (b) Now if r~ is increased to 1.5 V, Ideally the output would be a sine wave of 15 V peak. The op
deSIgner hasto ensure that under no condition will the op amp be required to supply an out amp, however, will saturate at 13 Y, thus clIpping the sinewave output at these levels. Let's
put current, In eIther dIrectIon, exceeding 20. mA. This, of course has to include both the next check on the opamp output current: At 13Y output and R, = I k!1, " = 13 mA and iF =
current In the feedback cirCUIt as well as the current supplied to a I~ad reSIStor. If the cIrcuit 1.3 mA; thus io = 14.3 mA, again under the 2o.mA Imllt. Thus the output will be a sine wave
reqUIres a larger current the with its peaks clIpped offat +13 Y, as shown in Fig. 2A2(b).
t th ,opamp output voltage wIiI saturate at the level corresponding
o e maxImum allowed output current.
104 Chapter 2 Operational Amplifiers 2.8 LargeSignal Operation of Op Amps 105
v,
Example 2.7 continued .
( I F R = I kfl the maximum ralue of /. for undlstorted sinewave output IS 1.3 V. The output
c \\~~I b~ a 13\ 'peak sine wave. and the ~amp output current at the peaks will be 14.3 rnA. v
(d) For J" = I V and R, reduced, the lowest value possible for RL while the output IS remaining an
und,slorted sine wave of 10V peak can be found from o t
10 V 10 V
(b)
iOma = 20 mA = R + 9 kfl + I kfl
Lmm
 Vo
which results in
+
> +
,+,, , Slope = SR v

 ""
2.8.3 Slew Rate   o t
Another phenomenon that can cause nonlinear distortion when large output signals are (a) (c)
present IS slewrate Itmitmg. The name refers to the fact that there IS a speci fic mattlnllln
rale of change possible at the output of a real op amp. This maximum is known as the slew
rate (SR) of the op amp and is defined as
o SR = duo
df rna,
(2.56 )
Slope = w,v <: SR
and is usually specified on the opamp data sheet in units ofV/~s. It follows that If the mput
{V
signal applted to an opamp CIrcuit is such that it demands an output response that is faster v
than the specified value of SR, the op amp will not comply. Rather. its output will change at
the maximum possible rate. which is equal to its SR. As an example, consider an op amp o t
connected m the umtygam voltagefollower configuration shown in Fig. 2.43(a), and let the (d)
mput slgnalbe the step roltage shown in Fig. 2.43(b). The output of the op amp will not be Figure 2 .43 (a) Unllygam follower. (bl Inpul slep wa\efonn. (el Linearly rising oulPUI waveform
able to nse mstantaneously to the ideal value 1'; rather, the output will be the Imear ramp of obtamed when the amplifier IS slewrate limited. (d) Exponentially rising output waveform obtained when
slope equal to SR, shown 10 Fig. 2.43(c). The amplifier is then said to be slewing and its , is sufficiently small so that the initial slope (w,I') is smaller than or equal to SR.
output IS slewrate limited. '
In order to understand the ongin of the slewrate phenomenon, we need to know about which IS a lowpass STC response with a time constant I (tJ,. Its step response would there
the mtemal CIrCUIt of the op amp, and we will study it in Chapter 12. For the time being fore be (see Appendix E)
hhowever, It IS sufficient to know about the phenomenon and to note that it is distinct fro~
Va( I) = 1' ( I  e Wi ) (2.58)
t e fimte opamp bandwidth that limits the frequency response of the closedloop amplifi
~rs, studied 10 the prevIOUS section. The limited bandwidth is a linear phenomenon and The initial slope of this exponentially nsing function is (tJ,V). Thus, as long as V is suffi
oes not result 10 a change 10 the shape o f ' . .
linear dl'stort' Th I . . . an mput smusold; that is, it does not lead to non Ciently small so that w,1'~ SR, the output will be as in Fig. 2,43(d).
IOn. e sewrate ItmuatlOn 0 th h h .
to an mput sinusoidal signal when. fi' n e ot er and, can cause nonlmear distortion
sponding ideal out ut would . Us requency and amplttude are such that the corre
gm of another rela:ed opam requtr~ v" to change at a rate greater than SR. ThiS IS the on
Before leavmg the exa~p~~eci ~catl~~;ts fullpower bandwidth, to be explamed later
mput voltage J' is sufficiently sma;~ t~g . ,however, we should point out that if the step
Fig. 2.43(d). Such an output wo Id 'b e output can be the exponentially rising ramp shown 10 2.29 An op amp that has a slew rate of I Vi~S and a unitygam bandw Idth]; of I MHz connected 10 the
IS
d . u e expected from the folio, f hi' '. . un nygam follower configuration. Find the largest possIble mput \oltage step tor which the output
ynamlc performance were the finite 0 am ban' ver I t eon y limitation on ItS
the follower can be found by substitutl~ R p= = dWldth:..Specifically, the transfer function of
waveform will still be given by the e'ponenttal ramp of Eq. (2.58). For this mput voltage. what IS
g I and R,  0 m Eq. (2.55) to obtam the 10% to 90% nse time of the output wa,cform? If an mput step 10 times as largc IS applied. lind
I' the 1010 to 90% rise time of the output waveform.
....!! = ;~I Ans. 0.16 V; 0.35 ~s; 1.28 ~ s
I~ I +s/(tJ, (2 .57)
~ .. 
106 Chapter 2 Operational Amplifiers 2.8 LargeSignal Operation of Op Amps 107
!I/ = r; sin WI 2.30 An or amp has a rated output voltage ofIO V and a slew rate of I V/~s. What IS its full power
bandWIdth" Ifan mput smusoid With frcquencYI= 5(" IS applied to a unItygalO fOllower con
structed usmg tillS op amp. what IS the ma,imum pOSSIble amplitude that can be accommodated
The rate of change of this waveform is gIven by at the output without IOcuITIng SR dIstortIOn?
=

wI', cos WI
Ans. 15 .9 kHz; 2 V (peak)
  Y _ _ ._ _ _ _ . _ _ . .~;=
The ma.\im um rate at which the or amp output voltage 2 .5 Refe r 10 Exercise ~.3. This problem ex plores an alter ConSider an op amp whose mtemal structure is of Ihe type
Conn~clmg a larg~ r~sislance In parallel with the capaci can change IS called the slc\\ ral t" The slc\\ rate. SR, IS nati ve mtemal struclure fo r the op amp. In part icular. we shown In Fig. E2.3 except for a mISmatch i'J.G. between the
tor of an opamp im ertmg integrator prnents opamp  .
usua ll y speci fied in \'JIOob. Opamp slewlO~ can resu lt In wish 10 model the mtemal structure of a part icular op amp transconductances of the two channels: thai IS.
saturation (due" to the dTerl of I 0\ and I,). nonlinear distortion of outp ut signal \\ 3\etorms. uSing 1\\'0 transconductance amp li fiers and one transresistance
For mosl Inlemaliy compensaled op amps. Ihe openloop amp itfier. Suggest an approp ri ate topology. For equal Gml :::; Gm~AGm
Thefullpow er bandwldlh./" IS Ihe ma\imum Ireq uency
gain lalis otT wllh frequency al a rate of ~O dB "decade. transconductanccs G", and a trans resistance R"" find an
al wh ich an outpul sin uso id \\ ith an ampltlude equal 10 express ion for the openloop gam A. For G. = 10 m A / V and Gm"!. ::; Gm+~AGm
reaching Unity al a frequency /. (Ihe unllygam band
Ihe opamp rated output voltage ( J ",.) can be produced R = 2 10' 11. what value of A results?
wIdlh). Frequency.!, IS also known as Ihe gam bandw Idlll Find expressions for Ad' A, and CMRR. IfA J is SO dB and
\\ Ithout distort ion f~f:;;: SR 2/l"1;.ma\
product of the op amp:.t; = Ao .l~, where .40 is the de gam. the two transconductances are matched to within 0. 1% of
2.6 The two wires leadm g fro m the output termmals of a
and (, is Ihe 3dB frequency oflhe openloop gam. AI any each other. calculate A ,'. and CM RR.
transducer pick up an interference signa l that is a 60 Hz, I
frC(i~encYfU f). Ihe opamp gain 104 1 ~ J,:l
V smusold. The outpul signal of the transducer is sinUSOI
For both the Inverting and the nonimerting closedloop dal of I Om V ampittude and 1000 Hz frequency. Give Section 2.2: The Inverting
configurallOns. the 3dB frequency IS equal 10 expressions fo r v ,~. fl,l' and the total signal between each Configuration

j,,. (I + R R I. wire and Ihe system ground.
2 .8 Assuming Ideal op amps. find the voltage gain
2.7 Non ideal (I.e . rea l) operational ampitfiers respond 110.1 IIi and input resistance Rm of each of the circu its in
10 both the diffe rent ia l and commonmode componen ls of Fig. P2.S.
Iheir mput Signa ls (refer to Fig. 2.4 for signal represenla
2 .9 A part icul ar invert ing circu it uses an ideal op amp
lion). Th us the output vol tage of the op amp can be
and two 10kl1 resistors. What closedloop gain wou ld
expressed as
you ex pect' If a dc voltage of + 1.00 V IS applied at the
Input, what outp ut res ult? If the I Okl1 res istors are said to
be " I % res istors," hav ing values somewhere in the ra nge
Computer Simulation Problems where IJ IS the d, fferenlla l ga in (referred to si mpl y as .~ ( I 0.0 I ) times the nominal value. what range of outputs
in Ihe text) and A . is the commonmode ga in (assumed to wo uld you expect to actually measure fo r an input of pre
, Problems idenll fied by IhlS icon are Inlended to dem
onstrale Ihe lalue of uSing SPICE simulalion 10 venfy hand I Mfl  be zero in the text). The op amp's effecti ve ness In reject
109 commonmode signals IS measured by its CMRR.
CISe ly 1.00 V?
analysis and design, and to inwstigate important issues such ,  + 2.1 0 You are proVided with an Ideal op amp and three 10
+ defi ned as
as allowable signal swing and amplifier nonlinear distortion. kl1 resistors. Using series and parallel resistor combinations.
Instructions to assist in setting up PSpice and Multism simu ", Ik!1 CMRR = ~O log A J how many ditTerent Invertingamplifier circuit topologies are
lallons for all Ihe indica led problems can be found in the A crn pOSSible' What is the largest (noninfi nite) asailable voltage
corresponding files on Ihe disc. Note Ihal if a parllcular
parameter value is not specified in the problem statement.   
you are to make a reasonable assumption. difficult prob 100 k!1 100 kfl
lem; mOTe difficuil; .... very challenging and/or lime Figure P2.2
consuming: 0: design problem. 10 kl1 10 kfl
2.4 A set of expenments is run on an op amp that Ideal IS
," v,
,
Section 2.1 : The Ideal Op Amp excepl for ha\lng a finite gam 1 The results are tabu laled
+ +
helo\\" Are the results consIstent? If not, arc they reason
2.1 What is the minImum number of pinS required for a so
able. in view of the posslb,ltty of experimental error" Whal   10 kl1
calle~, d~alopamp IC package. one contammg two op
amps . Whal IS Ihe number of pms reqUired for a socalled do they show Ihe gain 10 be' Using ,h,s value. predict I alues
quadopamp package. one contaming four opamps? 01 Ihe measurements Ihat were aCCIdentally <lInllted (the hlank
entries). I a) (b)

2.2 The circuil of Fig. P~.~ uses an op amp Ihal IS ideal
except for ha\'Jng a finite gain A . Measurements indicate Experiment # v, v, va 100 kl1 100 kl1
Fu ::; 4.0 V when 1'1::; 2.0 V What IS the opamp gain A?
I
2.3 Measurement of a circuit Incorporating what IS thought , 0.00 O.rXI O.rX) 10 kO
10 be an Ideal op amp shows Ihe ,oltage al Ihe opamp OUIPUI 1 1.00 UX)
UX)
000
I .IX)
v, v,
10 kl1
Figure P2.8
Problems 111
110 Chapter 2 Operational Amplifiers
2 .17 An inverting opamp circuit IS fabricated \\ IIh the Derive expressions for the transresistance Rm == 110 , i, and (b) If in a closedloop ampltfier with a nominal gam (i.e.
gam? What IS the smallest (nonzero) a\ai~able gain? What resistors R, and R1 having x% tolerance (i.e .. the value of the input resistance Ri == Vi ' i, for the follOWing cases: R ~ R I) of 100. A decreases by 50%. what is the minimum
are the Iflput resIstances In these t\\ 0 cases each resistance can de\'iate from the nommal value by as nommal A required to limit the percentage change in IGI to
much as x%). What is the tolerance on the realized closed (a) A IS infintte
"llll 2.11 For ideal op amps operating Wtth the followmg 0.5%':'
loop gam" Assume the op amp to be ideal. If the nom lOa I (b) A is finite
feedback networks In the im1erting configuration. what c1osed
closedloop gam is 100 VN and x = I. \\ hat IS the range of 2.28 Consider the Circuit 10 Fig. 2.8 with R, = R, = R, =
loop gam results? 2.23 Show that for the inverting ampltfier if the opamp
.
gain values expected from such a mCUlt
. 'J I MO. and assume the op amp to be ideal. Find values for R,
gain IS ,I. the input reSIstance IS gIven by
(al R I = JO U1. R, = JO kn to obtatn the following gains: 'I
(b) R, = 10 kn. R, = 100 kn 2.18 An Ideal op amp with 5kn and 15kn reSIstors is R, ;Z
used to create a +5V supply from a  15V reference. R '" = R I + ,': (a) 200 VN
(cl R, = 10 kn. R, = I kn A+ I (b) 20 VN
(d) R, = 100kn.R,= 10 Mn Sketch the circuit. What are the voltages at the ends of the 5
kn reSIstor? If these resistors are socalled I% resistors. 2.24 For an inverting ampltfier with nominal closedloop (c) 2 VN
(el R, = 100 kn. R, = I Mn
whose actual values are the range bounded by the nom mal gam R" R I' find the minimum value that the opamp open
o 2.12 Given an tdeal op amp. what are the values of the
value I%. what are the Itmits of the output voltage pro loop gain 1 must have (in terms of R,I R , ) so that the gatn
o 2.29 An inverting opamp circuit using an Ideal op amp
resIStors Rand K to be used to design amplifiers with the must be deSIgned to have a gain of 1000 VN using resis
duced? Ifthe15V supply can also vary by I%. what IS error is limited to O. I'Ia. I%. and 10%. In each case find the
closedloop gams listed below? In your designs. use at least tors no larger than 100 ill.
the range of the output voltages that might be found? value of a resistor R. such that when it is placed in shunt
one IOkn resistor and another equal or larger resistor
with R,o the gain is restored to its nominal value. (a) For the simple tworesistor Ctrcutt. what tnput resis
2.19 An mvertlng opamp cirCUIt for which the required gain
(al I VIV tance would result?
IS 50 VN uses an op amp whose openloop gain IS only 2.25 Figure P2.25 shows an op amp that is Ideal except for
(b)2V\' (b) If the circuit 10 Fig. 2.8 is used with three resistors of
300 VN If the larger resistor used is 100 kn. to what must the havmg a finite openloop gam and IS used to realize an tnvert
(c) 0.5 VI\ maximum value, what input resistance results? What IS
smaller be adjusted? With what resistor must a 2kn resistor 109 ampltfier whose gain has a nominal magnttude
(d) 100 VIV the value of the smallest resistor needed?
connected to the mput be shunted to achieve this goal? (Note G = R, R, To compensate for the gain reduction due to the
o 2.13 Design an mverting opamp circuit for which the that a resistor R_ is said to be shunted by resistor R, when R, is finttel. a resistor R. is shunted across R,. Show that perfect 2.30 The inverting circuit with the T network in the feed
gam IS 4 VN and the total resistance used IS 100 ill. placed in parallel WIth R. ) compensation is achieved when R. is selected according to back is redrawn in Fig. P2.30 in a way that emphasizes the
observation that R, and R, in effect are in parallel (because
o 2.14 Using the cirCUli of Fig. 2.5 and assummg an ideal o 2.20 (a) DeSIgn an Inverting ampltfier WIth a c1osed AG the ideal op amp forces a virtual ground at the inverting
op amp. design an inverting amplifier with a gain of 26 dB loop gam of I 00 VN and an tnput resistance of I kn. 1+ G input terminal). Use this observation to derive an expression
having the largest possible input resistance under the con (b) If the op amp is known to have an openloop gatn of for the gain ("01 "I) by first finding (v, I "I) and ("0' v,.).
straint of ha\lng to use resistors no larger than I Mn. What 2000 VV. what do you expect the closedloop gatn of R, For the latter use the voltagedIvider rule applted to R, and
is the input resistance of your design? your cirCUli to be (assummg the resistors have precISe  (R II R,).
values)?
2.15 An ideal op amp is connected as shown in Fig. 2.5
(c) Give the value of a resistor you can place 10 parallel \',
with R, = 10 ill and R = 100 ill A symmetrical square R,
wave signal With levels of 0 V and I V is applied at the
(shunt) wllh R, to restore the closedloop gain to ItS nom mal R, \ 
input. Sketch and clearly label the waveform of the resultmg value Use the closest standard I% resistor value (see +
Appendix H). R,
output voltage. What is its average value') What is its high
est value? What is its lowest value? 2.21 An op amp wllh an openloop gam of 2000 VIY IS  ,.
.

2.16 For the circuit m Fig. P2.16. assuming an ideal op used 10 the invertmg configuration. If in thiS application the )
Figure P2.25 "I
amp. find the currents through all branches and the voltages output voltage ranges from  I0 V to + I0 V. what IS the ov
R,
at all nodes. Smce the current supplied by the op amp IS maXimum voltage by which the "vIITual ground node"
departs from Its ideal value? 0 2.26 (a) Use Eq. (2.5) to obtam the amplttier openloop
greater than the current drawn from the input signal source.
gain .4 reqUIred to realize a speCIfied closedloop gain
where does the additional current come from?
2.22 The circuit 10 Fig. P2.22 is frequently used to provide
an output voltage l~ proportIonal to an mput SIgnal current '.
(Gnommal = R 1 R I) within a specified gain error Co
1

10 kn
=G Gnominal
Figure P2 .30
G nominal
I kfl
(b) DeSIgn an inverting amplifer for a nominal closedloop '2 .31 The circuit in Fig. P2.3 I can be considered to be an
gain of  I00. an Input resistance of 2 kn. and a gain eITor of extension of the Circuit 10 Fig. 2.8.
0.5 V  + $10%. SpeCify R,. R . and the minImum A required.
(a) Find the reSIstances looking into node I. R, . node 2.
(a) Use Eq. (2.5) to sho\\ that a reductIon IlA in the op
R.: node 3. R,. and node 4. R,.
  amp gain 1 gives flse to a reduction III GI In the magnItude of
the closedloop gain (; WIth IlIGI and M related by
(b) Find the CUITents f" f" f" and f,. 10 terms of the mput
Figure P2.16
 current I
(c) Find the voltages at nodes I. 2. 3. and 4. that is. J I' f,.
Figure P2.22
 I ,. and I, in terms of (fR).
Problems 11 3
112 Chapter 2 Operational Amplifiers
Ifom I ViV to 10 V' V using the 10kn potentiometer R,. available are ideal except IhattheIT output voltage sWlOg is
RJ2 RI2 \\'hal voltage gain results when the potentiometer IS set limited to 10 V.
R
~
... esactly at Its middle value'
' 2 .43 Figure P2.43 shows a circuit for a digltalIoanalog
'
III
C
I 1 R R
t
2.36 A weighted summer CIrcuit uSlOg an Ideal op amp has
Ihree IOpulS uSlOg 100kn resistors and a feedback resistor of
converter (DAC). The circuit accepls a 4bil inpul binary
word a Ja~" l aO' where " 0' " I' a ~ , and (.I . take the values of 0
"'I 50 kn A signal v, IS connected to two of the IOPUtS while a
'l:
   signal II, IS connected to the third. Express tllJ in terms of V I
or I, and it provides an analog output voltage lIo propor
tional to the value of the digital IOput Each of the bits of
U and 1',. If 1'1 :2 V and Vi ::! V. what is V(I" the IOpul word conlrols the correspondingly numbered
+ o 2.37 DeSign an op amp circuit to proVide an output switch . For Instance. if Q , is 0 then switch S, connects the
I'" = 12"1 + (v 2)] Choose relatively low values of 20kn resislor to ground, whlie If a IS I Ihen S connects
Id, .I the 20kn resistor 10 the +5 V power supply. Show that "0
 resistors but ones for which the input current (from each
IOpul signal source I does not esceed 0.1 rnA for IV IOPUI
IS given by
Figure P2 .31
signals.
2.32 The cirCUli m Fig. P2J2 ulilizes an ideal op amp. (cl If R, = I kn and the op amp operates 10 an Ideal man
0 2.38 Use Ihe scheme illustrated in Fig. 2. 10 10 deSign an
ner as long as I' ) IS in the range t:! V. what range of i, is
opamp clTeuit with inputs ti" p,. and I'J ' whose output is where R, is in kliohms. Find the value of R, so that I'o ranges
(al Find I " I,. I ,. I,. and I ',. possible" fTom 0 to  I 2 volts.
i', ;;; (:21 1, + 4t l, + Xt 11 ) using small resistors but no smaller
(b) If 1'0 IS not 10 be lower Ihan 13 V. find the maXimum (dl If the amplifier IS fed wllh a currenl source having a
Ihan 10 kn
allowed value for R currenl of 0.2 mA and a source reSIstance of 10 len, find"
(c) If R, is vaned m Ihe range 100 n 10 I ill. whal is the o 2.39 An Ideal op amp IS connecled 10 Ihe welghled
corresponding change in Il and in ~ 'o? summer conliguration of Fig. 2. I O. The feedback resislor +5 V
10 kn . ~ R,
R, = 10 kn, and sis 10kn resistors are connected 10 the
IOvertmg input term mal of Ihe op amp. Show. by sketching 10 kn
l ~ 10kQ t. I,
:: R the various Cifelill configurations, how th iS baSIC CirCuit
1 s,
can be used 10 Implement the follow 109 functions:
lOon I,
~  (a) =  (1'1 +.:!t'"> +3t'l )
110

I, (b) t'o = ( 1'1+I', +.:!I', +2v 4 )
I,
10 kn
 (c) 1'0 = (1'1 +51'" 20 Ul R,
(d) lit) =or'l
, + "
IV :;:
 In each case find the IOput resistance seen by each of Ihe
signal sources supplYing 1'[. 1'=_ t' ,. and tJ,_ Suggest at least 
Fi9ure P2.34
  two additional summing functions that you can realile with
thIS CIrCUIt. How \\ould you realize a summing coefficient + .
Figure P2.32
0 2.35 Design the circuit shown 10 Fig. P2 .35 to have an Ihalls OS' 40 HI 
2.33 Use Ihe cirCUli m Fig. P2J2 as an msplTalion to inpul resistance of 100 ill and a gam that can be varied o 2.40 Give a CIrCuit. complele With component values. for 
a weighted summcr that shi fis the de level of a sinewave sig
design a ClTcult that supplies a constant current I of 3. I rnA
to a variable resiSiance R,. Assume Ihe availability of a R, nal of 3 sine (ul) V Iiom zero to  3 V Assume Ihat in addilion 
1.5 V battery and design so thai the current drawn from the to the SIllCW3ve SIgnal you have a de reference voltage of
battery is O. I mA. For Ihe smallesl resistance 10 Ihe circuil , 1.5 V avaliable. Sketch the output Signal wa"elorm.
~!l
use 500 n . If Ihe op amp saturates al 12 V. whal is the  o 2.4 1 Use two Ideal op amps and reSlSlors 10 "nplemenl
80
20R 2 .55 Complete the follo\\ 109 table for feedback ampltfiers
(al+IV\ created us 109 one Ideal op amp, Note that R" slgmfies tnput
R\'I
(bl +~ \'IV resistance and RI and R~ are feedbacknetwork resistors as
(cl +11 V'V l~"", R
R,  labelled In the inverting and nonmvcning configurations.
...J R,..,''1 1'1
III
(dl+IOOV,V
R 110
o o 2.45 Design a mcuit based on the topology of the non rIA'~
+
cr: m\.erting amplifier to obtain a gain of +1.5 VI ~.' uSing only
In

I Okn resistors. Note that there are two possibilities. Which R,VII V()
Case Gain R, R,
of these can be easily converted to have a gain ~f either + 1.0 liNn
20R a 10 V/V 10l1l
ViV or +2.0 ViV simply by shortcircUltmg a slOgle resistor Rp ,
b I V/V 100 J..ll
in each case? lip I
c 2 V/v )(lO 10
o 2.46 Figure P~.46 shows a circuit for an analog voltme RP"l d +1 V/v
ter of \'ery high input resistance that uses an mexpensl\'e {'P2  e +~ V/V )(HO
f +11 V/ V IOOU2
mo\ingcoil meter. The voltmeter measures the voltage ,. Figure P2 .50 g 0.5 V/V IOkll
applied bet\\een the op amp's positiveinput terminal and RPn
lip"
ground. A. . summg that the moving COIl produces rullscale
deflection when the current passtng through It is 100 /lA. IOkfl pot
lind the \alue of R such that fullscale reading is obtatned
when " is + I0 \'. Does the meter resistance shown afTect the
o 2 .56 A noninverting opamp cirCUit with nominal gain
r R '\. + R,
  
(a) The Source IS connected directly to the load.
(b) A umtygam opamp buffer IS inserted between the
late the percentage by which ICI falls shon of the nominal
gatn magnttude IG"I
II, :; Figure P2 .49
1\ + source and the load.
R R,
Case Go (VIV) A (VIV)
, R, In each case find the load current and the current supplted
+ I+  2.50 For the circuit in Fig. P~ . 50. usc superpOSition to find
R_ by the source. Where does the load current come from in
L
1/0 III terms of the IIlput voltages 11, and I', Assume an Ideal a I 10
case (b),'
op amp, For b +1 10
"here R R R c I 100
/I ..nd 2.54 Derive an espresSion for the gain of the voltage fol
"I = 10sin(~1Z" 601)  0.lsm(21Z" 10001). \'olts d +10 10
R =R R R!l lower of Fig. 2. 14. assummg the op amp to be Ideal except
1', = IO stn(21Z" x 601)+0.lsm(21Z" 10001). volts e 10 100
for havmg a finite gatnl Calculate the value of the
(b) DC: SI ~'l I' 10 1000
J CI TCUIt tl bL n find II. closedloop gam for 1 = 1000. 100. and 10. In each case ,
, find the percentage error in gain magnitude from the nomi
g +1 
 0 2.51 The cirCUit shown Fig. P2.51 uttli/es a 10111
10 nal value of unity.
potentiometer to reall7c an adjustablegam amplifil!f Deflve
an expressIOn for the gain as a function of thl! potentiometer
116 Chapter 2 Operational Amplifiers Problems 117
(c) The CIfCUIl is modified by connecting a 10kO resistor 2,70 Figure P2.70 shows a modified version of the differ
2.59 Figure P2.SQ shows a circuit that provides an output R R
voltage v whose value can be varied by turning the wiper
"
of Ihe 100Ul potentiometer Find the range over wh'ICh
"I
between node A and ground, and another 10kO reSistor
between node B and ground. What will now be the values
ence amplifier. The modified circuit mcludes a reSistor R
.
which can be used to vary the gain. Show that the differen
.'
of AJ , A., and the input commonmode range? tial voltage gain is given by
VO can be varied. If the potentiometer is a "20tum" device,
r
find the change In Vo corresponding to each tum of the pot.
c + + 100 kfl Va 2R,[ R']
;;;:;=R,I+~
cr
c.. lIn
+15 Y (Hillt The virtual shoo circuit at the opamp mput causes
100 k!1
R R  v" ... 
A
the current through the R1 resistors to be ",/2R ")