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IPT015N10N5

MOSFET
OptiMOSTM5Power-Transistor,100V HSOF

Features
Tab
Idealforhighfrequencyswitchingandsync.rec.
ExcellentgatechargexRDS(on)product(FOM)
Verylowon-resistanceRDS(on)
N-channel,normallevel 12
34
100%avalanchetested 56
78
Pb-freeplating;RoHScompliant
QualifiedaccordingtoJEDEC1)fortargetapplications
Halogen-freeaccordingtoIEC61249-2-21

Table1KeyPerformanceParameters Drain
Tab
Parameter Value Unit
VDS 100 V Gate
Pin 1
RDS(on),max 1.5 m
Source
ID 300 A Pin 2-8

Qoss 213 nC
QG(0V..10V) 169 nC

Type/OrderingCode Package Marking RelatedLinks


IPT015N10N5 PG-HSOF-8 015N10N5 -

1)
J-STD20 and JESD22
Final Data Sheet 1 Rev.2.2,2016-10-13
OptiMOSTM5Power-Transistor,100V
IPT015N10N5

TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Final Data Sheet 2 Rev.2.2,2016-10-13


OptiMOSTM5Power-Transistor,100V
IPT015N10N5

1Maximumratings
atTA=25C,unlessotherwisespecified

Table2Maximumratings
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
- - 300 VGS=10V,TC=25C
Continuous drain current ID - - 243 A VGS=10V,TC=100C
- - 32 VGS=10V,TC=25C,RthJA=40K/W1)
Pulsed drain current2) ID,pulse - - 1200 A TC=25C
Avalanche energy, single pulse3) EAS - - 775 mJ ID=150A,RGS=25
Gate source voltage VGS -20 - 20 V -
Power dissipation Ptot - - 375 W TC=25C
IEC climatic category;
Operating and storage temperature Tj,Tstg -55 - 175 C
DIN IEC 68-1: 55/175/56

2Thermalcharacteristics

Table3Thermalcharacteristics
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Thermal resistance, junction - case RthJC - 0.2 0.4 K/W -
Device on PCB,
RthJA - - 62 K/W -
minimal footprint
Device on PCB,
RthJA - - 40 K/W -
6 cm cooling area1)

1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 m thick) copper area for drain
connection. PCB is vertical in still air.
2)
See Diagram 3 for more detailed information
3)
See Diagram 13 for more detailed information
Final Data Sheet 3 Rev.2.2,2016-10-13
OptiMOSTM5Power-Transistor,100V
IPT015N10N5

3Electricalcharacteristics

Table4Staticcharacteristics
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Drain-source breakdown voltage V(BR)DSS 100 - - V VGS=0V,ID=1mA
Gate threshold voltage VGS(th) 2.2 3.0 3.8 V VDS=VGS,ID=280A
- 0.1 5 VDS=100V,VGS=0V,Tj=25C
Zero gate voltage drain current IDSS A
- 10 100 VDS=100V,VGS=0V,Tj=125C
Gate-source leakage current IGSS - 10 100 nA VGS=20V,VDS=0V
- 1.3 1.5 VGS=10V,ID=150A
Drain-source on-state resistance RDS(on) m
- 1.6 2.0 VGS=6V,ID=75A
Gate resistance1) RG - 1.4 2.1 -
Transconductance gfs 140 280 - S |VDS|>2|ID|RDS(on)max,ID=100A

Table5Dynamiccharacteristics1)
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Input capacitance Ciss - 12000 16000 pF VGS=0V,VDS=50V,f=1MHz
Output capacitance Coss - 1800 2300 pF VGS=0V,VDS=50V,f=1MHz
Reverse transfer capacitance Crss - 80 140 pF VGS=0V,VDS=50V,f=1MHz
VDD=50V,VGS=10V,ID=100A,
Turn-on delay time td(on) - 36 - ns
RG,ext=1.8
VDD=50V,VGS=10V,ID=100A,
Rise time tr - 30 - ns
RG,ext=1.8
VDD=50V,VGS=10V,ID=100A,
Turn-off delay time td(off) - 85 - ns
RG,ext=1.8
VDD=50V,VGS=10V,ID=100A,
Fall time tf - 30 - ns
RG,ext=1.8

Table6Gatechargecharacteristics2)
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Gate to source charge Qgs - 53 - nC VDD=50V,ID=100A,VGS=0to10V
Gate charge at threshold Qg(th) - 36 - nC VDD=50V,ID=100A,VGS=0to10V
Gate to drain charge 1)
Qgd - 34 51 nC VDD=50V,ID=100A,VGS=0to10V
Switching charge Qsw - 51 - nC VDD=50V,ID=100A,VGS=0to10V
Gate charge total 1)
Qg - 169 211 nC VDD=50V,ID=100A,VGS=0to10V
Gate plateau voltage Vplateau - 4.4 - V VDD=50V,ID=100A,VGS=0to10V
Gate charge total, sync. FET Qg(sync) - 146 - nC VDS=0.1V,VGS=0to10V
Output charge 1)
Qoss - 213 284 nC VDD=50V,VGS=0V

1)
Defined by design. Not subject to production test.
2)
See Gate charge waveforms for parameter definition
Final Data Sheet 4 Rev.2.2,2016-10-13
OptiMOSTM5Power-Transistor,100V
IPT015N10N5

Table7Reversediode
Values
Parameter Symbol Unit Note/TestCondition
Min. Typ. Max.
Diode continuous forward current IS - - 300 A TC=25C
Diode pulse current IS,pulse - - 1200 A TC=25C
Diode forward voltage VSD - 0.9 1.2 V VGS=0V,IF=100A,Tj=25C
Reverse recovery time 1)
trr - 103 206 ns VR=50V,IF=100A,diF/dt=100A/s
Reverse recovery charge 1)
Qrr - 316 632 nC VR=50V,IF=100A,diF/dt=100A/s

1)
Defined by design. Not subject to production test.
Final Data Sheet 5 Rev.2.2,2016-10-13
OptiMOSTM5Power-Transistor,100V
IPT015N10N5

4Electricalcharacteristicsdiagrams

Diagram1:Powerdissipation Diagram2:Draincurrent
400 350

350
300

300
250

250
200
Ptot[W]

ID[A]
200

150
150

100
100

50
50

0 0
0 25 50 75 100 125 150 175 0 25 50 75 100 125 150 175 200
TC[C] TC[C]
Ptot=f(TC) ID=f(TC);VGS10V

Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance
4
10 100

1 s
103
0.5
10 s

10-1 0.2
102 100 s
ZthJC[K/W]

0.1
ID[A]

0.05
1 ms
1
10 0.02
-2
10 ms 10
DC 0.01

100
single pulse

10-1 10-3
10-1 100 101 102 103 10-6 10-5 10-4 10-3 10-2 10-1 100
VDS[V] tp[s]
ID=f(VDS);TC=25C;D=0;parameter:tp ZthJC=f(tp);parameter:D=tp/T

Final Data Sheet 6 Rev.2.2,2016-10-13


OptiMOSTM5Power-Transistor,100V
IPT015N10N5

Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance
800 3.0

10 V 7V 6V
700
2.5 5V

600 5.5 V

5.5 V 2.0 6V
500

RDS(on)[m]
ID[A]

400 1.5 7V

10 V
300
5V 1.0

200

0.5
100

0 0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 100 200 300 400 500 600 700 800
VDS[V] ID[A]
ID=f(VDS);Tj=25C;parameter:VGS RDS(on)=f(ID);Tj=25C;parameter:VGS

Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance
700 360

320
600

280
500
240

400 200
gfs[S]
ID[A]

300 160

120
200
80

100 175 C
40
25 C

0 0
0 1 2 3 4 5 6 7 0 40 80 120 160
VGS[V] ID[A]
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj gfs=f(ID);Tj=25C

Final Data Sheet 7 Rev.2.2,2016-10-13


OptiMOSTM5Power-Transistor,100V
IPT015N10N5

Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage
3.5 4

3.0
2800 A
3
2.5
280 A

max
2.0
RDS(on)[m]

VGS(th)[V]
2

1.5 typ

1.0
1

0.5

0.0 0
-60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180
Tj[C] Tj[C]
RDS(on)=f(Tj);ID=150A;VGS=10V VGS(th)=f(Tj);VGS=VDS

Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode
5
10 104
25 C
175 C
175C max
25C max

104 Ciss 103

Coss
C[pF]

IF[A]

103 102

102 Crss 101

101 100
0 20 40 60 80 100 0.0 0.5 1.0 1.5 2.0 2.5
VDS[V] VSD[V]
C=f(VDS);VGS=0V;f=1MHz IF=f(VSD);parameter:Tj

Final Data Sheet 8 Rev.2.2,2016-10-13


OptiMOSTM5Power-Transistor,100V
IPT015N10N5

Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge
3
10 10

9 50 V

25 C 7
102
20 V 80 V
6
100 C

VGS[V]
IAV[A]

4
1 125 C
10
3

100 0
100 101 102 103 0 50 100 150 200
tAV[s] Qgate[nC]
IAS=f(tAV);RGS=25;parameter:Tj(start) VGS=f(Qgate);ID=100Apulsed;parameter:VDD

Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms


110

108

106

104
VBR(DSS)[V]

102

100

98

96

94
-60 -20 20 60 100 140 180
Tj[C]
VBR(DSS)=f(Tj);ID=1mA

Final Data Sheet 9 Rev.2.2,2016-10-13


OptiMOSTM5Power-Transistor,100V
IPT015N10N5

5PackageOutlines

1) partially covered with Mold Flash


MILLIMETERS INCHES
DIM
MIN MAX MIN MAX
DOCUMENT NO.
A 2.20 2.40 0.087 0.094
Z8B00169619
b 0.70 0.90 0.028 0.035
b1 9.70 9.90 0.382 0.390
b2 0.42 0.50 0.017 0.020 SCALE 0
c 0.40 0.60 0.016 0.024
D 10.28 10.58 0.405 0.416
2
D2 3.30 0.130
E 9.70 10.10 0.382 0.398 0 2
E1 7.50 0.295
E4 8.50 0.335 4mm
E5 9.46 0.372
e 1.20 (BSC) 0.047 (BSC) EUROPEAN PROJECTION
H 11.48 11.88 0.452 0.468
H1 6.55 6.75 0.258 0.266
H2 7.15 0.281
H3 3.59 0.141
H4 3.26 0.128
N 8 8
K1 4.18 0.165 ISSUE DATE
L 1.60 2.10 0.063 0.083 20-02-2014
L1 0.70 0.028
L2 0.60 0.024
REVISION
L4 1.00 1.30 0.039 0.051
02

Figure1OutlinePG-HSOF-8

Final Data Sheet 10 Rev.2.2,2016-10-13


OptiMOSTM5Power-Transistor,100V
IPT015N10N5

RevisionHistory
IPT015N10N5

Revision:2016-10-13,Rev.2.2
Previous Revision
Revision Date Subjects (major changes since last revision)
2.0 2014-12-17 Release of final version
2.1 2015-02-23 Correction of SOA area with Ipulse = 1200A
2.2 2016-10-13 Update Avalanche Energy

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Final Data Sheet 11 Rev.2.2,2016-10-13