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PROCESSOR
SEPTEMBER, 2016.
Abstract
A final project for CSE 510 : Digital and Computer Systems at African
University of Science and Technology, Abuja is presented. The projects
purpose was to design and simulate the memory system of a MIPS processor
using the Verilog hardware description language. The objectives of the project
consisted of furthering our understanding the memory system of a MIPS
Processor and to further understand the MIPS instruction set. Discussions and
results of the projects are included in this report.
1.0 Introduction
The memory is the part of a computer in which data or program instructions can
be stored for retrieval. (I.e Holds both instructions and data of a computer
program).There are two basic operations of a memory which are; load and store.
The MIPS processor has two memory type; Instruction memory and Data
Memory. Data is loaded from the memory using load instructions and as well
stored using store instructions. Each off this has an address from which data is
fetched or stored (written) to. In this project, we focused on a unified memory
system for the MIPS-32 bit processor.
Read data
Write data
clk
1.1 Purpose of the Memory System
This design was built with the MIPS instruction set in mind. Using
The planning of the project was broken down into steps. Each step was
completed before going on to the next step. The testing steps are described in
testing methodology below. The steps were done in this order:
1. Create modules that are the components of a unified memory
2. Test individual modules for functionality
3. Piece all of the individual modules together
4. Write a test bench program for functional test.
5. Generate waveform to view the simulation.
Tools used
The work was done using:
(i) Quartus II 64-bit software which was used as editor in writing the
programme for the full adder. It was also used for simulating
waveform.
(ii) Iverilog
(iii) Notepad ++: for writing a file for the test bench