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--------------------------------------------------------------------------------

--
-- Company:
-- Engineer:
--
-- Create Date: 08:38:30 05/05/2017
-- Design Name:
-- Module Name: ther - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
--------------------------------------------------------------------------------
--
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity thermostat is port


(heater_on: out std_logic;
ac_on: out std_logic;
temp: in std_logic_vector(7 downto 0);
desired: in std_logic_vector(7 downto 0);
reset_n: in std_logic);
end entity thermostat;

architecture arh of thermostat is


constant TOO_LOW: unsigned := "0011";
constant TOO_HIGH: unsigned := "0100";
begin
process(reset_n,temp,desired) is
variable heater_onv: std_logic;
variable ac_onv: std_logic;
variable tempv: unsigned(7 downto 0);
variable desiredv: unsigned(7 downto 0);
begin
tempv := unsigned(temp);
desiredv := unsigned(desired);
if(reset_n= '0') then
heater_onv := '0';
ac_onv := '0';
elsif (tempv < desiredv - TOO_LOW) then
heater_onv := '1';
ac_onv := '0';
elsif (( heater_onv ='1') and (tempv > desiredv)) then
heater_onv := '0';
elsif (tempv > desiredv + TOO_HIGH) then
ac_onv := '1';
heater_onv := '0';
elsif ((ac_onv = '1') and (tempv < desiredv)) then
ac_onv := '0';
end if;
heater_on <= heater_onv;
ac_on <= ac_onv;
end process;
end arh;

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