15th International Power Electronics and Motion Control Conference, EPE-PEMC 2012 ECCE Europe, Novi Sad, Serbia

Study Model of Flying Capacitors Multilevel

Inverter
P. Kobrle, J. Pavelka
Czech Technical University in Prague, Faculty of Electrical Engineering, Prague, Czech Republic,
kobrlpav{pavelka}@fel.cvut.cz

Abstract this paper describes the model of the five level
flying capacitors inverter (FCI) that was designed and
realized at CTU in Prague, FEE Department of Electric
Drives and Traction. Some aspects of FCI control algorithm
which influenced the design are mentioned. The first
experimental results are also presented. Further the
possibility of medium voltage multilevel inverter use as
active filter is discussed. The requirements on inverters are
given.
Keywords Multilevel Converter, Converter Design,
Active Filter
three-phase five-level flying capacitors converter which
is controlled by the dSpace board. The high number of
voltage levels demands many components, especially
transistors, capacitors and measurement components. The
five-level prototype seems to be a good compromise. The
prototype of power about 4 kW has been constructed with
regard to change it to a lower-level converter it is a
modular design. The general electrical scheme of the
three-phase five-level inverter is depicted in Fig. 1.

I. INTRODUCTION
Power electronic converters on the base of
semiconductor devices are applied today in many
different branches of industry and other technical
applications. Their power changes from mW to hundreds
of MW. It is known from theory that the electronic
converter output power is proportional to the product of
its nominal electric output voltage and its nominal
electric output current. This implies that the same electric
output power can be obtained by a low nominal voltage
and a high nominal current or by a high nominal voltage Fig. 1 Scheme of the three-phase five-level flying capacitor inverter
and a low nominal current. The search of concrete
nominal values is called the design optimalization and
represents one of the basic tasks of each converter A. Power part
designer. The main power part of the converter is formed from
12 driver boards. One board contains two power
Four basic application fields exist in practical usage of transistors, their drivers and the galvanic separation
high power electronic converters: through the optocouplers. For our model an IGBT for
1) Converters for supply of AC electric motors 20 A and 600 V in TO-247 package has been chosen.
2) Converters for electrolytic processes This type has already integrated a hyperfast anti-parallel
3) Converters for an electric energy transmission diode and its collector is connected to the bottom side of
(HVDC transmission lines) the package. Therefore the IGBT and its heat sink must
be insulated by a mica tape. The selected driver has
4) Converters as parts of an AC electric integrated a saturation voltage measuring of the IGBT, so
transmission system (FACTS) or an electric the fault signal is sent out directly from the driver to the
distribution system (FACDS) control board and the IGBTs dont need any other devices
Converters ad 1), ad 2) and ad 3) can be sources of a on the driver board. The whole power part of the
reactive power and sources of current harmonics. converter consists of 24 IGBTs, eight IGBTs in one phase
Converters ad 4) can be used as power electronic are cooled by the same heat sink.
compensators for the reactive power compensation and as Directly to the driver board are connected the flying
active filters for elimination of current harmonics in the capacitors. The flying capacitors are connected by very
supply network. short wires because of a maximal reducing of feeding
II. STUDY MODEL inductivity.
The flying capacitors multilevel converter seems to be
the most promising topology of multilevel converters.
The demand of a flying capacitors voltage balancing
without any additional power circuits leads to a
development of a sophisticated control system. Hence, it
has been developed and designed the model of a

978-1-4673-1972-0/12/$31.00 2012 IEEE DS1b.10-1

 C. Measurement boardds
Individual voltage levels are clamped by flying
capacitors. The voltage across each flying capacitor is
measured by a voltage LEM sensor. Its advantage is a
galvanic separation between thhe measured and measuring
side. To an adjustment of a measuring range, power
resistors are needed. The operrational amplifiers modify
the signals for a control part off the converter. The supply
symmetrical voltage (15 V) for all operational
amplifiers is obtained from tw wo DC/DC converters for a
printed circuit board (PCB). Our voltage measurement
boards (Fig. 4) are able to measure
m voltages from 0 to
500 V.

Fig. 2 Four driver boards with IGBTs, one heat sink and three flying
capacitors

B. Floating grounds
Each IGBT driver has to have a sepaarate ground for its
correct and save function. There are ata least two ways
how to achieve it. The first way is to supply
s each driver
from one isolation transformer with ana output rectifier.
The other way is to use one trannsformer with 24
secondary windings and output recctifiers. We have
constructed a high frequency (20 kH Hz) four-quadrant
inverter and its AC output is conneccted to a primary
winding of the high frequency trannsformer with 24
secondary windings (Fig. 3). The noominal secondary Fig. 4 Three voltage Fig. 5 Three current measurement
F
voltage is 18 V. The output DC voltagge of the rectifiers measurement boards with b
boards
on the driver boards is 15V. The coontrol signals for common DC/DC converter for
PCB and power resistors
drivers have to have also separated grounds.
g They are
separated from one common controol ground by the
optocouplers on driver boards. The information about the load current direction is
necessary to have for the voltage
v balancing control
strategy. Hence, the load curreent must be measured in all
three phases. As well as in the case of the voltage
measurement board, the currennt measurement board has
been designed with a currrent LEM sensor. The
symmetrical voltage (15 V) foor the supply of operational
amplifiers is also realized from
m one DC/DC converter for
a PCB. The load current measuurement boards (Fig. 5) are
able to measure currents from 0 to 15 A.
The outputs from both typees of measurement boards
are designed for coaxial connecctors.
D. Hardware protectioons boards
The hardware protections paart consists of three control
boards (Fig. 8) with the com mplex programmable logic
devices (CPLD). Each CPLD controls one phase of the
multilevel inverter. One CPLD D is superior (master) over
two remaining (slaves). Each CPLD
C receives signals from
the dSpace board and after the obligatory dead time sends
out the control signals througgh the optocouplers to the
drivers. Further, it receives the
t fault signals from the
drivers (in case of over-currentt) and in the case of a fault
either the master CPLD stoops working two inferior
CPLDs and sends out a report to the dSpace board or the
slave CPLD sends out a signal to the superior CPLD.
Fig. 3 Two part of four-quadrant inverter annd high frequency III. EXPERIMENTTAL RESULTS
transformer with 24 secondary wiindings
After the designing the studyy model of the three-phase
five-level FCMI was construucted and tested on low

DS1b.10-2
voltage provisionally. For illustration and comparison,
there are printed waveforms of outpput voltage from
simulation model in Fig. 6 and from reaal model in Fig. 7.
The real circuit was simulated in Matllab Simulink with
these parameters: DC-link voltage Vd = 54V, ohmic load
in each phase R = 33.3, reactive load in each phase
L = 1mH, modulation index m = 0.8, output frequency
f = 20Hz, switching frequency fsw = 6440Hz and capacity
of all flying capacitors C1A,B,C = C2A,B,CC = C3A,B,C = 1mF.
It is obvious that both waveforms are very similar
regarding the form, magnitude, frequenccy and the number
of switches. The most striking differencce is in the middle
level (zero level). This is caused by zeero cross detection
of load current. From above mentionned parameters is
evident that the character of a loadd is almost fully
resistive. Therefore, the correspondiing waveform of
current is not a sin wave and the zero cross detection is
not so absolutely accurate contrary to detection in
simulation.
Fig. 6 The simulated waveform of output voltaage with frequency of
20Hz; horizontal scale: 10ms/div (time), veertical scale: 10V/div
(voltage)
Fig. 7 The measured waveform of output voltaage with frequency of
20Hz; horizontal scale: 10ms/div (time), veertical scale: 10V/div
(voltage)
IV. CONTROL STRATEGY FOR FLYIN NG CAPACITOR
MULTILEVEL INVERTER R
The control algorithm of FCMI has to
t reckon with two
main demands. First, the desired voltage
v waveform
should appear at the output of an innverter under the
DS1b.10-3
condition to assure no transiition over more than one
neighbour voltage level and thhereby keep the essence of
the multilevel topology ideea. Second, the voltage
stabilization across the flyinng capacitors should be
assured.
The easiest way is to sepparate these two aspects.
Separate external sources holld the voltage across the
flying capacitors constant. Hoowever, the application of
this solution requires to extendd the inverter equipment of
3(n-2) independent voltage soources in case of the three-
phase n-level inverter and thus additional costs.
The common way is to use the convenient control
strategy which assures both asppects.
Fig. 8 Hardware prootections boards
A. Modulations
The first mentioned demand is the task of a modulator.
There are many ways how to realize
r it. Lets present two
groups of modulations from thee commonly used:
- sub-harmonic pulsee-width modulation (PWM)
- space vector modulaation (SVM)
In the group of sub-harmonic PWM, there are included
the phase shifted PWM (PS-PW WM), the phase disposition
PWM (PD-PWM) and the phase p opposite disposition
PWM (POD-PWM). Their shhapes and waveforms are
depicted in Fig. 9.
Fig. 9 Sub-harmonic modulations for five-level
fi FCMI, from above:
PS-PWM, POD-PWM, PD-PWM
 It is possible to get the pulses (commutations signals)
for the semiconductor devices (lets say IGBTs - see
Chapter VII) using each of all these three modulations. It
has emerged from our knowledge of the dSpace system
that the most suitable is the PS-PWM from a relative
minimum counter step and switching frequency point of
view.
When the expression
(1)
1 capacitors (0). Then they hold an actual voltage. All these
where Tmod is the period of one modulation cycle, Tstep
is the period of one counter step and n is the number of
inverter levels, does not fulfil the condition that it is a
whole number, the problems with quantization occur.
This problem is in the way of generation especially of the
output level voltages in case of PD-PWM and POD-
PWM. The PS-PWM does not reach the full value of
outer levels when the mentioned condition is not fulfilled;
however the modulation index 1 is not often required.
These restrictions can be removed i.e. by implementation
of the modulator not in dSpace but in FPGA.
Whereas sub-harmonic PWMs are convenient for both
one-phase and three-phase converters, the SVM can be
applied only for three-phase converters. The voltages in
all three phases create the voltage space vector. By means
of inverter switching states, we obtain 3 -1 active
space vectors and 1 zero one. The ends of the active
vectors are represented by the vertexes of small triangles
in Fig. 10. The zero one is situated in the middle of the
(n-1)--level hexagon. Any reference vector (V ) is made
by a switching sequence of two nearest higher active
vectors (V and V ) and one zero vector (V ). Each of
them is switched for specified time:
(2) the multiple commutation cause the jumps over more
where T , T and T are the periods of corresponding
vectors, T is a duration of one modulation period. All
these times together give one modulation period:
(3)
Fig. 10 Switching vectors of the five-level FCMI
DS1b.10-4
B. Transitions
Generally, there are 2n switching states, because
always one pair of corresponding devices switches
complementary together. Thus, for the five-level inverter,
there are sixteen switching states. As said before the
transition only to the neighbour voltage level is permitted.
Of course, the voltage can remain on the same level. The
load current flowing through the flying capacitors either
charges (+) them or discharges (-) them. There are also
switching states when no current flows through the flying
possibilities are depicted in Fig. 11.
Fig. 11 State diagrams of five-level FCMI for both directions of the
current
Thanks to the charging and discharging the voltages
across all flying capacitors can be balanced. [1] presents
one more important thing the transition should be
performed by one pair switching, one commutation
should appear. Transitions done by one commutation are
marked by arrows in the state diagram in Fig. 11. [2]
gives reasons why one commutation transition is
necessary in case of the four-level FCMI. It was found
out that the transitions between two neighbour levels by
than one level in the dead times. The same conclusion is
valid for the five-level inverter. But [2] does not deal with
the transitions in framework of the same level. The
alternation of switching states in the same level leads to
the appreciably better balancing across flying the
capacitors. The transitions in the same level are
performed also by multiple commutations; however, it
depends on their count. This chapter performs this
situation in a five-level inverter.
Lets set the inductance value big enough to maintain
the constant current at the moment of the switch. The
current raising and falling can be linear because its real
waveform does not influence the explanation what
happens by transitions. To the state 6 correspond drive
signals (vG) in series 1, 1, 0, 0, 1, 1, 0, 0 (see Fig. 12).
Lets change to the state 7 (0, 1, 1, 0, 1, 0, 0, 1) and let a
load current be positive.
We can see, that two switching pairs are turning, so
there are about two commutation transitions. The turning
begins with dead time at the moment t1. With turning-off
IGBT 1 the current commutates to antiparallel diode 8.
After the IGBT 6 turning-off the current flows
permanently through the diode 6 up to end of the dead
time when the current commutates to the IGBT 3. The
current flow at the dead time corresponds to the switching
state 3. Transition 6 3 7 is allowed according to the
state diagram in Fig. 11.

Fig. 12 Transition from the state 6 to the state 7. Solid line = drive
pulse, dash line = load current
Thus, there are three types of the transitions altogether.
The first one is the one commutation transition (in the
state diagram represented by arrows), the direct change
between two neighbour levels. The second one is the two
commutations transition, the change between states in
framework of one level, but not direct, nevertheless with
allowed jump. The third one is the more commutations
transition which is not allowed. The using of two
commutations transitions is disputable because of the
output voltage peaks appearance (see next chapter).
V. SIMULATION RESULTS
The idea about transition from previous chapter has
been verified with the aid of Matlab Simulink. The
simulated power circuit is formed by three-phase five-
level FCMI with simple RL load, the parameters are: DC-
link voltage Vd = 200V, ohmic load in each phase
R = 5, reactive load in each phase L = 32.3mH,
modulation index m = 0.8, output frequency f = 50Hz,
switching frequency fsw = 1kHz and capacity of all flying
capacitors C1A,B,C = C2A,B,C = C3A,B,C = 1mF.
Fig. 13 Simulations results of one commutation transitions; from above:
DS1b.10-5
output voltage (V), output current (A), voltages across flying capacitors
C1, C2 and C3 (V); time in seconds.
Fig. 14 Simulations results of two commutation transitions; from above:
output voltage (V), output current (A), voltages across flying capacitors
C1, C2 and C3 (V); time in seconds.
There are displayed obtained simulation results in Fig.
13 and Fig. 14. At first sight, the difference between the
waveforms of the voltages is evident. In case of two
commutations, the balance algorithm can switch even
when the modulator demands permanently the same
level. Therefore, it can be seen many more transitions in
Fig. 14 than in Fig. 13. Also the harmonic composition is
rapidly worse as well as the output current waveform.
On the other side, the rate of voltage stabilization
across flying capacitors is greatly better in case of two
level commutations. Voltages oscillate around the
nominal values of flying capacitors with a minimal
deviation. Therefore the voltage levels dont fluctuate so
much as in Fig. 13.
VI. ACTIVE FILTERS AND THEIR APPLICATIONS
A massive use of power electronics equipments has
resulted in increasing of a reactive load and in creation of
harmonic currents in a supply network. The use of
capacitors for the compensation of the reactive load and
resonant L-C circuits for elimination of harmonic currents
is good known and frequently used. But their
performance is limited less effective and less efficient.
Therefore a possibility to use power electronic
compensators and active filters were studied. Many
applications of power electronic compensators for LV
and MV supply systems (3x3 kV, 3x6 kV, 3x10 kV, and
3x22 kV) were realized and described. Also applications
of power electronic active filters for elimination of
current harmonics in LV supply systems were described
and realized. Power electronic equipment for
compensation and active filtering is also called as the net
conditioner in some papers [5].
The basic idea of such active filter for MV supply
system is clear from the Fig. 15.
The MV nonlinear three phase load is connected to a
three phase MV power network without interconnection
zero points of a load and a network. Load currents iUload,
iVload, iWload contain sinusoidal currents of fundamental
and high current harmonics. If network currents iUnet, iVnet,
iWnet should be only fundamental harmonics then currents
of active filter iUfilter, iVfilter, iWfilter must be equal to high
harmonics in load currents. Two methods for a
determination of high harmonics amplitudes and phases
are commonly used: method of Synchronous detection
and method of FFT (fast Fourier transformation). This
contribution analyzes a possibility to use multilevel
converters as MV active filters.
Fig. 15 Basic scheme of active filter connection
VII. SPECIFIC REQUIREMENTS FOR MEDIUM VOLTAGE
INVERTER AS AN ACTIVE FILTER
Under the medium voltage inverter we understand the
inverters for supplying of applications in area above the
power of megawatts. It could be generally said the
voltages and currents are above thousand volts and
hundred amps [4].
A. Topology
The classical topology of a low voltage active filter
differs from the MV topology in the interconnection of
neutral points. The LV operates with the neutral points
interconnection and MV without one. LV active filter
required special inverter topology; MV active filter can
be realized by a standard three-phase inverter.
B. Semiconductor Devices
The main limited parameter is traditionally the
blocking voltage of the used semiconductor devices.
Nowadays, two types of devices are taken into account:
insulated-gate bipolar transistors (IGBT) and integrated
gate-commutated thyristors (IGCT). The blocking voltage
limit of IGCT is 6500 V / 750 A or 5500 V / 1800 A.
Almost the same values are reached by IGBT modules:
6500 V / 750 A or 4500 V / 1200 A. However, according
to [4] the companion diode is the limiting factor. It is
evident that with increasing voltage limit decreases the
current one. These voltages often do not suffice for MV
applications; therefore they are connected in series for
decreasing the blocking voltage stress of devices.
Another solution for reaching higher output voltages is
the use of multilevel inverters. The higher number of
levels naturally decreases the rise of voltage (dv/dt) in
ratio 1:(n-1), where n is number of levels. This fact
reduces the demands on output filters, motor insulation
etc.
C. Switching Frequency
The non-linear load is a source of current high
harmonics (see Fig. 15). The active filter is a source of
voltage high harmonics. Therefore, some reactors have to
be interconnected between the active filter and the
network. Active filter has to be controlled to compensate
load current high harmonics. The deciding factor is the
switching frequency. Lets suppose the basic frequency
50 Hz and signal filtering up to 13th harmonic. If we take
into account the usual frequency distance between the
filtered harmonic and its carrier which is 10, we obtain
DS1b.10-6
the maximum switching frequency fmax:
50 13 10 6 500 (4)
Lets see on possible switching frequencies of HV
semiconductor devices. [4] states that the maximum
switching frequency of IGCTs comes up to 1000 Hz.
Therefore, the IGCTs are not suitable for the MV active
filters. The achievable switching frequency of IGBT
modules is in order of 10 000 Hz. Therefore, only IGBT
modules can be used for MV active filter.
D. DC supply voltage
In theory of power electronic converters, a ratio KU
between the amplitude of a sinusoidal output line to line
voltage Voutm and DC supply voltage VDCin of three-phase
inverter is used (KU = Voutm/VDCin). The maximal
theoretical value of this ratio is 1. This value can be
increased by using of some injecting method of additional
voltages to all three reference phase to zero basic
sinusoidal voltages. One of frequently used method is the
injection of the third harmonic to line to zero basic
harmonics. These methods allow to increase the value of
KU on 1,15.
In according Fig. 15 an active filter supplies currents
iUfilter, iVfilter, iWfilter to a network for the elimination of
higher harmonic currents in network. If an active filter in
Fig. 15 is realized as a voltage type inverter than it
operates as voltage source. In this case, reactors with the
inductivity Lf must be interconnected between the active
filter and network in each phase. The active filter must be
equipped by a controller with current loop that controls
its output voltages so that its output currents are iUfilter,
iVfilter, iWfilter. The equation (5) describes the relation
between the amplitude of the output line to zero voltage
Ufilterm and the amplitude of the output phase current
Ifilterm:
2 (5)
where is the harmonic order
fnet is the nominal network frequency
Lf is the inductivity of reactor in one phase
If a nonlinear load represents a thyristor rectifier or
diode rectifier than it operates as current source of typical
current harmonics. Their harmonic orders are 1, 5, 7,
11, 13, (2k1) and maximal values Iloadm = Iloadm1/. If
active filter eliminates these typical harmonics than it is
possible to obtain after substitution to (5):
2 (6)
The value of the reactance Xf depends inversely on the
value of an inverter switching frequency and on the value
of an inverter nominal current and linearly on the value of
inverter nominal voltage. Its value in p.u. is between 5%
and 10% of the inverter nominal impedance. Voltages
Ufilter must be summed in instantaneous values for the
determination of the needed maximal value of output
inverter voltage. This maximal needed voltage depends
also on the power factor of the load current first
harmonic. Maximal needed voltages in p.u. as functions
of power factor of load current and of eliminated
harmonic orders for xf = 10% are drawn in Fig. 16.
Maximal voltage in p.u. as function of load power
factor
1,4
1,3
maximal voltage [p.u.]
1,2
1,1
1
0,9
1 0,8 0,6 0,4
power factor
1+5 1+5+7 1+5+7+11
Fig. 16 Maximal voltages in p.u: as the function of the load power
factor
It is seen that the DC supply voltage of the inverter for
active filter must be increased from 1,15 to 1,35 of the
line to line network voltage. It means the ratio KU must be
decreased from (1/1,15 = 0,87) to (1/1,35 = 0,74).
The nominal current of the inverter depends on its
operation. If an inverter is used as the compensator and
the active filter of 5th, 7th, 11th and 13th harmonic for
thyristor rectifier than its nominal current must be equal
to the 0,81Id(AV) of rectifier. If an inverter is used only as
an active filter of 5th, 7th, 11th and 13th harmonic for the
same thyristor rectifier than its nominal current reduces to
the 0,22Id(AV) of this rectifier.
E. Control strategies
Control strategies of voltage type inverters for electric
drives are based on two independent control loops of two
output quantities (output voltage and output frequency,
output flux current and output torque current).
Similarly control strategies of AFE (Active Front End)
rectifiers are based on two independent loops of two
quantities (DC output voltage and reactive input current
component).
Control strategies for Static synchronous
Compensators STATCOMs are similar to control
strategies of AFE rectifiers. The DC voltage is now the
input quantity and reactive current component is the
output quantity now.
Also control strategies of active filters are based on two
independent loops of two quantities (DC input voltage
and the sum of filtered higher harmonics). Two different
groups of methods for the determination of the sum of
filtered higher harmonics are used.
First group of methods is based on a measurement of
instantaneous values of load currents and the
determination of instantaneous value of current vector L
by its active and reactive components. The reactive
component with opposite sign represents the value for a
current control loop. These methods operate in time
domain and they require high switching frequencies or
they are able to eliminate only several lower harmonics.
Second group of methods is based on a transformation
of time current waveforms to frequency domain and back.
Measured phase current continuous signals are
transformed to digital signals in A/D converter. The finite
number of quantities for one base period is the result of
this transformation and can be stored in a processor
memory as digital representation of one period of the
current waveform. This representation can be transformed
to frequency domain using FFT (fast Fourier
transformation). The output of FFT is the complex
number for each harmonic. The filtered current
harmonics are transformed back to the time domain and
0,2 0 transformed to the reference voltage signal for next
period. This implies that the filter process is delayed
1+5+7+11+13
minimal two basic periods.
VIII. CONCLUSION
This paper describes the designing, realization and first
experimental tests of the three-phase five-level FCMI
model in details. The two commutation transition method
is analyzed, explained and experimentally confirmed.
This method is better from the flying capacitors voltage
stabilization point of view. The multilevel inverter is
usable for the application as a high voltage compensator
and active filter. In this case, only IGBTs can be used and
voltage in the DC-link has to be higher than for
applications which operate only with the base harmonics.
Possible control strategies for active filters are shortly
described.
ACKNOWLEDGEMENT
This paper was prepared on results of common work
from the List of Chinese-Czech Scientific &
Technological Cooperation Committee projects (No. 39-
23 Study on Power Electronics Converter and Its Control
Strategy) and supported by Grant KONTAKT II
LH11098 of Czech Ministry of Education, Youth and
Sports. This work was also supported by the Grant
Agency of the Czech Technical University in Prague,
grant No. SGS12/067/OHK3/1T/13.
REFERENCES
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Inverter, Proceedings of EPE-PEMC 2002, Cavtat and
Dubrovnik, Croatia, September 2002
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Capacitors Multilevel Inverter Switch, Proceedings of EPE-
PEMC 2010, Ohrid, Macedonia, pp. T3-42 T3-45,September
2002
[3] ABB Semiconductors, Phase Control and Bi-directionally
Controlled Thyristors, Document no. 5SYA 2054-03, April 2011
[4] M. Rahimo, Power Semiconductors as a Key Enabler for Modern
and Future Power Electronics Systems, Energy and Power,
Windisch, March 2011
[5] P. Kokes, I. Pecha, P. Simek, J. Skramlik, V. Valouch, Topology
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International Scientific Symposium on Electric Power Engineering
- Elektroenergetika 2009, Stara Lesna, September 2009
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